TWI756757B - 薄膜電晶體的製造方法 - Google Patents

薄膜電晶體的製造方法 Download PDF

Info

Publication number
TWI756757B
TWI756757B TW109125411A TW109125411A TWI756757B TW I756757 B TWI756757 B TW I756757B TW 109125411 A TW109125411 A TW 109125411A TW 109125411 A TW109125411 A TW 109125411A TW I756757 B TWI756757 B TW I756757B
Authority
TW
Taiwan
Prior art keywords
fluorine
thin film
film transistor
doped
manufacturing
Prior art date
Application number
TW109125411A
Other languages
English (en)
Other versions
TW202205669A (zh
Inventor
張鼎張
蔡育霖
曹俞慶
陳宏誌
黃馨平
戴茂洲
陳柏勳
Original Assignee
國立中山大學
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 國立中山大學 filed Critical 國立中山大學
Priority to TW109125411A priority Critical patent/TWI756757B/zh
Priority to US17/017,732 priority patent/US20220037531A1/en
Publication of TW202205669A publication Critical patent/TW202205669A/zh
Application granted granted Critical
Publication of TWI756757B publication Critical patent/TWI756757B/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Thin Film Transistor (AREA)

Abstract

一種薄膜電晶體的製造方法，用以解決習知薄膜電晶體在防止氫擴散的製程效率低的問題。係包含：以一氣相沉積技術在一基板上形成數層薄膜及數個電極；及在氣相沉積過程中導入一含氟氣體，形成至少一層的含氟薄膜，藉由氟中和擴散至該數層薄膜的氫含量。

Description

薄膜電晶體的製造方法
本發明係關於一種電子元件，尤其是一種提升效能、可靠度及生產效率的薄膜電晶體的製造方法。
隨著行動、穿戴及微型化裝置等科技產品的普及，對於電子元件的工作效能、微縮及耐用性的研發需求增加，而金屬氧化物薄膜電晶體(Metal Oxide Thin Film Transistor)的體積小、漏電量少且反應快，兼具高解析度及省電的功效，適用節能、輕薄且易於安裝應用的軟性電子產品。
上述習知的金屬氧化物薄膜電晶體在製造過程中，會發生氫擴散現象，使電晶體的主動層、絕緣層、緩衝層及介電層等構造之間滲透或吸收大量氫，而導致氫脆(Hydrogen Embrittlement)現象，使電晶體材料的延伸性、耐衝擊性及疲勞壽命下降，容易在低強度應力作用下突然斷裂。
一般防止氫脆的製程，係以低溫及相對乾燥的條件進行沉積，避免過量的氫進入電晶體的結構；另，在退火處理過程中，減緩冷卻速度以延長電晶體的降溫時間，使氫有足夠時間從電晶體各層之間釋放出。
有鑑於此，習知的薄膜電晶體的製造方法確實仍有加以改善之必要。
為解決上述問題，本發明的目的是提供一種薄膜電晶體的製造方法，可以防止氫擴散導致材料劣化現象。
本發明的次一目的是提供一種薄膜電晶體的製造方法，具有省電及提升可靠度的作用。
本發明的又一目的是提供一種薄膜電晶體的製造方法，可以提升電晶體的生產效率。
本發明全文所記載的元件及構件使用「一」或「一個」之量詞，僅是為了方便使用且提供本發明範圍的通常意義；於本發明中應被解讀為包括一個或至少一個，且單一的概念也包括複數的情況，除非其明顯意指其他意思。
本發明的薄膜電晶體的製造方法，包含：以一氣相沉積技術在一基板上形成數層薄膜及數個電極；及在氣相沉積過程中導入一含氟氣體，形成至少一層的含氟薄膜，藉由氟中和擴散至該數層薄膜的氫含量。
據此，本發明的薄膜電晶體的製造方法，藉由在薄膜電晶體的至少一層使用摻氟材料，以氟中和滲入各薄膜之間的氫含量，係可以防止氫脆現象發生，還可以調整起始電壓偏向正電壓，達到省電及提升可靠度等功效，另外，藉由在形成該薄膜電晶體之各薄膜的過程中，導入含氟氣體以中和氫的製程方法，不需透過低溫沉積製程防止氫擴散，係可以提升生產效率。
其中，各該薄膜的材料係二氧化矽、氧化銦鎵鋅、氧化銦錫鋅、氮化矽、氧化鋁或氧化鉿。如此，各該薄膜可以具有各種電性、光學特性或物理強度，係具有增加薄膜電晶體可應用範圍的功效。
其中，該含氟薄膜的材料係二氧化矽摻氟、氧化銦鎵鋅摻氟、氧化銦錫鋅摻氟、氮化矽摻氟、氧化鋁摻氟或氧化鉿摻氟。如此，摻雜材料可以改變原材料的能帶結構而不破壞材料本質，係具有維持材料特性的功效。
其中，該氣相沉積技術係電漿輔助化學氣相沉積或射頻磁控濺鍍。如此，電漿可以增加反應速率，係具有提升製程效率的功效。
其中，該含氟氣體係四氟化矽。如此，四氟化矽氣體可以形成電漿，還可以做為氟離子的來源，係具有對薄膜摻氟的功效。
1:基板
2:薄膜
21:閘極絕緣層
22:主動層
23:緩衝層
24:介電層
25:保護層
3:含氟薄膜
T:上閘極
B:下閘極
D:汲極
S:源極
〔第1圖〕本發明第一實施例的結構剖面圖。
〔第2圖〕本發明第二實施例的結構剖面圖。
〔第3圖〕本發明不同摻氟比例之薄膜電晶體的汲極電流-閘極電壓關係變化圖。
〔第4圖〕如第3圖的薄膜電晶體使用1小時後的關係變化圖。
為讓本發明之上述及其他目的、特徵及優點能更明顯易懂，下文特舉本發明之較佳實施例，並配合所附圖式，作詳細說明如下：請參照第1圖所示，其係本發明薄膜電晶體的第一實施例，係包含一基板1、數層薄膜2及至少一層含氟薄膜3，該數層薄膜2及該含氟薄膜3位於該基板1上。
該基板1用於承載各種電子元件、線路及電極，藉由濺射、蒸鍍、雷射沉積等技術可以將金屬、半導體及絕緣等材料成形於該基板1上，並堆疊為薄膜電晶體的構造。該基板1可以是矽晶圓、氧化鋁、氮化鋁等晶體材料。
該數層薄膜2係疊層於該基板1，該數層薄膜2可以是一閘極 絕緣層21、一主動層22、一緩衝層23、一介電層24及一保護層25等電晶體的各種功能結構，該數層薄膜2的材料包含二氧化矽(SiO2)、氧化銦鎵鋅(IGZO)、氧化銦錫鋅(ITZO)、氮化矽(Si3N4)、氧化鋁(Al2O3)及氧化鉿(HfO2)等。
該含氟薄膜3可以是一摻氟絕緣層、一摻氟主動層、一摻氟緩衝層、一摻氟介電層及一摻氟保護層的至少一層，該含氟薄膜3與其他不含氟的該數層薄膜2相互疊層，使該薄膜電晶體的至少一層摻雜(Doping)氟(F)，該含氟薄膜3的材料可以是二氧化矽摻氟(SiO2：F)、氧化銦鎵鋅摻氟(IGZO：F)、氧化銦錫鋅摻氟(ITZO：F)、氮化矽摻氟(Si3N4：F)、氧化鋁摻氟(Al2O3：F)或氧化鉿摻氟(HfO2：F)等。藉由氟中和擴散至該數層薄膜2的氫含量，係可以減少氫脆現象導致的材料劣化狀況。
在本實施例中，該薄膜電晶體另具有一上閘極T、一下閘極B、一汲極D及一源極S，該上閘極T與該下閘極B之間可以是該閘極絕緣層21、該主動層22及該緩衝層23的疊層結構，且該上閘極T及該下閘極B分別透過該閘極絕緣層21及該緩衝層23絕緣於該主動層22，避免通過該主動層22的電流由該上閘極T及該下閘極B洩漏，又，該介電層24及該保護層25可以覆蓋於該上閘極T及該主動層22上，該汲極D及該源極S分別位於該數層薄膜2的兩端，並與該上閘極T及該下閘極B絕緣，該薄膜電晶體係雙閘極(Dual Gate)電晶體，其中，該數層薄膜2的至少一層可以替換為該含氟薄膜3，較佳地，將閘極絕緣層21或該主動層22替換為摻氟絕緣層或摻氟主動層，係可以減少氫擴散現象，達到提升電晶體性能及可靠度的作用。
請參照第2圖所示，其係本發明薄膜電晶體的第二實施例，在該基板1上依序疊層該下閘極B、該閘極絕緣層21、該主動層22及該保護層25，該汲極D及該源極S分別位於該數層薄膜2的兩端，該薄膜電晶體係下 閘極(Bottom Gate)電晶體，其中，該閘極絕緣層21及該主動層22的至少一層可以替換為該含氟薄膜3。本發明的薄膜電晶體係依據操作條件及功能性，係可以是不同的結構型態，且該薄膜2、該含氟薄膜3及電極的配置與數量皆不以上述實施例為限。
請參照第1圖所示，本發明薄膜電晶體的製造方法包含：以濺鍍(Sputter)在該基板1上形成該下閘極B，在該閘極絕緣層21上形成該上閘極T，在該主動層22的兩端形成該汲極D及該源極S；以電漿輔助化學氣相沉積(Plasma Enhanced Chemical Vapor Deposition,PECVD)形成該閘極絕緣層21、該緩衝層23、該介電層24及該保護層25，還可以形成摻氟絕緣層、摻氟緩衝層、摻氟介電層及摻氟保護層的至少一層；以射頻磁控濺鍍(Radio Frequency Magnetron Sputtering)形成該主動層22或摻氟主動層。舉例而言，該閘極絕緣層21可以是甲矽烷(SiH4)的氧化反應所產生的二氧化矽(SiO2)薄膜，而摻氟絕緣層可以是甲矽烷及四氟化矽(SiF4)共同氧化所產生的二氧化矽摻氟(SiO2：F)薄膜；又，該主動層22係以氧化銦、氧化鎵及氧化鋅為靶材，並以氧氣及氬氣為離子源，再透過電場及磁場控制離子轟擊靶材，使銦、鎵、鋅原子擴散並沉積所形成的氧化銦鎵鋅(IGZO)薄膜，而藉由增加四氟化矽為離子源，可以產生摻氟主動層的氧化銦鎵鋅摻氟(IGZO：F)薄膜。本發明薄膜電晶體的製造方法所使用的材料及工作氣體不以上述實施例為限。
請參照第1及3圖所示，其係薄膜電晶體的摻氟比例與對應的閾值電壓(Threshold Voltage)的比較圖，該閾值電壓係作用於該主動層22的閘極電壓達到的臨界值，可以使該汲極D提供的汲極電流瞬間升高，即該薄膜電晶體呈導通狀態，由第3圖可知，未摻氟之薄膜電晶體的閾值電壓約為負2伏特，摻氟比例百分之五的閾值電壓約為負0.5伏特，摻氟比例百分之 十的閾值電壓接近0伏特，因此，透過摻氟製程產生的該含氟薄膜3佔該薄膜電晶體各層的比例愈高，該薄膜電晶體的閾值電壓愈偏向正電壓，具有省電、容易操作及使用安全等作用。
請參照第4圖所示，其係不同摻氟比例之薄膜電晶體在使用1小時後的閾值電壓比較圖，由第4圖可知，未摻氟之薄膜電晶體的閾值電壓偏移至負8伏特，摻氟比例百分之五及百分之十之薄膜電晶體的閾值電壓則維持在0伏特附近，其閾值電壓沒有發生明顯的偏移，因此，具有該含氟薄膜3的薄膜電晶體操作相對穩定而不易在使用中失效，具有提升可靠度的作用。
綜上所述，本發明的薄膜電晶體的製造方法，藉由在薄膜電晶體的至少一層使用摻氟材料，以氟中和滲入各薄膜之間的氫含量，係可以防止氫脆現象發生，還可以調整起始電壓偏向正電壓，達到省電及提升可靠度等功效，另外，藉由在形成該薄膜電晶體之各薄膜的過程中，導入含氟氣體以中和氫的製程方法，不需透過低溫沉積製程防止氫擴散，係可以提升生產效率。
雖然本發明已利用上述較佳實施例揭示，然其並非用以限定本發明，任何熟習此技藝者在不脫離本發明之精神和範圍之內，相對上述實施例進行各種更動與修改仍屬本發明所保護之技術範疇，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
1:基板
2:薄膜
21:閘極絕緣層
22:主動層
23:緩衝層
24:介電層
25:保護層
3:含氟薄膜
T:上閘極
B:下閘極
D:汲極
S:源極

Claims (5)

  1. 一種薄膜電晶體的製造方法，包含：以一氣相沉積技術在一基板上形成數層薄膜及數個電極；及在氣相沉積過程中導入一含氟氣體，形成至少一層的含氟薄膜，藉由氟中和擴散至該數層薄膜的氫含量。
  2. 如請求項1之薄膜電晶體的製造方法，其中，各該薄膜的材料係二氧化矽、氧化銦鎵鋅、氧化銦錫鋅、氮化矽、氧化鋁或氧化鉿。
  3. 如請求項1之薄膜電晶體的製造方法，其中，該含氟薄膜的材料係二氧化矽摻氟、氧化銦鎵鋅摻氟、氧化銦錫鋅摻氟、氮化矽摻氟、氧化鋁摻氟或氧化鉿摻氟。
  4. 如請求項1之薄膜電晶體的製造方法，其中，該氣相沉積技術係電漿輔助化學氣相沉積或射頻磁控濺鍍。
  5. 如請求項1之薄膜電晶體的製造方法，其中，該含氟氣體係四氟化矽。
TW109125411A 2020-07-28 2020-07-28 薄膜電晶體的製造方法 TWI756757B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW109125411A TWI756757B (zh) 2020-07-28 2020-07-28 薄膜電晶體的製造方法
US17/017,732 US20220037531A1 (en) 2020-07-28 2020-09-11 Thin film transistor and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW109125411A TWI756757B (zh) 2020-07-28 2020-07-28 薄膜電晶體的製造方法

Publications (2)

Publication Number Publication Date
TW202205669A TW202205669A (zh) 2022-02-01
TWI756757B true TWI756757B (zh) 2022-03-01

Family

ID=80004571

Family Applications (1)

Application Number Title Priority Date Filing Date
TW109125411A TWI756757B (zh) 2020-07-28 2020-07-28 薄膜電晶體的製造方法

Country Status (2)

Country Link
US (1) US20220037531A1 (zh)
TW (1) TWI756757B (zh)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201320199A (zh) * 2011-10-07 2013-05-16 Applied Materials Inc 於基板上形成矽層之方法、形成矽氧化物層之方法及具有其之金屬氧化物薄膜電晶體元件
US20160013320A1 (en) * 2013-03-19 2016-01-14 Applied Materials Inc. Multilayer passivation or etch stop tft

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201320199A (zh) * 2011-10-07 2013-05-16 Applied Materials Inc 於基板上形成矽層之方法、形成矽氧化物層之方法及具有其之金屬氧化物薄膜電晶體元件
US20160013320A1 (en) * 2013-03-19 2016-01-14 Applied Materials Inc. Multilayer passivation or etch stop tft

Also Published As

Publication number Publication date
US20220037531A1 (en) 2022-02-03
TW202205669A (zh) 2022-02-01

Similar Documents

Publication Publication Date Title
CN102576677B (zh) 半导体元件及其制造方法
US8735229B2 (en) Method of manufacturing ZnO-based thin film transistor
KR101800852B1 (ko) 반도체 장치
KR101509663B1 (ko) 산화물 반도체층 형성 방법 및 이를 이용한 반도체 소자제조방법
CN102822979B (zh) 半导体器件
US9530893B2 (en) Semiconductor device, measurement apparatus, and measurement method of relative permittivity
KR20110063252A (ko) 트랜지스터와 그 제조방법 및 트랜지스터를 포함하는 전자소자
KR20120024435A (ko) 반도체 장치
KR20090056590A (ko) 산화물 반도체 박막 트랜지스터의 제조 방법
JP2007220817A (ja) 薄膜トランジスタ及びその製法
JP2009059882A (ja) 半導体装置
US9508544B2 (en) Semiconductor device and method for manufacturing same
WO2015188476A1 (zh) 薄膜晶体管及其制作方法、oled背板和显示装置
JP3819793B2 (ja) 成膜方法及び半導体装置の製造方法
TWI756757B (zh) 薄膜電晶體的製造方法
US6900083B2 (en) Method of forming multi-layers for a thin film transistor
CN105870201B (zh) Tft器件结构及其制作方法
JP5612299B2 (ja) トランジスタの作製方法
US10748759B2 (en) Methods for improved silicon nitride passivation films
WO2022130912A1 (ja) 薄膜トランジスタの製造方法
WO2022202100A1 (ja) シリコン酸窒化膜の成膜方法及び薄膜トランジスタの製造方法
CN117810089A (zh) 薄膜晶体管的制备方法
WO2018181296A1 (ja) チャネルエッチ型薄膜トランジスタの製造方法
JP5940124B2 (ja) トランジスタの作製方法
CN108321122A (zh) Cmos薄膜晶体管及其制备方法和显示装置