TWI752535B - 應用於高功率密度充電的超快速暫態響應交直流轉換器 - Google Patents

應用於高功率密度充電的超快速暫態響應交直流轉換器 Download PDF

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TWI752535B
TWI752535B TW109121164A TW109121164A TWI752535B TW I752535 B TWI752535 B TW I752535B TW 109121164 A TW109121164 A TW 109121164A TW 109121164 A TW109121164 A TW 109121164A TW I752535 B TWI752535 B TW I752535B
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Taiwan
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converter
pcb
controller
drain
printed circuit
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TW109121164A
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TW202101888A (zh
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黃培倫
陳佑民
林天麒
鄭榮霈
于岳平
牛志強
曉天 張
隆慶 王
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加拿大商萬國半導體國際有限合夥公司
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
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    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
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    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
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Abstract

本發明公開了一個充電器，包括外殼、第一多層印刷電路板(PCB)、第二多層印刷電路板和第三多層印刷電路板。所述的第一印刷電路板包括初級側電路的至少一部分；所述的第二印刷電路板包括二次側電路的至少一部分；所述的第三印刷電路板垂直於所述的第一印刷電路板和所述的第二印刷電路板，隔離耦合元件設置在第三印刷電路板上，所述的隔離耦合元件包括多層印刷電路板；所述的第一印刷電路板包括高壓(HV)半導體封裝，所述的高壓(HV)半導體封裝包括一個高壓金屬氧化物半導體場效應電晶體(MOSFET)晶片倒裝在晶片基座上，所述的晶片基座的底面從成型封裝的底面露出。

Description

應用於高功率密度充電的超快速暫態響應交直流轉換器
本發明涉及一種超快速暫態響應(STR)交流/直流(AC/DC)轉換器及其在高功率密度充電中的應用。STR AC/DC轉換器具有使用更小的變壓器和電容器並提高性能的優點。結合獨特的印刷電路板(PCB)設計和部件整合，組裝成一個緊湊型功率傳遞(PD)充電器，為快速充電應用提供超過0.6W/CC的功率密度。
圖1A是基於脈寬調製(PWM)控制反激AC/DC轉換器的傳統充電器的簡化電路圖。變壓器TX1將從一次側電源接收到的能量傳輸到二次側，為負載供電。變壓器TX1的初級線圈的第一端連接到變壓器輸入電壓VBulk，一般是來自交流壁裝電源插座的整流輸出電壓(整流電壓)。變壓器初級線圈的第二端連接到主開關Q1，以調節藉由變壓器初級線圈的電流，以便將能量傳輸到變壓器的次級側。主控制器位於變壓器的一次側，用於控制主開關的接通和斷開。一個反饋回路，其誤差放大器位於變壓器的次級側，藉由光耦將輸出信息反饋給第一側的控制器。如圖1B所示，圖1A中電路的工作頻率在峰值負載時限制在65kHz至85kHz。脈寬調製控制器的控制帶寬(BW)受電流模式控制環路帶寬 (BW~0.1×fs)約為開關頻率的十分之一的限制。由於工作頻率低，控制帶寬窄，輸出電壓暫態響應慢。圖1C顯示了負載在空載和100%負載之間過渡時，由於工作頻率fs的緩慢過渡，輸出電壓、Vout和暫態響應的大波動。此外，對於傳統的脈寬調製控制器，為了保持與負載狀態變化對應的高轉換效率，需要在連續導通模式(CCM)和中斷導通模式(DCM)的不同操作模式之間切換脈寬調製控制器的操作。為了保持控制器的穩定運行，通常需要恆流補償回路和恆壓補償回路。因此，傳統的基於脈寬調製控制的反激式交直流轉換器的充電器不可避免地需要額外的元件。
圖1D和圖1E分別顯示了圖1A傳統充電器中常用的傳統垂直MOSFET電晶體的橫截面圖和俯視圖。該電晶體的汲極D位於電晶體晶片的底面上，連接到引線框架晶片基座上，引線框架晶片基座底部表面暴露於封裝中。源極和閘極位於電晶體晶片的頂面上。源極和閘極連接到源極引腳S和閘極引腳G。圖1F顯示了圖1A的傳統充電器的PCB佈局10。PCB佈局10配置為接收圖1D和圖1E的傳統MOSFET器件。傳統MOSFET器件具有小面積源極引腳連接到PCB上的小銅墊11，大面積汲極引腳14連接到PCB上的大銅墊12。MOSFET晶片的汲極藉由汲極引腳14和銅墊區12之間的大接觸區與變壓器TX1連接。MOSFET晶片的源極藉由電阻R2接地。由於熱耗散和電磁干擾(EMI)降噪之間不可避免的折衷，PCB佈局10的性能沒有得到優化。MOSFET器件Q1會發熱，需要一個大的銅墊區域12(例如，長度大於10mm，寬度大於5mm)進行冷卻。然而，大面積汲極引腳14具有高電壓和高dv/dt值。它將EMI雜訊與系統耦合。這對於低壓應用來說可能不是問題。然而，對於500V或更高電壓應用，由於快速變化和高汲極電壓，EMI雜訊很高。它需要一個小的銅墊區域12來降低電磁干擾雜訊。這 與需要使用更大的銅墊區域12進行冷卻的要求相反。一個大的銅墊區域12的結果是產生大的電磁干擾雜訊。為了滿足規範要求，經常需要採用附加的大體積散熱器和金屬屏蔽來提高散熱性能和射頻干擾屏蔽。此外，對於高壓應用，大面積的高壓汲極引腳需要較大的安全空間，因此增加了器件面積，使得在保持高電壓安全空間的同時，最大限度地減小器件尺寸成為一項挑戰。
便攜式設備充電器的理想功能包括：提供安全充電而不損壞待充電設備的高性能、快速充電以節省時間和緊湊尺寸以節省空間以方便移動。這種理想的特性將迫使充電器使用較少的元件數量和較小尺寸的元件，如較小的變壓器和較小的電容器，以處理更高的功率密度而不增加太多的成本。功率密度的增加會引起散熱和電磁干擾問題。使用較小的部件或較少的部件數可能會影響充電器的性能。因此，目前市場上最好的充電器功率密度小於0.5W/CC。
本發明提供了一種超過0.5W/CC的解決方案，其方法是：採用新穎的系統電路控制，將主開關和控制積體電路(IC)共同封裝在單一晶片基座上，並使用四層印刷電路板(PCB)。因此，減少了電磁干擾，提高了熱性能，實現了快速開啟。
為了達到上述目的，本發明藉由以下技術方案實現：一個設置在多層印刷電路板PCB上的交流/直流轉換器，所述交流/直流轉換器包括：一個變壓器，包括初級線圈和次級線圈，初級線圈的第一端子接收整流電壓； 一個功率半導體封裝，包括主開關，該主開關具有連接到源極引線的源極電極和連接到汲極引線的汲極電極；其中，汲極引線連接到印刷電路板上的汲極接觸焊盤上；其中，所述汲極接觸焊盤與所述變壓器初級線圈的第二端子電連接；其中，所述源極引線連接到所述印刷電路板上的源接觸焊盤；並且其中，連接PCB上的源接觸焊盤的源引線面積大於連接PCB上的汲極接觸焊盤的汲極引線面積。
可選的，所述多層印刷電路板包括頂層和底層之間的一個或多個中間層。
可選的，所述多層印刷電路板的中間層包括連接到源極接觸焊盤的導電區域。
可選的，所述功率半導體封裝設置在頂層，所述變壓器設置在底層。
可選的，所述功率半導體封裝還包括驅動IC，用於提供控制主開關的驅動信號。
可選的，所述功率半導體封裝還包括用於接收整流電壓以產生控制主開關的啟動信號的耗盡型場效應電晶體。
可選的，還包括驅動器IC，以提供控制主開關的驅動信號。
可選的，還包括：二次側控制器，其中二次側控制器包括：一個反饋回路，其包括一個比較器，比較器的反向端子接收與輸出電壓成比例的反饋電壓，並與非反向端子上的參考電壓相比較。
可選的，所述二次側控制器還包括一個導通時間發生器，其接收來自所述比較器的比較結果以生成一個導通時間控制信號。
可選的，還包括同步MOSFET電晶體，所述同步MOSFET電晶體具有連接到所述次級線圈的第二端子的汲極和連接到地的源極。
可選的，還包括連接在二次側控制器和驅動器之間的隔離耦合元件。
可選的，所述驅動器產生驅動信號以打開和關閉主開關電晶體，以在滿負荷時以高於最大85kHz的開關頻率調節藉由變壓器初級線圈的電流。
可選的，自然峰值負載工作頻率被限制在最大150kHz。
可選的，輸出電壓包括紋波雜訊，所述紋波雜訊包括低頻交流紋波和開關頻率的高頻開關紋波；並且，在所述整流電壓的波峰附近的開關紋波頻率低於整流電壓的波谷附近的開關紋波頻率。
可選的，輸出電壓不包含次諧波頻率紋波雜訊。
可選的，所述二次側控制器是一個固定導通時間控制器；其中，在滿負荷條件下，當整流電壓降低時，所述二次側控制器增加導通時間以保持負載輸出直到達到最大的導通時間。
可選的，最大導通時間為占空比的80%。
可選的，當達到最大導通時間時，當整流電壓持續降低時，控制器增加開關頻率。
可選的，還包括帶內置微控制器單元的功率傳遞控制器，以與負載通信。
可選的，所述功率傳遞控制器為USB C型控制器。
本發明與習知技術相比具有以下優點： 本發明的系統電路控制採用二次側固定導通時間(COT)控制，使得主控制器中帶有比較器的反饋回路位於二次側(而不是在習知技術中的一次側使用誤差放大器)。與傳統控制方案相比，本發明的控制響應更快。自然峰值負荷運行頻率最大為150kHz(與傳統最大值的65k-85kHz相比)。更高的開關頻率150kHz，不僅提供了快速響應暫態調節的好處，還可以在保持相同的輸出功率條件下，使用更小的電容器和更小的變壓器。此外，本發明的控制方案不需要任何額外的補償回路部件。因此，本發明能夠將系統封裝到較小的空間中，而不會降低熱性能和電性能。
本發明的變壓器尺寸減小，因為線圈匝數從85kHz最大頻率的58匝減少到150kHz最大頻率的45匝。13圈的線圈匝數裕度可用於選擇較小尺寸的磁芯體，或用於選擇較大直徑的導線以減小尺寸或銅損耗。
由於COT全範圍開關頻率反饋控制方案、最大占空比高達80%、負載條件高達150kHz的自動頻率掃描以及不使用電流模式控制因而沒有子諧波的問題，本發明的電容器尺寸減小。
本發明公開了一種交流/直流充電器，包括外殼、第一印刷電路板、第二印刷電路板、第三印刷電路板、第一插腳和第二插腳。第一印刷電路板包括初級側電路。第二印刷電路板包括次級側電路。第三印刷電路板垂直於第一印刷電路板和第二印刷電路板。本發明的第一印刷電路板、第二印刷電路板和第三印刷電路板是多層印刷電路板，較佳為四層印刷電路板。除接觸區域外，它們還提供額外的散熱區域。
分離的初級側印刷電路板(帶有一個主控制器)和次級側印刷電路板(帶有一個次級控制器)提供了在三維支撐夾具的協助下優化元件佈置的優勢，以將系統包裝在最小空間內。在一個例子中，隔離耦合元件被佈置在第三個印刷電路板上。隔離耦合元件包括多層PCB無芯變壓器，較佳為四層PCB 無芯變壓器。PCB無芯變壓器作為一個獨立的表面安裝部件或嵌入母板內提供了靈活性。
第一印刷電路板和第二印刷電路板各包括半導體封裝。半導體封裝的晶片基座的底面暴露於成型封裝中。晶片基座的外露表面直接連接到印刷電路板的導電區域。本發明的半導體封裝利用MOSFET倒裝晶片封裝技術，將MOSFET電晶體和控制IC共同封裝在單個晶片基座上。它提供了一個大面積的源電極，從封裝的底面暴露出來，以提高熱耗散，降低變壓器一次側和二次側的電磁干擾。
10:PCB佈局
11:小銅墊
12:大銅墊
14:汲極引腳
100:充電器
101:變壓器
102:控制器
103:隔離耦合元件
104:初級側驅動器
105:關閉主開關
110:外殼
111:第一側面
112:第二側面
120:第一印刷電路板
121:內層
122:外層
123:中間層
140:第二印刷電路板
141:內層
142:外層
143:中間層
152:第一插腳
154:第二插腳
160:第三PCB
180:開口
191:比較器
192:導通時間發生器
200:AC/DC反激轉換器電路
201:變壓器
202:橋式整流器
203:儲能電容器
213:輸出電容器
220:初級側電路
221:側接收器
223’:組合導電區域
223C:大面積源極接觸焊盤
225C:小面積汲極接觸焊盤
227:導電通孔
240:次級側電路
241:次級側STR控制器
243’:導電區域
243:擴展導電區域
245c:汲極接觸焊盤
247:導電通孔
250:隔離耦合元件
271:PD控制器
281:多針輸出互連插座
300:HV半導體封裝
319:底面
322:晶片基座
326:非蝕刻上表面部分
328:蝕刻上表面部分
329:凹槽陣列
335:汲極引腳
336:第一非導電材料
340:IC
347:引腳
350:DFET
360:MOSFET
361:源電極
362:焊球
367:引腳
372:預成型封裝
386:高壓引腳
388:低壓引腳
389:水平距離
390:成型封裝
399:倒L形切除區
400:半導體封裝
420:引線框架
422:晶片基座
426:未蝕刻的頂表面部分
428:蝕刻的頂表面部分
429:凹槽陣列
436:非導電材料
440:控制器
460:MOSFET
462:導電材料
490:模製封裝
500:半導體封裝
520:引線框架
522:第一晶片基座
524:第二晶片基座
526:第三晶片基座
540:PD控制器
550:第一MOSFET
560:第二MOSFET
590:模製封裝
1200:底層
1232:第一焊盤
1234:第二焊盤
1236:第三焊盤
1238:第四焊盤
1300:上層
1360:初級線圈
1362:第一端
1364:第二端
1370:次級線圈
1380:第一部分
1382:中間接點
1384:第二端
1400:下層
1480:第二部分
1481:中間接點
1482:第一端
1484:第二端
1498:導電線路
圖1A是習知技術充電器的簡化電路圖；圖1B顯示習知技術充電器的開關頻率負載依賴性；圖1C是習知技術充電器的輸出暫態響應圖；圖1D和圖1E分別顯示了習知技術充電器中使用的傳統垂直MOSFET電晶體的橫截面圖和俯視圖；圖1F顯示了習知技術充電器的印刷電路板佈局；圖2A是本發明示例中充電器的簡化電路圖；圖2B顯示本發明的示例中充電器的開關頻率負載依賴性；圖2C是本發明示例中充電器的輸出暫態響應圖；圖2D顯示了降低充電器整流電壓的控制響應；圖2E顯示了本發明示例中充電器的輸出紋波；圖3A是本發明示例中充電器的透視圖；圖3B是本發明示例中充電器的電路； 圖4A、圖4B和圖4C分別是本發明示例中充電器第一印刷電路板的內層、外層和中間層的佈局；圖5A、圖5B和圖5C分別是本發明示例中充電器第二印刷電路板的內層、外層和中間層的佈局；圖6A、圖6B和圖6C分別為本發明示例中高壓(HV)半導體封裝的俯視圖，橫截面圖和底面視圖；圖7A和圖7B分別是本發明示例中半導體封裝的是俯視圖和橫截面圖；圖8是本發明示例中另一半導體封裝的俯視圖；圖9A、9B和9C分別是本發明的示例中PCB無芯變壓器的上層、下層和底層的俯視圖。
以下結合圖式，藉由詳細說明一個較佳的具體實施例，對本發明做進一步闡述。
圖2A是本發明示例中基於反激AC/DC轉換器的二次側固定導通時間控制(COT)的充電器的簡化電路圖。控制器102位於變壓器101的二次側(次級側)。控制器102在次級側包括反饋回路，比較器191的反向端接收反饋電壓，該反饋電壓與輸出電壓成比例，並與比較器191的非反向端上的參考電壓相比較。比較結果由導通時間發生器192接收，該發生器處理其接收的信息，以生成藉由隔離耦合元件103傳輸到變壓器101初級側驅動器104的導通時間控制信號。驅動器根據接收到的開啟和關閉主開關105的導通時間控制信號生成驅動信號，以調節藉由變壓器101的初級線圈的電流。主開關105(MOSFET或其它 絕緣閘極電晶體)可在遠高於傳統脈寬調製控制方案最大85kHz的工作頻率下驅動。如圖2B所示，圖2A中電路的自然峰值負載工作頻率被限制在最大150kHz。藉由使用COT全範圍開關頻率反饋控制方案實現超快速暫態響應(STR)，結果如圖2C所示，輸出電壓(圖2A的Vout和圖2C中的Vo)非常穩定，在負載轉換過程中波動很小。
在本發明的示例中，次級側COT控制方案提供的更高操作頻率提供了在基於該控制方案製造充電器時減小變壓器尺寸的優勢。例如，假設圖2A中的電路在100%負載下以150kHz的開關頻率運行，峰值電流ipk為1.0安培，相比之下，圖1A中的電路在85kHz的開關頻率運行，100%負載將不得不將其峰值電流ipk增加到1.3安培，以便根據公式(1)提供相同的輸出功率：
Figure 109121164-A0305-02-0011-1
其中Po為輸出功率，Lm為變壓器電感，fs為工作頻率。如果最大頻率85kHz下的滿載轉比設計為58圈，則根據公式(2)中的關係，150kHz下的滿載轉比設計可減少為45圈。
L×i pk=N p ×B sat ×A e (2)
其中Np是初級線圈匝數，Bsat是磁芯飽和磁通密度，Ae是磁芯橫截面積。因此，有13圈的線圈匝數裕度可以選擇較小尺寸的磁芯或使用較大直徑的導線以減小尺寸或銅損耗時。
在本發明的示例中，控制方案的超快速暫態響應(STR)特性使負載條件高達150kHz的自動頻率掃描成為可能。這為基於該控制方案的充電器的製造提供了減小儲能電容器(輸入電容器)尺寸的優勢。在本發明的示例中，如圖2D所示，在滿負荷條件下，當整流電壓VBulk降低時，控制方案將增加固定 導通時間Ton，以保持負載直到達到最大的固定導通時間Ton。在本發明的示例中，如果整流電壓VBulk繼續降低，控制方案將增加開關頻率fs，以保持負載。與傳統PMW控制方案能提供60%最大占空比相比，次級側COT控制方案將最大占空比提高到80%。增大的最大占空比可以在低電壓下提供更大的功率，或者可以在不影響控制性能的情況下使用較小的電容器。在本發明的示例中，由於控制方案不基於電流模式控制，因此它沒有次諧波問題。低頻元件需要一個較大的電容器來過濾掉。
輸出電壓VOUT具有一個紋波雜訊，該紋波雜訊包括一個低頻交流紋波，該低頻交流紋波源自兩倍輸入交流源頻率的整流電壓，加上由於主開關的開關操作而在開關頻率fs處產生的高頻開關紋波。在本發明的示例中，如圖2E所示，整流電壓VBulk波峰周圍的開關紋波頻率低於整流電壓VBulk波谷周圍的開關紋波頻率。在一個例子中，“峰周圍”和“谷周圍”分別指來自波峰或波谷的小於10%的占空比。在另一個例子中，“波峰周圍”和“波谷周圍”分別指來自波峰或波谷的小於20%的占空比。這是因為控制方案在交流紋波谷提供更高的開關頻率，在交流紋波波峰提供更低的開關頻率。這與傳統的控制方案相反，後者的開關頻率固定，不管在整流電壓峰值和谷值。本發明中，由低頻交流紋波的波峰到波谷，開關頻率升高。由低頻交流紋波的波谷到波峰，開關頻率降低。這有助於避免電壓擺動，降低交流紋波和開關紋波雜訊。根據本發明的這一特點，輸出電容器的尺寸可以更小。
在本發明的示例中，控制方案允許使用較小的儲能電容器和輸出電容器。在輸出功率為10W的示例中，系統使用16.8μF的儲能電容器和720μF的輸出電容器。與基於傳統控制方案的10W iPAD充電器(使用24μF的儲能電容器 和1200μF的輸出電容器)相比，本發明的控制方案使用更小的儲能電容器僅為習知技術的70%，較小的輸出電容器僅為習知技術的60%。此外，本發明的控制方案不需要補償回路的任何元件。本發明的所有這些特徵有助於根據新的控制方案減小充電器的尺寸。
圖3A是本發明示例中充電器100的透視圖。圖3B是本發明示例中充電器100的AC/DC反激轉換器電路200。充電器100包括外殼110、第一印刷電路板(PCB)120、第二印刷電路板140、第一插腳152和第二插腳154。外殼110為立方體形狀或矩形棱柱形狀。可選圓角適用於外殼110。第一印刷電路板臨近外殼110的第一側面111。第二印刷電路板140臨近外殼110的第二側面112。第二側面112與第一側面111相對。第一插腳152和第二插腳154穿過外殼110的底面。外殼110的底面垂直於第一和第二側面111和112。在一個示例中，第一插塞腳152和第二插塞腳154彼此沿平行於第一和第二側面111和112的方向佈置。在另一個示例中，第一插腳152和第二插腳154彼此沿垂直於第一和第二側面111和112的方向佈置。插座連接器，例如USB C型連接器或最小化型標準化連接器，藉由外殼110頂面上與底面相對的開口180暴露。在圖3A中，外殼110和第一、第二印刷電路板畫成透明的。
圖3B是一個更詳細的電路圖，其採用與圖2A相同的控制方案。如圖3B所示，AC/DC反激轉換器電路200包括變壓器201，其具有連接到接收從AC輸入整流的整流電壓VBulk的一次線圈的第一端子。由帶濾波電路的橋式整流器202(包括儲能電容器203)進行濾波。初級線圈的第二端子連接到初級側接收器221的汲極端子。一次側接收器221還包括接收在二次側產生的控制信號的Rx終端，該控制信號作為閘極控制信號來調節藉由一次線圈的一次電流。一次側 接收器221還可以包括一個高壓終端HV，以在接收到二次側產生的控制信號之前，在提供交流輸入的開始時接收到整流電壓以產生啟動信號以控制一次線圈的一次電流。在變壓器201的二次側，提供與圖2A中的控制器102以相同控制方案操作的超快速暫態響應(STR)控制器241，以在反饋終端FB處接收輸出反饋信號。在處理反饋信號後，次級側STR控制器241產生恆定的導通時間控制信號。隔離耦合元件250連接在二次側STR控制器241的傳輸終端Tx和一次側接收器221的Rx終端之間，將固定導通時間控制信號從二次側傳輸到反激轉換器的一次側。
交直流反激轉換器電路200的二次側還包括一個標準的高度整合的功率傳遞(PD)控制器271，藉由多針輸出互連插座281與負載通信。高度整合的PD控制器271可配備內置微控制器單元(MCU)和內置多次編程(MPT)功能。在一個例子中，高度整合的PD控制器271是一個通用系列總線(USB)C型控制器，支持2.0/3.0標準的供電。
在圖3A中，第一印刷電路板120包括內層121、外層122和可選的一個或多個中間層123。在本發明的示例中，第一印刷電路板120包括圖3B的一次側電路220的至少一部分。在一個示例中，安裝在第一印刷電路板120上的初級側電路220的部件包括變壓器201和儲能電容器203佈置在圖4A所示的內層121上，以及佈置在圖4B所示外層122上的初級側接收器221。在另一個示例中，安裝在第一印刷電路板120上的初級側電路220的部件還包括設置在外層122上的橋式整流器202。
如圖3A所示，第二PCB 140包括內層141，外層142，以及其間可選的一個或多個中間層143。第二PCB 140包括圖3B的次級側電路240的至少一部 分。在一個示例中，安裝在第二PCB 140上的次級側電路240的部件包括設置在如圖5A所示的內層141上的輸出電容器213，以及設置在如圖5B所示的外層142上的次級側STR控制器241和高度整合的PD控制器271。在另一示例中，安裝在第二PCB 140上的次級側電路240的部件還包括設置在內層141上的多針輸出互連插座281。如圖3A所示，第一PCB 120的內層121面向第二PCB 140的內層141，使得變壓器201，儲能電容器203，輸出電容器213和其他大體積元件被限制在第一PCB 120和第二PCB 140之間的空間中。低輪廓表面安裝部件，包括初級側接收器221，次級側STR控制器241和高度整合的PD控制器271，位於分別面向外殼110第一和第二側表面111和112的外層122和142上。多針輸出互連插座281較佳地安裝在第二PCB 140的面向外殼110的頂表面上的開口180的邊緣上。
為了避免習知技術裝置中出現的散熱問題和EMI問題，本發明第一PCB120的外層122設置有大面積源極接觸焊盤223C和小面積汲極接觸焊盤225C，如圖4B所示。在一個示例中，大面積源極接觸焊盤223C的面積是小面積汲極接觸焊盤225C的面積的十倍或更多。在另一示例中，大面積源極接觸焊盤223C的面積是小面積汲極接觸焊盤225C的面積的二十倍或更多。大面積源極接觸焊盤223C具有基本上與圖6C所示的初級側接收器221從半導體封裝底面露出的晶片基座的底表面319一致的形狀。如圖4B和6C所示，在源極接觸焊盤223C和用作半導體封裝的源極引腳的暴露的晶片基座之間提供大的源極連接區域。小面積汲極接觸焊盤225C具有基本上與從圖6C所示的初級側接收器221的半導體封裝的底面露出的汲極引腳的底表面一致的形狀。如圖4B和6C所示，在汲極接觸焊盤225C和半導體封裝的暴露的汲極引腳之間提供小的汲極連接區域。在一個示例中，源連接區域是汲極連接區域的10倍以上。大面積源極接觸焊盤提供主開關快速散熱的優點，小面積汲極接觸焊盤提供降低射頻輻射EMI的好處。如圖4B所示，大面積源極接觸焊盤223C擴展到第一PCB 120的外層122上的大導 電區域223，以用作散熱器。為了進一步改善系統的熱性能，在圖4A中內層121以及圖4C中的一個或多個可選的中間層123上設置較大的導電區域223'，藉由導電通孔227連接到第一PCB 120的外層122上的大面積源極接觸焊盤223C和擴展導電區域223。如圖4C所示，一個或多個可選中間層123上的導電區域223'可以基本上擴張到整個中間層的PCB區域，除了導電孔的位置和它們的互連之外。這有助於藉由整個PCB擴散和平均電流開關元件產生的熱量，從而大大提高了熱性能。在一個示例中，藉由導電通孔227連接到源極接觸焊盤223C的第一PCB 120的所有層中的組合導電區域223'是源極接觸焊盤223C的面積的五倍以上。在又一示例中，藉由導電通孔227連接到源極接觸焊盤223C的第一PCB 120的所有層中的組合導電區域223'是源極接觸焊盤223C的面積的十倍以上。出於同樣的原因，如圖5B所示，第二PCB 140的外層142設置有大面積源極接觸焊盤243C和小面積汲極接觸焊盤245C。如圖7C所示，二次側半導體封裝的暴露的晶片基座用作次級側半導體封裝的源極引腳，提供了與圖5B源極接觸焊盤243C之間大的源極連接區域。如圖7C所示，次級側半導體封裝的暴露的汲極引腳提供了與圖5B汲極接觸焊盤245C之間的小汲極連接區域。在一個示例中，源連接區域是汲極連接區域的10倍以上。大面積源極接觸焊盤243C擴展到第二PCB 140的外層142上的大導電區域243，以用作散熱器。較大的導電區域243'設置在內層141上以及圖5C中的一個或多個可選的中間層143上。藉由導電通孔247連接到第二PCB 140的外層142上的大面積源極接觸焊盤243C和擴展導電區域243。如圖5C所示，一個或多個可選中間層143上的導電區域243'可以基本上擴張到整個中間層的PCB區域，除了導電孔的位置和它們的互連之外。這有助於藉由整個PCB擴散和平均電流開關元件產生的熱量，從而大大提高了熱性能。在一個示例中，藉由導電通孔247連接到源極接觸焊盤243C的第二PCB 140的所有層中的組合導電區域243'是源極接觸焊盤243C的面積的五倍以上。在又一示例中，藉由導電通孔247連接 到源極接觸焊盤243C的第二PCB 140的所有層中的組合導電區域243'是源極接觸焊盤243C的面積的十倍以上。
圖6A是本發明的示例中的HV半導體封裝300的俯視圖，圖6B是沿AA，的橫截面圖，圖6C是底部視圖。在一個示例中，HV指的是500伏或更高的電壓。HV半導體封裝300包括引線框架320，積體電路(IC)340(可以是接收器IC或驅動器IC，或通常統稱控制器IC)，耗盡型場效應電晶體(DFET)350[比如耗盡型MOSFET或耗盡型結型場效應電晶體(JFET))，HV金屬-絕緣體-半導體場效應電晶體(MOSFET)360和模塑封裝390。HV MOSFET 360具有源電極和閘電極設置在頂表面上，汲電極設置在底表面上。在一個示例中，HV半導體封裝300是圖3A示出的充電器100的電路圖3B中的初級側接收器221。在本發明的示例中，HV半導體封裝300在封裝本身，或安裝在電路板上無需使用銅屏蔽和隔離聚酯薄膜。
引線框架320包括晶片基座322和與晶片基座分離的閘極接觸島。在一個例子中，引線框架320僅包含一個晶片基座322。引線框架320不包括另一個晶片基座。晶片基座322包括非蝕刻上表面部分326和蝕刻上表面部分328。IC 340藉由第一非導電材料336連接到晶片基座322的非蝕刻上表面部分326。DFET 350藉由第二非導電材料356連接到晶片基座322的非蝕刻上表面部分326。高壓MOSFET 360藉由導電材料(例如，多個焊球362)連接到晶片基座322的蝕刻上表面部分328。HV MOSFET 360前表面的大部分由預成型封裝372包圍。
成型封裝390包圍IC 340、DFET 350、HV MOSFET 360和引線框架320的大部分。IC 340和DFET 350在正面放置。高壓場效應電晶體360是在翻轉晶片放置。高壓MOSFET 360的源電極361直接連接到多個焊球362。多個焊球362直接連接到晶片基座322的蝕刻上表面部分328。
晶片基座322的蝕刻上表面部分328包括凹槽陣列329。凹槽陣列329中每個凹槽的深度為晶片基座322厚度的45%到55%。
在本發明的示例中，高壓引腳386和連接到晶片基座322的相鄰低壓引腳388之間的水平距離389不得小於與高壓半導體封裝300的額定電壓相對應的水平沿面距離(Creepage Distance)。如圖6A所示，高壓引腳386和汲極引腳335佈置在靠近一個拐角的兩側，在該拐角處晶片基座322被切除以保持水平沿面距離。為了保持可用的最大晶片基座底面面積，最好將切除面積減到最小。在本發明的示例中，晶片基座具有倒L形切除區399，以保持與高壓導線386和汲極導線335至少1.1mm的水平沿面距離。高壓MOSFET 360包括多個焊球362。多個焊球362的大部分被預成型封裝372包圍。垂直沿面距離由多個焊球362的高度保持，該高度將高壓MOSFET 360與晶片基座322的蝕刻上表面部分328分開。
在另一個示例中，圖6C中底部暴露源極面積是汲極335的底部暴露面積的10倍以上。在另一個示例中，圖6C中底部暴露源極面積是汲極335的底部暴露面積的20倍以上。在本發明的的示例中，圖6C晶片基座322的底面319暴露於成型封裝390中。在一個示例中，晶片基座322的外露底面319的表面積至少為高壓半導體封裝300底面的60%。在又一個例子中，晶片基座322的暴露底面319的表面積至少為高壓半導體封裝300底面的80%。因為IC 340、DFET 350和HV MOSFET 360安裝在同一個晶片基座322上，目的是減少部件計數，並且由於HV MOSFET 360處於翻轉的晶片位置，所以HV半導體封裝300可以具有大功率接地(電連接到酸性高壓MOSFET 360的CE電極361、晶片基座322的外露底面319和低壓引腳388)。晶片基座322的外露底面319連接到第一個PCB 120的大源接觸焊盤223C，以便於散熱，以滿足77℃的最大皮膚接觸溫度要求(用戶的手接觸充電器100的外殼110)。實際上，高壓半導體封裝300可僅包括安裝在晶片基座322上的高壓MOSFET 360翻轉晶片，並且IC 340、DFET 350提供在一個或多個 單獨的半導體封裝中。或者高壓半導體封裝300可包括安裝在晶片基座322上的高壓MOSFET 360翻轉晶片，與IC340和DFET 350中的一個共同包裝。
在本發明的示例中，HV MOSFET 360與IC 340隔離並且與HV半導體封裝300內的DFET 350隔離。引腳347(控制器閘極驅動輸出)和引腳367(MOSFET閘極)在HV半導體封裝300內電隔離。HV MOSFET 360可以藉由HV半導體封裝300外部的電路電連接到IC 340。因此，本發明提供了來自外部的其他附加控制的靈活性。或者，控制器閘極驅動輸出可以在內部連接到MOSFET閘極，使得在HV半導體封裝300上無需設置閘極端子。
圖7A是本發明的示例中的俯視圖。圖7B是在沿著半導體封裝400的CC'的橫截面圖。半導體封裝400包括引線框架420，控制器440，MOSFET 460和模製封裝490。在一個示例中，半導體封裝400是圖3A中的充電器100中如圖3B所示出的的次級側STR控制器241。
引線框架420包括晶片基座422。在一個示例中，引線框架420僅包括單個晶片基座422。引線框架420不包括另一個晶片基座。晶片基座422包括未蝕刻的頂表面部分426和蝕刻的頂表面部分428。控制器440藉由非導電材料436附接到晶片基座422的未蝕刻的頂表面部分426。MOSFET 460藉由導電材料462附接到晶片基座422的蝕刻的頂表面部分428。
模製封裝490包圍控制器440，MOSFET 460和引線框架420的大部分。控制器440朝上放置。MOSFET 460設置於翻轉晶片中。MOSFET 460的源電極461直接連接到導電材料462。導電材料462直接連接到晶片基座422的蝕刻的頂表面部分428。
晶片基座422的蝕刻頂表面部分428包括凹槽陣列429。凹槽陣列429中的每一個的凹槽深度是晶片基座422的厚度的45%至55%。
圖8是本發明的示例中的半導體封裝500的俯視圖。半導體封裝500包括引線框架520，PD控制器540，第一MOSFET 550，第二MOSFET 560和模製封裝590(以透明示出)。在一個示例中，半導體封裝500是圖3A中的充電器100中如圖3B所示出的次級側中高度整合的PD控制器271。
引線框架520包括第一晶片基座522，第二晶片基座524和第三晶片基座526。PD控制器540附接到第一晶片基座522。第一MOSFET 550附接到第二晶片基座524。第二MOSFET 560連接到第三晶片基座526。第一晶片基座522，第二晶片基座524和第三晶片基座526彼此分開。
在一個示例中，在圖3A的充電器100中使用的隔離耦合元件250是無芯脈衝變壓器。如圖9A和9B所示，隔離耦合元件250由多層PCB上的導電線路(Conduct Track)形成。在本發明的示例中，上層1300包括多個匝的初級線圈1360和次級線圈1370的第一部分1380。初級線圈1360設置在上層1300的外部，包圍次級線圈1370的第一部分1380。次級線圈1370的第一部分1380設置在上層1300的內部。下層1400包括次級線圈1370的第二部分1480。上層1300上的次級線圈1370的第一部分1380具有中間接點1382位於上層1300的中央部分，連接到位於下層1400的中心部分的第二部分1480的中間接點1481。次級線圈1370的第一部分1380的第二端1384位於上層1300連接到下層1400上的次級線圈1370的第二端1484。在本發明的示例中，可以提供覆蓋上層1300的可選頂層(未示出)，也可以提供可選的底層1200以覆蓋下層1400以保護隔離耦合元件250的線圈導電線路。底層1200上的第一焊盤1232可以藉由第一組一個或多個過孔連接到初級線圈1360的第一端1362。底層1200上的第二焊盤1234可以藉由第二組一個或多個通孔和下層1400上的導電線路1494連接到初級線圈1360的第二端1364。底層1200上的第三焊盤1236可以藉由第三組一個或多個通孔連接到下層1400上的次級線圈1370的第一端1482。底層1200上的第四焊盤1238可以藉由下層1400上 的第四組一個或多個通孔和導電線路1498連接到次級線圈1370的第二端1484。或者，接觸焊盤可以選擇形成在下層1400上。
在一個示例中，隔離耦合元件250在初級線圈和次級線圈之間具有3：10的匝數比。在另一示例中，隔離耦合元件250在100kHz下提供50nH的互感。在又一個示例中，隔離耦合元件250提供高達5.5kVrms的電流隔離。在一個示例中，隔離耦合元件250形成在四層PCB上。在另一示例中，隔離耦合元件250形成為尺寸為9.5mm×5.5mm×1.8mm或更小的獨立部件。隔離耦合元件250可以設置在第一PCB 120上或第二PCB 140上。
在本發明的示例中，圖3A的充電器100還包括設置在第一PCB 120和第二PCB 140之間的空間中的可選的第三PCB 160。第三PCB 160垂直於第一PCB 120和第二PCB 140。在一個示例中，多針輸出互連插座281安裝在第三PCB 160的面向外殼110的頂表面上的開口180的邊緣上。在另一個示例中，第三PCB 160包括設置在其上的隔離耦合元件250。在本發明的示例中，隔離耦合元件250是安裝在第三PCB上或嵌入在第三PCB中的獨立元件。
在本發明的示例中，充電器100具有大於0.5W/CC的功率密度。在一個示例中，以30mm×33mm×29mm的緊湊尺寸提供18W PD充電器。在另一個示例中，提供30W PD充電器，其緊湊尺寸為39mm×35mm×39mm。在又一個示例中，提供了45W PD充電器，其緊湊尺寸為48mm×48mm×28mm。由本發明的PD充電器提供的功率密度遠高於目前市場上可用的移動設備的PD充電器的最大功率密度。
所屬技術領域具有通常知識者可以認識到，本申請公開的各實施方案是可以修改的。例如，凹槽陣列329的多個行和多個列可以變化。例如，凹槽陣列329中的每一個的尺寸可以變化。所屬技術領域具有通常知識者可以想到 其他修改，並且所有這些修改都被認為落入由申請專利範圍限定的本發明的範圍內。
122:外層
202:橋式整流器
221:側接收器
223C:大面積源極接觸焊盤
225C:小面積汲極接觸焊盤

Claims (20)

  1. 一種設置在多層印刷電路板PCB上的交流/直流(AC/DC)轉換器，其中該交流/直流(AC/DC)轉換器包括：一變壓器，包括一初級線圈和一次級線圈，該初級線圈的第一端子接收一整流電壓；一功率半導體封裝，包括一主開關，該主開關具有連接到一源極引線的一源極電極和連接到一汲極引線的一汲極電極；其中，該汲極引線連接到該多層印刷電路板上的一汲極接觸焊盤上；其中，該汲極接觸焊盤與該變壓器的初級線圈的第二端子電連接；其中，該源極引線連接到該多層印刷電路板上的一源極接觸焊盤；並且其中，PCB上的該源極接觸焊盤與該源極引線之連接面積大於PCB上的該汲極接觸焊盤與該汲極引線之連接面積。
  2. 如請求項1中的交流/直流變換器，其中該多層印刷電路板包括在一頂層和一底層之間的一個或多個中間層。
  3. 如請求項2所述的交流/直流變換器，其中該多層印刷電路板的該中間層包括連接到該源極接觸焊盤的一導電區域。
  4. 如請求項2所述的交流/直流變換器，其中該功率半導體封裝設置在該頂層，該變壓器設置在該底層。
  5. 如請求項1所述的交流/直流轉換器，中該功率半導體封裝進一步包括一驅動IC，用於提供一控制主開關的驅動信號。
  6. 如請求項5所述的交流/直流轉換器，其中該功率半導體封裝進一步包括用於接收整流電壓以產生該控制主開關的啟動信號的耗盡型場效應電晶體(DFET)。
  7. 如請求項1所述的交流/直流轉換器，其進一步包括驅動器IC，以提供該主開關的驅動信號。
  8. 如請求項7所述的交流/直流轉換器，其進一步包括：二次側控制器，其中二次側控制器包括：一反饋回路，其包括一比較器，該比較器的反向端子接收與輸出電壓成比例的反饋電壓，並與非反向端子上的參考電壓相比較。
  9. 如請求項8所述的交流/直流轉換器，其中該二次側控制器進一步包括一導通時間發生器，其接收來自該比較器的比較結果以生成一導通時間控制信號。
  10. 如請求項8所述的交流/直流轉換器，其進一步包括同步MOSFET電晶體，該同步MOSFET電晶體具有連接到該次級線圈的第二端子的汲極和連接到地的源極。
  11. 如請求項8所述的交流/直流轉換器，其進一步包括連接在二次側控制器和驅動器之間的隔離耦合元件。
  12. 如請求項11所述的交流/直流轉換器，其中該驅動器產生驅動信號以打開和關閉主開關電晶體，以在滿負荷時以高於最大85kHz的開關頻率調節藉由變壓器初級線圈的電流。
  13. 如請求項12所述的交流/直流轉換器，其中，自然峰值負載工作頻率被限制在最大150kHz。
  14. 如請求項13所述的交流/直流變換器，其中該輸出電壓包括紋波雜訊，該紋波雜訊包括低頻交流紋波和開關頻率的高頻開關紋波；並且，在該整流電壓的波峰附近的開關紋波頻率低於整流電壓的波谷附近的開關紋波頻率。
  15. 如請求項14所述的交流/直流變換器，其中該輸出電壓不包含次諧波頻率紋波雜訊。
  16. 如請求項13所述的交流/直流變換器，其中該二次側控制器是一固定導通時間控制器；其中，在滿負荷條件下，當整流電壓降低時，該二次側控制器增加導通時間以保持負載輸出直到達到最大的導通時間。
  17. 如請求項16所述的交流/直流轉換器，其中該最大導通時間為占空比的80%。
  18. 如請求項16所述的交流/直流變換器，其中，當達到該最大導通時間時，當整流電壓持續降低時，控制器增加開關頻率。
  19. 如請求項1所述的交流/直流轉換器，其進一步包括帶內置微控制器單元(MCU)的功率傳遞(PD)控制器，以與負載通信。
  20. 如請求項19所述的交流/直流轉換器，其中該功率傳遞(PD)控制器為USB C型控制器。
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