TWI747647B - Display device and pixel driving circuit - Google Patents

Abstract

A display device includes pixel driving circuits coupled in series. A pixel driving circuit in the pixel driving circuits includes a data writing unit and a light emitting unit. The data writing unit includes a first switch and a capacitor and is configured to write a data signal to a first node. A first terminal of the first switch is coupled to a control terminal of the first switch at the first node. A first terminal of the capacitor is coupled to the first node. The light emitting unit includes a second switch and a light emitting element and is configured to generate a current according to the data signal. The second switch is configured to receive the current. A control terminal of the second switch is coupled to the first node. A first terminal of the second switch is coupled to a second terminal of the capacitor. The light emitting element is configured to emit light according to the current. A pixel driving circuit is also disclosed herein.

Description

Display device and pixel drive circuit

The present invention relates to a display technology, particularly to a pixel driving circuit.

The pixel driving circuit on the substrate of the display may be abnormal due to metal residue and excessive etching during the manufacturing process. The manufacturing process of light-emitting elements such as micro-light-emitting diodes is complicated, leading to higher costs. In addition, the current in the current pixel driving circuit may be affected by the switching characteristics and/or the resistance value in the current path, which may cause the brightness of the display to be uneven. Therefore, how to develop related technologies that can overcome the above-mentioned problems is an important issue in this field.

The embodiment of the present invention includes a display device including a plurality of pixel driving circuits coupled in series, wherein one pixel driving circuit of the plurality of pixel driving circuits includes a data writing unit and a light emitting unit. The data writing unit includes a first switch and a capacitor, and is used for writing a data signal into a first node. A first terminal of the first switch is coupled to a control terminal of the first switch at the first node. A first terminal of the capacitor is coupled to the first node. The light-emitting unit includes a second switch and a light-emitting element, and is used for generating a current according to the data signal. The second switch is used for receiving current. A control terminal of the second switch is coupled to the first node, and a first terminal of the second switch is coupled to a second terminal of the capacitor. The light-emitting element emits light according to current.

The embodiment of the present invention further includes a pixel driving circuit including a data writing unit and a light emitting unit. The data writing unit includes a first switch, a second switch and a capacitor, and is used for writing a data signal into a first node. A first terminal of the first switch is coupled to a control terminal of the first switch at a first node. A first terminal of the capacitor is coupled to the first node. A first terminal of the second switch is coupled to a second terminal of the capacitor, and a second terminal of the second switch is coupled to a second terminal of the first switch. The light-emitting unit includes a third switch and a light-emitting element, and is used for generating a current according to the data signal. A control terminal of the third switch is coupled to the first node. The light emitting element is used for emitting light according to the current.

In this text, when an element is referred to as “connected” or “coupled”, it can be referred to as “electrically connected” or “electrically coupled”. "Connected" or "coupled" can also be used to mean that two or more components cooperate or interact with each other. In addition, although terms such as “first”, “second”, etc. are used herein to describe different elements, the terms are only used to distinguish elements or operations described in the same technical terms. Unless the context clearly indicates, the terms do not specifically refer to or imply order or sequence, nor are they used to limit the present invention.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meaning in the context of related technologies and the present invention, and will not be interpreted as idealized or excessive The formal meaning, unless explicitly defined as such in this article.

The terminology used here is only for the purpose of describing specific embodiments and is not restrictive. As used herein, unless the content clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms, including "at least one." "Or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the related listed items. It should also be understood that when used in this specification, the terms "including" and/or "including" designate the presence of the features, regions, wholes, steps, operations, elements, and/or components, but do not exclude one or more The existence or addition of other features, regions as a whole, steps, operations, elements, components, and/or combinations thereof.

Hereinafter, multiple implementations of this case will be disclosed in schematic form. For the sake of clarity, many practical details will be described in the following description. However, it should be understood that these practical details should not be used to limit the case. In other words, in some implementations of the present disclosure, these practical details are unnecessary. In addition, in order to simplify the drawings, some conventionally used structures and elements are shown in the drawings in a simple and schematic manner.

Figure 1 is a schematic diagram of a display according to an embodiment of the present invention. Please refer to FIG. 1, the display 100 includes a display device 110, a scanning device 120, a data input device 130 and a light-emitting control device 140. The scanning device 120 provides a plurality of scanning signals through the scanning lines SL(0)~SL(n), such as the scanning signal S(n-1) and the scanning signal S(n) shown in Figure 2, to the display device 110 . The data input device 130 provides a plurality of data signals, such as the data signal DT shown in FIG. 2, to the display device 110 through the data lines DL(1)~DL(m). The light-emitting control device 140 provides a plurality of light-emitting signals, such as the light-emitting signal EM shown in FIG. 2, to the display device 110 through the light-emitting lines EL(1)-EL(n). Wherein n and m are both positive integers. In some embodiments, the display 100 may be made of a glass substrate or a plastic substrate, but it is not limited thereto.

As shown in FIG. 1, the display device 110 includes a plurality of pixel driving circuits DV(1) to DV(n) connected in series with each other, including the pixel driving circuit 112. In some embodiments, the pixel driving circuit 112 in the display device 110 performs light-emitting operations according to signals provided by the scanning device 120, the data input device 130, and the light-emitting control device 140.

For example, the pixel driving circuit 200 shown in FIG. 2 is an embodiment of the pixel driving circuit 112. As shown in Figure 2, the pixel drive circuit 200 resets the pixel drive circuit 200 by the scanning signals S(n-1) and S(n) provided by the scanning device 120, and writes data provided by the data input device 130 The data signal DT, wherein the voltage level of the data signal DT determines the luminous intensity of the light-emitting element L2, and finally the light-emitting signal EM provided by the light-emitting control device 140 controls the light-emitting time length of the light-emitting element L2.

In some embodiments, the scan signal S(n-1) and the scan signal S(n) are respectively transmitted to the pixel driving circuit 112 through the scan line SL(n-1) and the scan line SL(n), and the data signal DT passes through The data line DL(m) is transmitted to the pixel driving circuit 112, and the light-emitting signal EM is transmitted to the pixel driving circuit 112 through the light-emitting line EL(n). However, the embodiment of the present invention is not limited to this, and the scanning signal S( The manner in which n-1), the scan signal S(n), the data signal DT and the light-emitting signal EM are sent to the pixel driving circuit 112 is also within the scope of the present invention.

FIG. 2 is a circuit diagram of a pixel driving circuit in a display device according to an embodiment of the present invention. Please refer to FIG. 2, which is a circuit diagram of the pixel driving circuit 200. The pixel driving circuit 200 is an embodiment of the pixel driving circuit 112 in the display device 110. In some embodiments, the pixel driving circuit 200 includes a data writing unit 220, a light emitting unit 240, and a detection unit 260.

In some embodiments, the data writing unit 220 is used to perform a reset operation according to the scan signals S(n-1) and S(n) to reset the node voltage V21 of the node N21 and the node voltage V22 of the node N22. The data writing unit 220 is further used to perform a data writing operation according to the scan signal S(n) and the control signal VC to write the data signal DT to the node N21, and at the same time, the threshold voltage level V _{TH of the} switch T22 is also written to Node N21 for compensation operation. The light-emitting unit 240 performs a light-emitting operation according to the light-emitting signal EM, generates a current I2 according to the node voltage V21 of the node N21, and emits light according to the current level of the current I2. The detection unit 260 is configured to perform a detection operation according to the detection signal TS to detect whether at least one of the switches T21 to T28 and the light emitting element L2 in the pixel driving circuit 200 can operate normally, for example, is normally turned on or normally turned off.

In some embodiments, the pixel driving circuit 200 is an n-th stage pixel driving circuit DV(n) of a plurality of pixel driving circuits in the display 100. Correspondingly, the scan signal S(n) is the nth level scan signal, and the scan signal S(n-1) is the n-1 level scan signal. The (n-1)th pixel driving circuit DV(n-1) of the plurality of pixel driving circuits in the display 100 is also used to operate according to the scanning signal S(n-1).

In some embodiments, the data writing unit 220 includes switches T21 to T24 and a capacitor C2. The control end of the switch T21 is used to receive the control signal VC, one end of the switch T21 is used to receive the data signal DT, and the other end of the switch T21 is coupled to one end of the switch T22. One end of the switch T22 is coupled to the switch T21, and the other end of the switch T22 and the control end of the switch T22 are coupled to the node N21. In some embodiments, the switch T22 has the function of a diode. One end of the capacitor C2 is coupled to the node N21, and the other end of the capacitor C2 is coupled to the node N22. The control end of the switch T23 is used to receive the scan signal S(n), one end of the switch T23 is used to receive the voltage signal VINI, and the other end of the switch T23 is coupled to the node N22. The control end of the switch T24 is used to receive the scan signal S(n-1), one end of the switch T24 is used to receive the voltage signal VDD at the node N26, and the other end of the switch T24 is coupled to the node N21.

In some embodiments, the light-emitting unit 240 includes a light-emitting element L2 and switches T25 to T27. The control end of the switch T25 is coupled to the node N21, one end of the switch T25 is coupled to the switch T26 at the node N23, and the other end of the switch T25 is coupled to the switch T27 at the node N22. The control terminal of the switch T26 is used to receive the light emitting signal EM, one end of the switch T26 is coupled to the light emitting element L2 at the node N24, and the other end of the switch T26 is coupled to the node N23. The control terminal of the switch T27 is used to receive the light-emitting signal EM, one end of the switch T27 is used to receive the voltage signal VSS, and the other end of the switch T27 is coupled to the node N22. One end of the light emitting element L2 is coupled to the node N24, and the other end of the light emitting element L2 is coupled to the node N25, and is used for receiving the voltage signal VDD at the node N25. In some embodiments, the light emitting element L2 is used to receive the current I2 flowing through the switch T25, and is used to emit light according to the current I2.

In some embodiments, the detection unit 260 includes a switch T28. The control terminal of the switch T28 is used to receive the detection signal TS, one end of the switch T28 is coupled to the switch T24 at the node N26, and the other end of the switch T28 is coupled to the switch T26 and the light emitting element L2 at the node N24. In some embodiments, the detection unit 260 is used to receive the voltage signal VDD at the node N26 to detect whether at least one of the light-emitting element L2 and the switches T21 to T28 is normally turned on.

In different embodiments, the light emitting element L2 may be a micro light emitting diode (mLED) or other different types of light emitting elements. In different embodiments, the switches T21~T28 can be P-type metal oxide semiconductor field effect transistors (PMOS), N-type metal oxide semiconductor field effect transistors (NMOS), thin film transistors (TFT) or other different types. Type of switching element.

FIG. 3 is a timing diagram of the driving operation of the pixel driving circuit according to an embodiment of the present invention. The timing diagram shown in FIG. 3 includes phase P31, phase P32, and phase P33 in sequence. In some embodiments, the timing diagram shown in Figure 3 corresponds to the different signals shown in Figure 2, such as scan signals S(n) and S(n-1), light-emitting signal EM, data signal DT, control signal Operation of VC and detection signal TS.

As shown in FIG. 3, in phase P31, the scan signals S(n-1) and S(n) have the enable voltage level VGH, so that the switch T24 and the switch T23 are turned on. At this time, the switch T24 provides the voltage signal VDD with the voltage level DD to the node N21, so that the node voltage V21 of the node N21 has the voltage level DD.

In some embodiments, the voltage level DD is the enable voltage level, so that the switch T22 is turned on according to the node voltage V21 having the voltage level DD. In some embodiments, the capacitor C2 is used to store the charge of the node N21 to maintain the node voltage V21 after the switch T24 is turned off, so that the switch T22 is continuously turned on after the switch T24 is turned off (for example, in the phase P32).

In phase P31, the switch T23 is turned on to provide the voltage signal VINI to the node N22, and the voltage signal VINI has the voltage level INI, so that the node voltage V22 of the node N22 has the voltage level INI. At this time, the voltage level difference across the capacitor C2 is (DD-INI).

In some embodiments, during the period P31, the node voltage V21 and the node voltage V22 of the pixel driving circuit 200 are reset by the voltage signal VDD and the voltage signal VINI, respectively, so that the pixel driving circuit 200 can prepare to receive the data signal DT. P31 is called the reset phase.

In phase P32, the scan signal S(n) and the control signal VC have the enable voltage level VGH, so that the switch T26 and the switch T21 are turned on. The scan signal S(n-1) has the disable voltage level VGL, so that the switch T24 is closed. The charge stored in the capacitor C2 in the phase P31 makes the node voltage V21 still have the enable voltage level in the phase P32, so the switch T22 is turned on during the phase P32. At this time, the data signal DT with the voltage level VDT is written into the node N21 through the switch T21 and the switch T22, so that the node voltage V21 is pulled to (VDT+V _TH ), where the threshold voltage level V _TH is the threshold voltage level of the switch T22 Bit. At this time, the node voltage V22 still has the voltage level INI. At this time, the voltage level difference between the two ends of the capacitor C2 is (VDT+V _TH -INI).

In some embodiments, in stage P32, the data signal DT is written into the pixel driving circuit 200, and by the threshold voltage level V _{TH of the} switch T22, the voltage level of the node voltage V22 is adjusted to (VDT + V _{TH ) To prepare to compensate the threshold voltage level V TH of the} switch T25 during the light-emitting phase (for example, phase P33). Therefore, stage P32 is called the data writing and compensation stage.

In phase P33, the light-emitting signal EM has the enable voltage level VGH, so that the switch T26 and the switch T27 are turned on. The scan signal S(n), the scan signal S(n-1), and the control signal VC have the disable voltage level VGL, so that the switches T21, T23, and T24 are closed. At this time, the current I2 sequentially flows through the light-emitting element L2, the switches T26, T25, and T27, so that the light-emitting element L2 emits light according to the current level of the current I2. In some embodiments, the current level of the current I2 determines the luminous intensity of the light-emitting element L2.

In the phase P33, the capacitor C2 maintains the voltage level difference between the two ends of the capacitor C2 in the phase P32, so that the voltage level difference between the voltage level of the node N21 and the voltage level of the node N22 in the phase P33 is still (VDT+V _TH -INI ).

In some embodiments, the voltage level difference between the gate and the source of the switch T25, that is, the voltage level difference between the voltage level of the node N21 and the voltage level of the node N22 is set to VGS. In addition, in some embodiments, the threshold voltage levels of the switches T22 and T25 are substantially the same, so the same threshold voltage level V _TH represents the threshold voltage level of any one of the switches T22 and T25. According to the formula in electronics, it can be known that the current level of the current I2 passing through the switch T25 is K×(VGS-V _TH )^2. In phase P33, VDT+V _TH -INI) is brought into the voltage level difference VGS, and the current level of the current I2 can be obtained as K×(VDT-INI)^2, where K is a constant. Therefore, the current level of the current I2 _{has nothing to do with the threshold voltage level V TH} , but is related to the voltage level VDT of the data signal DT and the voltage level INI of the voltage signal VINI.

In some previous practices, when current flows through different paths in the display, different resistance values on different paths will cause different voltage drops. In addition, the threshold voltage level of the switch will also cause a voltage drop, which makes the The current is difficult to control, resulting in uneven brightness of the display.

Compared with the above-mentioned method, in the embodiment of the present invention, the voltage level VDT and the voltage level INI depend on the user. In this way, the current flowing through the light-emitting element L2 can be adjusted by the user, and is not affected _{by the current path or the element characteristics of the pixel driving circuit 200, such as the threshold voltage level V TH of the switch T25.}

In some embodiments, in the phase P33, the light-emitting element L2 in the pixel driving circuit 200 emits light, so the phase P33 is referred to as the light-emitting phase.

In some previous practices, when the detection signal is provided to the display 100 to test whether the display device 110 is abnormal, the light-emitting element L2 is already coupled to the display device 110. At this time, the manufacturing cost of the display 100 includes the manufacturing cost of the light-emitting element L2.

Compared with the above-mentioned method, the embodiment of the present invention provides a pixel driving circuit 400 that can perform detection before the light-emitting element L2 is coupled to the display device 110, as shown in FIG. 4. The pixel driving circuit 400 is a pixel driving circuit that has not yet been coupled to a light-emitting element, so the manufacturing cost of the pixel driving circuit 400 is lower than the manufacturing cost of the pixel driving circuit 200.

FIG. 4 is a circuit operation diagram of the pixel driving circuit in the display device according to an embodiment of the present invention. The pixel driving circuit 400 shown in FIG. 4 is similar to the pixel driving circuit 200 shown in FIG. 2, so the pixel driving circuit 400 uses the relevant reference numerals of the pixel driving circuit 200, and the connection relationship between components is no longer here. Go into details. The difference between the pixel driving circuit 400 and the pixel driving circuit 200 is that the pixel driving circuit 400 does not include the light-emitting element L2, and the pixel driving circuit 400 has an accommodation space 401 between the node N24 and the node N25. The accommodating space 401 can be used for accommodating the light-emitting element L4 after detection (such as the detection operations described in FIGS. 5 and 6), so that the light-emitting element L4 is coupled to the pixel driving circuit 400.

FIG. 5 is a timing diagram of the detection operation performed by the pixel driving circuit according to an embodiment of the present invention. The timing diagram shown in Figure 5 includes phases P51 and P52. The signal operations of phases P51 and P52 are similar to the signal operations of phases P31 and P32 shown in FIG. 3, so part of the operations will not be repeated here.

Please refer to FIGS. 4 and 5, in phases P51 and P52, the voltage signal VDD2 is provided to the node N26 to perform the detection of the pixel driving circuit 400. In phases P51 and P52, the detection signal TS has the disable voltage level VGL, so that the switch T28 is turned off.

In phase P51, the scan signal S(n-1) has the enable voltage level VGH, so that the switch T24 is turned on. At this time, the voltage signal VDD2 having the voltage level DD2 is written into the node N21 through the switch T24, so that the node voltage V21 of the node N21 has the voltage level DD2.

In some embodiments, the voltage level DD2 is the enable voltage level, so that the switch T22 is turned on according to the node voltage V21 having the voltage level DD2. In some embodiments, the capacitor C2 is used to store the charge of the node N21 to maintain the node voltage V21 after the switch T24 is turned off, so that the switch T22 is continuously turned on after the switch T24 is turned off (for example, in the phase P52).

In phase P52, the control signal VC has the enable voltage level VGH, so that the switch T21 is turned on. The charge stored in the capacitor C2 in the phase P51 makes the node voltage V21 still have the enable voltage level in the phase P52, so the switch T22 is turned on during the phase P52. At this time, the voltage signal VDD2 stored at the node N21 by the capacitor C2 is sequentially transmitted to the node N41 through the switches T22 and T21.

As shown in FIG. 4, the switch T24, the switch T22, and the switch T21 form a conduction path P41. After the operations of the phases P51 and P52, if the voltage signal VDD2 can be transmitted from the node N26 to the node N41 through the conduction path P41, it means that the switches T24, T22, and T21 on the conduction path P41 can be normally turned on. Conversely, if the voltage signal corresponding to the voltage signal VDD2 cannot be detected at the node N41 after the operations of the phases P51 and P52, it means that at least one of the switch T24, the switch T22, and the switch T21 on the conduction path P41 cannot be normally turned on.

FIG. 6 is a timing diagram of the detection operation performed by the pixel driving circuit according to an embodiment of the present invention. The timing diagram shown in Figure 6 includes stages P61~P63. The signal operation of stages P61~P63 is similar to the signal operation of stages P31~P33 shown in Figure 3, so part of the operation will not be repeated here.

Please refer to FIGS. 4 and 6, in stages P61 to P63, the voltage signal VDD2 is provided to the node N26 to perform the detection of the pixel driving circuit 400. In stages P61 to P63, the detection signal TS has the enable voltage level VGH, so that the switch T28 is turned on.

In phase P61, the scan signal S(n-1) has the enable voltage level VGH, so that the switch T24 is turned on. At this time, the voltage signal VDD2 having the voltage level DD2 is written into the node N21 through the switch T24, so that the node voltage V21 of the node N21 has the voltage level DD2.

In some embodiments, the voltage level DD2 is the enable voltage level, so that the switch T22 is turned on according to the node voltage V21 having the voltage level DD2. In some embodiments, the capacitor C2 is used to store the charge of the node N21 to maintain the node voltage V21 after the switch T24 is turned off, so that the switch T22 is continuously turned on after the switch T24 is turned off (for example, in the phase P62).

In phase P62, the control signal VC has the enable voltage level VGH, so that the switch T21 is turned on. The charge stored in the capacitor C2 in the phase P61 makes the node voltage V21 still have the enable voltage level in the phase P62, so the switch T22 is turned on during the phase P62. At this time, the data signal DT with the voltage level VDT is sequentially written into the node N21 through the switches T21 and T22. In some embodiments, the voltage level VDT is the enable voltage level, so that the switch T25 is turned on. The capacitor C2 is used to maintain the node voltage V21 after the switch T21 is closed, so that the switch T25 is continuously turned on after the switch T21 is closed (for example, in the phase P63).

In phase P63, the light-emitting signal EM has the enable voltage level VGH, so that the switch T26 and the switch T27 are turned on. The capacitor C2 maintains the node voltage V21, so that the switch T25 is turned on.

As shown in Fig. 4, the switch T28, the switch T26, the switch T25, and the switch T27 form a conduction path P42. In phase P63, if the voltage signal VDD2 can be transmitted from the node N26 to the node N42 through the conduction path P42, it means that the switches T28, T26, T25, and T27 on the conduction path P42 can be normally turned on. Conversely, if the voltage signal VDD2 cannot be detected at the node N42 at the stage P63, it means that at least one of the switch T28, the switch T26, the switch T25, and the switch T27 on the conduction path P42 cannot be normally turned on.

Please refer to FIGS. 5 and 6, except for the detection signal TS, the signal operations shown in FIGS. 5 and 6 are the same. Therefore, in some embodiments, it is only necessary to adjust the detection signal TS to detect whether the different switches in the pixel driving circuit 400 are normally turned on.

In some embodiments, after the detection operation described in FIG. 5 and/or FIG. 6 is performed, the light-emitting element L4 can be coupled to the accommodating space 401, that is, the light-emitting element L4 is coupled to the node N25 and the node N24 In between, the light-emitting element L4 is coupled to the pixel driving circuit 400.

In some embodiments, after the light-emitting element L4 is coupled to the pixel driving circuit 400, it can be further detected whether the light-emitting element L4 can operate normally.

As shown in FIG. 4, the light-emitting element L4 and the switch T28 form a conduction path P43. In some embodiments, the voltage levels of the voltage signals VDD1 and VDD2 are different, and the detection signal TS has the enable voltage level VGH so that the switch T28 is turned on. At this time, if the voltage signal VDD1 can be transmitted from the node N25 through the conduction path P43 to the node N26, it means that the switch T28 and the light emitting element L4 on the conduction path P43 can be normally turned on. Conversely, if the signal corresponding to the voltage signal VDD1 cannot be detected at the node N26, it means that at least one of the switch T28 and the light-emitting element L4 on the conduction path P43 cannot be normally turned on. In addition, if the luminous intensity of the light-emitting element L4 cannot correspond to the voltage level difference between the voltage signals VDD1 and VDD2, it indicates that the light-emitting element L4 is abnormal.

FIG. 7 is a circuit diagram of a pixel driving circuit in a display device according to an embodiment of the present invention. Please refer to FIG. 7, which is a circuit diagram of the pixel driving circuit 700. The pixel driving circuit 700 is an embodiment of the pixel driving circuit 112 in the display device 110 shown in FIG. 1. In some embodiments, the pixel driving circuit 700 includes a data writing unit 720, a light emitting unit 740, and a detection unit 760.

In some embodiments, the data writing unit 720 is used to perform a reset operation according to the control signals VC1 and VC2 to reset the node voltage V71 of the node N71 and the node voltage V72 of the node N72. The data writing unit 720 is further used for writing the threshold voltage level V _TH to the node N71 according to the control signal VC2 to perform a compensation operation. The data writing unit 720 is further configured to perform a data writing operation according to the scan signal S(n) to write the data signal DT to the node N71 through the capacitor C7. The light-emitting unit 740 performs a light-emitting operation according to the light-emitting signal EM, generates a current I7 according to the node voltage V71 of the node N71, and emits light according to the current level of the current I7. The detection unit 760 is used for performing a detection operation according to the detection signal TS to detect whether at least one of the switches T71 to T76, T78 and the light emitting element L7 in the pixel driving circuit 700 can operate normally, for example, normally turned on or normally turned off.

In some embodiments, the pixel driving circuit 700 is an n-th stage pixel driving circuit DV(n) of a plurality of pixel driving circuits in the display 100. Correspondingly, the scan signal S(n) is the nth level scan signal, and the scan signal S(n-1) is the n-1 level scan signal.

In some embodiments, the data writing unit 720 includes switches T71 to T74 and a capacitor C7. The control end of the switch T71 is used to receive the control signal VC2, one end of the switch T71 is coupled to the switch T72 and used to receive the voltage signal VINI at the node N77, and the other end of the switch T71 is coupled to the switch T73 at the node N72. One end of the switch T72 is coupled to the switch T71 for receiving the voltage signal VINI, and the other end of the switch T72 and the control end of the switch T72 are coupled to the node N71. In some embodiments, the switch T72 has the function of a diode. One end of the capacitor C7 is coupled to the node N71, and the other end of the capacitor C7 is coupled to the node N72. The control end of the switch T73 is used to receive the scan signal S(n), one end of the switch T73 is used to receive the data signal DT, and the other end of the switch T73 is coupled to the node N72. The control end of the switch T74 is used to receive the scan signal S(n-1), one end of the switch T74 is used to receive the voltage signal VDD at the node N76, and the other end of the switch T74 is coupled to the node N71.

In some embodiments, the light-emitting unit 740 includes a light-emitting element L7, switches T75 and T76. The control end of the switch T75 is coupled to the node N71, one end of the switch T75 is used to receive the voltage signal VSS, and the other end of the switch T75 is coupled to the switch T76 at the node N73. The control terminal of the switch T76 is used to receive the light emitting signal EM, one end of the switch T76 is coupled to the light emitting element L7 at the node N74, and the other end of the switch T76 is coupled to the node N73. One end of the light-emitting element L7 is coupled to the node N74, and the other end of the light-emitting element L7 is coupled to the node N75, and is used for receiving the voltage signal VDD1 at the node N75. In some embodiments, the light emitting element L7 is used to receive the current I7 flowing through the switch T75, and is used to emit light according to the current I7.

In some embodiments, the detection unit 760 includes a switch T78. The control end of the switch T78 is used to receive the detection signal TS. One end of the switch T78 is coupled to the switch T74 at the node N76, and the other end of the switch T78 is coupled to the switch T76 and the light emitting element L7 at the node N74. In some embodiments, the detection unit 760 is used to receive the voltage signal VDD2 at the node N76 to detect whether at least one of the light-emitting element L7 and the switches T71 to T76 and T78 is normally turned on.

In different embodiments, the light emitting element L7 may be a micro light emitting diode (mLED) or other different types of light emitting elements. In different embodiments, the switches T71 to T76 and T78 can be P-type metal oxide semiconductor field effect transistors (PMOS), N-type metal oxide semiconductor field effect transistors (NMOS), thin film transistors (TFT) or Other different types of switching elements.

FIG. 8 is a timing diagram of the driving operation of the pixel driving circuit according to an embodiment of the present invention. The sequence diagram shown in FIG. 8 includes phase P81, phase P82, phase P83, and phase P84 in sequence. In some embodiments, the sum of the time lengths of the stages P81 to P84 corresponds to the frame time of the pixel driving circuit 700. In some embodiments, the timing diagram shown in Figure 8 corresponds to the different signals shown in Figure 7, such as the scan signal S(n), the light-emitting signal EM, the data signal DT, the control signal VC1, the control signal VC2, and the voltage The operation of the signal VINI and the detection signal TS.

As shown in Fig. 8, in phase P81, the control signals VC1 and VC2 have the enable voltage level VGH, so that the switch T74 and the switch T71 are turned on. At this time, the switch T74 provides the voltage signal VDD2 with the voltage level DD2 to the node N71, so that the node voltage V71 of the node N71 has the voltage level DD2.

In some embodiments, the voltage level DD2 is the enable voltage level, so that the switch T72 is turned on according to the node voltage V71 having the voltage level DD2. In some embodiments, the capacitor C7 is used to store the charge of the node N71 to maintain the node voltage V71 after the switch T74 is turned off, so that the switch T72 is continuously turned on after the switch T74 is turned off (for example, in the phase P82).

In phase P81, the switch T78 is turned on to provide the voltage signal VINI to the node N72. At this time, the voltage signal VINI has the voltage level INI1, so that the node voltage V72 of the node N72 has the voltage level INI1.

In some embodiments, during the period P81, the node voltage V71 and the node voltage V72 of the pixel driving circuit 700 are reset by the voltage signal VDD2 and the voltage signal VINI, respectively, so that the pixel driving circuit 700 can prepare to receive the data signal DT. P81 is called the reset phase.

In phase P82, the control signal VC2 has the enable voltage level VGH, so that the switch T71 is turned on. The control signal VC1 has the disable voltage level VGL, so that the switch T74 is turned off. The charge stored in the capacitor C7 in the phase P81 makes the node voltage V71 still have the enable voltage level in the phase P82, so the switch T72 is turned on during the phase P82. At this time, the voltage level INI1 of the node N77 is less than the voltage level VDD2 of the node N71, so that the charge flows from the node N71 to the node N77 until the voltage level of the node N71 is pulled to (INI1+V _TH ), where the threshold voltage level V _TH is the threshold voltage level of the switch T72. At this time, the voltage level difference across the capacitor C7 is V _TH .

In some embodiments, in the phase P82, by the threshold voltage level V _{TH of the} switch T72, the voltage level of the node voltage V72 is adjusted to (INI1+V _TH ) to prepare to compensate for the light-emitting phase (for example, phase P84). The threshold voltage level of T75 is V _TH . Therefore phase P82 is called the compensation phase.

In phase P83, the scan signal S(n) has the enable voltage level VGH, so that the switch T71 is turned on. The control signal VC1 has the disable voltage level VGL, so that the switch T74 is turned off. At this time, the data signal DT with the voltage level VDT is written into the node N72 through the switch T73, so that the node N72 has the voltage level VDT. At this time, the voltage level INI2 of the voltage signal VINI has the voltage level INI2, so that the voltage level of the node N77 is pulled up to the voltage level INI2. The voltage level INI2 is greater than the voltage level of the node N71, so that the charge will not flow out from the node N71 to the node N77 in the stage P83.

From the stage P82 to the stage P83, the voltage level of the node N72 is pulled from the voltage level INI1 to the voltage level VDT, where the voltage level difference is (VDT-INI1). With the capacitive coupling of capacitor C7, from stage P82 to stage P83, the voltage level of node N71 is _{pulled from (INI1+V TH} ) to (INI1+V _TH )+(VDT-INI1), that is, (VDT+V _TH ).

In some embodiments, in the stage P83, the data signal DT is written into the node N72 through the switch T73, and is written into the node N71 through the capacitive coupling of the capacitor C7. Therefore, stage P83 is called the data writing stage.

In phase P84, the light-emitting signal EM has the enable voltage level VGH, so that the switch T76 is turned on. The scan signal S(n) has the disable voltage level VGL, so that the switch T73 is closed. At this time, the current I7 flows through the light-emitting element L7, the switches T76 and T75 in sequence, so that the light-emitting element L7 emits light according to the current level of the current I7. In some embodiments, the current level of the current I7 determines the luminous intensity of the light-emitting element L7.

In the phase P84, the capacitor C7 maintains the voltage level of the node N71 in the phase P83, so that the voltage level of the voltage level of the node N71 in the phase P84 is still (VDT+V _TH ). At this time, the source of the switch T75 is used to receive the voltage signal VSS having the voltage level SS.

In this way, the voltage level (VDT+V _TH ) of the gate of the switch T75 at the node N71 and the voltage level SS of the source of the switch T75 at the node N78 are set. Incorporating the aforementioned electronic formula for the operation in Figure 3, the current level of the current I7 can be obtained as K×(VDT-SS)^2. Therefore, the current level of the current I7 _{has nothing to do with the threshold voltage level V TH} , but is related to the voltage level VDT of the data signal DT and the voltage level SS of the voltage signal VSS.

In some embodiments, the voltage level VDT and the voltage level SS depend on the user. In this way, the luminous intensity of the light-emitting element L7 can be adjusted by the user without being affected _{by the element characteristics of the pixel driving circuit 700, such as the threshold voltage level V TH of the switch T75.}

In some embodiments, in the phase P84, the light-emitting element L7 in the pixel driving circuit 700 emits light, so the phase P84 is referred to as the light-emitting phase.

In different embodiments, the detection operations shown in FIG. 5 and FIG. 6 can also be applied to the pixel driving circuit 700. For example, before the light-emitting element L7 is coupled to the pixel driving circuit 700, the control signal VC1 is pulled to the enable voltage level VGH, and the voltage signal VDD2 is provided at the node N76, and at the node N77, it is measured whether there is a corresponding voltage signal VDD2 Signal to confirm whether the switches T72 and T74 are normally turned on.

For another example, before the light-emitting element L7 is coupled to the pixel driving circuit 700, the detection signal TS, the control signal VC1, and the light-emitting signal EM are pulled to the enable voltage level VGH, and the voltage signal VDD2 is provided at the node N76, and Measure whether there is a signal corresponding to the voltage signal VDD2 at the node N78 to confirm whether the switches T78, T74, T76, and T75 are normally turned on.

For another example, after the light-emitting element L7 is coupled to the pixel driving circuit 700, the detection signal TS is pulled to the enable voltage level VGH, and a voltage signal VDD1 different from the voltage signal VDD2 is provided at the node N75, and The node N76 measures whether there is a signal corresponding to the voltage signal VDD1 to confirm whether the light-emitting element L7 can operate normally.

The various detection methods mentioned in this article are used for illustration, and other various detection methods and signal operation methods are within the scope of this case.

Referring to FIG. 1, in some embodiments, the pixel driving circuits in the display 100 can be detected sequentially. For example, the signal is transmitted to the pixel driving circuit DV(1) for detection through the scan line SL(1), data line DL(m) and light-emitting line EL(1), and then through the scan line SL(2), data line DL( m) and the light-emitting line EL(2) transmit signals to the pixel driving circuit DV(2) for detection. In some other embodiments, multiple pixel driving circuits in the display 100 can also be detected at the same time. For example, the scanning line SL(1)~SL(n), the data line DL(m) and the light-emitting line EL(1)~EL(n) transmit signals to the pixel driving circuit DV(1)~DV(n) at the same time. Perform testing. The various detection sequences of the pixel drive circuits in the display 100 are all within the scope of this case.

In summary, in the embodiment of the present invention, when the light-emitting element L2 or L7 emits light, the threshold voltage level V _{TH of the} switch T25 or the switch T75 is compensated, so that _{the value of the threshold voltage level V TH} does not affect the light-emitting element The luminous intensity of L2 or L7. In addition, the data signal DT, voltage signals VINI, and VSS determined by the user make the luminous intensity of the light-emitting elements L2 and L7 not affected by the resistance value of the current path. In addition, the pixel driving circuit 400 can perform detection before coupling to the light-emitting element L4, thereby reducing the manufacturing cost.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be subject to those defined by the attached patent scope.

100: display

110: display device

120: Scanning device

130: data input device

140: Light-emitting control device

SL(0)~SL(n): scan line

S(n-1), S(n): scan signal

DL(1)~DL(m): data line

DT: Data signal

EL(1)~EL(n): luminous line

EM: Luminous signal

112, 200, 400, 700: pixel drive circuit

L2, L4, L7: light-emitting element

220, 720: data writing unit

240, 740: light-emitting unit

260, 760: detection unit

VSS, VDD, VDD1, VDD2, VINI: voltage signal

VC, VC1, VC2: control signal

TS: Heartbeat

N21~N26, N41, N42, N71~N77: Node

V _TH : Threshold voltage level

P31~P33, P51, P52, P61~P63, P81~P84: stage

VGH: Enable voltage level

VGL: disable voltage level

DD, DD1, DD2, SS, INI, INI1, INI2, VDT: voltage level

V21, V22: node voltage

VGS: Voltage level difference

I2, I7: current

T21~T28, T71~T76, T78: switch

401: accommodating space

C2, C7: Capacitance

401: accommodating space

P41, P42, P43: conduction path

K: constant

Figure 1 is a schematic diagram of a display according to an embodiment of the present invention. FIG. 2 is a circuit diagram of a pixel driving circuit in a display device according to an embodiment of the present invention. FIG. 3 is a timing diagram of the driving operation of the pixel driving circuit according to an embodiment of the present invention. FIG. 4 is a circuit operation diagram of the pixel driving circuit in the display device according to an embodiment of the present invention. FIG. 5 is a timing diagram of the detection operation performed by the pixel driving circuit according to an embodiment of the present invention. FIG. 6 is a timing diagram of the detection operation performed by the pixel driving circuit according to an embodiment of the present invention. FIG. 7 is a circuit diagram of a pixel driving circuit in a display device according to an embodiment of the present invention. FIG. 8 is a timing diagram of the driving operation of the pixel driving circuit according to an embodiment of the present invention.

Domestic deposit information (please note in the order of deposit institution, date and number) none Foreign hosting information (please note in the order of hosting country, institution, date, and number) none

S(n-1), S(n): scan signal

DT: Data signal

EM: Luminous signal

200: pixel drive circuit

L2: Light-emitting element

220: data write unit

240: light-emitting unit

260: detection unit

VSS, VDD, VINI: voltage signal

VC: Control signal

TS: Heartbeat

N21~N26: Node

I2: current

T21~T28: switch

C2: Capacitance

Claims (10)

A display device includes a plurality of pixel drive circuits coupled in series, wherein one of the pixel drive circuits includes: A data writing unit for writing a data signal into a first node includes: A first switch, a first terminal of the first switch is coupled to a control terminal of the first switch at the first node; and A capacitor, a first end of the capacitor is coupled to the first node; and A light-emitting unit for generating a current according to the data signal, including: A second switch for receiving the current, a control terminal of the second switch is coupled to the first node, and a first terminal of the second switch is coupled to a second terminal of the capacitor; and A light-emitting element is used to emit light according to the current. The display device according to claim 1, wherein the data writing unit further includes: A third switch for turning on according to a scan signal, a first end of the third switch is coupled to the second end of the capacitor; and A fourth switch for turning on according to a previous scan signal, a first end of the fourth switch is coupled to the first node, One of the pixel driving circuits in the previous stage pixel driving circuit is used for operating according to the previous stage scanning signal. The display device according to claim 1, wherein the light-emitting unit further includes: A third switch for turning on according to a light-emitting signal, a first end of the third switch is coupled to the second end of the capacitor; and A fourth switch is turned on according to the light-emitting signal, a first end of the fourth switch is coupled to a second end of the second switch, and a second end of the fourth switch is coupled to the light-emitting element. The display device according to claim 1, further including: A third switch is coupled to the light-emitting unit and used to transmit a voltage signal to the second switch before the light-emitting element is coupled to the pixel driving circuit to detect whether the second switch is normally turned on. The display device according to claim 1, further including: A third switch is coupled to the light-emitting element and used to transmit a voltage signal to the light-emitting element when it is turned on to detect whether the light-emitting element is operating normally. A pixel drive circuit, including: A data writing unit for writing a data signal into a first node includes: A first switch, a first terminal of the first switch is coupled to a control terminal of the first switch at a first node; A capacitor, a first end of the capacitor is coupled to the first node; and A second switch, a first end of the second switch is coupled to a second end of the capacitor, and a second end of the second switch is coupled to a second end of the first switch; A light-emitting unit for generating a current according to the data signal, including: A third switch for receiving the current, a control terminal of the third switch is coupled to the first node; and A light-emitting element is used to emit light according to the current. The pixel driving circuit according to claim 6, wherein the data writing unit further includes: A fourth switch, a first terminal of the fourth switch is used to receive a first voltage signal, and a second terminal of the fourth switch is coupled to the first node; The third switch is used to provide a second voltage signal different from the first voltage signal to the second terminal of the first switch when the fourth switch is turned off, so as to provide the first terminal of the first switch And a voltage level difference of the second terminal of the first switch is pulled to a threshold voltage level of the first switch. The pixel driving circuit according to claim 6, wherein the data writing unit further includes: A fourth switch, a first end of the fourth switch is used for receiving a data signal, a second end of the fourth switch is coupled to a second end of the capacitor; The data writing unit is used to pass the capacitor after a voltage level difference between the second terminal of the first switch and the first terminal of the first switch corresponds to a threshold voltage level of the first switch The data signal is written into the first end of the first switch. The pixel driving circuit described in claim 6, further including: A fourth switch is coupled to the light-emitting unit and used to transmit a voltage signal to the third switch before the light-emitting element is coupled to the pixel driving circuit to detect whether the third switch is normally turned on. The pixel driving circuit described in claim 6, further including: A third switch is coupled to the light-emitting element and used to transmit a voltage signal to the light-emitting element when it is turned on to detect whether the light-emitting element is operating normally.

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