TWI744893B - Electronic device and manufacturing method of the same - Google Patents

Electronic device and manufacturing method of the same Download PDF

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TWI744893B
TWI744893B TW109115363A TW109115363A TWI744893B TW I744893 B TWI744893 B TW I744893B TW 109115363 A TW109115363 A TW 109115363A TW 109115363 A TW109115363 A TW 109115363A TW I744893 B TWI744893 B TW I744893B
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surface mount
mount structure
substrate
holes
conductive
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TW109115363A
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TW202044951A (en
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李晉棠
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啟耀光電股份有限公司
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Abstract

The invention discloses an electronic device and a manufacturing method thereof. The pattern circuit of each surface mount structure of the electronic device is disposed on the substrate; at least two through holes are respectively corresponding to at least two signal lines of the pattern circuit; and the two ends of at least one photoelectric element are respectively electrically connected to the at least two signal lines of the pattern circuit. Each connection pad group of the driving circuit board is corresponding to each surface mount structure, and at least two connection pads are respectively corresponding to the at least two through holes of the surface mount structure. At least two conductive members of each conductive member group are disposed corresponding in the at least two through holes of the surface mount structure, and extending to the first surface and the second surface of the substrate; wherein, the conductive member disposed in each through hole respectively electrically connected the signal lines of each surface mounting structure to the connection pads of each conductive member group of the driving circuit board.

Description

電子裝置及其製造方法Electronic device and manufacturing method thereof

本發明關於一種有別於傳統之表面貼裝技術(SMT)的電子裝置及其製造方法。The present invention relates to an electronic device which is different from the traditional surface mount technology (SMT) and its manufacturing method.

在電子裝置的製造領域中,表面貼裝技術(Surface Mount Technology, SMT)是一種將電子零件焊接在例如印刷電路板(Printed Circuit Board, PCB)表面上的一種技術,有別於早期的通孔零件,使用表面貼裝技術可以大幅降低電子產品的體積,達到更輕薄短小的目的。In the field of electronic device manufacturing, Surface Mount Technology (SMT) is a technology for soldering electronic parts on the surface of, for example, a Printed Circuit Board (PCB), which is different from the early through-holes. For parts, the use of surface mount technology can greatly reduce the volume of electronic products and achieve the goal of being lighter, thinner, shorter and smaller.

傳統上,要將表面貼裝元件與電路板的接點進行焊接,主要是透過錫膏(Solder Paste)來完成,只要將錫膏印刷在電路板需要焊接零件的焊墊(或焊盤)上,然後將表面貼裝元件放在焊墊上,使表面貼裝元件的焊腳對應於錫膏的位置,再經高溫迴焊爐使錫膏融化成液體,則液態的錫膏就會包覆表面貼裝元件的焊腳,待冷卻後就可將表面貼裝元件焊接在電路板上。Traditionally, the soldering of the surface mount component and the circuit board is mainly done through solder paste, as long as the solder paste is printed on the solder pads (or pads) of the parts that need to be soldered on the circuit board , And then put the surface mount component on the solder pad, make the solder foot of the surface mount component correspond to the position of the solder paste, and then melt the solder paste into a liquid through a high temperature reflow furnace, and the liquid solder paste will cover the surface The solder feet of the mounted component can be soldered on the circuit board after the surface mount component is cooled.

本發明的目的為提供一種有別於傳統的表面貼裝元件與驅動電路板電連接技術的電子裝置及其製造方法。The purpose of the present invention is to provide an electronic device and a manufacturing method thereof that are different from the traditional electrical connection technology of surface mount components and driving circuit boards.

為達上述目的,依據本發明之一種電子裝置,包括多個表面貼裝結構、一驅動電路板以及多個導電件組。各表面貼裝結構具有一基板、一圖樣電路、至少二通孔及至少一光電元件;基板定義有相對的一第一表面及一第二表面;圖樣電路設置於基板之第一表面,圖樣電路包含至少二訊號線;至少二通孔連通基板之第一表面與第二表面,且至少二通孔分別對應於至少二訊號線;至少一光電元件設置於基板之第一表面,且其二端分別電連接圖樣電路的至少二訊號線。驅動電路板包含多個連接墊組,各連接墊組對應於各表面貼裝結構,且各表面貼裝結構的基板的第二表面設置於驅動電路板具有多個連接墊組的表面,各連接墊組具有至少二連接墊,至少二連接墊分別對應於表面貼裝結構的至少二通孔。該等導電件組對應於該等表面貼裝結構,各導電件組具有至少二導電件,至少二導電件對應設置於表面貼裝結構中的至少二通孔,並延伸至基板的第一表面與第二表面;其中,設置於各至少二通孔中的至少二導電件分別將各表面貼裝結構的至少二訊號線電連接至驅動電路板之各連接墊組的至少二連接墊。To achieve the above objective, an electronic device according to the present invention includes a plurality of surface mount structures, a driving circuit board, and a plurality of conductive element groups. Each surface mount structure has a substrate, a pattern circuit, at least two through holes, and at least one photoelectric element; the substrate defines a first surface and a second surface opposite to each other; the pattern circuit is arranged on the first surface of the substrate, and the pattern circuit At least two signal lines are included; at least two through holes communicate with the first surface and the second surface of the substrate, and at least two through holes respectively correspond to the at least two signal lines; at least one photoelectric element is disposed on the first surface of the substrate and its two ends At least two signal lines of the pattern circuit are respectively electrically connected. The drive circuit board includes a plurality of connection pad groups, each connection pad group corresponds to each surface mount structure, and the second surface of the substrate of each surface mount structure is arranged on the surface of the drive circuit board with multiple connection pad groups, and each connection The pad group has at least two connection pads, and the at least two connection pads respectively correspond to at least two through holes of the surface mount structure. The conductive element groups correspond to the surface mount structures, and each conductive element group has at least two conductive elements, and the at least two conductive elements are corresponding to at least two through holes provided in the surface mount structure and extend to the first surface of the substrate And the second surface; wherein, at least two conductive members arranged in each at least two through holes respectively electrically connect at least two signal lines of each surface mount structure to at least two connection pads of each connection pad group of the drive circuit board.

為達上述目的,依據本發明之一種電子裝置,包括一表面貼裝結構、一驅動電路板以及一導電件組。表面貼裝結構具有一基板、一圖樣電路、至少二通孔及至少一光電元件。基板定義有相對的一第一表面及一第二表面。圖樣電路設置於基板之第一表面,圖樣電路包含至少二訊號線。至少二通孔連通基板之第一表面與第二表面,且至少二通孔分別對應於至少二訊號線。至少一光電元件設置於基板之第一表面,且其二端分別電連接圖樣電路的至少二訊號線。驅動電路板包含一連接墊組,連接墊組對應於表面貼裝結構,且表面貼裝結構的基板的第二表面設置於驅動電路板具有連接墊組的表面,連接墊組具有至少二連接墊,至少二連接墊分別對應於表面貼裝結構的至少二通孔。導電件組對應於表面貼裝結構,導電件組具有至少二導電件,至少二導電件對應設置於表面貼裝結構中的至少二通孔,並延伸至基板的第一表面與第二表面;其中,設置於至少二通孔中的至少二導電件分別將表面貼裝結構的至少二訊號線電連接至驅動電路板之連接墊組的至少二連接墊。To achieve the above objective, an electronic device according to the present invention includes a surface mount structure, a driving circuit board, and a conductive element group. The surface mount structure has a substrate, a patterned circuit, at least two through holes and at least one photoelectric element. The substrate defines a first surface and a second surface opposite to each other. The pattern circuit is arranged on the first surface of the substrate, and the pattern circuit includes at least two signal lines. At least two through holes communicate with the first surface and the second surface of the substrate, and at least two through holes respectively correspond to at least two signal lines. At least one photoelectric element is arranged on the first surface of the substrate, and its two ends are respectively electrically connected to at least two signal lines of the pattern circuit. The drive circuit board includes a connection pad group, the connection pad group corresponds to the surface mount structure, and the second surface of the substrate of the surface mount structure is arranged on the surface of the drive circuit board with the connection pad group, the connection pad group has at least two connection pads , The at least two connection pads respectively correspond to at least two through holes of the surface mount structure. The conductive element group corresponds to the surface mount structure, and the conductive element group has at least two conductive elements, and the at least two conductive elements are corresponding to at least two through holes provided in the surface mount structure and extend to the first surface and the second surface of the substrate; Wherein, at least two conductive members arranged in at least two through holes respectively electrically connect at least two signal lines of the surface mount structure to at least two connection pads of the connection pad group of the driving circuit board.

在一些實施例中,導電件的材料包含錫膏、銅膏、或銀膠,或其組合。In some embodiments, the material of the conductive element includes solder paste, copper paste, or silver paste, or a combination thereof.

在一些實施例中,電子裝置更包括多個黏著件,其設置於該等表面貼裝結構與驅動電路板之間,且各黏著件與各表面貼裝結構對應設置。In some embodiments, the electronic device further includes a plurality of adhesive elements disposed between the surface mount structures and the driving circuit board, and each adhesive element is provided corresponding to each surface mount structure.

在一些實施例中,電子裝置更包括至少一黏著件,其設置於表面貼裝結構與驅動電路板之間。In some embodiments, the electronic device further includes at least one adhesive member disposed between the surface mount structure and the driving circuit board.

在一些實施例中,驅動電路板與基板沿一方向分別定義一側緣,且驅動電路板之側緣與基板之側緣彼此接近。In some embodiments, the driving circuit board and the substrate respectively define a side edge along a direction, and the side edge of the driving circuit board and the side edge of the substrate are close to each other.

在一些實施例中,光電元件的數量為多個,該些光電元件定義一畫素間距;驅動電路板之側緣與基板之側緣的間距沿該方向小於2倍的畫素間距。In some embodiments, the number of optoelectronic elements is multiple, and the optoelectronic elements define a pixel pitch; the distance between the side edge of the driving circuit board and the side edge of the substrate in this direction is less than twice the pixel pitch.

在一些實施例中,電子裝置更包括一次導電件,其與該通孔至少部分重合,並分別電連接至位於該通孔之該導電件與各該訊號線所延伸之一導電墊片。In some embodiments, the electronic device further includes a primary conductive element that at least partially overlaps the through hole and is electrically connected to the conductive element located in the through hole and a conductive pad extending from each of the signal lines.

在一些實施例中,表面貼裝結構的基板更定義有連接第一表面與第二表面之一周緣,至少二通孔不位於基板之周緣。In some embodiments, the substrate of the surface mount structure further defines a peripheral edge connecting the first surface and the second surface, and at least two through holes are not located on the peripheral edge of the substrate.

在一些實施例中,在表面貼裝結構與對應的導電件組中,該等導電件的數量小於該等通孔的數量。In some embodiments, in the surface mount structure and the corresponding conductive element group, the number of the conductive elements is smaller than the number of the through holes.

在一些實施例中,表面貼裝結構配置有數量大於二之多條訊號線及多個光電元件,各訊號線對應有數量大於二之多個通孔,其中至少二光電元件在同一條訊號線上共用同一個通孔及其對應的導電件。In some embodiments, the surface mount structure is configured with a number of signal lines greater than two and a plurality of photoelectric elements, and each signal line corresponds to a number of through holes greater than two, wherein at least two photoelectric elements are on the same signal line Share the same through hole and its corresponding conductive element.

在一些實施例中,表面貼裝結構的至少一光電元件包含一晶片或一封裝件,晶片或封裝件包括一個或多個發光二極體、一個或多個次毫米發光二極體、一個或多個微發光二極體、或一個或多個影像感測器,或其組合。In some embodiments, at least one optoelectronic element of the surface mount structure includes a chip or a package, and the chip or package includes one or more light-emitting diodes, one or more sub-millimeter light-emitting diodes, one or Multiple micro light emitting diodes, or one or more image sensors, or a combination thereof.

在一些實施例中,表面貼裝結構中的圖樣電路包含一薄膜線路或一薄膜元件。In some embodiments, the pattern circuit in the surface mount structure includes a thin film circuit or a thin film element.

為達上述目的,依據本發明之一種電子裝置的製造方法,包括:提供一表面貼裝結構,其中表面貼裝結構具有一基板、一圖樣電路、至少二通孔及至少一光電元件;基板定義有相對的一第一表面及一第二表面;圖樣電路形成於基板之第一表面,圖樣電路包含至少二訊號線;至少二通孔連通基板之第一表面與第二表面,且至少二通孔分別對應於至少二訊號線;至少一光電元件設置於基板之第一表面,且其二端分別電連接圖樣電路的至少二訊號線、提供一驅動電路板,並使表面貼裝結構的基板的第二表面分別設置於驅動電路板具有連接墊組的表面,其中連接墊組對應於表面貼裝結構,並具有至少二連接墊,至少二連接墊分別對應於表面貼裝結構的至少二通孔;以及在表面貼裝結構的至少二通孔中設置一導電材料以形成至少二導電件,使至少二導電件延伸至基板的第一表面與第二表面,並使各至少二通孔中的至少二導電件分別將表面貼裝結構的至少二訊號線電連接至驅動電路板之連接墊組的至少二連接墊。To achieve the above objective, a method of manufacturing an electronic device according to the present invention includes: providing a surface mount structure, wherein the surface mount structure has a substrate, a patterned circuit, at least two through holes, and at least one optoelectronic element; substrate definition There is a first surface and a second surface opposite to each other; the patterned circuit is formed on the first surface of the substrate, the patterned circuit includes at least two signal lines; at least two through holes connect the first surface and the second surface of the substrate, and at least two communicate The holes respectively correspond to at least two signal lines; at least one optoelectronic element is arranged on the first surface of the substrate, and its two ends are respectively electrically connected to at least two signal lines of the pattern circuit, provide a drive circuit board, and make the surface mount structure substrate The second surfaces of the driving circuit board are respectively arranged on the surface of the driving circuit board with the connection pad group, wherein the connection pad group corresponds to the surface mount structure and has at least two connection pads, and the at least two connection pads respectively correspond to at least two connections of the surface mount structure Hole; and a conductive material is provided in at least two through holes of the surface mount structure to form at least two conductive members, so that the at least two conductive members extend to the first surface and the second surface of the substrate, and each of the at least two through holes The at least two conductive elements respectively electrically connect the at least two signal lines of the surface mount structure to the at least two connection pads of the connection pad group of the driving circuit board.

在一些實施例中,在提供表面貼裝結構的步驟中,更包括:使表面貼裝結構中的基板更定義有連接第一表面與第二表面之一周緣,並使至少二通孔不配置於基板之周緣。In some embodiments, in the step of providing a surface mount structure, the step further includes: making the substrate in the surface mount structure further define a peripheral edge connecting the first surface and the second surface, and making at least two through holes not arranged On the periphery of the substrate.

在一些實施例中,在提供表面貼裝結構的步驟中,更包括:使表面貼裝結構的各訊號線對應有數量大於二之多個通孔;及在設置一導電材料的步驟中,更包括:選擇性地噴印導電材料於該等通孔中,以使該等導電件的數量小於該等通孔的數量。In some embodiments, in the step of providing a surface mount structure, it further includes: making each signal line of the surface mount structure correspond to more than two through holes; and in the step of providing a conductive material, It includes: selectively spraying conductive material in the through holes so that the number of the conductive parts is smaller than the number of the through holes.

在一些實施例中,在提供表面貼裝結構的步驟中,更包括:使表面貼裝結構配置有多個光電元件,其中各光電元件包含一個或多個晶片;及在設置一導電材料的步驟前或後,更包括:對表面貼裝結構的基板不連續性地舖覆一封裝層,以覆蓋各光電元件,且封裝層不覆蓋至少二通孔。In some embodiments, the step of providing the surface mount structure further includes: configuring the surface mount structure with a plurality of optoelectronic elements, wherein each optoelectronic element includes one or more wafers; and in the step of arranging a conductive material Before or after, it further includes: discontinuously spreading an encapsulation layer on the substrate of the surface mount structure to cover each photoelectric element, and the encapsulation layer does not cover at least two through holes.

在一些實施例中,在提供表面貼裝結構的步驟中,更包括:使表面貼裝結構配置有多個光電元件,其中各光電元件包含一個或多個晶片;及在設置一導電材料的步驟後,更包括:對表面貼裝結構的基板連續性或不連續性地舖覆一封裝層,以覆蓋各光電元件。In some embodiments, the step of providing the surface mount structure further includes: configuring the surface mount structure with a plurality of optoelectronic elements, wherein each optoelectronic element includes one or more wafers; and in the step of arranging a conductive material Later, it further includes: continuously or discontinuously spreading an encapsulation layer on the substrate of the surface mount structure to cover each optoelectronic element.

在一些實施例中,在提供一驅動電路板的步驟中,更包括:形成至少一黏著件於驅動電路板上,並使至少一黏著件對應並定位各表面貼裝結構至驅動電路板。In some embodiments, the step of providing a driving circuit board further includes: forming at least one adhesive member on the driving circuit board, and corresponding and positioning each surface mount structure to the driving circuit board.

承上所述,在本發明之電子裝置及其製造方法中,表面貼裝結構具有基板、圖樣電路、至少二通孔及至少一光電元件,圖樣電路包含至少二訊號線,至少二通孔連通基板之第一表面與第二表面,且至少二通孔分別對應於至少二訊號線,至少一光電元件設置於基板之第一表面,且其二端分別電連接圖樣電路的至少二訊號線;驅動電路板的連接墊組具有至少二連接墊,至少二連接墊分別對應於表面貼裝結構的至少二通孔;以及,導電件組的至少二導電件對應設置於表面貼裝結構中的至少二通孔,並延伸至基板的第一表面與第二表面;其中,設置於至少二通孔中的至少二導電件分別將表面貼裝結構的至少二訊號線電連接至驅動電路板之連接墊組的至少二連接墊的結構設計,使得本發明的電子裝置及其製造方法有別於傳統的表面貼裝元件與驅動電路板電連接的技術。As mentioned above, in the electronic device and the manufacturing method thereof of the present invention, the surface mount structure has a substrate, a patterned circuit, at least two through holes, and at least one photoelectric element. The patterned circuit includes at least two signal lines, and at least two through holes communicate with each other. The first surface and the second surface of the substrate, and at least two through holes respectively correspond to at least two signal lines, at least one optoelectronic element is disposed on the first surface of the substrate, and the two ends are respectively electrically connected to at least two signal lines of the pattern circuit; The connection pad group of the drive circuit board has at least two connection pads, and the at least two connection pads respectively correspond to at least two through holes of the surface mount structure; Two through holes extending to the first surface and the second surface of the substrate; wherein, at least two conductive members arranged in the at least two through holes respectively electrically connect at least two signal lines of the surface mount structure to the connection of the driving circuit board The structure design of at least two connecting pads of the pad set makes the electronic device and the manufacturing method of the present invention different from the traditional surface mount component and the driving circuit board electrical connection technology.

以下將參照相關圖式,說明依本發明一些實施例之電子裝置及其製造方法,其中相同的元件將以相同的參照符號加以說明。Hereinafter, an electronic device and a manufacturing method thereof according to some embodiments of the present invention will be described with reference to related drawings, in which the same components will be described with the same reference signs.

本發明的電子裝置及其製造方法和下列共同待決的中華民國專利申請案相關,其等全部和本申請案共同歸屬於同一位所有者,其等每一專利申請案的全部內容都以參照方式併入本文:(1)、中華民國專利申請案第107122662號,發明名稱為「電子裝置及其製造方法」;(2)、中華民國專利申請案第108107174號,發明名稱為「電子裝置及其製造方法」;(3)、中華民國專利申請案第106136523號,發明名稱為「電子裝置及其製造方法」;以及(4)、中華民國專利申請案第106116725號,發明名稱為「電子裝置與其製造方法」。The electronic device and its manufacturing method of the present invention are related to the following co-pending ROC patent applications, all of which belong to the same owner as this application, and the entire contents of each patent application are referred to The method is incorporated into this article: (1), the Republic of China Patent Application No. 107122662, the title of the invention is "Electronic Device and its Its manufacturing method"; (3), Republic of China Patent Application No. 106136523, the title of the invention is "Electronic Device and its Manufacturing Method"; and (4), Republic of China Patent Application No. 106116725, the title of the invention is "Electronic Device And its manufacturing method".

本發明的電子裝置包括至少一表面貼裝結構、一驅動電路板以及至少一導電件組。其中,導電件組、表面貼裝結構、以及驅動電路板中的連接墊組,其數量可彼此對應,且各導電件組的至少二導電件分別置入各表面貼裝結構的至少二通孔,以接觸各連接墊組的至少二連接墊,使各導電件組可將各表面貼裝結構電連接至驅動電路板。通過表面貼裝結構、連接墊組與導電件組之數量彼此對應,以及連接墊組中的連接墊、導電件組中的導電件與表面貼裝結構的通孔進行各種數量的排列組合,可達到本發明之電子裝置的不同實施態樣。值得注意的是,表面貼裝結構與驅動電路板可合理地被理解為通過個別製程製成的兩個獨立元件,並通過本發明中所涵蓋及其均等的實施態樣,使表面貼裝結構與驅動電路板之間進行各種數量的排列組合,彼此搭配的彈性與應用相當廣泛。各實施態樣分述如後。The electronic device of the present invention includes at least one surface mount structure, a driving circuit board, and at least one conductive element group. Wherein, the number of the conductive element group, the surface mount structure, and the connection pad group in the drive circuit board can correspond to each other, and at least two conductive elements of each conductive element group are respectively inserted into at least two through holes of each surface mount structure , To contact at least two connection pads of each connection pad group, so that each conductive element group can electrically connect each surface mount structure to the driving circuit board. Through the surface mount structure, the number of connection pad groups and the conductive element groups correspond to each other, and the connection pads in the connection pad group, the conductive elements in the conductive element group and the through holes of the surface mount structure can be arranged and combined in various numbers. Achieve different implementation aspects of the electronic device of the present invention. It is worth noting that the surface mount structure and the driving circuit board can be reasonably understood as two independent components made by separate manufacturing processes, and the surface mount structure can be realized through the equivalent implementation modes covered by the present invention. Various numbers of permutations and combinations are carried out with the driving circuit board, and the flexibility and application of matching with each other are quite extensive. Each implementation mode is described below.

圖1A為本發明一實施例之表面貼裝結構的佈局示意圖,圖1B與圖1C分別顯示圖1A中,沿1B-1B割面線及1C-1C割面線的剖視示意圖,圖2為本發明一實施例之驅動電路板的佈局示意圖,而圖3為本發明一實施例之電子裝置的佈局示意圖。Fig. 1A is a schematic diagram of the layout of a surface mount structure according to an embodiment of the present invention. Fig. 1B and Fig. 1C respectively show a schematic cross-sectional view taken along the cutting line 1B-1B and the cutting line 1C-1C in Fig. 1A, and Fig. 2 is A schematic diagram of the layout of a driving circuit board according to an embodiment of the present invention, and FIG. 3 is a schematic diagram of the layout of an electronic device according to an embodiment of the present invention.

請先參照圖3所示,電子裝置1包括有多個表面貼裝結構2、一驅動電路板3以及多個導電件組。多個表面貼裝結構2設置於驅動電路板3上,且是透過對應的導電件組而分別與驅動電路板3電性連接。本實施例之多個表面貼裝結構2是例如以二維矩陣排列的方式設置在驅動電路板3上,以透過驅動電路板3驅動該等表面貼裝結構2。在不同的實施例中,該等表面貼裝結構2也可以為其他排列方式,例如一維矩陣排列或不規則的排列,並不限制。於此,以表面貼裝結構2是以被動矩陣式(passive matrix, PM)的光電結構為例,搭配被動矩陣的驅動電路板3,可使電子裝置1為被動矩陣式裝置。在不同的實施例中,搭配主動式的驅動電路板,則可使電子裝置為主動矩陣式裝置。Please refer to FIG. 3 first, the electronic device 1 includes a plurality of surface mount structures 2, a driving circuit board 3, and a plurality of conductive element groups. A plurality of surface mount structures 2 are disposed on the driving circuit board 3, and are electrically connected to the driving circuit board 3 through corresponding conductive element groups. The multiple surface mount structures 2 of this embodiment are arranged on the driving circuit board 3 in a two-dimensional matrix arrangement, for example, to drive the surface mount structures 2 through the driving circuit board 3. In different embodiments, the surface mount structures 2 can also be arranged in other ways, such as a one-dimensional matrix arrangement or an irregular arrangement, which is not limited. Here, taking the surface mount structure 2 as an example of a passive matrix (PM) optoelectronic structure, with the driving circuit board 3 of the passive matrix, the electronic device 1 can be a passive matrix device. In different embodiments, with an active driving circuit board, the electronic device can be an active matrix device.

如圖1A至圖1C所示,各表面貼裝結構2具有一基板21、一圖樣電路22、至少二通孔23及至少一光電元件24。As shown in FIGS. 1A to 1C, each surface mount structure 2 has a substrate 21, a pattern circuit 22, at least two through holes 23 and at least one photoelectric element 24.

基板21定義有相對的一第一表面S1及一第二表面S2。其中,基板21可以是絕緣基板,或是導電基板再加上絕緣層;基板21可以是軟板或硬板,並不限制。The substrate 21 defines a first surface S1 and a second surface S2 opposite to each other. Among them, the substrate 21 may be an insulating substrate, or a conductive substrate plus an insulating layer; the substrate 21 may be a flexible board or a rigid board, and it is not limited.

圖樣電路22設置於基板21之第一表面S1上,且圖樣電路22包含至少二訊號線L1、L2。在一些實施例中,圖樣電路22可包含薄膜線路及/或薄膜元件,薄膜線路例如為導電線路或絕緣層,薄膜元件例如為薄膜電晶體、電容或電阻等元件。本實施例之圖樣電路22包含薄膜線路,並且包含兩條訊號線L1、L2以及與各訊號線L1、L2連接的導電圖樣為例。再說明的是,圖樣電路22是一個統稱,只要在基板21上形成的膜層或元件皆可稱為圖樣電路。在一些實施例中,圖樣電路22也可包含傳送訊號的導線或線路,例如掃描線路或資料線路,視電子裝置的功能與用途而定。The pattern circuit 22 is disposed on the first surface S1 of the substrate 21, and the pattern circuit 22 includes at least two signal lines L1, L2. In some embodiments, the pattern circuit 22 may include thin film circuits and/or thin film elements. The thin film circuits are, for example, conductive circuits or insulating layers, and the thin film elements are, for example, thin film transistors, capacitors, or resistors. The pattern circuit 22 of this embodiment includes a thin film circuit, and includes two signal lines L1, L2 and a conductive pattern connected to each signal line L1, L2 as an example. It should be noted that the pattern circuit 22 is a general term, as long as the film layer or element formed on the substrate 21 can be called a pattern circuit. In some embodiments, the pattern circuit 22 may also include wires or circuits for transmitting signals, such as scanning circuits or data circuits, depending on the function and use of the electronic device.

至少二通孔23連通基板21之第一表面S1與第二表面S2(圖1B、圖1C),且至少二通孔23分別對應於至少二訊號線L1、L2。本實施例的表面貼裝結構2是以具有兩個通孔23,且兩通孔23分別位於至少二訊號線L1、L2所延伸的導電墊片為例。其中,一個通孔23對應於訊號線L1,並位於連接訊號線L1的導電圖樣上,而另一通孔23對應於訊號線L2,並位於連接訊號線L2的導電圖樣上。此外,本實施例的表面貼裝結構2的基板21更定義有連接第一表面S1與第二表面S2之一周緣S3,而兩個通孔23是位於基板21的內側,並不是位於基板21的周緣S3上。藉由這樣的設計,相較於習知之表面貼裝元件在基板的周緣上設置通孔,且利用通孔內的導電材料電連接至驅動電路板的作法,本實施例由於兩通孔23是位於基板21的內側,因此可使表面貼裝結構2電連接至驅動電路板3時佔用的空間較小,進而可以在相同尺寸的前提下提高電子裝置1的元件設置密度(即提高電子裝置的解析度)。At least two through holes 23 communicate with the first surface S1 and the second surface S2 of the substrate 21 (FIGS. 1B and 1C ), and at least two through holes 23 respectively correspond to at least two signal lines L1 and L2. The surface mount structure 2 of this embodiment is an example of a conductive pad having two through holes 23, and the two through holes 23 are respectively located on at least two signal lines L1 and L2. Among them, one through hole 23 corresponds to the signal line L1 and is located on the conductive pattern connected to the signal line L1, and the other through hole 23 corresponds to the signal line L2 and is located on the conductive pattern connected to the signal line L2. In addition, the substrate 21 of the surface mount structure 2 of this embodiment further defines a peripheral edge S3 connecting the first surface S1 and the second surface S2, and the two through holes 23 are located inside the substrate 21, not on the substrate 21. On the perimeter of S3. With this design, compared to the conventional surface mount device with through holes on the periphery of the substrate and the conductive material in the through holes are electrically connected to the drive circuit board, this embodiment is because the two through holes 23 are Located on the inner side of the substrate 21, so that the surface mount structure 2 can be electrically connected to the drive circuit board 3 occupies a small space, and then can increase the component density of the electronic device 1 on the premise of the same size (that is, increase the electronic device Resolution).

至少一光電元件24設置於基板21之第一表面S1,且其二端分別電連接圖樣電路22的至少二訊號線L1、L2。光電元件24可包含一晶片(chip)或一封裝件(package),晶片或封裝件可例如但不限於包括一個或多個發光二極體(LED)、一個或多個次毫米發光二極體(mini LED)、一個或多個微發光二極體(micro LED)、或一個或多個影像感測器(image sensor),或其組合。本實施例之光電元件24的數量為1個,並包含一個覆晶型式的發光二極體晶片,且透過兩個連接墊P1、P2對應設置於訊號線L1、L2連接的導電圖樣上,使得光電元件24可透過兩個連接墊P1、P2分別電連接圖樣電路22的兩條訊號線L1、L2。在一些實施例中,發光二極體晶片可發出例如紅光、或藍光、或綠光、或紫外光、或紅外光,或其他波長的光線,本發明不限制。At least one photoelectric element 24 is disposed on the first surface S1 of the substrate 21, and its two ends are electrically connected to at least two signal lines L1, L2 of the pattern circuit 22, respectively. The optoelectronic element 24 may include a chip or a package. The chip or package may, for example, but not limited to, include one or more light emitting diodes (LED), one or more sub-millimeter light emitting diodes (Mini LED), one or more micro LEDs, or one or more image sensors, or a combination thereof. The number of the optoelectronic element 24 in this embodiment is one, and includes a flip-chip type light-emitting diode chip, and is correspondingly disposed on the conductive pattern connected to the signal lines L1, L2 through the two connection pads P1, P2, so that The photoelectric element 24 can be electrically connected to the two signal lines L1 and L2 of the pattern circuit 22 through the two connection pads P1 and P2, respectively. In some embodiments, the light-emitting diode chip can emit, for example, red light, or blue light, or green light, or ultraviolet light, or infrared light, or light of other wavelengths, which is not limited by the present invention.

請參照圖2所示,驅動電路板3包含有多個連接墊組31,該等連接墊組31排列成二維矩陣狀。各連接墊組31對應於各表面貼裝結構2,且各表面貼裝結構2的基板21的第二表面S2設置於驅動電路板3具有多個連接墊組31的表面(圖3)。換句話說,在本實施例中,每一個表面貼裝結構2分別透過其下表面(第二表面S2)設置於驅動電路板3之表面對應的連接墊組31(一個表面貼裝結構2對應一個單位的連接墊組31)。其中,每一個連接墊組31具有至少二連接墊311、312,且至少二連接墊311、312分別對應於表面貼裝結構2的至少二通孔23。本實施例的各連接墊組31是以具有兩個連接墊311、312,並分別與兩個通孔23對應設置為例(連接墊311、312數量的加總與通孔23的數量相同)。其中,連接墊311與表面貼裝結構2的其中一個通孔23(圖1A之右上側的通孔23)對應且連接,而連接墊312與表面貼裝結構2的另一個通孔23(圖1A之左下側的通孔23)對應且連接。此外,本實施例之驅動電路板3更可包含多條交錯設置的導線T1、T2,各連接墊組31的該等連接墊311是依序設置於橫向設置的導線T1上,且各連接墊組31的該等連接墊312是依序設置於縱向設置的導線T2上。Please refer to FIG. 2, the driving circuit board 3 includes a plurality of connecting pad groups 31 which are arranged in a two-dimensional matrix. Each connection pad group 31 corresponds to each surface mount structure 2, and the second surface S2 of the substrate 21 of each surface mount structure 2 is disposed on the surface of the driving circuit board 3 having a plurality of connection pad groups 31 (FIG. 3 ). In other words, in this embodiment, each surface mount structure 2 is provided on the surface of the driving circuit board 3 through its lower surface (second surface S2) and the corresponding connection pad group 31 (one surface mount structure 2 corresponds to One unit of connecting pad group 31). Each connection pad group 31 has at least two connection pads 311 and 312, and the at least two connection pads 311 and 312 respectively correspond to at least two through holes 23 of the surface mount structure 2. Each connection pad group 31 of this embodiment is an example of having two connection pads 311, 312 and corresponding to the two through holes 23 (the sum of the number of connection pads 311, 312 is the same as the number of through holes 23) . Among them, the connection pad 311 corresponds to and is connected to one of the through holes 23 of the surface mount structure 2 (the through hole 23 on the upper right side of FIG. 1A), and the connection pad 312 and the other through hole 23 of the surface mount structure 2 (FIG. The through hole 23) on the lower left side of 1A corresponds and connects. In addition, the driving circuit board 3 of this embodiment may further include a plurality of wires T1 and T2 arranged in a staggered manner. The connection pads 311 of each connection pad group 31 are sequentially arranged on the wires T1 arranged horizontally, and each connection pad The connecting pads 312 of the group 31 are sequentially arranged on the longitudinally arranged wires T2.

請再參照圖1A與圖3所示,多個導電件組對應於該等表面貼裝結構2。其中,各導電件組具有至少二導電件41,至少二導電件41對應設置於表面貼裝結構2中的至少二通孔23,並延伸至基板21的第一表面S1與第二表面S2。本實施例之各導電件組是以具有兩個導電件41為例。導電件41的材料可例如但不限於包含錫膏、銅膏、或銀膠,或其組合。於此,各導電件組的這兩個導電件41個別對應設置於各表面貼裝結構2中的兩個通孔23內(在本實施例中,導電件41的數量與通孔23的數量相同),並且延伸至基板21的第一表面S1與第二表面S2,使得設置於各表面貼裝結構2之各通孔23中的導電件41可分別將各表面貼裝結構2的兩條訊號線L1、L2電連接至驅動電路板3之各連接墊組31的兩個連接墊311、312。換言之,本實施例是利用位於表面貼裝結構2內側的兩個通孔23及位於兩通孔23內的導電件組(兩導電件41),以及驅動電路板3上的連接墊組31(連接墊311、312),使得驅動電路板3可透過對應的連接墊311、312、對應的導電件41及對應的訊號線L1、L2電連接至對應的光電元件24,以驅動各光電元件24(發光二極體)發光。Please refer to FIG. 1A and FIG. 3 again, a plurality of conductive element groups correspond to the surface mount structures 2. Wherein, each conductive element group has at least two conductive elements 41, and the at least two conductive elements 41 are correspondingly provided in the at least two through holes 23 in the surface mount structure 2 and extend to the first surface S1 and the second surface S2 of the substrate 21. In this embodiment, each conductive element group has two conductive elements 41 as an example. The material of the conductive member 41 may include, but is not limited to, solder paste, copper paste, or silver paste, or a combination thereof. Here, the two conductive members 41 of each conductive member group are respectively correspondingly disposed in the two through holes 23 in each surface mount structure 2 (in this embodiment, the number of conductive members 41 is equal to the number of through holes 23 The same), and extend to the first surface S1 and the second surface S2 of the substrate 21, so that the conductive member 41 disposed in each through hole 23 of each surface mount structure 2 can separate two pieces of each surface mount structure 2 The signal lines L1 and L2 are electrically connected to the two connection pads 311 and 312 of each connection pad group 31 of the driving circuit board 3. In other words, this embodiment utilizes two through holes 23 located inside the surface mount structure 2 and conductive element groups (two conductive elements 41) located inside the two through holes 23, and the connecting pad group 31 ( Connection pads 311, 312), so that the drive circuit board 3 can be electrically connected to the corresponding photoelectric elements 24 through the corresponding connection pads 311, 312, the corresponding conductive members 41, and the corresponding signal lines L1, L2, so as to drive the respective photoelectric elements 24 (Light-emitting diodes) emit light.

另外,圖4A與圖4B分別為本發明不同實施例之表面貼裝結構的佈局示意圖。In addition, FIG. 4A and FIG. 4B are respectively schematic diagrams of the layout of the surface mount structure of different embodiments of the present invention.

與前述實施例之表面貼裝結構2主要的不同在於,圖1A的表面貼裝結構2只有二條訊號線L1、L2及一個光電元件24,但圖4A與圖4B的表面貼裝結構分別配置有數量大於二之三條訊號線及兩個光電元件24。其中,圖4A的兩個光電元件24為橫向排列(1*2),而圖4A的兩個光電元件24為縱向排列(2*1)。The main difference from the surface mount structure 2 of the foregoing embodiment is that the surface mount structure 2 of FIG. 1A has only two signal lines L1, L2 and one optoelectronic element 24, but the surface mount structure of FIG. 4A and FIG. 4B are respectively configured with The number is greater than two, three signal lines and two photoelectric elements 24. Among them, the two photoelectric elements 24 in FIG. 4A are arranged horizontally (1*2), and the two photoelectric elements 24 in FIG. 4A are arranged vertically (2*1).

圖4A的表面貼裝結構配置有三條訊號線(增加的訊號線標示為L4)及兩個光電元件24。其中,左側的光電元件24電連接訊號線L1與訊號線L2,並且分別透過訊號線L1、L2及對應的兩個通孔23(及兩個導電件,未繪示)而分別與驅動電路板(未繪示)電連接,而右側的光電元件24電連接訊號線L1與訊號線L4,且訊號線L4透過對應的通孔23(及導電件)而與驅動電路板電連接。因此,圖4A的兩個光電元件24在同一條訊號線L1上是共用同一個通孔23(及其對應的導電件)。藉由這個共用通孔23的配置,不僅可以提高電子裝置的元件設置密度,亦可在維持相同畫素(相同數量的光電元件24)的狀態下,因縮減通孔數量而降低鑽孔成本。The surface mount structure of FIG. 4A is configured with three signal lines (the added signal line is marked as L4) and two photoelectric elements 24. Among them, the photoelectric element 24 on the left is electrically connected to the signal line L1 and the signal line L2, and is respectively connected to the driving circuit board through the signal lines L1 and L2 and the corresponding two through holes 23 (and two conductive elements, not shown). (Not shown) is electrically connected, and the optoelectronic element 24 on the right is electrically connected to the signal line L1 and the signal line L4, and the signal line L4 is electrically connected to the driving circuit board through the corresponding through hole 23 (and conductive member). Therefore, the two photoelectric elements 24 in FIG. 4A share the same through hole 23 (and its corresponding conductive element) on the same signal line L1. With this configuration of the shared through holes 23, not only the device density of the electronic device can be increased, but also the drilling cost can be reduced by reducing the number of through holes while maintaining the same pixels (the same number of photoelectric elements 24).

另外,圖4B的表面貼裝結構也配置有數量大於二之三條訊號線(增加的訊號線標示為L3)及兩個光電元件24。其中,上側的光電元件24電連接訊號線L1與訊號線L2,並且分別透過訊號線L1、L2及對應的兩個通孔23(及兩個導電件,未繪示)而分別與驅動電路板(未繪示)電連接,而下側的光電元件24電連接訊號線L2與訊號線L3,且訊號線L3透過對應的通孔23(及導電件,未繪示)而與驅動電路板電連接。因此,圖4B的兩個光電元件24在同一條訊號線L2上是共用同一個通孔23(及其對應的導電件)。藉由這個共用通孔23的配置,也可提高電子裝置的元件設置密度及降低成本。In addition, the surface mount structure of FIG. 4B is also configured with more than two-thirds of the signal lines (the added signal line is marked as L3) and two photoelectric elements 24. Wherein, the photoelectric element 24 on the upper side is electrically connected to the signal line L1 and the signal line L2, and is respectively connected to the driving circuit board through the signal lines L1 and L2 and the corresponding two through holes 23 (and two conductive elements, not shown). (Not shown) is electrically connected, and the photoelectric element 24 on the lower side is electrically connected to the signal line L2 and the signal line L3, and the signal line L3 is electrically connected to the driving circuit board through the corresponding through hole 23 (and conductive member, not shown) connect. Therefore, the two photoelectric elements 24 in FIG. 4B share the same through hole 23 (and its corresponding conductive element) on the same signal line L2. With the configuration of the shared through hole 23, the component placement density of the electronic device can also be increased and the cost can be reduced.

另外,請參照圖5A至圖7所示,其中,圖5A為本發明又一實施例之表面貼裝結構的佈局示意圖,圖5B至圖5E分別顯示圖5A中,沿5B-5B割面線、5C-5C割面線、5D-5D割面線及5E-5E割面線的剖視示意圖,圖6為本發明又一實施例之驅動電路板的佈局示意圖,而圖7為本發明又一實施例之電子裝置的佈局示意圖。In addition, please refer to FIGS. 5A to 7, where FIG. 5A is a schematic diagram of the layout of a surface mount structure according to another embodiment of the present invention, and FIGS. 5B to 5E respectively show that in FIG. , 5C-5C cut surface line, 5D-5D cut surface line and 5E-5E cut surface line schematic cross-sectional view, FIG. 6 is a schematic diagram of the layout of the drive circuit board according to another embodiment of the present invention, and FIG. A schematic diagram of the layout of an electronic device according to an embodiment.

請先參照圖7所示,電子裝置1a包括有多個表面貼裝結構2a、一驅動電路板3a以及多個導電件組。多個表面貼裝結構2a設置於驅動電路板3a上,並透過對應的導電件組而分別與驅動電路板3a電性連接。本實施例之多個表面貼裝結構2a仍是以二維矩陣排列的方式設置在驅動電路板3a上,以透過驅動電路板3a驅動該等表面貼裝結構2a;當然,表面貼裝結構亦不限制為一維矩陣排列。本實施例之表面貼裝結構2a仍是以被動矩陣式(PM)的光電結構為例,搭配被動式的驅動電路板3a使得電子裝置1a為被動矩陣式裝置。Please refer to FIG. 7 first, the electronic device 1a includes a plurality of surface mount structures 2a, a driving circuit board 3a, and a plurality of conductive element groups. A plurality of surface mount structures 2a are arranged on the driving circuit board 3a, and are electrically connected to the driving circuit board 3a through corresponding conductive element groups. The multiple surface mount structures 2a of this embodiment are still arranged on the drive circuit board 3a in a two-dimensional matrix arrangement to drive the surface mount structures 2a through the drive circuit board 3a; of course, the surface mount structures are also It is not limited to a one-dimensional matrix arrangement. The surface mount structure 2a of the present embodiment still uses a passive matrix (PM) photoelectric structure as an example, and the passive driving circuit board 3a makes the electronic device 1a a passive matrix device.

如圖5A所示,與前述實施例之表面貼裝結構2主要的不同在於,圖5A的表面貼裝結構2a在基板21上設有四個光電元件24,四個光電元件24排列成2*2的矩陣狀。另外,表面貼裝結構2a更具有四條訊號線L1、L2、L3、L4。As shown in FIG. 5A, the main difference from the surface mount structure 2 of the foregoing embodiment is that the surface mount structure 2a of FIG. The matrix shape of 2. In addition, the surface mount structure 2a further has four signal lines L1, L2, L3, and L4.

在圖5A中,圖樣電路22a除了包含有四條訊號線L1、L2、L3、L4外,還包含與各訊號線L1、L2、L3、L4連接的導電圖樣。其中,訊號線L1、L3為橫向配置,並且與縱向配置的訊號線L2、L4交錯以定義出四個畫素,各畫素對應有一個光電元件24。另外,本實施例之通孔23的數量為四個,且每一個通孔23(及對應的光電元件24)分別對應於一條訊號線L1、L2、L3、L4。其中,四個通孔23皆位於基板21的內側,並沒有位於基板21之周緣S3,藉此,相較於習知來說,可以在相同尺寸的前提下提高電子裝置1a的元件設置密度。In FIG. 5A, the pattern circuit 22a not only includes four signal lines L1, L2, L3, and L4, but also includes a conductive pattern connected to each signal line L1, L2, L3, and L4. Among them, the signal lines L1 and L3 are horizontally arranged, and are interlaced with the longitudinally arranged signal lines L2 and L4 to define four pixels, and each pixel corresponds to a photoelectric element 24. In addition, the number of through holes 23 in this embodiment is four, and each through hole 23 (and the corresponding photoelectric element 24) corresponds to a signal line L1, L2, L3, L4, respectively. Among them, the four through holes 23 are all located inside the substrate 21 and not located on the peripheral edge S3 of the substrate 21. Therefore, compared with the prior art, the component placement density of the electronic device 1a can be increased under the premise of the same size.

另外,如圖6所示,本實施例之驅動電路板3a的每一個連接墊組具有八個連接墊311、312、…318。以圖6之左上側區域A的連接墊組為例,其中四個連接墊311、312、317、318分別對應於表面貼裝結構2a的四個通孔23。本實施例之連接墊311~318的數量(8個)大於通孔23的數量(4個),而各導電件組之導電件41的數量也與通孔23的數量相同。In addition, as shown in FIG. 6, each connection pad group of the driving circuit board 3a of this embodiment has eight connection pads 311, 312,... 318. Taking the connection pad group in the upper left area A of FIG. 6 as an example, the four connection pads 311, 312, 317, and 318 respectively correspond to the four through holes 23 of the surface mount structure 2a. In this embodiment, the number of connection pads 311 to 318 (8) is greater than the number of through holes 23 (4), and the number of conductive elements 41 of each conductive element group is also the same as the number of through holes 23.

值得說明的是,在不同的實施例中,在保持表面貼裝結構與驅動電路板電連接的架構下,在表面貼裝結構與對應的導電件組中,若該等導電件41的數量小於該等通孔23的數量,也就是有較多的通孔23(鑽孔較多),但有較少的導電件41時,因為可以不需要在各表面貼裝結構中的每一個通孔23中都設置導電件41就足夠驅動對應的光電元件,因此,該等導電件41的數量可以小於該等通孔23的數量,藉由至少二光電元件在同一條訊號線上共用同一個通孔23及其對應於前述共用通孔23之導電件41的設計,可以降低電子裝置的製作成本(因為不需要那麼多的設置導電件41的製程,成本可以較低),同時使電子裝置維持在相同畫素(相同數量的光電元件24)的狀態。本領域技術人員為了達到彈性滿足不同客戶端需求,在產出相同數量之表面貼裝結構的情況下,可選用數量與通孔相當或數量少於通孔的導電件,只要可以保持表面貼裝結構與驅動電路板電連接而可利用驅動電路板驅動該等表面貼裝結構上的光電元件即可。此外,未設置導電件的通孔,亦可在前述製程發生瑕疵時,再置入導電件作為電連接補強之用。It is worth noting that in different embodiments, under the structure of maintaining the electrical connection between the surface mount structure and the driving circuit board, in the surface mount structure and the corresponding conductive element group, if the number of the conductive elements 41 is less than The number of through holes 23 means that there are more through holes 23 (more drilled holes), but fewer conductive elements 41, because it is not necessary to mount each through hole in each surface mount structure It is sufficient to provide conductive elements 41 in 23 to drive the corresponding photoelectric elements. Therefore, the number of the conductive elements 41 can be less than the number of the through holes 23, and at least two photoelectric elements share the same through hole on the same signal line. 23 and the design of the conductive element 41 corresponding to the aforementioned shared through hole 23, can reduce the manufacturing cost of the electronic device (because there is no need for so many processes for disposing the conductive element 41, the cost can be lower), while keeping the electronic device in The state of the same pixel (the same number of photoelectric elements 24). In order to achieve flexibility to meet the needs of different clients, those skilled in the art can choose conductive elements with the same number of through holes or less than through holes when the same number of surface mount structures are produced, as long as the surface mount can be maintained The structure is electrically connected to the driving circuit board, and the driving circuit board can be used to drive the optoelectronic elements on the surface mount structures. In addition, if the through hole is not provided with a conductive element, it is also possible to insert a conductive element for electrical connection reinforcement when a defect occurs in the aforementioned manufacturing process.

此外,請再參照圖5A及圖6所示,在本實施例的表面貼裝結構2a中,以訊號線L1電連接的兩個上側(橫向)的光電元件24來說,這兩個光電元件24在同一條訊號線L1上也是共用同一個通孔23及其對應的導電件41,而與驅動電路板3a之對應的連接墊311電連接;以訊號線L3電連接的兩個下側(橫向)的光電元件24來說,這兩個光電元件24在同一條訊號線L3上也是共用同一個通孔23及其對應的導電件41,而與驅動電路板3a之對應的連接墊317電連接。In addition, please refer to FIG. 5A and FIG. 6 again. In the surface mount structure 2a of this embodiment, the two upper (lateral) optoelectronic elements 24 electrically connected by the signal line L1 are 24 also shares the same through hole 23 and its corresponding conductive member 41 on the same signal line L1, and is electrically connected to the corresponding connection pad 311 of the driving circuit board 3a; the two lower sides electrically connected by the signal line L3 ( For the optoelectronic element 24 in the horizontal direction, the two optoelectronic elements 24 also share the same through hole 23 and the corresponding conductive member 41 on the same signal line L3, and the corresponding connection pad 317 of the driving circuit board 3a is electrically connected. connect.

另外,再以訊號線L2電連接的兩個左側(縱向)的光電元件24來說,這兩個光電元件24在同一條訊號線L2上也是共用同一個通孔23及其對應的導電件41而與驅動電路板3a之對應的連接墊312電連接;再以訊號線L4電連接的兩個右側(縱向)的光電元件24來說,這兩個光電元件24在同一條訊號線L4上也是共用同一個通孔23及其對應的導電件41而與驅動電路板3a之對應的連接墊318電連接。藉由這些共用通孔23的配置,不僅可以提高電子裝置1a的元件設置密度,也可以降低成本(因為鑽孔比光電元件24(畫素)少)。In addition, taking the two left (longitudinal) photoelectric elements 24 electrically connected to the signal line L2 as an example, the two photoelectric elements 24 also share the same through hole 23 and the corresponding conductive member 41 on the same signal line L2. And the corresponding connection pad 312 of the driving circuit board 3a is electrically connected; and the two photoelectric elements 24 on the right side (longitudinal) electrically connected by the signal line L4, these two photoelectric elements 24 are also on the same signal line L4 The same through hole 23 and its corresponding conductive member 41 are shared to be electrically connected to the corresponding connection pad 318 of the driving circuit board 3a. With the configuration of these shared through holes 23, not only the component placement density of the electronic device 1a can be increased, but also the cost can be reduced (because there are fewer holes than the optoelectronic components 24 (pixels)).

另外,圖8A為本發明又一實施例之表面貼裝結構的佈局示意圖,而圖8B為圖8A之表面貼裝結構的電路示意圖。如圖8A與圖8B所示,本實施例之表面貼裝結構2b是以主動矩陣式(active matrix, AM)的光電結構為例,搭配主動式的驅動電路板(未繪示),可使組成的電子裝置成為主動矩陣式裝置。在一些實施例中,多個表面貼裝結構2b可以二維矩陣排列的方式,或其他排列方式設置在對應的驅動電路板上,以透過驅動電路板驅動該等表面貼裝結構2b的光電元件24。In addition, FIG. 8A is a schematic diagram of the layout of the surface mount structure of another embodiment of the present invention, and FIG. 8B is a schematic diagram of the circuit of the surface mount structure of FIG. 8A. As shown in FIG. 8A and FIG. 8B, the surface mount structure 2b of this embodiment takes an active matrix (AM) photoelectric structure as an example, with an active driving circuit board (not shown), The composed electronic device becomes an active matrix device. In some embodiments, a plurality of surface mount structures 2b can be arranged in a two-dimensional matrix arrangement or other arrangements on the corresponding drive circuit board, so as to drive the optoelectronic elements of the surface mount structures 2b through the drive circuit board. twenty four.

如圖8A所示,與前述實施例之表面貼裝結構2a主要的不同在於,本實施例之表面貼裝結構2b具有九個光電元件24,且排列成3*3的矩陣狀(共有9個畫素)。其中,各光電元件24(各畫素)是以包括三個發光二極體(LED)以構成三個次畫素,各次畫素可分別包含一個發光二極體晶片,且三個次畫素中的三個發光二極體可分別為紅色、藍色與綠色的LED,以形成全彩的畫素,藉此可構成全彩的LED顯示器。As shown in FIG. 8A, the main difference from the surface mount structure 2a of the previous embodiment is that the surface mount structure 2b of this embodiment has nine photoelectric elements 24 arranged in a 3*3 matrix (a total of 9 Pixel). Among them, each photoelectric element 24 (each pixel) includes three light emitting diodes (LED) to form three sub-pixels. Each sub-pixel may include one light-emitting diode chip and three sub-pixels. The three light-emitting diodes in the pixel can be red, blue, and green LEDs to form a full-color pixel, thereby forming a full-color LED display.

以圖8A的左上角的畫素為例,圖樣電路22b的訊號線包括有多條橫向配置且與相鄰畫素連接的訊號線Vscan、V-LED,以及縱向配置且與相鄰畫素連接的訊號線Vdata-R、Vdata-G、Vdata-B、VDD-R、VDD-G、VDD-B。除此之外,圖樣電路22b更可包括位於區域B中的薄膜元件、電路及與各訊號線連接的導電圖樣,具體請參照圖8A。其中,區域B中的薄膜電路可包括如圖8B所示的2T1C電路架構(圖8A未繪示)。在圖8B的2T1C電路架構中,除了包括兩個電晶體T3、T4與多條訊號線外,更可包括一電容C。2T1C電路架構的元件連接關係可參照圖8B,在此不再多作說明。在不同的實施例,區域B中的薄膜電路也可為其它的電路架構,例如可為4T2C或5T1C。Taking the pixel in the upper left corner of FIG. 8A as an example, the signal line of the pattern circuit 22b includes a plurality of signal lines Vscan and V-LED arranged horizontally and connected to adjacent pixels, and vertically arranged and connected to adjacent pixels The signal lines Vdata-R, Vdata-G, Vdata-B, VDD-R, VDD-G, VDD-B. In addition, the pattern circuit 22b may further include a thin film element, a circuit, and a conductive pattern connected to each signal line in the area B. Please refer to FIG. 8A for details. Wherein, the thin film circuit in the area B may include a 2T1C circuit structure as shown in FIG. 8B (not shown in FIG. 8A). In the 2T1C circuit structure of FIG. 8B, in addition to two transistors T3 and T4 and multiple signal lines, a capacitor C may also be included. For the connection relationship of the components of the 2T1C circuit architecture, refer to FIG. 8B, which will not be further described here. In different embodiments, the thin film circuit in the area B may also have other circuit structures, such as 4T2C or 5T1C.

因此,當訊號線Vscan傳送的掃描訊號使電晶體T3導通時,資料訊號可透過訊號線Vdata通過電晶體T3傳送至電晶體T4的閘極,使電晶體T4導通,使得資料電壓可透過訊號線VDD、電晶體T4傳送至對應的光電元件24而使光電元件24發光。本領域技術人員根據圖8B的電路架構與圖8A的元件配置可理解各畫素的作動原理與詳細過程,在此不再多作說明。Therefore, when the scan signal transmitted by the signal line Vscan turns on the transistor T3, the data signal can be transmitted to the gate of the transistor T4 through the signal line Vdata through the transistor T3, and the transistor T4 is turned on, so that the data voltage can pass through the signal line. VDD and transistor T4 are transmitted to the corresponding photoelectric element 24 to cause the photoelectric element 24 to emit light. Those skilled in the art can understand the operation principle and detailed process of each pixel according to the circuit structure of FIG. 8B and the component configuration of FIG. 8A, and no further description is provided here.

另外,圖8A的左上角的畫素之通孔23的數量為4個(整個表面貼裝結構2b共有24個通孔23),且可透過設置於該等通孔之對應導電件(未繪示)而分別與對應的驅動電路板(未繪示)電性連接,以透過驅動電路板驅動表面貼裝結構2b的光電元件24發光。此外,圖8A的表面貼裝結構2b也有共用通孔23的配置。In addition, the number of through holes 23 of the pixel in the upper left corner of FIG. 8A is 4 (there are 24 through holes 23 in the entire surface mount structure 2b), and the corresponding conductive elements (not shown) provided in these through holes (Shown) and are respectively electrically connected to the corresponding driving circuit board (not shown) to drive the photoelectric element 24 of the surface mount structure 2b to emit light through the driving circuit board. In addition, the surface mount structure 2b of FIG. 8A also has a configuration in which the through hole 23 is shared.

本實施例的表面貼裝結構2b的24個通孔23皆位於基板21的內側,並沒有位於基板21之周緣S3上。藉此,也可在相同尺寸的前提下提高電子裝置的元件設置密度,即相同尺寸的電子裝置可提高畫素。另外,本實施例之各導電件組之導電件的數量也與通孔23的數量相同。在不同的實施例中,在保持表面貼裝結構2b與驅動電路板電連接的架構下,在表面貼裝結構2b與對應的導電件組中,若該等導電件的數量小於該等通孔23的數量,也就是有較多的通孔23但有較少的導電件時,因為可以不需要在各表面貼裝結構2b中的每一個通孔23中都設置導電件就足夠驅動其對應的光電元件24,因此,若該等導電件的數量小於該等通孔23的數量時也可降低電子裝置的製作成本。The 24 through holes 23 of the surface mount structure 2b of this embodiment are all located on the inner side of the substrate 21, and are not located on the peripheral edge S3 of the substrate 21. In this way, the component placement density of the electronic device can also be increased on the premise of the same size, that is, the pixel of the electronic device of the same size can be increased. In addition, the number of conductive elements in each conductive element group of this embodiment is also the same as the number of through holes 23. In a different embodiment, under the structure that maintains the electrical connection between the surface mount structure 2b and the driving circuit board, in the surface mount structure 2b and the corresponding conductive element group, if the number of the conductive elements is smaller than the through holes The number of 23, that is, when there are more through holes 23 but fewer conductive elements, because there is no need to provide conductive elements in each through hole 23 in each surface mount structure 2b, it is enough to drive its corresponding Therefore, if the number of the conductive elements is less than the number of the through holes 23, the manufacturing cost of the electronic device can also be reduced.

另外,本發明還提出一種電子裝置的製造方法,其可包括:提供多個表面貼裝結構,其中各該表面貼裝結構具有一基板、一圖樣電路、至少二通孔及至少一光電元件。基板定義有相對的一第一表面及一第二表面;圖樣電路形成於該基板之該第一表面,該圖樣電路包含至少二訊號線;至少二通孔連通該基板之該第一表面與該第二表面,且該至少二通孔分別對應於該至少二訊號線;至少一光電元件設置於該基板之該第一表面,且其二端分別電連接該圖樣電路的該至少二訊號線(步驟S01);提供一驅動電路板,並使各該表面貼裝結構的該基板的該第二表面分別設置於該驅動電路板具有多個連接墊組的表面,其中各該連接墊組對應於各該表面貼裝結構,並具有至少二連接墊,該至少二連接墊分別對應於該表面貼裝結構的該至少二通孔(步驟S02);以及,在各該表面貼裝結構的該至少二通孔中設置一導電材料以形成至少二導電件,使該至少二導電件延伸至該基板的該第一表面與該第二表面,並使各該至少二通孔中的該至少二導電件分別將各該表面貼裝結構的該至少二訊號線電連接至該驅動電路板之各該連接墊組的該至少二連接墊(步驟S03)。其中,步驟S02與步驟S03的順序可以互換。換句話說,也可先進行步驟S03的設置導電材料的製程之後,再使各表面貼裝結構分別設置於驅動電路板上。In addition, the present invention also provides a manufacturing method of an electronic device, which may include: providing a plurality of surface mount structures, wherein each of the surface mount structures has a substrate, a patterned circuit, at least two through holes, and at least one photoelectric element. The substrate is defined with a first surface and a second surface opposite to each other; a patterned circuit is formed on the first surface of the substrate, the patterned circuit includes at least two signal lines; at least two through holes connect the first surface of the substrate and the first surface The second surface, and the at least two through holes respectively correspond to the at least two signal lines; at least one photoelectric element is disposed on the first surface of the substrate, and its two ends are respectively electrically connected to the at least two signal lines of the pattern circuit ( Step S01); Provide a driving circuit board, and make the second surface of the substrate of each surface mount structure respectively disposed on the surface of the driving circuit board having a plurality of connecting pad groups, wherein each of the connecting pad groups corresponds to Each of the surface mount structures has at least two connection pads, and the at least two connection pads respectively correspond to the at least two through holes of the surface mount structure (step S02); and, on the at least two through holes of the surface mount structure A conductive material is arranged in the two through holes to form at least two conductive elements, so that the at least two conductive elements extend to the first surface and the second surface of the substrate, and the at least two in each of the at least two through holes are electrically conductive Respectively electrically connecting the at least two signal lines of each of the surface mount structures to the at least two connection pads of each of the connection pad groups of the driving circuit board (step S03). Among them, the order of step S02 and step S03 can be interchanged. In other words, after the process of disposing the conductive material in step S03, the surface mount structures are respectively disposed on the driving circuit board.

以下,請參照圖9A至圖9H以說明上述的製造方法。其中,圖9A至圖9H分別為本發明一實施例之電子裝置的製造過程示意圖。於此,是以上述圖7之電子裝置1a的製造方法為例,本領域的技術人員可由電子裝置1a的製造方法推得其他實施例之電子裝置的製造過程。Hereinafter, please refer to FIGS. 9A to 9H to describe the above-mentioned manufacturing method. 9A to 9H are schematic diagrams of the manufacturing process of an electronic device according to an embodiment of the invention. Here, the manufacturing method of the electronic device 1a in FIG. 7 is taken as an example. Those skilled in the art can deduce the manufacturing process of the electronic device in other embodiments from the manufacturing method of the electronic device 1a.

以下,先介紹電子裝置1a之多個表面貼裝結構2a的製造過程。Hereinafter, the manufacturing process of the multiple surface mount structures 2a of the electronic device 1a will be introduced first.

如圖9A所示,先在一塊大面積的基板21上依序形成多條並排且橫向配置的訊號線L1、L3,以及與各訊號線L1、L3連接的導電圖樣;接著,在基板21上依序形成多條並排且縱向配置的訊號線L2、L4,以及與各訊號線L2、L4連接的導電圖樣,以得到多個圖樣電路22a。其中,為了避免訊號線L1、L3與訊號線L2、L4產生短路現象,需在形成訊號線L2、L4及與其連接的導電圖樣之前,在訊號線L1、L3及其導電圖樣上覆蓋絕緣層(圖9A未顯示),再形成訊號線L2、L4及與其連接的導電圖樣。As shown in FIG. 9A, first, a plurality of signal lines L1, L3 arranged side by side and laterally arranged in sequence on a large-area substrate 21, and conductive patterns connected to the signal lines L1, L3 are sequentially formed; then, on the substrate 21 A plurality of signal lines L2, L4 arranged side by side and longitudinally and a conductive pattern connected to each signal line L2, L4 are sequentially formed to obtain a plurality of pattern circuits 22a. Among them, in order to avoid short circuit between the signal lines L1, L3 and the signal lines L2, L4, it is necessary to cover the signal lines L1, L3 and their conductive patterns with an insulating layer ( Fig. 9A is not shown), and then the signal lines L2 and L4 and the conductive patterns connected to them are formed.

於此,基板21定義有相對的第一表面S1及第二表面S2,圖樣電路22a是形成於第一表面S1上。在一些實施例中,基板21可為硬板或軟板。若基板21是軟板時,為了使之後的元件可通過後續製程順利地形成在軟板上,並方便對此軟板進行操作,則可先將軟板形成在一剛性載板上,並在之後的步驟中再移除剛性載板。若基板21是硬板時,則不需要此過程。基板21的材質可為玻璃、樹脂、金屬或陶瓷、或是複合材質。其中,樹脂材質具有可撓性,並可包含有機高分子材料,有機高分子材料的玻璃轉換溫度(Glass Transition Temperature, Tg)例如可介於攝氏250度至攝氏600度之間,較佳的溫度範圍例如可介於攝氏300度至攝氏500度之間。藉由如此高的玻璃轉換溫度,可於後續的製程中可直接在基板21上進行薄膜製程而形成薄膜電晶體及其他的元件或線路。前述的有機高分子材料可為熱塑性材料,例如為聚醯亞胺(PI)、聚乙烯(Polyethylene, PE)、聚氯乙烯(Polyvinylchloride, PVC)、聚苯乙烯(PS)、壓克力(丙烯,acrylic)、氟化聚合物(Fluoropolymer)、聚酯纖維(polyester)或尼龍(nylon)。Here, the substrate 21 defines a first surface S1 and a second surface S2 opposite to each other, and the pattern circuit 22a is formed on the first surface S1. In some embodiments, the substrate 21 may be a rigid board or a soft board. If the substrate 21 is a flexible board, in order to make the subsequent components can be smoothly formed on the flexible board through the subsequent process, and to facilitate the operation of the flexible board, the flexible board can be formed on a rigid carrier first, and The rigid carrier board is removed in the subsequent steps. If the substrate 21 is a rigid board, this process is not required. The material of the substrate 21 can be glass, resin, metal or ceramic, or a composite material. Among them, the resin material is flexible and may contain organic polymer materials. The glass transition temperature (Tg) of the organic polymer materials may be between 250 degrees Celsius and 600 degrees Celsius, preferably The range may be between 300 degrees Celsius and 500 degrees Celsius, for example. With such a high glass transition temperature, a thin film process can be directly performed on the substrate 21 to form thin film transistors and other components or circuits in the subsequent process. The aforementioned organic polymer material can be a thermoplastic material, such as polyimide (PI), polyethylene (PE), polyvinylchloride (PVC), polystyrene (PS), acrylic (propylene , Acrylic, Fluoropolymer, polyester or nylon.

圖樣電路22a的材料可使用金屬(例如鋁、銅、銀、鉬、鈦)或其合金所構成的單層或多層結構。於此,可例如利用薄膜製程在基板21上形成圖樣電路22a。圖樣電路22a可直接形成於基板21上;或者,圖樣電路22a也可間接形成於基板21上,例如兩者之間包含有緩衝層或絕緣層,並不限制。前述的薄膜製程可包含低溫多晶矽(LTPS)製程、非晶矽(a-Si)製程或金屬氧化物(如IGZO)半導體製程等,本發明也不限制。The material of the pattern circuit 22a may use a single-layer or multi-layer structure composed of metal (for example, aluminum, copper, silver, molybdenum, titanium) or an alloy thereof. Here, the patterned circuit 22a can be formed on the substrate 21 by, for example, a thin film process. The pattern circuit 22a can be directly formed on the substrate 21; or, the pattern circuit 22a can also be formed on the substrate 21 indirectly, for example, a buffer layer or an insulating layer is included between the two, which is not limited. The aforementioned thin film process may include a low temperature polysilicon (LTPS) process, an amorphous silicon (a-Si) process, or a metal oxide (such as IGZO) semiconductor process, etc., and the present invention is not limited.

如圖9B所示,再形成多個連接墊組(連接墊P1、P2)在與各訊號線L1、L2對應連接的導電圖樣上。連接墊P1、P2的材料例如但不限於為銅、銀或金,或其組合,或其他適合的導電材料。在一些實施例中,為了製作較厚的連接墊P1、P2,可使用例如電鍍、印刷、或蒸鍍加剝離成型(Lift-off patterning)等方式製作連接墊P1、P2。As shown in FIG. 9B, a plurality of connection pad groups (connection pads P1, P2) are formed on the conductive patterns corresponding to the respective signal lines L1, L2. The material of the connection pads P1 and P2 is, for example, but not limited to, copper, silver, or gold, or a combination thereof, or other suitable conductive materials. In some embodiments, in order to fabricate thicker connection pads P1 and P2, methods such as electroplating, printing, or evaporation and lift-off patterning can be used to fabricate the connection pads P1 and P2.

如圖9C所示,接著,再於基板21上選擇性地鑽孔以形成多個通孔23,其中,各通孔23連通基板21之第一表面S1與第二表面S2,且該等通孔23分別對應於訊號線L1~L4。在一些實施例中,在提供多個表面貼裝結構的步驟中,更可包括:使表面貼裝結構2a的各訊號線L1~L4對應有數量大於二之多個通孔23。透過共用通孔23的方式不僅可以提高電子裝置的元件設置密度,也可降低成本。值得一提的是,上述的製作連接墊P1、P2和選擇性鑽孔的順序可以對調。As shown in FIG. 9C, the substrate 21 is then selectively drilled to form a plurality of through holes 23, wherein each through hole 23 communicates with the first surface S1 and the second surface S2 of the substrate 21, and the same The holes 23 respectively correspond to the signal lines L1 to L4. In some embodiments, in the step of providing a plurality of surface mount structures, it may further include: making each signal line L1 to L4 of the surface mount structure 2a correspond to a plurality of through holes 23 with a number greater than two. By sharing the through holes 23, not only the arrangement density of the components of the electronic device can be increased, but also the cost can be reduced. It is worth mentioning that the sequence of making the connection pads P1 and P2 and the selective drilling can be reversed.

如圖9D所示,接著,進行光電元件24的設置製程,以將多個光電元件24分別設置於對應的連接墊P1、P2上,使光電元件24的兩端可分別透過連接墊P1、P2電連接至圖樣電路22對應的訊號線L1~L4。As shown in FIG. 9D, next, a process of arranging the optoelectronic element 24 is performed, so that a plurality of optoelectronic elements 24 are respectively arranged on the corresponding connection pads P1, P2, so that both ends of the optoelectronic element 24 can pass through the connection pads P1, P2, respectively. It is electrically connected to the signal lines L1 ˜ L4 corresponding to the pattern circuit 22.

之後,如圖9E所示,進行切割製程,以得到多個表面貼裝結構2a。圖9E的表面貼裝結構2a的結構與圖5A相同,詳細技術內容可參照上述圖5A至圖5E及其對應說明,在此不再贅述。在一些實施例中,在提供多個表面貼裝結構2a的步驟中,更可包括:使各表面貼裝結構2a配置有多個光電元件24,其中各光電元件24包含一個或多個晶片。值得注意的是,切割製程不限定發生於圖9D之後,其也可發生在圖9A、圖9B、或圖9C之後,視各階段設備及其相應後製程的製程能力而定。Then, as shown in FIG. 9E, a cutting process is performed to obtain a plurality of surface mount structures 2a. The structure of the surface mount structure 2a of FIG. 9E is the same as that of FIG. 5A, and the detailed technical content can refer to the above-mentioned FIG. 5A to FIG. 5E and the corresponding description, which will not be repeated here. In some embodiments, the step of providing a plurality of surface mount structures 2a may further include: configuring each surface mount structure 2a with a plurality of optoelectronic elements 24, wherein each optoelectronic element 24 includes one or more wafers. It is worth noting that the cutting process is not limited to occur after FIG. 9D, and it can also occur after FIG. 9A, FIG. 9B, or FIG.

之後,再將圖9E之該等表面貼裝結構2a依序設置於圖9F的驅動電路板3a。不過,在將該等表面貼裝結構2a依序設置於驅動電路板3a之前,為了預固定該等表面貼裝結構2a,請再參照圖9F所示,在提供驅動電路板3a的步驟中,更可包括:形成多個黏著件5於驅動電路板3a具有多個連接墊組的表面上,並使各黏著件5對應並定位各表面貼裝結構2a至驅動電路板3a。於此,各黏著件5例如為紅膠,以將各表面貼裝結構2a(暫時)固定在驅動電路板3a上(圖9G)。之後,如圖9H所示,再於通孔23內進行導電材料的設置製程。於此,可利用噴印導電材料於該等通孔23的方式以形成該等導電件41,使各導電件41可分別延伸至基板21的第一表面S1與第二表面S2(如圖9I),再進行回焊(reflow)製程後,使各表面貼裝結構2a與驅動電路板3a電性連接。其中,導電材料可例如但不限於包含錫膏、銀膠、或異方性導電膠,或其組合,或其他適合的材料,並不限制。本實施例是以選擇性地噴印(Jetting)導電材料的方式於該等通孔23中形成該等導電件41。除了可利用噴印製程外,在不同的實施例中,還可選用例如點膠(dispensing)、濺射(sputtering)、或電鍍(electroplating)等方式設置導電材料,並不限制。在一些實施例中,在設置導電材料的步驟中更可包括:選擇性地噴印導電材料於該等通孔23中以形成該等導電件41,以使該等導電件41的數量小於該等通孔23的數量,藉此,可降低電子裝置的製作成本。After that, the surface mount structures 2a of FIG. 9E are sequentially arranged on the driving circuit board 3a of FIG. 9F. However, before the surface mount structures 2a are sequentially arranged on the drive circuit board 3a, in order to pre-fix the surface mount structures 2a, please refer to FIG. 9F again. In the step of providing the drive circuit board 3a, It may further include: forming a plurality of adhesive members 5 on the surface of the driving circuit board 3a with a plurality of connecting pad groups, and making each adhesive member 5 correspond to and positioning each surface mount structure 2a to the driving circuit board 3a. Here, each adhesive member 5 is, for example, red glue, so as to (temporarily) fix each surface mount structure 2a on the driving circuit board 3a (FIG. 9G). After that, as shown in FIG. 9H, the conductive material setting process is performed in the through hole 23. Here, the conductive elements 41 can be formed by spraying conductive materials on the through holes 23, so that the conductive elements 41 can respectively extend to the first surface S1 and the second surface S2 of the substrate 21 (as shown in FIG. 9I ), after the reflow process is performed, each surface mount structure 2a is electrically connected to the driving circuit board 3a. Wherein, the conductive material may include, but is not limited to, solder paste, silver glue, or anisotropic conductive glue, or a combination thereof, or other suitable materials, and is not limited. In this embodiment, the conductive elements 41 are formed in the through holes 23 by selectively jetting conductive materials. In addition to the spray printing process, in different embodiments, methods such as dispensing, sputtering, or electroplating can also be used to provide conductive materials, which are not limited. In some embodiments, the step of disposing a conductive material may further include: selectively spraying conductive material in the through holes 23 to form the conductive members 41, so that the number of the conductive members 41 is smaller than the number of the conductive members 41. By equalizing the number of through holes 23, the manufacturing cost of the electronic device can be reduced.

再說明的是,在圖9G中,因為導電材料(導電件41)還沒有設置在通孔23中,因此,在設置導電材料的步驟之前,或者之後,製造方法更可包括:對各表面貼裝結構2a的基板21不連續性地舖覆封裝層(或保護層/或絕緣層,未繪示),以覆蓋各光電元件24,但該封裝層不可覆蓋該等通孔23(這樣才可填入導電材料)。其中,封裝層可利用樹脂轉注成型(Resin Transfer Molding)或是密封膠點膠或其他適當的方式覆蓋在光電元件24與圖樣電路22a上,以保護光電元件24與圖樣電路22a免受異物及後續製程的破壞。此外,在一些實施例中,在設置導電材料以形成該等導電件41的步驟之後,更可包括:對各表面貼裝結構2a的基板21連續性或不連續性地舖覆封裝層,以覆蓋各光電元件24。於此,由於圖9H中已進行導電件41的設置製程,因此,可以利用封裝層保護各表面貼裝結構2a之基板21第一表面S1上的元件、圖樣或電路(包括通孔23)免受異物及後續製程的破壞。It should be noted that, in FIG. 9G, because the conductive material (conductive member 41) has not been disposed in the through hole 23, the manufacturing method may further include: attaching the conductive material to each surface before or after the step of disposing the conductive material. The substrate 21 of the mounting structure 2a is discontinuously covered with an encapsulation layer (or a protective layer/or an insulating layer, not shown) to cover the optoelectronic elements 24, but the encapsulation layer cannot cover the through holes 23 (so that it can be filled Into conductive materials). Among them, the encapsulation layer can be covered on the optoelectronic element 24 and the pattern circuit 22a by resin transfer molding (Resin Transfer Molding) or sealant dispensing or other appropriate methods to protect the optoelectronic element 24 and the pattern circuit 22a from foreign matter and subsequent Process destruction. In addition, in some embodiments, after the step of arranging conductive materials to form the conductive elements 41, it may further include: continuously or discontinuously covering the substrate 21 of each surface mount structure 2a with an encapsulation layer to cover Each photoelectric element 24. Here, since the arrangement process of the conductive member 41 has been performed in FIG. 9H, the encapsulation layer can be used to protect the components, patterns or circuits (including through holes 23) on the first surface S1 of the substrate 21 of each surface mount structure 2a. Damaged by foreign objects and subsequent manufacturing processes.

請參照圖10A與圖10B所示,其中,圖10A與圖10B分別為本發明另一實施例之電子裝置1c的局部製造過程示意圖。Please refer to FIG. 10A and FIG. 10B, where FIG. 10A and FIG. 10B are respectively a schematic diagram of a partial manufacturing process of an electronic device 1c according to another embodiment of the present invention.

為便於理解,以圖10A作為接續圖9D後說明之:在圖9D之後,同樣對佈設有圖樣電路22a、連接墊P1、P2、通孔23等之基板21進行切割製程,不過,與圖9E不同的是,本實施例是使基板21經切割後可貼近驅動電路板的尺寸;在此,圖10A的驅動電路板可為圖6或圖9F的驅動電路板3a。故,圖9G的表面貼裝結構2a尺寸遠小於驅動電路板3a的尺寸,且使多個表面貼裝結構2a陣列設置於驅動電路板3a上;而在圖10A的本實施例中,則是單個表面貼裝結構2c對應設置於驅動電路板3a上(在本實施例中,驅動電路板3a尺寸略大於表面貼裝結構2c)。然而,對基板21的切割,同樣可在圖9A至圖9E中的兩個步驟之間進行,只要最終的表面貼裝結構2c與驅動電路板3a呈一對一配置即可。For ease of understanding, FIG. 10A is used as a continuation of FIG. 9D. After FIG. 9D, the substrate 21 on which the pattern circuit 22a, the connection pads P1, P2, the through holes 23, etc. are arranged is also subjected to a cutting process, but it is similar to that shown in FIG. 9E. The difference is that in this embodiment, the substrate 21 can be cut close to the size of the driving circuit board; here, the driving circuit board in FIG. 10A may be the driving circuit board 3a in FIG. 6 or FIG. 9F. Therefore, the size of the surface mount structure 2a of FIG. 9G is much smaller than the size of the drive circuit board 3a, and a plurality of surface mount structures 2a are arrayed on the drive circuit board 3a; while in this embodiment of FIG. 10A, it is The single surface mount structure 2c is correspondingly arranged on the drive circuit board 3a (in this embodiment, the size of the drive circuit board 3a is slightly larger than the surface mount structure 2c). However, the cutting of the substrate 21 can also be performed between the two steps in FIGS. 9A to 9E, as long as the final surface mount structure 2c and the driving circuit board 3a are in a one-to-one configuration.

同樣地,為了預固定表面貼裝結構2c,可預置至少一個黏著件5於驅動電路板3a上,並進行如圖10B所示選擇性地於通孔23c內進行導電材料的設置製程,如前述,可利用噴印導電材料選擇性地設置於該等通孔23c的方式、以及後續的回焊製程,以形成該等導電件41c。在本實施例中,彼此對應的表面貼裝結構2c、連接墊組與導電件組之數量均為一,其中,表面貼裝結構2c具有多個通孔23c、連接墊組具有多個連接墊、導電件組具有多個導電件41c;前述三者的實施態樣與排列組合亦類似前述的幾個實施例,如通孔23c同樣可選擇不位於基板21的周緣,導電件41c的數量相當於通孔23c的數量,以及表面貼裝結構2c配置有數量大於二之多條訊號線及多個光電元件24,各訊號線對應有數量大於二之多個通孔23c,其中,至少二光電元件24在同一條訊號線上共用同一個通孔23c及其對應於前述共用通孔23c的導電件41c。此外,圖10A、圖10B的通孔23c已採最少數量的配置,然而,在一些通孔數量非以最少數量配置的實施態樣中,導電件41c的數量可選擇小於通孔23c的數量。Similarly, in order to pre-fix the surface mount structure 2c, at least one adhesive member 5 can be preset on the driving circuit board 3a, and the process of selectively placing conductive materials in the through holes 23c as shown in FIG. 10B is performed, such as As mentioned above, the method of selectively disposing the conductive material by spraying on the through holes 23c and the subsequent reflow process can be used to form the conductive elements 41c. In this embodiment, the number of the surface mount structure 2c, the connection pad group, and the conductive element group corresponding to each other is one. The surface mount structure 2c has a plurality of through holes 23c, and the connection pad group has a plurality of connection pads. The conductive element group has a plurality of conductive elements 41c; the implementation and arrangement and combination of the foregoing three are also similar to the foregoing several embodiments. For example, the through hole 23c can also be selected not to be located on the periphery of the substrate 21, and the number of conductive elements 41c is equivalent. The number of through holes 23c and the surface mount structure 2c are provided with a number of signal lines greater than two and a plurality of photoelectric elements 24, and each signal line corresponds to a number of through holes 23c greater than two. Among them, at least two photoelectric elements The components 24 share the same through hole 23c and the conductive member 41c corresponding to the aforementioned shared through hole 23c on the same signal line. In addition, the through holes 23c in FIGS. 10A and 10B have been configured with the minimum number of through holes. However, in some implementations where the number of through holes is not configured at the minimum number, the number of conductive members 41c can be selected to be less than the number of through holes 23c.

值得說明的是,前述基板21的尺寸與驅動電路板3a的尺寸沿至少一方向彼此接近;例如,基板21相較於驅動電路板3a在沿一X軸方向可略長、略短或相同。如圖10A、圖10B之實施例所示,在驅動電路板3a與基板21沿X軸方向分別定義兩側緣30a、210,基板21的兩相對側緣210沿X軸方向均略短於驅動電路板3a的兩相對側緣30a,但不以此為限。換句話說,驅動電路板與基板沿至少一方向分別定義至少一側緣,且驅動電路板之側緣與基板之側緣定義一間距,而此間距可為零或不為零。驅動電路板與基板沿X軸(或Y軸)方向均可定義兩側緣,可注意的是,驅動電路板之一側緣與基板之一側緣的間距並不限於一致或對稱;當驅動電路板之一側緣與基板之一側緣的間距為零時,兩側緣彼此對齊。It is worth noting that the size of the aforementioned substrate 21 and the size of the drive circuit board 3a are close to each other in at least one direction; for example, the substrate 21 may be slightly longer, shorter or the same in an X-axis direction compared to the drive circuit board 3a. As shown in the embodiment of FIG. 10A and FIG. 10B, the driving circuit board 3a and the substrate 21 define two side edges 30a and 210 along the X axis, respectively. The two opposite side edges 210 of the substrate 21 are slightly shorter than the drive along the X axis. Two opposite side edges 30a of the circuit board 3a, but not limited to this. In other words, the driving circuit board and the substrate respectively define at least one side edge along at least one direction, and the side edge of the driving circuit board and the side edge of the substrate define a distance, and the distance may be zero or not zero. Both sides of the drive circuit board and the substrate along the X-axis (or Y-axis) direction can be defined. It should be noted that the distance between one side edge of the drive circuit board and one side edge of the substrate is not limited to be consistent or symmetrical; When the distance between one side edge of the circuit board and one side edge of the substrate is zero, the two side edges are aligned with each other.

此外,前述光電元件的數量為多個,該些光電元件可定義出一畫素間距,驅動電路板之一側緣與基板之一側緣之間的間距若小於一預定距離,例如小於沿X軸(或Y軸)方向的2倍畫素間距時,可有利於與另一個相同或近似結構的電子裝置拼接;例如,在一些實施例中,多個電子裝置沿X軸(與沿Y軸)方向彼此拼接,其中一電子裝置沿X軸方向,設驅動電路板之一側緣與基板之一側緣的間距小於2倍畫素,與前一電子裝置拼接的另一個電子裝置亦沿X軸方向,同樣設驅動電路板之一側緣與基板之一側緣的間距小於2倍畫素間距,則兩電子裝置之間的畫素間距小於2倍的各該電子裝置的畫素間距。In addition, the number of the aforementioned optoelectronic elements is multiple, and the optoelectronic elements can define a pixel pitch. If the distance between one side edge of the driving circuit board and one side edge of the substrate is less than a predetermined distance, for example, less than X When the pixel pitch is twice as large as the axis (or Y axis), it can be beneficial to splicing with another electronic device with the same or similar structure; for example, in some embodiments, multiple electronic devices along the X axis (and along the Y axis) ) Directions are spliced with each other, one of the electronic devices is along the X axis, and the distance between one side edge of the driving circuit board and one side edge of the substrate is less than 2 times the pixel, and the other electronic device spliced with the previous electronic device is also along X In the axial direction, it is also assumed that the distance between one side edge of the driving circuit board and one side edge of the substrate is smaller than twice the pixel pitch, and the pixel pitch between the two electronic devices is smaller than twice the pixel pitch of each electronic device.

圖11A及圖11B分別為本發明又一實施例之電子裝置的局部放大示意圖。如圖11A所示,本實施例與前述實施例之表面貼裝結構2c主要的不同在於,圖11A的表面貼裝結構2d在基板21上,通孔23d分別位於至少二訊號線所延伸的導電墊片L1d、L2d,在導電材料(導電件41d)設置於通孔23d之後再於通孔23d上方設有一次導電件42d,而次導電件42d可與通孔23d、導電墊片L1d(或同時與通孔23d、導電墊片L2d)至少部分重合,運用例如回焊製程使次導電件42d同時分別與導電件41d、導電墊片L1d(導電墊片L2d)電連接,次導電件42d可提供導電件41d一適當地作用力,降低導電件41d縮於通孔23內而難以有效地電連接至導電墊片L1d(導電墊片L2d)的機率。在一些實施例中,次導電件42d可為一微電阻,例如尺寸為0402(0.04英寸*0.02 英吋)的微型電阻。在一些實施例中,次導電件42d的數量可依導電件41d的數量而配置。另外,在一些實施例中,如圖11B所示,表面貼裝結構2e在基板21上,各通孔23e分別鄰近至少二訊號線所延伸的導電墊片L1e、L2e,次導電件42e至少部分重合通孔23e與導電電片L1e(導電墊片L2e),且次導電件42e分別同時與導電件41e、導電墊片L1e(導電墊片L2e)電連接。11A and 11B are respectively partial enlarged schematic diagrams of an electronic device according to another embodiment of the invention. As shown in FIG. 11A, the main difference between the surface mount structure 2c of this embodiment and the previous embodiment is that the surface mount structure 2d of FIG. The pads L1d and L2d are provided with a primary conductive member 42d above the through hole 23d after the conductive material (conductive member 41d) is placed in the through hole 23d, and the secondary conductive member 42d can be connected to the through hole 23d, the conductive pad L1d (or At the same time, it is at least partially overlapped with the through hole 23d and the conductive pad L2d), and the secondary conductive member 42d is electrically connected to the conductive member 41d and the conductive pad L1d (conductive pad L2d) at the same time by using, for example, a reflow process. The secondary conductive member 42d can Providing the conductive member 41d with an appropriate force reduces the probability that the conductive member 41d shrinks in the through hole 23 and is difficult to be electrically connected to the conductive pad L1d (conductive pad L2d) effectively. In some embodiments, the secondary conductive member 42d may be a micro-resistor, for example, a micro-resistor with a size of 0402 (0.04 inches * 0.02 inches). In some embodiments, the number of secondary conductive elements 42d can be configured according to the number of conductive elements 41d. In addition, in some embodiments, as shown in FIG. 11B, the surface mount structure 2e is on the substrate 21, each through hole 23e is respectively adjacent to the conductive pads L1e, L2e extended by at least two signal lines, and the secondary conductive member 42e is at least partially The overlapped through hole 23e is electrically connected to the conductive electrical sheet L1e (conductive gasket L2e), and the secondary conductive element 42e is electrically connected to the conductive element 41e and the conductive gasket L1e (conductive gasket L2e) at the same time, respectively.

綜上所述,在本發明之電子裝置及其製造方法中,至少一表面貼裝結構通過至少一導電件組連接至驅動電路板,表面貼裝結構與驅動電路板的數量配置可為多對一、一對一、甚或在特定考量下而有一對多的配置。各個表面貼裝結構具有基板、圖樣電路、至少二通孔及至少一光電元件,圖樣電路包含至少二訊號線,至少二通孔連通基板之第一表面與第二表面,且至少二通孔分別對應於至少二訊號線,至少一光電元件設置於基板之第一表面,且其二端分別電連接圖樣電路的至少二訊號線;驅動電路板的連接墊組具有至少二連接墊,至少二連接墊分別對應於表面貼裝結構的至少二通孔。各個導電件組的至少二導電件對應設置於表面貼裝結構中的至少二通孔,並延伸至基板的第一表面與第二表面;其中,設置於至少二通孔中的至少二導電件分別將表面貼裝結構的至少二訊號線電連接至驅動電路板之連接墊組的至少二連接墊。通過個別製程製成且彼此獨立的表面貼裝結構與驅動電路板,通過本發明中所涵蓋及其均等的實施態樣,表面貼裝結構與驅動電路板之間可進行各種數量的排列組合,彼此搭配的彈性相當大;同時,因表面貼裝結構與驅動電路板彼此獨立而非限於同一製程製作,例如免於因不同設計而重開光罩等步驟而可降低成本。本發明的電子裝置及其製造方法有別於傳統的表面貼裝元件與驅動電路板電連接的技術。In summary, in the electronic device and the manufacturing method thereof of the present invention, at least one surface mount structure is connected to the drive circuit board through at least one conductive element group, and the number of the surface mount structure and the drive circuit board can be configured in multiple pairs. One, one-to-one, or even a one-to-many configuration under certain considerations. Each surface mount structure has a substrate, a patterned circuit, at least two through holes, and at least one photoelectric element. The patterned circuit includes at least two signal lines, at least two through holes communicate with the first surface and the second surface of the substrate, and at least two through holes are respectively Corresponding to at least two signal lines, at least one photoelectric element is disposed on the first surface of the substrate, and its two ends are respectively electrically connected to at least two signal lines of the pattern circuit; the connecting pad group of the driving circuit board has at least two connecting pads, and at least two connecting pads The pads respectively correspond to at least two through holes of the surface mount structure. At least two conductive elements of each conductive element group are correspondingly arranged in the at least two through holes in the surface mount structure and extend to the first surface and the second surface of the substrate; wherein, at least two conductive elements arranged in the at least two through holes The at least two signal lines of the surface mount structure are respectively electrically connected to the at least two connection pads of the connection pad group of the driving circuit board. The surface mount structure and the drive circuit board that are made by individual processes and are independent of each other. Through the implementation of the present invention and its equivalent implementation aspects, the surface mount structure and the drive circuit board can be arranged and combined in various numbers. The flexibility of matching with each other is quite large; at the same time, because the surface mount structure and the driving circuit board are independent of each other and not limited to the same manufacturing process, for example, the cost can be reduced by avoiding the steps of reopening the photomask due to different designs. The electronic device and the manufacturing method of the present invention are different from the traditional surface mount component and the driving circuit board electrical connection technology.

此外,彼此獨立的表面貼裝結構與驅動電路板,例如以聚醯亞胺基板所製成的表面貼裝結構、與以耐燃等級為FR4的環氧樹脂為基礎的驅動電路板彼此組合,可同時結合聚醯亞胺基板上可進行精密製程的優勢、與環氧樹脂驅動電路板的機械強度(robustness);其中,彼此獨立的異質材料結合的優點,在基板尺寸與驅動電路板尺寸接近時(例如沿至少一方向上,驅動電路板之側緣與基板之側緣彼此接近),此優點又更為突出。In addition, independent surface mount structures and drive circuit boards, such as surface mount structures made of polyimide substrates, and drive circuit boards based on FR4 epoxy resin, can be combined with each other. At the same time, it combines the advantages of precision manufacturing on the polyimide substrate and the mechanical strength (robustness) of the epoxy resin drive circuit board; among them, the advantages of the combination of independent heterogeneous materials, when the size of the substrate and the size of the drive circuit board are close (For example, in at least one direction, the side edge of the drive circuit board and the side edge of the substrate are close to each other), this advantage is more prominent.

此外,電子裝置可設置次導電件或進一步與次導電件連接的次導電墊片,次導電件可提供導電件一適當地作用力,降低導電件縮於通孔內而難以有效地電連接至導電墊片的機率。In addition, the electronic device can be provided with a secondary conductive member or a secondary conductive gasket connected to the secondary conductive member. The secondary conductive member can provide an appropriate force to the conductive member, reducing the shrinkage of the conductive member in the through hole and making it difficult to effectively electrically connect to the Probability of conductive gaskets.

另外,在本發明的一些實施例中,藉由表面貼裝結構之共用通孔的配置,不僅可以提高電子裝置的元件設置密度,也可以降低電子裝置的成本。此外,在本發明的一些實施例中,通過電子裝置之該等導電件的數量小於表面貼裝結構之該等通孔的數量也可降低電子裝置的成本。In addition, in some embodiments of the present invention, the configuration of the common through holes of the surface mount structure can not only increase the component placement density of the electronic device, but also reduce the cost of the electronic device. In addition, in some embodiments of the present invention, the number of the conductive elements passing through the electronic device is smaller than the number of the through holes of the surface mount structure, which can also reduce the cost of the electronic device.

值得注意的是,本發明的電子裝置對於導電件組、表面貼裝結構、驅動電路板的數量配置並不侷限,各個元件的量詞(measure words)或前置基礎(antecedent basis)並不以「至少一」或「一」為限,本發明中的「一」,宜應理解為「一」或「至少一」,故為便於閱讀與理解,本發明以量詞或前置基礎「一」來說明各個實施例,但不因此侷限於對各個實施例的理解。換句話說,本發明同樣能以「至少一」展開各個實施例,例如:本發明的電子裝置,包括至少一表面貼裝結構、至少一驅動電路板以及至少一導電件組。至少一表面貼裝結構具有一基板、一圖樣電路、至少二通孔及至少一光電元件。基板定義有相對的一第一表面及一第二表面。圖樣電路設置於基板之第一表面,圖樣電路包含至少二訊號線。至少二通孔連通基板之第一表面與第二表面,且至少二通孔分別對應於至少二訊號線。至少一光電元件設置於基板之第一表面,且其二端分別電連接圖樣電路的至少二訊號線。至少一驅動電路板包含至少一連接墊組,至少一連接墊組對應於至少一表面貼裝結構,且至少一表面貼裝結構的基板的第二表面設置於至少一驅動電路板具有至少一連接墊組的表面,至少一連接墊組具有至少二連接墊,至少二連接墊分別對應於至少一表面貼裝結構的至少二通孔。至少一導電件組對應於至少一表面貼裝結構,至少一導電件組具有至少二導電件,至少二導電件對應設置於至少一表面貼裝結構中的至少二通孔,並延伸至基板的第一表面與第二表面;其中,設置於至少二通孔中的至少二導電件分別將至少一表面貼裝結構的至少二訊號線電連接至至少一驅動電路板之至少一連接墊組的至少二連接墊。It is worth noting that the electronic device of the present invention is not limited to the number of conductive component groups, surface mount structures, and drive circuit boards. The measure words or antecedent basis of each component are not limited to " "At least one" or "one" is limited. The "one" in the present invention should be understood as "one" or "at least one". Therefore, in order to facilitate reading and understanding, the present invention uses a quantifier or a precedent basis "one". The various embodiments are described, but are not limited to the understanding of the various embodiments. In other words, the present invention can also expand various embodiments with "at least one". For example, the electronic device of the present invention includes at least one surface mount structure, at least one driving circuit board, and at least one conductive element group. At least one surface mount structure has a substrate, a patterned circuit, at least two through holes, and at least one photoelectric element. The substrate defines a first surface and a second surface opposite to each other. The pattern circuit is arranged on the first surface of the substrate, and the pattern circuit includes at least two signal lines. At least two through holes communicate with the first surface and the second surface of the substrate, and at least two through holes respectively correspond to at least two signal lines. At least one photoelectric element is arranged on the first surface of the substrate, and its two ends are respectively electrically connected to at least two signal lines of the pattern circuit. The at least one driving circuit board includes at least one connection pad group, the at least one connection pad group corresponds to at least one surface mount structure, and the second surface of the substrate of the at least one surface mount structure is disposed on the at least one driving circuit board and has at least one connection On the surface of the pad group, at least one connection pad group has at least two connection pads, and the at least two connection pads respectively correspond to at least two through holes of the at least one surface mount structure. At least one conductive element group corresponds to at least one surface mount structure, at least one conductive element group has at least two conductive elements, and at least two conductive elements are correspondingly provided in at least two through holes in at least one surface mount structure and extend to the substrate A first surface and a second surface; wherein, at least two conductive members disposed in at least two through holes respectively electrically connect at least two signal lines of at least one surface mount structure to at least one connection pad group of at least one drive circuit board At least two connection pads.

以上所述僅為舉例性,而非為限制性者。任何未脫離本發明之精神與範疇,而對其進行之等效修改或變更,均應包含於後附之申請專利範圍中。The above descriptions are merely illustrative and not restrictive. Any equivalent modifications or alterations that do not depart from the spirit and scope of the present invention should be included in the scope of the appended patent application.

1,1a,1b,1c,1d,1e:電子裝置 2,2a,2b,2c,2d,2e:表面貼裝結構 21:基板 22,22a,22b:圖樣電路 23,23c,23d,23e:通孔 24:光電元件 210,30a:側緣 3,3a:驅動電路板 31:連接墊組 311~318:連接墊 41,41c,41d,41e:導電件 42d,42e:次導電件 5:黏著件 1B-1B,1C-1C,5B-5B,5C-5C,5D-5D,5E-5E,9I-9I:割面線 A,B:區域 C:電容 L1,L2,L3,L4,Vdata,Vdata-R,Vdata-G,Vdata-B,VDD,VDD-R,VDD-G,VDD-B,V-LED,Vscan:訊號線 L1d,L2d,L1e,L2e:導電墊片 P1,P2:連接墊 S1:第一表面 S2:第二表面 S3:周緣 T1,T2:導線 T3,T4:電晶體1,1a,1b,1c,1d,1e: electronic device 2, 2a, 2b, 2c, 2d, 2e: surface mount structure 21: substrate 22, 22a, 22b: pattern circuit 23, 23c, 23d, 23e: through hole 24: Optoelectronics 210, 30a: side edge 3,3a: drive circuit board 31: Connecting pad group 311~318: Connecting pad 41, 41c, 41d, 41e: conductive parts 42d, 42e: secondary conductive parts 5: Adhesive parts 1B-1B, 1C-1C, 5B-5B, 5C-5C, 5D-5D, 5E-5E, 9I-9I: cut surface A, B: area C: Capacitance L1, L2, L3, L4, Vdata, Vdata-R, Vdata-G, Vdata-B, VDD, VDD-R, VDD-G, VDD-B, V-LED, Vscan: signal line L1d, L2d, L1e, L2e: conductive gasket P1, P2: connection pad S1: First surface S2: second surface S3: Perimeter T1, T2: Wire T3, T4: Transistor

圖1A為本發明一實施例之表面貼裝結構的佈局示意圖。 圖1B與圖1C分別顯示圖1A中,沿1B-1B割面線及1C-1C割面線的剖視示意圖。 圖2為本發明一實施例之驅動電路板的佈局示意圖。 圖3為本發明一實施例之電子裝置的佈局示意圖。 圖4A與圖4B分別為本發明不同實施例之表面貼裝結構的佈局示意圖。 圖5A為本發明又一實施例之表面貼裝結構的佈局示意圖。 圖5B至圖5E分別顯示圖5A中,沿5B-5B割面線、5C-5C割面線、5D-5D割面線及5E-5E割面線的剖視示意圖。 圖6為本發明又一實施例之驅動電路板的佈局示意圖。 圖7為本發明又一實施例之電子裝置的佈局示意圖。 圖8A為本發明又一實施例之表面貼裝結構的佈局示意圖。 圖8B為圖8A之表面貼裝結構的電路示意圖。 圖9A至圖9H分別為本發明一實施例之電子裝置的製造過程示意圖。 圖9I顯示圖9H中,沿9I-9I割面線的剖視示意圖。 圖10A與圖10B分別為本發明另一實施例之電子裝置的局部製造過程示意圖。 圖11A及圖11B分別為本發明又一實施例之電子裝置的局部放大示意圖。FIG. 1A is a schematic diagram of the layout of a surface mount structure according to an embodiment of the present invention. Fig. 1B and Fig. 1C respectively show a schematic cross-sectional view of Fig. 1A along the 1B-1B cutting line and the 1C-1C cutting line. FIG. 2 is a schematic diagram of the layout of a driving circuit board according to an embodiment of the present invention. FIG. 3 is a schematic diagram of the layout of an electronic device according to an embodiment of the invention. 4A and 4B are respectively schematic diagrams of the layout of the surface mount structure of different embodiments of the present invention. FIG. 5A is a schematic diagram of the layout of a surface mount structure according to another embodiment of the present invention. Figures 5B to 5E respectively show schematic cross-sectional views of Figure 5A along the 5B-5B cutting line, 5C-5C cutting line, 5D-5D cutting line, and 5E-5E cutting line. FIG. 6 is a schematic diagram of the layout of a driving circuit board according to another embodiment of the present invention. FIG. 7 is a schematic diagram of the layout of an electronic device according to another embodiment of the present invention. FIG. 8A is a schematic diagram of the layout of a surface mount structure according to another embodiment of the present invention. FIG. 8B is a schematic circuit diagram of the surface mount structure of FIG. 8A. 9A to 9H are schematic diagrams of the manufacturing process of an electronic device according to an embodiment of the invention. Fig. 9I shows a schematic cross-sectional view of Fig. 9H along the line 9I-9I. 10A and 10B are respectively schematic diagrams of a partial manufacturing process of an electronic device according to another embodiment of the present invention. 11A and 11B are respectively partial enlarged schematic diagrams of an electronic device according to another embodiment of the invention.

1:電子裝置 1: Electronic device

2:表面貼裝結構 2: Surface mount structure

21:基板 21: substrate

22:圖樣電路 22: pattern circuit

23:通孔 23: Through hole

24:光電元件 24: Optoelectronics

3:驅動電路板 3: drive circuit board

41:導電件 41: Conductive parts

L1,L2:訊號線 L1, L2: signal line

P1,P2:連接墊 P1, P2: connection pad

S1:第一表面 S1: First surface

S3:周緣 S3: Perimeter

T1,T2:導線 T1, T2: Wire

Claims (19)

一種電子裝置,包括: 多個表面貼裝結構,各該表面貼裝結構具有: 一基板,定義有相對的一第一表面及一第二表面; 一圖樣電路,設置於該基板之該第一表面,該圖樣電路包含至少二訊號線; 至少二通孔,連通該基板之該第一表面與該第二表面,且該至少二通孔分別對應於該至少二訊號線;及 至少一光電元件,設置於該基板之該第一表面,且其二端分別電連接該圖樣電路的該至少二訊號線; 一驅動電路板,包含多個連接墊組,各該連接墊組對應於各該表面貼裝結構,且各該表面貼裝結構的該基板的該第二表面設置於該驅動電路板具有多個連接墊組的表面,各該連接墊組具有至少二連接墊,該至少二連接墊分別對應於該表面貼裝結構的該至少二通孔;以及 多個導電件組,對應於該等表面貼裝結構,各該導電件組具有至少二導電件,該至少二導電件對應設置於該表面貼裝結構中的該至少二通孔,並延伸至該基板的該第一表面與該第二表面;其中,設置於各該至少二通孔中的該至少二導電件分別將各該表面貼裝結構的該至少二訊號線電連接至該驅動電路板之各該連接墊組的該至少二連接墊。An electronic device, including: Multiple surface mount structures, each of which has: A substrate, defined with a first surface and a second surface opposite to each other; A pattern circuit arranged on the first surface of the substrate, the pattern circuit including at least two signal lines; At least two through holes connecting the first surface and the second surface of the substrate, and the at least two through holes respectively correspond to the at least two signal lines; and At least one photoelectric element is disposed on the first surface of the substrate, and its two ends are respectively electrically connected to the at least two signal lines of the pattern circuit; A drive circuit board includes a plurality of connection pad groups, each of the connection pad groups corresponds to each of the surface mount structures, and the second surface of the substrate of each of the surface mount structures is disposed on the drive circuit board. The surface of the connection pad group, each of the connection pad groups has at least two connection pads, and the at least two connection pads respectively correspond to the at least two through holes of the surface mount structure; and A plurality of conductive element groups corresponding to the surface mount structures, each of the conductive element groups has at least two conductive elements, and the at least two conductive elements are corresponding to the at least two through holes provided in the surface mount structure and extend to The first surface and the second surface of the substrate; wherein the at least two conductive members disposed in each of the at least two through holes respectively electrically connect the at least two signal lines of each of the surface mount structures to the driving circuit The at least two connecting pads of the connecting pad group of each board. 一種電子裝置,包括: 一表面貼裝結構,具有: 一基板,定義有相對的一第一表面及一第二表面; 一圖樣電路,設置於該基板之該第一表面,該圖樣電路包含至少二訊號線; 至少二通孔,連通該基板之該第一表面與該第二表面,且該至少二通孔分別對應於該至少二訊號線;及 至少一光電元件,設置於該基板之該第一表面,且其二端分別電連接該圖樣電路的該至少二訊號線; 一驅動電路板,包含一連接墊組,該連接墊組對應於該表面貼裝結構,且該表面貼裝結構的該基板的該第二表面設置於該驅動電路板具有該連接墊組的表面,該連接墊組具有至少二連接墊,該至少二連接墊分別對應於該表面貼裝結構的該至少二通孔;以及 一導電件組,對應於該表面貼裝結構,該導電件組具有至少二導電件,該至少二導電件對應設置於該表面貼裝結構中的該至少二通孔,並延伸至該基板的該第一表面與該第二表面;其中,設置於該至少二通孔中的該至少二導電件分別將該表面貼裝結構的該至少二訊號線電連接至該驅動電路板之該連接墊組的該至少二連接墊。An electronic device, including: A surface mount structure with: A substrate, defined with a first surface and a second surface opposite to each other; A pattern circuit arranged on the first surface of the substrate, the pattern circuit including at least two signal lines; At least two through holes connecting the first surface and the second surface of the substrate, and the at least two through holes respectively correspond to the at least two signal lines; and At least one photoelectric element is disposed on the first surface of the substrate, and its two ends are respectively electrically connected to the at least two signal lines of the pattern circuit; A drive circuit board includes a connection pad group corresponding to the surface mount structure, and the second surface of the substrate of the surface mount structure is disposed on the surface of the drive circuit board with the connection pad group , The connection pad group has at least two connection pads, and the at least two connection pads respectively correspond to the at least two through holes of the surface mount structure; and A conductive element group corresponding to the surface mount structure, the conductive element group has at least two conductive elements, and the at least two conductive elements correspond to the at least two through holes provided in the surface mount structure and extend to the substrate The first surface and the second surface; wherein, the at least two conductive elements disposed in the at least two through holes respectively electrically connect the at least two signal lines of the surface mount structure to the connection pad of the driving circuit board The at least two connecting pads of the group. 如請求項1或2所述的電子裝置,其中該導電件的材料包含錫膏、銅膏、或銀膠,或其組合。The electronic device according to claim 1 or 2, wherein the material of the conductive member includes solder paste, copper paste, or silver paste, or a combination thereof. 如請求項1所述的電子裝置,更包括: 多個黏著件,設置於該等表面貼裝結構與該驅動電路板之間,且各該黏著件與各該表面貼裝結構對應設置。The electronic device according to claim 1, further comprising: A plurality of adhesive pieces are arranged between the surface mount structures and the driving circuit board, and each of the adhesive pieces is arranged corresponding to each of the surface mount structures. 如請求項2所述的電子裝置,更包括: 至少一黏著件,設置於該表面貼裝結構與該驅動電路板之間。The electronic device according to claim 2, further including: At least one adhesive part is arranged between the surface mount structure and the driving circuit board. 如請求項1或2所述的電子裝置,其中該驅動電路板與該基板沿一方向分別定義一側緣,且該驅動電路板之該側緣與該基板之該側緣定義一間距。The electronic device according to claim 1 or 2, wherein the driving circuit board and the substrate respectively define a side edge along a direction, and the side edge of the driving circuit board and the side edge of the substrate define a distance. 如請求項6所述的電子裝置,其中該光電元件的數量為多個,該些光電元件定義一畫素間距;該驅動電路板之該側緣與該基板之該側緣的該間距沿該方向小於2倍的畫素間距。The electronic device according to claim 6, wherein the number of the optoelectronic elements is multiple, and the optoelectronic elements define a pixel pitch; the distance between the side edge of the driving circuit board and the side edge of the substrate is along the The direction is less than 2 times the pixel pitch. 如請求項1或2所述的電子裝置,更包括: 一次導電件,與該通孔至少部分重合,並分別電連接至位於該通孔之該導電件與各該訊號線所延伸之一導電墊片。The electronic device according to claim 1 or 2, further including: The primary conductive element at least partially overlaps the through hole and is electrically connected to the conductive element located in the through hole and a conductive pad extending from each of the signal lines. 如請求項1或2所述的電子裝置,其中該表面貼裝結構的該基板更定義有連接該第一表面與該第二表面之一周緣,該至少二通孔不位於該基板之該周緣。The electronic device according to claim 1 or 2, wherein the substrate of the surface mount structure further defines a peripheral edge connecting the first surface and the second surface, and the at least two through holes are not located on the peripheral edge of the substrate . 如請求項1或2所述的電子裝置,其中在該表面貼裝結構與對應的該導電件組中,該等導電件的數量小於該等通孔的數量。The electronic device according to claim 1 or 2, wherein in the surface mount structure and the corresponding conductive element group, the number of the conductive elements is less than the number of the through holes. 如請求項1或2所述的電子裝置,其中該表面貼裝結構配置有數量大於二之多條訊號線及多個光電元件,各該訊號線對應有數量大於二之多個通孔,其中至少二光電元件在同一條訊號線上共用同一個通孔及其對應的導電件。The electronic device according to claim 1 or 2, wherein the surface mount structure is configured with a number of signal lines greater than two and a plurality of photoelectric elements, and each signal line corresponds to a number of through holes greater than two, wherein At least two photoelectric elements share the same through hole and its corresponding conductive element on the same signal line. 如請求項1或2所述的電子裝置,其中該表面貼裝結構的該至少一光電元件包含一晶片或一封裝件,該晶片或該封裝件包括一個或多個發光二極體、一個或多個次毫米發光二極體、一個或多個微發光二極體、或一個或多個影像感測器,或其組合。The electronic device according to claim 1 or 2, wherein the at least one optoelectronic element of the surface mount structure includes a chip or a package, and the chip or the package includes one or more light-emitting diodes, one or Multiple sub-millimeter light emitting diodes, one or more micro light emitting diodes, or one or more image sensors, or a combination thereof. 如請求項1或2所述的電子裝置,其中該表面貼裝結構中的圖樣電路包含一薄膜線路或一薄膜元件。The electronic device according to claim 1 or 2, wherein the pattern circuit in the surface mount structure includes a thin film circuit or a thin film element. 一種電子裝置的製作方法,包括: 提供一表面貼裝結構,其中該表面貼裝結構具有: 一基板,定義有相對的一第一表面及一第二表面; 一圖樣電路,形成於該基板之該第一表面,該圖樣電路包含至少二訊號線; 至少二通孔,連通該基板之該第一表面與該第二表面,且該至少二通孔分別對應於該至少二訊號線;及 至少一光電元件,設置於該基板之該第一表面,且其二端分別電連接該圖樣電路的該至少二訊號線; 提供一驅動電路板,並使該表面貼裝結構的該基板的該第二表面分別設置於該驅動電路板具有連接墊組的表面,其中該連接墊組對應該表面貼裝結構,並具有至少二連接墊,該至少二連接墊分別對應於該表面貼裝結構的該至少二通孔;以及 在該表面貼裝結構的該至少二通孔中設置一導電材料以形成至少二導電件,使該至少二導電件延伸至該基板的該第一表面與該第二表面,並使該至少二通孔中的該至少二導電件分別將該表面貼裝結構的該至少二訊號線電連接至該驅動電路板之該連接墊組的該至少二連接墊。A manufacturing method of an electronic device, including: A surface mount structure is provided, wherein the surface mount structure has: A substrate, defined with a first surface and a second surface opposite to each other; A pattern circuit formed on the first surface of the substrate, the pattern circuit including at least two signal lines; At least two through holes connecting the first surface and the second surface of the substrate, and the at least two through holes respectively correspond to the at least two signal lines; and At least one photoelectric element is disposed on the first surface of the substrate, and its two ends are respectively electrically connected to the at least two signal lines of the pattern circuit; A drive circuit board is provided, and the second surface of the substrate of the surface mount structure is respectively arranged on the surface of the drive circuit board with a connection pad group, wherein the connection pad group corresponds to the surface mount structure and has at least Two connection pads, the at least two connection pads respectively corresponding to the at least two through holes of the surface mount structure; and A conductive material is provided in the at least two through holes of the surface mount structure to form at least two conductive elements, so that the at least two conductive elements extend to the first surface and the second surface of the substrate, and the at least two The at least two conductive elements in the through hole respectively electrically connect the at least two signal lines of the surface mount structure to the at least two connection pads of the connection pad group of the driving circuit board. 如請求項14所述的製造方法,其中,在提供該表面貼裝結構的步驟中,更包括: 使該表面貼裝結構中的該基板更定義有連接該第一表面與該第二表面之一周緣,並使該至少二通孔不配置於該基板之該周緣。The manufacturing method according to claim 14, wherein the step of providing the surface mount structure further includes: The substrate in the surface mount structure is further defined with a peripheral edge connecting the first surface and the second surface, and the at least two through holes are not arranged on the peripheral edge of the substrate. 如請求項14所述的製造方法,其中, 在提供該表面貼裝結構的步驟中,更包括: 使該表面貼裝結構的各該訊號線對應有數量大於二之多個通孔;及 在設置一導電材料的步驟中,更包括: 選擇性地噴印該導電材料於該等通孔中,以使該等導電件的數量小於該等通孔的數量。The manufacturing method according to claim 14, wherein: In the step of providing the surface mount structure, it further includes: So that each of the signal lines of the surface mount structure corresponds to a plurality of through holes with a number greater than two; and In the step of setting a conductive material, it further includes: The conductive material is selectively sprayed in the through holes, so that the number of the conductive parts is smaller than the number of the through holes. 如請求項14所述的製造方法,其中: 在提供該表面貼裝結構的步驟中,更包括: 使該表面貼裝結構配置有多個光電元件,其中各該光電元件包含一個或多個晶片;及 在設置一導電材料的步驟前或後,更包括: 對該表面貼裝結構的該基板不連續性地舖覆一封裝層,以覆蓋各該光電元件,且該封裝層不覆蓋該至少二通孔。The manufacturing method according to claim 14, wherein: In the step of providing the surface mount structure, it further includes: Configuring the surface mount structure with a plurality of optoelectronic elements, wherein each of the optoelectronic elements includes one or more chips; and Before or after the step of setting a conductive material, it further includes: An encapsulation layer is discontinuously covered on the substrate of the surface mount structure to cover each of the photoelectric elements, and the encapsulation layer does not cover the at least two through holes. 如請求項14所述的製造方法,其中: 在提供該表面貼裝結構的步驟中,更包括: 使該表面貼裝結構配置有多個該光電元件,其中各該光電元件包含一個或多個晶片;及 在設置一導電材料的步驟後,更包括: 對該表面貼裝結構的該基板連續性或不連續性地舖覆一封裝層,以覆蓋各該光電元件。The manufacturing method according to claim 14, wherein: In the step of providing the surface mount structure, it further includes: Configuring the surface mount structure with a plurality of the optoelectronic elements, wherein each of the optoelectronic elements includes one or more chips; and After the step of setting a conductive material, it further includes: The substrate of the surface mount structure is continuously or discontinuously covered with an encapsulation layer to cover each of the optoelectronic elements. 如請求項14所述的製造方法,其中, 在提供一驅動電路板的步驟中,更包括: 形成至少一黏著件於該驅動電路板上,並使該至少一黏著件對應並定位該表面貼裝結構至該驅動電路板。The manufacturing method according to claim 14, wherein: In the step of providing a driving circuit board, it further includes: At least one adhesive member is formed on the driving circuit board, and the at least one adhesive member corresponds to and positions the surface mount structure to the driving circuit board.
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Publication number Priority date Publication date Assignee Title
TW200611429A (en) * 2004-09-22 2006-04-01 Ching-Fu Tzou Modulized structure of the array LED and its packaging method
TW201322510A (en) * 2011-08-01 2013-06-01 Steq Inc Semiconductor device and fabrication method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200611429A (en) * 2004-09-22 2006-04-01 Ching-Fu Tzou Modulized structure of the array LED and its packaging method
TW201322510A (en) * 2011-08-01 2013-06-01 Steq Inc Semiconductor device and fabrication method thereof

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