KR20190112504A - LED pixel unit and LED display panel comprising the same - Google Patents

Abstract

Disclosed is an LED display panel. The LED display panel comprises: one or more LED pixel units; and a mount substrate on which the LED pixel units are arranged. The LED pixel unit includes: a first, a second, and a third vertical LED chip; a common electrode connected to upper electrodes of the first, the second, and the third vertical LED chip in common; a first, a second, and a third connection part individually connected to lower electrodes of the first, the second, and the third vertical LED chip; and a fourth connection part connected to a lower portion of the common electrode. The mount substrate includes a first, a second, a third, and a fourth wire part. The first, the second, the third, and the fourth wire part are individually connected to the first, the second, the third, and the fourth connection part to form power input/output terminals to individually drive the first, the second, and the third vertical LED chip.

Description

LED pixel unit and LED display panel including the same {LED pixel unit and LED display panel comprising the same}

The present invention relates to an LED pixel unit and an LED display panel including the same. More particularly, the present invention relates to an LED display panel in which vertical LED chips constituting the LED pixel unit are individually driveably connected to each other. .

In a typical full-color LED display device, each pixel is composed of a red LED, a green LED, and a blue LED. In recent years, LED display apparatuses that configure each pixel with red LEDs, green LEDs, blue LEDs, and white LEDs have also been proposed.

As a technique for implementing RGB for LED display panel manufacturing, there are technologies for mounting an LED package on a mount substrate and technologies for mounting an LED chip on the mount substrate. In the former case, the blue LED package, the green LED package, and the red LED package are mounted on a mount substrate and applied to the LED display panel. Therefore, the blue LED package, the green LED package, and the red LED package are applied to the LED display panel. In the latter case, the blue LED chip, the green LED chip, and the red LED chip are directly mounted on the mount substrate without being packaged. The latter can be implemented in a relatively small size compared to the former, thereby improving the resolution and color reproducibility of the display device. It is advantageous to.

However, conventionally, the LED chip structure used as the blue LED chip, the green LED chip, and the red LED chip is either a lateral chip structure or a flip chip structure in which electrodes are required at the top or the bottom thereof, and thus the size is still small. There is a limit. In particular, in the case of using an LED chip including a lateral chip structure, there is a disadvantage in that an additional bonding wire is required.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide an LED pixel unit and a LED display panel including the first, second, and third vertical LED chips having a size of several hundreds of micrometers, each of which can be individually driven without a bonding wire.

According to an aspect of an exemplary embodiment, an LED display panel includes: a mount substrate including a first wiring part, a second wiring part, a third wiring part, and a fourth wiring part; And at least one LED pixel unit disposed on the mount substrate, wherein the LED pixel unit includes a first vertical LED chip, a second vertical LED chip, and a third vertical LED chip, the first vertical LED chip, and the first vertical LED chip. A common electrode commonly connected to the upper electrodes of the second vertical LED chip and the third vertical LED chip, and the lower electrodes of the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip, respectively. A first connection part, a second connection part, and a third connection part connected to each other; and a fourth connection part connected to a lower portion of the common electrode, wherein the first wiring part, the second wiring part, the third wiring part, and The fourth wiring portion includes the first connection portion and the second connection so that the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip are individually driven. The third connection part and the fourth connection part are individually connected to each other.

The first connector, the second connector, the third connector, and the fourth connector are the first vertical LED chip, the second vertical LED chip, the third vertical LED chip, and the common electrode. It is formed in the support substrate which is supported.

In an embodiment, the first connection part, the second connection part, the third connection part, and the fourth connection part include a first via hole, the second via hole, a third via hole, and the first connection part that penetrates the support substrate. A first via, a second via, a third via, and a fourth via, respectively formed in the four via holes.

The LED display panel may include the first connection portion, the second connection portion, the third connection portion, and the fourth connection portion including the first via, the second via, the third via, and the fourth connection portion. The semiconductor device may further include a first electrode film, a second electrode film, a third electrode film, and a fourth electrode film formed on the support substrate so as to contact the upper portion of the via.

According to one embodiment, each of the first via, the second via, the third via and the fourth via comprises a hollow.

According to an embodiment, solders may be disposed between the upper end of the first wiring part and the first via, between the upper end of the second wiring part and the second via, and between the upper end of the third wiring part and the third via. Between the upper end of the fourth wiring portion and the fourth via.

According to an embodiment, solders may be disposed between the upper end of the first wiring part and the first via, between the upper end of the second wiring part and the second via, and between the upper end of the third wiring part and the third via. And between the fourth via and the fourth via, wherein each of the solders partially flows into the hollow of the first via, the second via, the third via, and the fourth via, respectively. do.

In an embodiment, between the first electrode layer and a lower electrode of the first vertical LED chip, between the second electrode layer and a lower electrode of the second vertical LED chip, the third electrode layer and the third vertical layer. Bump balls are connected between the lower electrodes of the LED chip and between the lower part of the common electrode and the fourth electrode film.

In some embodiments, the bump balls are formed along a periphery of the first via, the second via, the third via, or the fourth via.

According to one embodiment, the support substrate may be an electrically insulating substrate.

According to an embodiment, the first via, the second via, the third via, and the fourth via may include inner surfaces of the first via hole, the second via hole, the third via hole, and the fourth via hole. It is formed by a metal material deposited on.

In example embodiments, the first electrode film, the second electrode film, the third electrode film, and the fourth electrode film are defined by electrode separation lines, and the separation lines are formed by etching a metal layer stacked on the support substrate. Is formed.

According to one embodiment, the metal layer may be a copper foil bonded to the support substrate by an adhesive.

In example embodiments, the plurality of LED pixel units may be connected to each other, and the first wiring part may be commonly connected to the first connection parts of the plurality of LED pixel units, and the second wiring part may be connected to the second pixels of the plurality of LED pixel units. Commonly connected to the connecting portions, the third wiring portion is commonly connected to the third connecting portions of the plurality of LED pixel units, and the fourth wiring portion is commonly connected to the fourth connecting portions of the plurality of LED pixel units. do.

According to an embodiment, the LED pixel unit may further include a support layer formed to be in contact with side surfaces of the first vertical LED chip, the second vertical LED chip, the third vertical LED chip, and the common electrode. Include.

In example embodiments, upper electrodes of the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip may be connected to an upper surface of the common electrode by a pattern wiring layer supported by the support layer. .

The support layer may include a flat upper surface supporting the pattern wiring layer, between the first vertical LED chip and the second vertical LED chip, and between the second vertical LED chip and the third vertical LED chip. And a lower surface including a recess between the first or third vertical LED chip and the common electrode.

According to one embodiment, the support layer is integrated with the first vertical LED chip, the second vertical LED chip, the third vertical LED chip and the common electrode before being disposed on the substrate.

According to one embodiment, the support layer is formed of a resin material containing a light absorbing or light reflecting material.

According to another aspect of the invention there is provided an LED pixel unit disposed on a mount substrate. The LED LED pixel unit may include a first vertical LED chip; A second vertical LED chip; A third vertical LED chip; A common electrode commonly connected to upper electrodes of the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip; And a first connection part, a second connection part, and a third connection part connected to lower electrodes of the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip, and a lower part of the common electrode. And a supporting substrate on which four connections are formed, wherein power input / output terminals for individually driving the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip are formed. Each of the second connecting portion, the third connecting portion, and the fourth connecting portion is individually connected to the first wiring portion, the second wiring portion, the third wiring portion, and the fourth wiring portion of the mount substrate.

According to the present invention, an LED display panel is implemented in which LED pixel units, in which vertical LED chips of several to hundreds of micrometers are individually driveably connected without bonding wires, are arranged on a mount substrate. In addition, the present invention makes it possible to further reduce the size of the vertical LED chips. This can greatly contribute to improving the image quality of the LED display panel when the LED pixel unit according to the present invention is applied to the display panel.

The present invention can form a wiring pattern layer on the top surface of the first, second, and third vertical LED chips, for example, by deposition using TSV (Through Silicone Via) or TGV (Through Glass Via) method or the like. Through this, the wiring pattern layer may precisely connect the upper electrodes of the vertical LEDs in micrometers.

In general, when an LED pixel unit having a package structure including vertical LED chips of micrometers is directly connected to a PCB, the RGB pixel unit is driven in parallel with the RGB, resulting in a VF deviation and a current driving deviation. The LED pixel unit can control the individual current drive.

In addition, according to the present invention, after bonding the vertical LED chips of the micrometer unit to the support substrate formed with the connection parts with bump balls, the connection parts and the wiring parts of the mount substrate are connected to each other by soldering, thus remelting at the time of manufacture. This problem can be compensated for. The upper surface of the vertical LED chips has a weak deposition point for wiring connection of several micrometers, so that the deposition portion may be damaged or separated during transportation. According to the present invention, the support layer may support all of the vertical LED chips in the LED pixel unit. Since the wiring pattern layer deposited thereon is applied, unwanted movement between vertical LED chips can be prevented, thereby preventing damage to the wiring pattern layer.

1 is a cross-sectional view illustrating an LED display panel according to an exemplary embodiment of the present invention. For the convenience of illustration, the vertical LED chips and the common electrodes are arranged in line with each other.
2 is a plan view illustrating an embodiment of an LED display panel.
3 is a plan view illustrating an embodiment of an LED pixel unit.
4 is a plan view illustrating another embodiment of an LED pixel unit.
5 is a plan view illustrating another embodiment of an LED pixel unit.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a cross-sectional view illustrating an LED display panel according to an exemplary embodiment of the present invention. For the convenience of illustration, the vertical LED chips and the common electrodes are arranged in line with each other.

Referring to FIG. 1, an LED display panel includes a plurality of LED pixel units 2 and a mount substrate 100 on which the LED pixel units 2 are disposed. The mount substrate 100 is formed in a rectangular or square shape, and the plurality of LED pixel units 2 are arranged in a matrix arrangement on the mount substrate 100.

Each of the plurality of LED pixel units 2 includes a first vertical LED chip 200 that emits red light by applying a current, a second vertical LED chip 300 that emits green light by applying a current, and a blue light by applying a current. It includes a third vertical LED chip 400 emitting. In addition, each of the plurality of LED pixel units 2 is common to the upper electrodes of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400. It includes a common electrode 600 connected.

In addition, each of the plurality of LED pixel units 2 may be separately provided to lower electrodes of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400, respectively. The first connector 510, the second connector 520, and the third connector 530 are connected to each other, and the fourth connector 540 is connected to the lower portion of the common electrode 600.

Although not shown in detail in FIG. 1, the position of the upper electrode is determined as an upper end of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400, and the position of the lower electrode. The bottom of the first vertical LED chip 200, the second vertical LED chip 300 and the third vertical LED chip 400 is provided. The upper electrode and the lower electrode have different electrical polarities.

Meanwhile, the first connector 510, the second connector 520, the third connector 530, and the fourth connector 540 are each of the first vertical LED chip 200 and the second vertical LED chip. The substrate 300 is formed on the support substrate 501 on which the reference numeral 300 and the third vertical LED chip 400 and the common electrode 600 are supported.

The first connection part 510, the second connection part 520, the third connection part 530, and the fourth connection part 540 are first via holes penetrating the support substrate 501 and the second vias. And a first via 512, a second via 522, a third via 532, and a fourth via 542 formed in the hole, the third via hole, and the fourth via hole, respectively. In this case, the support substrate 501 is an electrically insulating substrate such as a glass or silicon substrate, and the first via 512, the second via 522, the third via 532, and the fourth via ( 542 may be formed by a metal material, preferably Au, deposited on the inner surfaces of the first via hole, the second via hole, the third via hole, and the fourth via hole. The first via 512, the second via 522, the third via 532, and the fourth via 542 are formed to have a hollow V therein by controlling the deposition amount of the metal material. This hollow (V) allows the introduction of some of the solder described below to allow even more stable bonding.

Also. The first connecting portion 510, the second connecting portion 520, the third connecting portion 530, and the fourth connecting portion 540 may include the first via 512, the second via 522, and the The first electrode film 513, the second electrode film 523, and the second electrode film 523 are formed on the support substrate 501 so as to contact the third via 532 and the upper portion of the fourth via 542, respectively. The third electrode film 533 and the fourth electrode film 543 are further included.

On the other hand, the LED pixel unit 2 and the sides of the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400 and the common electrode 600 It further comprises a support layer 800 formed to be in contact with and having electrical insulation. Upper electrodes of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 by the pattern wiring layer 700 supported by the support layer 800. An upper surface of the common electrode 600 is connected.

The support layer 800 is between the flat upper surface supporting the pattern wiring layer 700, the first vertical LED chip 200 and the second vertical LED 300 chip, and the second vertical LED chip 300. ) And a lower surface including a recess 810 between the third vertical LED chip 400 and the first or third vertical LED chip 200 or 400 and the common electrode 600.

At this time, the support layer 800, before being disposed on the mount substrate, the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400 and the common It is packaged integrally with the electrode 600. In this case, the support layer 800 is formed of a resin material containing a light absorbing or light reflecting material. Unlike the bottom surface of the support layer 800 includes concave surfaces, the top surface of the support layer 800 may include the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip ( It is preferable that the upper surface of the 400 and the flat surface forming the same plane as the upper surface of the common electrode 600. In addition, an underfill layer 1100 formed by filling a resin material is formed between the support substrate 501 and the support layer 800 in order to provide reliable bonding to the substrate substrate 501 and to protect the vertical LED chips.

On the other hand, between the first electrode film 513 and the lower electrode of the first vertical LED chip 200, between the second electrode film 523 and the lower electrode of the second vertical LED chip 300, Each of the third electrode film 533 and the lower electrode of the third vertical LED chip 400 and between the lower portion of the common electrode 600 and the fourth electrode film 543 may include a bump ball 180. Are connected by). In this case, the bump balls 180 are formed along the periphery of the first via 512, the second via 522, the third via 532, or the fourth via 542. In other words, a plurality of bump balls 180, more preferably, three or more bump balls 180 are formed at regular intervals while maintaining a constant distance with respect to the center of one via 512, 522, or 532. It is desirable to be.

The first electrode film 512, the second electrode film 522, the third electrode film 532, and the fourth electrode film 542 are defined by electrode separation lines L, and the electrode separation line. The L layers are formed by etching the metal layer stacked on the support substrate 501. The metal layer may be a copper foil bonded to the support substrate 501 by an adhesive, more specifically a UV curable adhesive 502.

According to the present embodiment, after the support substrate 501 such as glass or silicon substrate and the copper foil are bonded by the UV curable adhesive layer 502, the copper foil is etched to form the first electrode film 512 and the second. After forming the electrode film 522, the third electrode film 532, and the fourth electrode film 542, first, second, and third via holes are formed in the bonded body to which the support substrate 501 is bonded to the copper foil. And Au in the first, second, third and fourth via holes, thereby contacting the first, second, third and fourth electrode films 512, 522, 532 and 542, respectively. First, second, third and fourth vias 512, 512, 532, 542 may be formed.

In FIG. 1, the vertical LED chips 200, 300, and 400 and the common electrode 600 are illustrated as being arranged in a line along one cross section, and the pattern wiring layer 500 is illustrated as being straight along the line. This is for convenience of illustration, and most preferably, three vertical LED chips 200, 300, and 400 and one common electrode 600 may be arranged in a rectangle (see FIG. 2). The patterned wiring layer 700 is preferably formed in a linear shape having a very small line width so that the area where the vertical LED chips 200, 300, and 400 are covered by the patterned wiring layer 700 can be minimized.

Meanwhile, the plurality of LED pixel units 2 having the above structure are mounted on the mount substrate 100.

The mount substrate 100 includes a first wiring part 110, a second wiring part 120, a third wiring part 130, and a fourth wiring part 140. In addition, the first wiring part 110, the second wiring part 120, the third wiring part 130, and the fourth wiring part 140 may include the first vertical AD chip 200 and the The first connection part 510, the second connection part 520, and the third connection part so that power input / output terminals for individually driving the second vertical LED chip 300 and the third vertical LED chip 400 are formed. 530 and each of the fourth connectors 540. As mentioned above, the first connecting portion 510, the second connecting portion 520, the third connecting portion 530, and the fourth connecting portion 540 may include a first via 512 and a second via 522. ), Third via 532 and fourth via 542. In addition, lower ends of the first via 512, the second via 522, the third via 532, and the fourth via 542 are exposed from the bottom surface of the support substrate 501. Facing the top of 100).

Meanwhile, solders 190 may be disposed between the upper end of the first wiring part 110 and the first via 512, between the upper end of the second wiring part 120 and the second via 522. The upper end of the third wiring unit 130 and the third via 532 are connected between the upper end of the fourth wiring unit 140 and the fourth via 542. In this case, each of the solders 190 may be partially formed in each of the hollows V of the first via 512, the second via 522, the third via 532, and the fourth via 542. Can be introduced. Since the solders 190 flow into the hollows V of the vias 512, 522, 532, and 542, and then harden to fix the LED pixel units 2, more reliable coupling is possible.

As mentioned above, the LED pixel unit 2 is plural in number. The first wiring unit 110 is commonly connected to the first connection units 510 of the plurality of LED pixel units 2, and the second wiring unit 120 is connected to the plurality of LED pixel units 2. Are commonly connected to the second connectors 520 of the plurality of LEDs, and the third interconnection unit 130 is commonly connected to the third connectors 530 of the plurality of LED pixel units 2 and the fourth interconnection unit. The unit 140 is commonly connected to the fourth connectors 540 of the plurality of LED pixel units 2.

Here, the first wiring part 110 is connected to the first wiring pattern 111 formed on the first insulating layer 101 and the first wiring pattern 111 at a lower end thereof, and solder 190 at the upper end thereof. A first wiring via 112 connected to the first via 512. In addition, the second wiring part 120 is connected to the second wiring pattern 121 formed on the second insulating layer 102 and the second wiring pattern 121 at the bottom thereof, and the solder 190 is formed at the top thereof. The second wiring via 122 is connected to the second via 522. The third wiring unit 130 is connected to the third wiring pattern 131 formed on the bottom surface of the second insulating layer 102 and the third wiring pattern 131 at the bottom thereof and is soldered at the top thereof. The third wiring via 132 is connected to the third via 532. The fourth wiring unit 140 is connected to the fourth wiring pattern 141 and the fourth wiring pattern 141 at the lower end thereof, and is connected to the fourth via 542 by the solder 190 at the upper end thereof. A wiring via 142.

1 illustrates a connection relationship between the vertical LED chips 200, 300, and 400 in the LED pixel unit 2 and the connections 510, 520, 530, and 540 in the LED pixel unit 2. (2) In order to show all the connection relations between the connecting portions 510, 520, 530, 540 and the wiring portions 110, 120, 130, 140 of the mount substrate 100, in one cross section, Note that the drawing is displayed in one cross section of parts that cannot be displayed.

2, 3, 4, and 5, various embodiments of the LED display panel plane and the LED pixel unit plane can be seen. 2, 3, 4 and 5, it should be noted that there is a part that does not match the Figure 1 used to show all the various configurations and connection relationships to be described in one section.

Referring to FIG. 2, in the LED display panel 1000 of the preferred embodiment, the shape (ie, planar shape) of the mounting substrate 100 is square or rectangular, and the plurality of LED pixel units 2 are mounted on the mount. It can be seen that they are arranged in a matrix arrangement on the substrate 100.

Referring to FIG. 3, in each LED pixel unit 2, the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 and the common electrode 600 are supported. The support substrate 501 is arranged in a quadrangle on the substrate 501, and the support substrate 501 may include a lower electrode of the first vertical LED chip 200, a lower electrode of the second vertical LED chip 300, and a third vertical LED chip 400. The first connection part 510 (refer to FIG. 1), the second connection part 520 (refer to FIG. 1), and the third connection part 530 (refer to FIG. 1), which are electrically connected to the lower electrode and the lower surface of the common electrode 600. And a fourth connector 540 (see FIG. 1) connected to the lower portion of the common electrode 600. In this case, lower electrodes of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 may include first to third connection parts 510, 520, and 530; And a lower portion of the common electrode 600 may be grounded to the mount substrate 100 (see FIG. 1) through the fourth connector 540 (see FIG. 1). Can be.

In this case, the mount substrate may be a substrate having a structure shown in FIG. 1 or a TFT (Thin Film Transistor) substrate or a printed circuit board (PCB) having another structure.

Top surfaces of each of the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400, and the common electrode 600 are 100 μm or less, and most preferably, 30 to 70 μm in size. Has

In addition, each of the LED pixel units 2 may be disposed above the first vertical LED chip 200, above the second vertical LED chip 300, above the third vertical LED chip 400, and the common electrode 600. It includes a pattern wiring layer 700 for electrically connecting the upper portion of the. In addition, each of the LED pixel units 2 is in contact with side surfaces of the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400, and the common electrode 600. The support layer 800 may be formed to support the pattern wiring layer 700.

Each of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 may include a red LED chip 200, a green LED chip 300, and a blue LED chip 400. ), Has a cube or cuboid shape. In addition, each of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 may be interposed between a first conductive semiconductor layer and a second conductive semiconductor layer. Active layer. In addition, the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400, and the common electrode 600 are substantially square.

The above pattern wiring layer 700 is connected to upper surfaces of the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400, and the common electrode 600. Regions, that is, a first connection region 201, a second connection region 301, a third connection region 401 and a fourth connection region 601 are provided. In addition, the first connection region 201, the second connection region 301, the third connection region 401, and the fourth connection region 601 may include a first vertical LED chip 200 and the second vertical LED chip. The upper surface of the 300, the third vertical LED chip 400 and the common electrode 600 are positioned at the corners closest to each other.

The first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED are respectively formed in the first connection region 201, the second connection region 301, and the third connection region 401. An upper electrode of each of the chips 400 may be provided, and the upper electrode may be formed before the pattern wiring layer 700 is formed, and may be formed as part of the pattern wiring layer 700 when the pattern wiring layer 700 is formed. It may be.

Meanwhile, the first vertical LED chip 200 and the second vertical LED chip may be disposed below the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400. The lower electrodes 300, which are individually connected to the wires of the mount substrate 100, may be formed to individually drive the third vertical LED chip 400.

The support layer 800 is in contact with side surfaces of the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400, and the common electrode 600. Epoxy, silicon, epoxy molding compound (EMC), polyimide to be integrated with the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400 and the common electrode 600. It is formed of an insulating resin material such as the like. The support layer 800 serves to support the above-described pattern wiring layer 700 from below, thereby enabling the formation of the pattern wiring layer 700. In addition, in addition to supporting the pattern wiring layer 700, the support layer 800 may include a first vertical LED chip 200, a second vertical LED chip 300, a third vertical LED chip 400, and a common electrode 600. ), And the support layer 800 may be formed of a light absorbing material such as a black color absorbing light or a light reflecting material reflecting light. The LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 serve to prevent unwanted interference, and further, without reflecting light introduced from the outside. Can act as an absorber.

The top surface of the support layer 800 may be coplanar with the top surfaces of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400. Here, upper surfaces of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 may be an upper surface of the epi structure or an upper electrode formed on the upper surface of the epi structure. It may be a top surface.

The patterned wiring layer 700 is formed to be supported on the support layer 800 to form the first vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400, and the common electrode. Connect 600. In this case, the wiring baton layer 700 may minimize the top surface of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400. Partial corner regions of the vertical LED chip 200, the second vertical LED chip 300, the third vertical LED chip 400, and the common electrode 600, that is, the first connection region 201 and the second Only the connection region 301, the third connection region 401, and the fourth connection region 601 are connected.

In the present exemplary embodiment, the pattern wiring layer 700 is formed to have a substantially 'c' shape, and the first connection region 201 of the first vertical LED chip 200 and the second connection of the second vertical LED chip 300 are formed. A first linear pattern portion 701 connecting the region 301, and an end portion of the first linear pattern portion 701 in the second connection region 301 of the second vertical LED chip 300, and A second straight pattern portion 702 connecting the second connection region 301 and the third connection region 401 of the third vertical LED chip 400, and a first of the third vertical LED chip 400. The third straight line is connected to an end of the second straight pattern portion 702 in the third connection region 401 and connects the third connection region 401 and the fourth connection region 601 of the common electrode 600. It consists of a straight pattern part 703.

On the other hand, the support layer 800 is formed to cover all of the side of the first vertical LED chip 200, the side of the second vertical LED chip 300, the side of the third vertical LED chip 400. The upper surface of the first vertical LED chip 200, the second vertical LED chip 300 and the third vertical LED chip 400 is a flat surface forming the same plane and the bottom surface is a neighbor A recessed surface is formed between one vertical LED chip or between a common electrode and a neighboring vertical LED chip.

4 illustrates another embodiment of the present invention, and referring to FIG. 4, the patterned wiring layer 700 ′ is formed of the fourth connection region 601 of the common electrode 600 and the first vertical LED chip 200. The first straight pattern portion 701 ′ connecting the first connection region 201, the fourth connection region 601 of the common electrode 600, and the second connection region 301 of the second vertical LED chip 300. Third linear pattern 702 ′ connecting the second linear pattern portion 702 ′, the fourth connection region 601 of the common electrode 600, and the third connection region 401 of the third vertical LED chip 400. And a portion 703 ', wherein the first straight line portion 701', the second straight pattern portion 702 ', and the third straight pattern portion 703' are connected to the fourth connection region 601. Connected from Also in this embodiment, the pattern wiring layer 700 'is supported in contact with the lower support layer 800.

FIG. 5 illustrates another embodiment of the present invention. Referring to FIG. 5, the patterned wiring layer 700 is formed to have a shape of approximately “W”, and the first connection region (ie, the first vertical LED chip 200) may be formed. A first linear pattern portion 701 "connecting the first connection pattern 301 of the second vertical LED chip 300 and the second connection region 301 of the second vertical LED chip 300; A straight second straight pattern connected to an end portion of the first straight pattern portion 701 ″ and connecting the second connection region 301 to the third connection region 401 of the third vertical LED chip 400. Part 702 " and an end portion of the second straight pattern portion 701 " in the third connection region 401 of the third vertical LED chip 400, and the third connection region 401 and the A third straight pattern portion 703 ″ connecting the fourth connection region 601 of the common electrode 600 and an end portion of the third straight pattern portion 703 ″ in the fourth connection region 601. The fourth station And a area 601 and the 4th rectilinear pattern portion (704 ") connecting the first connection region (201).

The patterned wiring layer 700, 700 ′ or 700 ″ may be formed in the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED as illustrated in FIGS. 3, 4, or 5. Corners of the first vertical LED chip 200, the second vertical LED chip 300, and the third vertical LED chip 400 may be connected to corner areas of the chip 400 and the common electrode 600. The light emitting efficiency may be further increased by forming the remaining regions except for the remaining regions.

100 ....................................... Mount Board
200 ....................................... 1 Vertical LED Chip
300 ...................................... 2nd Vertical LED Chip
400 ............................ 3rd Vertical LED Chip
600 ....................... Common electrode
700 ............................ Pattern Wiring Layer
800 ............

Claims (20)

A mount substrate including a first wiring portion, a second wiring portion, a third wiring portion, and a fourth wiring portion; And
One or more LED pixel units disposed on the mount substrate;
The LED pixel unit is common to a first vertical LED chip, a second vertical LED chip, and a third vertical LED chip, and upper electrodes of the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip. A first electrode, a second connector, and a third connector separately connected to the common electrodes respectively connected to the first electrodes of the first vertical LED chip, the second vertical LED chip, and the lower electrodes of the third vertical LED chip; A fourth connection part connected to a lower portion of the common electrode,
The first wiring part, the second wiring part, the third wiring part, and the fourth wiring part may be configured so that the first vertical LED chip, the second vertical LED chip, and the third vertical LED chip are individually driven. The LED display panel is connected to each of the first connector, the second connector, the third connector and the fourth connector. The method of claim 1, wherein the first connector, the second connector, the third connector and the fourth connector are the first vertical LED chip, the second vertical LED chip and the third vertical LED chip and the common electrode An LED display panel, characterized in that formed on a supporting substrate to be supported. The method of claim 2, wherein the first connection portion, the second connection portion, the third connection portion and the fourth connection portion, the first via hole, the second via hole, the third via hole and the fourth through the support substrate. An LED display panel comprising a first via, a second via, a third via, and a fourth via, respectively formed in the via hole. The said 1st connection part, the said 2nd connection part, the said 3rd connection part, and the said 4th connection part contact the upper part of the said 1st via, the said 2nd via, the said 3rd via, and the said 4th via, respectively. The LED display panel further comprises a first electrode film, a second electrode film, a third electrode film and a fourth electrode film formed on the support substrate so as to be separated. The LED display panel of claim 3, wherein each of the first via, the second via, the third via, and the fourth via includes a hollow. The method of claim 1, wherein solders are disposed between the upper end of the first wiring part and the first via, between the upper end of the second wiring part and the second via, and between the upper end of the third wiring part and the third via. And connecting between an upper end of the fourth wiring portion and the fourth via. The method of claim 3, wherein solders are disposed between the upper end of the first wiring part and the first via, between the upper end of the second wiring part and the second via, and between the upper end of the third wiring part and the third via. A connection between an upper end of the fourth wiring portion and the fourth via, wherein each of the solders partially flows into the hollows of the first via, the second via, the third via, and the fourth via, respectively. LED display panel, characterized in that. The method of claim 4, wherein the first electrode film and the lower electrode of the first vertical LED chip, between the second electrode film and the lower electrode of the second vertical LED chip, the third electrode film and the third vertical LED LED display panel, characterized in that between the lower electrode of the chip, and between the lower portion of the common electrode and the fourth electrode film is connected by bump balls. The LED display panel of claim 8, wherein the bump balls are formed along a periphery of the first via, the second via, the third via, or the fourth via. The LED display panel of claim 2, wherein the support substrate is an electrically insulating substrate. The method of claim 3, wherein the first via, the second via, the third via, and the fourth via are formed on inner surfaces of the first via hole, the second via hole, the third via hole, and the fourth via hole. An LED display panel formed by the deposited metal material. The method of claim 4, wherein the first electrode film, the second electrode film, the third electrode film, and the fourth electrode film are defined by electrode separation lines, and the separation lines are formed by etching a metal layer stacked on the support substrate. LED display panel, characterized in that. The LED display panel of claim 12, wherein the metal layer is a copper foil bonded to the support substrate by an adhesive. The method of claim 1, wherein the plurality of LED pixel units, the first wiring portion is commonly connected to the first connection of the plurality of LED pixel units, the second wiring portion is a second connection of the plurality of LED pixel units Commonly connected to the third interconnection portions, the third interconnection portion is commonly connected to the third interconnections of the plurality of LED pixel units, and the fourth interconnection portion is commonly connected to the fourth interconnections of the plurality of LED pixel units. LED display panel, characterized in that. The semiconductor device of claim 1, wherein the LED pixel unit further includes a support layer formed to be in contact with side surfaces of the first vertical LED chip, the second vertical LED chip, the third vertical LED chip, and the common electrode. LED display panel, characterized in that. The method of claim 15, wherein the upper surface of the common electrode and the upper electrodes of the first vertical LED chip, the second vertical LED chip and the third vertical LED chip is connected by a pattern wiring layer supported by the support layer. LED display panel characterized by. The method of claim 16, wherein the support layer is a flat top surface for supporting the pattern wiring layer, between the first vertical LED chip and the second vertical LED chip, between the second vertical LED chip and the third vertical LED chip, And a lower surface including a recess between the first or third vertical LED chip and the common electrode. The LED display of claim 15, wherein the support layer is integrated with the first vertical LED chip, the second vertical LED chip, the third vertical LED chip, and the common electrode before being disposed on the substrate. panel. The micro LED display panel of claim 15, wherein the support layer is formed of a resin material including a light absorbing or light reflecting material. The method of claim 14, wherein the first wiring part, the second wiring part, the third wiring part, and the fourth wiring part have a first wiring pattern, a second wiring pattern, a third wiring pattern, and a fourth at different heights. A wiring pattern, first wiring vias commonly connected to the first wiring pattern at a lower end thereof, and connected to the first connection parts at an upper end thereof, and commonly connected to the second wiring pattern at a lower end thereof, the second wiring pattern connected to the second wiring pattern at an upper end thereof; Second wiring vias connected to the connecting parts, third wiring vias connected to the third wiring pattern at the bottom and connected to the third connecting parts at the top, and common to the fourth wiring pattern at the bottom. And fourth wiring vias connected to each other and connected to the third connectors at an upper end of the micro LED display panel.

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