TWI742752B - Gate driving circuit of display panel - Google Patents
Gate driving circuit of display panel Download PDFInfo
- Publication number
- TWI742752B TWI742752B TW109122931A TW109122931A TWI742752B TW I742752 B TWI742752 B TW I742752B TW 109122931 A TW109122931 A TW 109122931A TW 109122931 A TW109122931 A TW 109122931A TW I742752 B TWI742752 B TW I742752B
- Authority
- TW
- Taiwan
- Prior art keywords
- pull
- circuit
- control
- reference signal
- coupled
- Prior art date
Links
Images
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
Abstract
Description
本發明關於一種驅動電路,尤其是一種顯示面板之閘極驅動電路。 The present invention relates to a driving circuit, in particular to a gate driving circuit of a display panel.
隨著系統整合式玻璃面板(SOG,System-on-Glass)的概念被陸續提出,近來許多產品將顯示器驅動電路中的閘極掃描驅動電路(Gate driver或Scan driver)整合在玻璃上,即為GOA(Gate-Driver-on-Array)電路。再者,觸控與顯示的整合技術中包含In cell與on cell兩種內嵌式結構。In cell的內嵌式觸控技術為將觸控感應層製作於顯示面板的陣列基板,並將顯示面板原有作為顯示用的上電極(Vcom)層切割,並作為觸控感應層。而且,In cell相較於on cell的內嵌式觸控技術可減少製程道數且較為輕薄。 As the concept of System-on-Glass (SOG, System-on-Glass) has been put forward one after another, recently many products integrate the gate driver or scan driver in the display driver circuit on the glass, which is GOA (Gate-Driver-on-Array) circuit. Furthermore, the integration technology of touch and display includes two in-cell and on-cell embedded structures. In cell's in-cell touch technology is to fabricate the touch sensing layer on the array substrate of the display panel, and cut the display panel originally used as the upper electrode (Vcom) layer for display, and use it as the touch sensing layer. Moreover, compared with on cell's in-cell touch technology, In cell can reduce the number of manufacturing processes and is lighter and thinner.
然而,將GOA電路應用於內嵌式觸控技術,會面臨電晶體漏電的問題。故,設計符合內嵌式觸控結構的GOA電路成為內嵌式觸控技術的發展目標。 However, applying the GOA circuit to the in-cell touch technology will face the problem of transistor leakage. Therefore, designing GOA circuits that conform to the in-cell touch structure has become the development goal of the in-cell touch technology.
本發明之目的,在於提供一種顯示面板之閘極驅動電路,其應用於內嵌式觸控結構並降低漏電流,使輸出脈衝可以有效控制像素電晶體。 The purpose of the present invention is to provide a gate driving circuit for a display panel, which is applied to an in-cell touch control structure and reduces leakage current, so that the output pulse can effectively control the pixel transistor.
本發明提供一種閘極驅動電路,其包含一上拉電路、一上拉控制電路、一下拉控制電路與一預先重置電路。上拉電路包含一上拉控制端及輸出一閘極訊號。上拉控制電路耦接上拉電路的上拉控制端,並控制上拉控制端的一上拉控制電位。下拉控制電路耦接上拉控制電路與上拉電路,及下拉控制電路包含一參考電位端,其中,參考電位端於一顯示期間耦接一第一參考訊號,參考電位端於一觸控偵測期間耦接一第二參考訊號,第二參考訊號的電壓準位高於第一參考訊號的電壓準位。預先重置電路耦接上拉電路的上拉控制端,並重置上拉控制端的上拉控制電位。 The present invention provides a gate drive circuit, which includes a pull-up circuit, a pull-up control circuit, a pull-down control circuit and a pre-reset circuit. The pull-up circuit includes a pull-up control terminal and outputs a gate signal. The pull-up control circuit is coupled to the pull-up control terminal of the pull-up circuit and controls a pull-up control potential of the pull-up control terminal. The pull-down control circuit is coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, wherein the reference potential terminal is coupled to a first reference signal during a display period, and the reference potential terminal is used for a touch detection During the period, it is coupled to a second reference signal, and the voltage level of the second reference signal is higher than the voltage level of the first reference signal. The pre-reset circuit is coupled to the pull-up control terminal of the pull-up circuit and resets the pull-up control potential of the pull-up control terminal.
本發明提供一種閘極驅動電路,其包含一上拉電路、一上拉控制電路、一下拉控制電路與一抗雜訊電路。上拉電路包含一上拉控制端及輸出一閘極訊號。上拉控制電路耦接上拉電路的上拉控制端,並控制上拉控制端的一上拉控制電位。下拉控制電路耦接上拉控制電路與上拉電路,及下拉控制電路包含一參考電位端,參考電位端於一顯示期間耦接一第一參考訊號。抗雜訊電路包含複數切換元件,該些切換元件之至少兩切換元件串聯於上拉電路與第一參考訊號之間。 The present invention provides a gate drive circuit, which includes a pull-up circuit, a pull-up control circuit, a pull-down control circuit and an anti-noise circuit. The pull-up circuit includes a pull-up control terminal and outputs a gate signal. The pull-up control circuit is coupled to the pull-up control terminal of the pull-up circuit and controls a pull-up control potential of the pull-up control terminal. The pull-down control circuit is coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, which is coupled to a first reference signal during a display period. The anti-noise circuit includes a plurality of switching elements, and at least two switching elements of the switching elements are connected in series between the pull-up circuit and the first reference signal.
本發明提供一種閘極驅動電路,其包含一上拉電路、一上拉控制電路、一下拉控制電路、一儲能元件與一預先重置電路。上拉電路包含一上拉控制端、一上拉輸出端及輸出一閘極訊號。上拉控制電路耦接上拉電路的上拉控制端,並控制上拉控制端的一上拉控制電位。下拉控制電路耦接上拉控制電路與上 拉電路,及下拉控制電路包含一參考電位端,參考電位端於一顯示期間耦接一第一參考訊號。儲能元件耦接於上拉電路的上拉控制端與上拉輸出端之間。預先重置電路耦接上拉電路的上拉控制端,並重置上拉控制端的上拉控制電位。 The present invention provides a gate drive circuit, which includes a pull-up circuit, a pull-up control circuit, a pull-down control circuit, an energy storage element and a pre-reset circuit. The pull-up circuit includes a pull-up control terminal, a pull-up output terminal and output a gate signal. The pull-up control circuit is coupled to the pull-up control terminal of the pull-up circuit and controls a pull-up control potential of the pull-up control terminal. The pull-down control circuit is coupled to the pull-up control circuit and the upper The pull-down circuit and the pull-down control circuit include a reference potential terminal, and the reference potential terminal is coupled to a first reference signal during a display period. The energy storage element is coupled between the pull-up control terminal and the pull-up output terminal of the pull-up circuit. The pre-reset circuit is coupled to the pull-up control terminal of the pull-up circuit and resets the pull-up control potential of the pull-up control terminal.
10:閘極驅動電路 10: Gate drive circuit
11:上拉控制電路 11: Pull-up control circuit
13:下拉控制電路 13: Pull-down control circuit
15:上拉電路 15: pull-up circuit
17:預先重置電路 17: Pre-reset circuit
19:抗雜訊電路 19: Anti-noise circuit
20:源極驅動電路 20: Source drive circuit
30:內嵌式觸控面板 30: In-cell touch panel
An:上拉控制電位 An: Pull up control potential
An(0):上拉控制電位 An(0): Pull-up control potential
An(1):上拉控制電位 An(1): Pull-up control potential
An(2):上拉控制電位 An(2): Pull-up control potential
An(3):上拉控制電位 An(3): Pull-up control potential
An(4):上拉控制電位 An(4): Pull-up control potential
An+1:上拉控制電位 An+1: Pull up the control potential
C1:上拉控制端 C1: Pull up the control terminal
CLK1:時脈訊號 CLK1: Clock signal
CTH:儲能元件 CTH: Energy storage element
Frame N:畫面期間 Frame N: During the frame
Frame N+1:畫面期間 Frame N+1: During the frame
G[1]:閘極訊號 G[1]: Gate signal
G[2]:閘極訊號 G[2]: Gate signal
G[3]:閘極訊號 G[3]: Gate signal
G[72]:閘極訊號 G[72]: Gate signal
G[73]:閘極訊號 G[73]: Gate signal
G[74]:閘極訊號 G[74]: Gate signal
G[160]:閘極訊號 G[160]: Gate signal
G[161]:閘極訊號 G[161]: Gate signal
G[162]:閘極訊號 G[162]: Gate signal
G[688]:閘極訊號 G[688]: Gate signal
G[689]:閘極訊號 G[689]: Gate signal
G[690]:閘極訊號 G[690]: Gate signal
G[n-2]:閘極訊號 G[n-2]: Gate signal
G[n]:閘極訊號 G[n]: Gate signal
G[n+3]:閘極訊號 G[n+3]: Gate signal
G[n+m]:閘極訊號 G[n+m]: Gate signal
M1:電晶體 M1: Transistor
M2:電晶體 M2: Transistor
M3:電晶體 M3: Transistor
M4:電晶體 M4: Transistor
M6:電晶體 M6: Transistor
M8:電晶體 M8: Transistor
M14:電晶體 M14: Transistor
M15:電晶體 M15: Transistor
M16:電晶體 M16: Transistor
Pre-Rst:預先重置訊號 Pre-Rst: Pre-reset signal
S[1]:源極訊號 S[1]: Source signal
S[2]:源極訊號 S[2]: source signal
S[3]:源極訊號 S[3]: Source signal
S[n]:源極訊號 S[n]: source signal
S[n+m]:源極訊號 S[n+m]: source signal
Touch#1:觸控偵測期間 Touch#1: During touch detection
Touch#2:觸控偵測期間 Touch#2: During touch detection
Touch#8:觸控偵測期間 Touch#8: During touch detection
VDD:供應電壓 VDD: supply voltage
VOUT:上拉輸出端 VOUT: pull-up output
Vref:參考電位端 Vref: Reference potential terminal
VSS1:第一參考訊號 VSS1: The first reference signal
VSS2:第二參考訊號 VSS2: The second reference signal
第一A圖:其為本發明之內嵌式觸控面板與驅動電路之實施例的示意圖;第一B圖:其為本發明之閘極驅動電路之驅動模式之實施例的示意圖;第一C圖:其為本發明之閘極驅動電路之long-H驅動模式之實施例的時序圖;第二圖:其為本發明之閘極驅動電路之第一實施例的電路圖;第三圖:其為本發明之閘極驅動電路之第二實施例的電路圖;第四圖:其為本發明之閘極驅動電路之第三實施例的電路圖;第五圖:其為本發明之閘極驅動電路之第四實施例的電路圖;第六圖:其為本發明之閘極驅動電路之第五實施例的電路圖;第七圖:其為本發明之閘極驅動電路之第六實施例的電路圖;及第八圖:其為本發明之上拉控制電位的變化之實施例的高溫模擬圖。 First A: it is a schematic diagram of an embodiment of the in-cell touch panel and a driving circuit of the present invention; the first B: it is a schematic diagram of an embodiment of the driving mode of the gate drive circuit of the present invention; Figure C: It is a timing diagram of an embodiment of the long-H drive mode of the gate drive circuit of the present invention; Figure 2: It is a circuit diagram of the first embodiment of the gate drive circuit of the present invention; Figure 3: It is a circuit diagram of the second embodiment of the gate drive circuit of the present invention; Figure 4: it is the circuit diagram of the third embodiment of the gate drive circuit of the present invention; Figure 5: It is the gate drive of the present invention The circuit diagram of the fourth embodiment of the circuit; the sixth figure: it is the circuit diagram of the fifth embodiment of the gate drive circuit of the present invention; the seventh figure: the circuit diagram of the sixth embodiment of the gate drive circuit of the present invention ; And the eighth figure: it is a high-temperature simulation diagram of the embodiment of the change of the pull-up control potential of the present invention.
在說明書及請求項當中使用了某些詞彙指稱特定的元件,然,所屬本發明技術領域中具有通常知識者應可理解,製造商可能會用不同的名詞稱呼同一個元件,而且,本說明書及請求項並不以名稱的差異作為區分元件的方式,而是以元件在整體技術上的差異作為區分的準則。在通篇說明書及請求項當 中所提及的「包含」為一開放式用語,故應解釋成「包含但不限定於」。再者,「耦接」一詞在此包含任何直接及間接的連接手段。因此,若文中描述一第一裝置耦接一第二裝置,則代表第一裝置可直接連接第二裝置,或可透過其他裝置或其他連接手段間接地連接至第二裝置。 Certain words are used in the specification and claim items to refer to specific elements. However, those with ordinary knowledge in the technical field of the present invention should understand that the manufacturer may use different terms to refer to the same element. Moreover, this specification and The requested item does not use the difference in names as a way of distinguishing components, but uses the overall technical difference of the components as the criterion for distinguishing. In the entire manual and request items The "include" mentioned in is an open term, so it should be interpreted as "include but not limited to". Furthermore, the term "coupling" here includes any direct and indirect connection means. Therefore, if it is described that a first device is coupled to a second device, it means that the first device can be directly connected to the second device, or can be indirectly connected to the second device through other devices or other connection means.
請參閱第一A圖,其為本發明之內嵌式觸控面板與驅動電路之實施例的示意圖。如圖所示,驅動電路驅動內嵌式觸控面板30,驅動電路包含一閘極驅動電路10與一源極驅動電路20。內嵌式觸控面板30的驅動模式可以分為long-H及long-V,如第一B圖所示,其為本發明之閘極驅動電路之驅動模式之實施例的示意圖,如第一B圖右側所示long-H模式是將觸控偵測的掃描(即一觸控偵測期間)穿插在閘極線掃描(即一顯示期間)之間,而如第一B圖左側所示long-V模式是將觸控偵測的掃描(即觸控偵測期間)設定在閘極線掃描(即顯示期間)完畢後。此外,實施例選擇以long-H模式的內嵌式觸控面板30作為說明態樣。
Please refer to FIG. 1A, which is a schematic diagram of an embodiment of the in-cell touch panel and driving circuit of the present invention. As shown in the figure, the driving circuit drives the in-
復參閱第一A圖,閘極驅動電路10經由複數閘極線輸出複數閘極訊號G[1]、G[2]、G[3]...G[n]、G[n+m]至內嵌式觸控面板30,其中,閘極訊號G[1]...G[n+m]是一輸出脈衝。源極驅動電路20經由複數源極線輸出複數源極訊號S[1]、S[2]、S[3]...S[n]、S[n+m]至內嵌式觸控面板30。請參閱第一C圖,其為本發明之閘極驅動電路之long-H驅動模式之實施例的時序圖。如圖所示,該些閘極訊G[1]、G[2]...G[72]、G[73]、G[74]...G[160]、G[161]、G[162]...G[688]、G[689]、G[690]、G[n]依序為一高準位(即脈衝訊號),而且每一畫面期間Frame N、Frame N+1可以包含有複數顯示期間,且該些顯示期間包含N段的觸控偵測期間,其中,觸控偵測期間標示為Touch#1、Touch#2、Touch#8,剩餘時間為顯示期間。所以,閘極驅動電路10產生該些閘極訊號G[1]~G[72]掃描內嵌式觸動面板30,且於閘極
訊號G[72]從高準位轉變為低準位時,進入觸控偵測期間Touch#1。觸控偵測期間Touch#1結束後,閘極訊號G[73]~G[160]依序為脈衝訊號,之後再進入下一個觸控偵測期間Touch#2。同理,於該些閘極訊號G[161]~G[688]為低準位期間可以再選擇一時間進入下一個觸控偵測期間Touch#8,如此,該些觸控偵測期間Touch#1、Touch#2、Touch#8穿插於該些顯示期間之間。此外,本發明於觸控偵測期間Touch#1、Touch#2、Touch#8可以達到降低漏電流的效果,其說明如後。
Referring to Figure 1A again, the
請參閱第二圖,其為本發明之閘極驅動電路之第一實施例的電路圖。如圖所示,閘極驅動電路10包含一上拉控制電路11、一下拉控制電路13與一上拉電路15。上拉控制電路11耦接上拉電路15的一上拉控制端C1,並控制上拉控制端C1的一上拉控制電位An。上拉控制電路11包含一輸入端、一輸出端與一控制端,其中,輸入端耦接一供應電壓VDD,輸出端輸出供應電壓VDD,控制端耦接一閘極訊號G[n-2]。如此,上拉控制電路11輸出供應電壓VDD至上拉電路15的上拉控制端C1,而提升上拉控制電位An。此外,上拉控制電路11可以是一電晶體M1。
Please refer to the second figure, which is a circuit diagram of the first embodiment of the gate drive circuit of the present invention. As shown in the figure, the
下拉控制電路13耦接上拉控制電路11與上拉電路15,及下拉控制電路13包含一參考電位端Vref。再者,下拉控制電路13更包含一輸出端與一控制端,其中,輸出端耦接上拉控制電位An,控制端耦接一閘極訊號G[n+3]。此外,下拉控制電路13可以是一電晶體M3。下拉控制電路13的參考電位端Vref耦接一第一參考訊號VSS1或一第二參考訊號VSS2。第二參考訊號VSS2的電壓準位高於第一參考訊號VSS1的電壓準位。如此,為了減少上拉控制電位An因經由下拉控制電路13發生漏電流的現象,可以控制下拉控制電路13的輸出端與參考電位端Vref之間的電壓差。換言之,於顯示期間為使上拉電路15的上拉控制電位An夠
高,控制下拉控制電路13的參考電位端Vref耦接第一參考訊號VSS1,而為第一參考訊號VSS1的電壓準位,以輸出正常的一閘極訊號G[n]。於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8),為減少下拉控制電路13的輸出端與參考電位端Vref之間的電壓差,控制下拉控制電路13的參考電位端Vref耦接第二參考訊號VSS2,而為第二參考訊號VSS2的電壓準位。此外,上拉電路15包含一電晶體M2,及上拉電路15包含一輸入端、一上拉輸出端VOUT與上拉控制端C1,其中,輸入端耦接一時脈訊號CLK1,上拉輸出端VOUT輸出閘極訊號G[n],上拉控制端C1耦接上拉控制訊號。此外,上拉電路15可以是一電晶體M2,而用於傳輸起始訊號。
The pull-
復參閱第二圖,閘極驅動電路10包含一預先重置電路17,其包含一輸入端、一輸出端與一控制端,其中,輸入端耦接第一參考訊號VSS1,輸出端耦接上拉電路15的上拉控制端C1,控制端耦接一預先重置訊號Pre-Rst。此外,預先重置電路17包含一電晶體M14,其於一個顯示畫面開始前後時重置上拉控制電位An至低準位。如此,預先重置電路17可以依據預先重置訊號Pre-Rst,而重置上拉控制端C1的上拉控制電位An,於第二圖實施例上拉控制電位An是重置為第一參考訊號VSS1的電壓準位。換言之,於顯示期間與觸控偵測期間(如第一C圖之Touch#1、Touch#2與Touch#8),預先重置電路17重置上拉控制電位An為第一參考訊號VSS1的電壓準位。
Referring back to the second figure, the
閘極驅動電路10包含一抗雜訊電路19,其耦接於第一參考訊號VSS1與上拉控制訊號(上拉控制電位An)之間。抗雜訊電路19可以為多級閘極驅動電路共用,並達到減少閘極線雜訊的效果,如第二圖實施例可以由第n極閘極驅動電路與第n+1極閘極驅動電路共用。再者,抗雜訊電路19包含複數切換元件,
且該每一切換元件分別提供不同電流路徑。該些切換元件可以是複數電晶體M6、M8,電晶體M6耦接於第一參考訊號VSS1與第n閘極驅動電路的上拉控制訊號(上拉控制電位An)之間,電晶體M8耦接於第一參考訊號VSS1與第n+1閘極驅動電路的上拉控制訊號(上拉控制電位An+1)之間。所以,每一級閘極驅動電路耦接抗雜訊電路19的單一切換元件。再者,該些電晶體M6、M8的控制端可以由適合的控制訊號控制,實施例皆未限制控制各電晶體的電路。
The
請參閱第三圖,其為本發明之閘極驅動電路之第二實施例的電路圖。如圖所示,當電晶體的一跨壓Vds較大時,上拉控制電位An容易經由電晶體發生漏電現象,所以降低跨壓Vds的電壓準位可以減少漏電流的現象,其中,跨壓Vds是指電晶體輸入與輸出間的跨壓。如此,除了第二圖實施例中下拉控制電路13的參考電位端Vref提升至第二參考訊號VSS2的電壓準位外,預先重置電路17亦可以在顯示期間與觸控偵測期間耦接不同電壓準位的參考訊號,於第三圖實施例是顯示期間耦接第一參考訊號VSS1,觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)耦接第二參考訊號VSS2。換言之,於顯示期間,預先重置電路17重置上拉控制電位An為第一參考訊號VSS1的電壓準位,於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8),預先重置電路17重置上拉控制電位An為第二參考訊號VSS2的電壓準位。所以,該些電晶體M3、M14的跨壓Vds於觸控偵測期間可以降低,而減少上拉控制電位An的降低,避免顯示品質降低。惟,第三圖實施例的該些電晶體M3、M14可以依據減少漏電流的程度,而選擇性降低跨壓Vds,實施例未限制該些電晶體M3、M14皆須降低跨壓Vds的電壓準位,同理上拉控制電位An可以選擇性於該些觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)之一重置為第二參考訊號VSS2的電壓準位。
Please refer to the third figure, which is a circuit diagram of the second embodiment of the gate drive circuit of the present invention. As shown in the figure, when a cross voltage Vds of the transistor is large, the pull-up control potential An is likely to cause leakage through the transistor. Therefore, reducing the voltage level of the cross voltage Vds can reduce the leakage current phenomenon. Vds refers to the voltage across the input and output of the transistor. In this way, in addition to raising the reference potential terminal Vref of the pull-
請參閱第四圖,其為本發明之閘極驅動電路之第三實施例的電路圖。如圖所示,抗雜訊電路19的該些切換元件可以從第二圖與第三圖的實施方式,改為第四圖所繪該些切換元件之至少兩切換元件相互串聯,實施例中切換元件串聯連數量可以是兩個或三個以上。如此,該些切換元件之至少兩切換元件串聯於上拉電路15與第一參考訊號VSS1之間,即針對每一級閘極驅動電路的抗雜訊,改串聯兩顆電晶體M6、M16、M8、M15。於第四圖是電晶體M8至第一參考訊號VSS1的路徑上串聯一電晶體M15,及電晶體M6至第一參考訊號VSS1的路徑上串聯一電晶體M16。如此,降低該些電晶體M6、M8的跨壓Vds,且在保持抗雜訊電路19的工作週期(duty)100%的同時,有效減緩該些電晶體M6、M8發生漏電流的效果。再者,下拉控制電路13的參考電位端Vref僅耦接第一參考訊號VSS1,所以於顯示期間與於觸控偵測期間皆是耦接第一參考訊號VSS1。
Please refer to FIG. 4, which is a circuit diagram of the third embodiment of the gate drive circuit of the present invention. As shown in the figure, the switching elements of the
請參閱第五圖,其為本發明之閘極驅動電路之第四實施例的電路圖。如圖所示,抗雜訊電路19包含串聯的該些電晶體M6、M16與串聯的該些電晶體M8、M15而降低漏電流的程度。再者,第五圖實施例更可以搭配下拉控制電路13的電晶體M3降低跨壓Vds,如此,電晶體M3於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)耦接第二參考訊號VSS2,及預先重置電路17的電晶體M14降低跨壓Vds,如此,電晶體M14於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)耦接第二參考訊號VSS2。此外,於顯示期間,上拉電路15需提升閘極訊號G[n]的準位,所以下拉控制電路13耦接第一參考訊號VSS1,而使上拉控制電位An提升。
Please refer to FIG. 5, which is a circuit diagram of the fourth embodiment of the gate drive circuit of the present invention. As shown in the figure, the
請參閱第六圖,其為本發明之閘極驅動電路之第五實施例的電路圖。如圖所示,閘極驅動電路包含一儲能元件CTH,其耦接於上拉電路15的上拉
控制端C1與上拉輸出端VOUT之間,其中,儲能元件CTH可以是一電容器。如此,因儲能元件CTH的特性,可以增加上拉控制端C1(An節點)的電容值,而增加上拉控制電位An的抬升量,並且可以降低上拉控制電位An的下降斜率,即減緩上拉控制電位An的漏電流速度。
Please refer to Figure 6, which is a circuit diagram of the fifth embodiment of the gate drive circuit of the present invention. As shown in the figure, the gate drive circuit includes an energy storage element CTH, which is coupled to the pull-up of the pull-up
請參閱第七圖,其為本發明之閘極驅動電路之第六實施例的電路圖。如圖所示,除了如第六圖利用儲能元件CTH的特性而減緩漏電流的速度外,更可以參考第二圖至第五圖實施例的技術內容,將下拉控制電路13與預先重置電路17於顯示期間與觸控偵測期間耦接不同電壓準位的參考訊號,而控制電壓差對漏電流的影響。即於顯示期間,電晶體M3、M14耦接於上拉電路15與第一參考訊號VSS1之間。於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8),電晶體M3、M14耦接於上拉電路15與第二參考訊號VSS2之間。
Please refer to FIG. 7, which is a circuit diagram of the sixth embodiment of the gate drive circuit of the present invention. As shown in the figure, in addition to using the characteristics of the energy storage element CTH to slow down the leakage current as shown in the sixth figure, you can also refer to the technical content of the second to fifth embodiments to combine the pull-
請參閱第八圖,其為本發明之上拉控制電位的變化之實施例的模擬圖。如圖所示,顯示上拉控制電位An於高溫環境(例如85℃)下的變化,且上拉控制電位An可以經由上述不同實施例減緩漏電流的影響。因此,可以比較上拉控制電位An的準位於高溫環境下在一般無改善漏電流(如An(0))與本發明不同實施例(如An(1)、An(2)、An(3)、An(4))的差異。由第八圖實施例可知,初始的上拉控制電位An差異不大,而進入觸控偵測期間後,因上拉控制電路13、預先重置電路17或/及抗雜訊電路19的漏電流路徑,導致上拉控制電位An逐漸降低。首先,在一般無改善漏電流下,假設初始的上拉控制電位An為12.78V,而在進入觸控偵測期間後,上拉控制電位An逐漸降低至-2.16V,換言之,上拉控制電位An因漏電流的影響而降低14.94V。再者,第三圖實施例的上拉控制電位An(1),在顯示期間的初始準位假設為12.79V,而在進入觸控偵測期間後,上拉控制電位An(1)
逐漸降低至1.29V,換言之,上拉控制電位An(1)因漏電流的影響而降低11.49V,即第二圖實施例確實改善上拉控制電位An(1)因漏電流而降低的幅度。
Please refer to the eighth figure, which is a simulation diagram of the embodiment of the change of the pull-up control potential of the present invention. As shown in the figure, the change of the pull-up control potential An under a high temperature environment (for example, 85° C.) is shown, and the pull-up control potential An can reduce the influence of the leakage current through the above-mentioned different embodiments. Therefore, it can be compared with the different embodiments of the present invention (such as An(1), An(2), An(3)) that the pull-up control potential An is located in a high-temperature environment without improving the leakage current (such as An(0)). , An(4)). It can be seen from the embodiment in FIG. 8 that the initial pull-up control potential An is not much different, and after entering the touch detection period, due to the leakage of the pull-up
復參閱第八圖,於第四圖實施例的上拉控制電位An(2),在顯示期間的初始準位假設為13.30V,而在進入觸控偵測期間後,上拉控制電位An(2)逐漸降低至5.03V,換言之,上拉控制電位An(2)因漏電流的影響而降低8.27V,即第四圖實施例同樣可以改善上拉控制電位An(2)因漏電流而降低的幅度。於第五圖實施例的上拉控制電位An(3),在顯示期間的初始準位假設為13.30V,而在進入觸控偵測期間後,上拉控制電位An(3)逐漸降低至8.67V,換言之,上拉控制電位An(3)因漏電流的影響而降低4.63V,即閘極驅動電路10包含第三圖實施與第四圖實施例的實施方式時漏電流更小,所以上拉控制電位An(3)的準位於顯示期間與觸控偵測期間的差異更小。於第七圖實施例的上拉控制電位An(4),在顯示期間的初始準位假設為13.28V,而在進入觸控偵測期間後,上拉控制電位An(4)逐漸降低至9.41V,換言之,上拉控制電位An(4)因漏電流的影響而降低3.87V,即第七圖實施例的閘極驅動電路10相比於其他實施例的方式,能更有效控制上拉控制電位An(4)的下降斜率。
Referring again to the eighth figure, the pull-up control potential An(2) of the embodiment in the fourth figure is assumed to be 13.30V at the initial level during the display period, and after entering the touch detection period, the pull-up control potential An( 2) Gradually reduce to 5.03V, in other words, the pull-up control potential An(2) is reduced by 8.27V due to the leakage current, that is, the embodiment in the fourth figure can also improve the pull-up control potential An(2) due to the leakage current. Amplitude. In the embodiment of the fifth figure, the pull-up control potential An(3) is assumed to be 13.30V at the initial level during the display period. After entering the touch detection period, the pull-up control potential An(3) gradually decreases to 8.67 V, in other words, the pull-up control potential An(3) is reduced by 4.63V due to the influence of the leakage current, that is, the
綜上所述,本發明提供一種閘極驅動電路,其包含上拉電路、上拉控制電路與下拉控制電路。上拉電路包含上拉控制端及輸出閘極訊號。上拉控制電路耦接上拉控制端並控制上拉控制端的上拉控制電位。下拉控制電路包含參考電位端及耦接上拉控制電路與上拉電路。閘極驅動電路更包含預先重置電路或儲能元件。參考電位端及/或預先重置電路於顯示期間與觸控偵測期間耦接第一參考訊號,或者,於顯示期間耦接第一參考訊號而於觸控偵測期間耦接第二參考訊號。第二參考訊號的電壓準位高於第一參考訊號的電壓準位。如此,閘極 驅動電路應用於內嵌式觸控結構,並降低漏電流,使輸出脈衝可以有效控制像素電晶體。 In summary, the present invention provides a gate drive circuit, which includes a pull-up circuit, a pull-up control circuit, and a pull-down control circuit. The pull-up circuit includes a pull-up control terminal and an output gate signal. The pull-up control circuit is coupled to the pull-up control terminal and controls the pull-up control potential of the pull-up control terminal. The pull-down control circuit includes a reference potential terminal and is coupled to the pull-up control circuit and the pull-up circuit. The gate drive circuit further includes a pre-reset circuit or energy storage element. The reference potential terminal and/or the pre-reset circuit are coupled to the first reference signal during the display period and the touch detection period, or, the first reference signal is coupled during the display period and the second reference signal is coupled during the touch detection period . The voltage level of the second reference signal is higher than the voltage level of the first reference signal. So, the gate The driving circuit is applied to the in-cell touch control structure and reduces the leakage current, so that the output pulse can effectively control the pixel transistor.
11:上拉控制電路 11: Pull-up control circuit
13:下拉控制電路 13: Pull-down control circuit
15:上拉電路 15: pull-up circuit
17:預先重置電路 17: Pre-reset circuit
19:抗雜訊電路 19: Anti-noise circuit
An:上拉控制電位 An: Pull up control potential
An+1:上拉控制電位 An+1: Pull up the control potential
C1:上拉控制端 C1: Pull up the control terminal
CLK1:時脈訊號 CLK1: Clock signal
G[n-2]:閘極訊號 G[n-2]: Gate signal
G[n]:閘極訊號 G[n]: Gate signal
G[n+3]:閘極訊號 G[n+3]: Gate signal
M1:電晶體 M1: Transistor
M2:電晶體 M2: Transistor
M3:電晶體 M3: Transistor
M4:電晶體 M4: Transistor
M6:電晶體 M6: Transistor
M8:電晶體 M8: Transistor
M14:電晶體 M14: Transistor
Pre-Rst:預先重置訊號 Pre-Rst: Pre-reset signal
VDD:供應電壓 VDD: supply voltage
VOUT:上拉輸出端 VOUT: pull-up output
Vref:參考電位端 Vref: Reference potential terminal
VSS1:第一參考訊號 VSS1: The first reference signal
VSS2:第二參考訊號 VSS2: The second reference signal
Claims (14)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW109122931A TWI742752B (en) | 2020-07-07 | 2020-07-07 | Gate driving circuit of display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW109122931A TWI742752B (en) | 2020-07-07 | 2020-07-07 | Gate driving circuit of display panel |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI742752B true TWI742752B (en) | 2021-10-11 |
TW202203182A TW202203182A (en) | 2022-01-16 |
Family
ID=80782564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW109122931A TWI742752B (en) | 2020-07-07 | 2020-07-07 | Gate driving circuit of display panel |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI742752B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115512672A (en) * | 2022-10-25 | 2022-12-23 | 业成科技(成都)有限公司 | Scan driving circuit and operating method thereof |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104332144A (en) * | 2014-11-05 | 2015-02-04 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and gate drive circuit thereof |
CN104505036A (en) * | 2014-12-19 | 2015-04-08 | 深圳市华星光电技术有限公司 | Gate driver circuit |
CN104952409A (en) * | 2015-07-07 | 2015-09-30 | 京东方科技集团股份有限公司 | Gate drive unit, drive method of gate drive unit, gate drive circuit and display device |
US20160365054A1 (en) * | 2015-02-02 | 2016-12-15 | Boe Technology Group Co., Ltd. | Shift register unit, related gate driver and display apparatus, and method for driving the same |
CN106531121A (en) * | 2017-01-23 | 2017-03-22 | 京东方科技集团股份有限公司 | Grid driving unit and driving method thereof, grid driving circuit and display apparatus |
CN107945762A (en) * | 2018-01-03 | 2018-04-20 | 京东方科技集团股份有限公司 | Shift register cell and its driving method, gate driving circuit and display device |
CN108364601A (en) * | 2018-03-07 | 2018-08-03 | 京东方科技集团股份有限公司 | A kind of shift register, gate driving circuit and display device |
CN109147637A (en) * | 2017-06-15 | 2019-01-04 | 乐金显示有限公司 | Shift register and display device including it |
US20190073932A1 (en) * | 2017-03-10 | 2019-03-07 | Boe Technology Group Co., Ltd. | Shift register unit, driving method thereof, gate driving circuit and display device |
TW202018688A (en) * | 2018-07-31 | 2020-05-16 | 南韓商Lg顯示器股份有限公司 | Gate driver and electroluminescence display device using the same |
-
2020
- 2020-07-07 TW TW109122931A patent/TWI742752B/en active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104332144A (en) * | 2014-11-05 | 2015-02-04 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and gate drive circuit thereof |
CN104505036A (en) * | 2014-12-19 | 2015-04-08 | 深圳市华星光电技术有限公司 | Gate driver circuit |
US20160365054A1 (en) * | 2015-02-02 | 2016-12-15 | Boe Technology Group Co., Ltd. | Shift register unit, related gate driver and display apparatus, and method for driving the same |
CN104952409A (en) * | 2015-07-07 | 2015-09-30 | 京东方科技集团股份有限公司 | Gate drive unit, drive method of gate drive unit, gate drive circuit and display device |
CN106531121A (en) * | 2017-01-23 | 2017-03-22 | 京东方科技集团股份有限公司 | Grid driving unit and driving method thereof, grid driving circuit and display apparatus |
US20190073932A1 (en) * | 2017-03-10 | 2019-03-07 | Boe Technology Group Co., Ltd. | Shift register unit, driving method thereof, gate driving circuit and display device |
CN109147637A (en) * | 2017-06-15 | 2019-01-04 | 乐金显示有限公司 | Shift register and display device including it |
CN107945762A (en) * | 2018-01-03 | 2018-04-20 | 京东方科技集团股份有限公司 | Shift register cell and its driving method, gate driving circuit and display device |
CN108364601A (en) * | 2018-03-07 | 2018-08-03 | 京东方科技集团股份有限公司 | A kind of shift register, gate driving circuit and display device |
TW202018688A (en) * | 2018-07-31 | 2020-05-16 | 南韓商Lg顯示器股份有限公司 | Gate driver and electroluminescence display device using the same |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115512672A (en) * | 2022-10-25 | 2022-12-23 | 业成科技(成都)有限公司 | Scan driving circuit and operating method thereof |
CN115512672B (en) * | 2022-10-25 | 2023-10-27 | 业成科技(成都)有限公司 | Scan driving circuit and operation method thereof |
Also Published As
Publication number | Publication date |
---|---|
TW202203182A (en) | 2022-01-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP3151235B1 (en) | Shift register, gate integrated drive circuit, and display screen | |
EP3125250B1 (en) | Gate driving circuit and driving method therefor and display device | |
WO2019161669A1 (en) | Gate drive circuit, touch display device, and driving method | |
TWI625710B (en) | Gate driving circuit and display device using the same | |
JP5079350B2 (en) | Shift register circuit | |
JP5128102B2 (en) | Shift register circuit and image display apparatus including the same | |
CN102629444B (en) | Circuit of gate drive on array, shift register and display screen | |
JP5504313B2 (en) | Shift register driving method | |
JP4990034B2 (en) | Shift register circuit and image display apparatus including the same | |
CN105118473B (en) | Shift register cell, shift register and driving method, array base palte | |
US8957882B2 (en) | Gate drive circuit and display apparatus having the same | |
WO2017121144A1 (en) | Shift register unit and drive method thereof, gate drive circuit, and touch display apparatus | |
WO2016206271A1 (en) | Shift register unit, drive method therefor, gate drive circuit, and display device | |
WO2018133382A1 (en) | Touch-control electronic device, touch control display apparatus and array substrate gate drive circuit | |
WO2018209937A1 (en) | Shift register, drive method thereof, gate drive circuit, and display device | |
WO2020098309A1 (en) | Shift register and drive method therefor, gate drive circuit, array substrate, and display device | |
CN108766340A (en) | Shift register cell and its driving method, gate driving circuit and display device | |
US20190129562A1 (en) | Compensation circuit, gate driving unit, gate driving circuit, driving methods thereof and display device | |
KR20070121071A (en) | Gate driving circuit and display apparatus having the same | |
KR101451090B1 (en) | Gate driver circuit for generating stable output signal using two clocks | |
CN110264937B (en) | Gate drive circuit, test method thereof and display device | |
US20190180671A1 (en) | Gate driver circuit | |
US7342576B2 (en) | Driving circuit of liquid crystal display | |
CN108766381A (en) | A kind of shift-register circuit, array substrate and display device | |
AU2017394369B2 (en) | Shift register circuit, goa circuit, and display apparatus and driving method therefor |