TW202203182A - Gate driving circuit of display panel - Google Patents

Gate driving circuit of display panel Download PDF

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TW202203182A
TW202203182A TW109122931A TW109122931A TW202203182A TW 202203182 A TW202203182 A TW 202203182A TW 109122931 A TW109122931 A TW 109122931A TW 109122931 A TW109122931 A TW 109122931A TW 202203182 A TW202203182 A TW 202203182A
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pull
circuit
control
reference signal
coupled
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TW109122931A
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TWI742752B (en
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鍾佩芳
周凱茹
陳辰恩
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凌巨科技股份有限公司
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Abstract

The invention provides a gate driving circuit, which includes a pull-up circuit, a pull-up control circuit and a pull-down control circuit. The pull-up circuit includes a pull-up control terminal and outputs a gate signal. The pull-up control circuit is coupled to the pull-up control terminal and controls a pull-up control electrical potential of the pull-up control terminal. The pull-down control circuit includes a reference electrical potential terminal and is coupled to the pull-up control circuit and the pull-up circuit. The gate driving circuit further includes a pre-reset circuit and/or an energy storage element. The reference electrical potential terminal and/or the pre-reset circuit is/are coupled to a first reference signal during a period of displaying and a period of touching and detecting. Alternatively, they are coupled to the first reference signal during a period of displaying and coupled to a second reference signal during a period of touching and detecting. The voltage level of second reference signal is higher than the voltage level of first reference signal.

Description

顯示面板之閘極驅動電路Gate drive circuit of display panel

本發明關於一種驅動電路,尤其是一種顯示面板之閘極驅動電路。The present invention relates to a driving circuit, in particular to a gate driving circuit of a display panel.

隨著系統整合式玻璃面板(SOG, System-on-Glass)的概念被陸續提出,近來許多產品將顯示器驅動電路中的閘極掃描驅動電路(Gate driver或Scan driver)整合在玻璃上,即為GOA(Gate-Driver-on-Array)電路。再者,觸控與顯示的整合技術中包含In cell與on cell兩種內嵌式結構。In cell的內嵌式觸控技術為將觸控感應層製作於顯示面板的陣列基板,並將顯示面板原有作為顯示用的上電極(Vcom)層切割,並作為觸控感應層。而且,In cell相較於on cell的內嵌式觸控技術可減少製程道數且較為輕薄。With the concept of system-on-glass (SOG, System-on-Glass) being put forward one after another, many products have recently integrated the gate scan driver circuit (Gate driver or Scan driver) in the display driver circuit on the glass, that is, GOA (Gate-Driver-on-Array) circuit. Furthermore, the integration technology of touch and display includes two in-cell structures, in cell and on cell. In cell's in-cell touch technology is to fabricate the touch sensing layer on the array substrate of the display panel, and cut the upper electrode (Vcom) layer originally used for display on the display panel, and use it as the touch sensing layer. Moreover, compared with the on-cell in-cell touch technology, the in-cell can reduce the number of process passes and is lighter and thinner.

然而,將GOA電路應用於內嵌式觸控技術,會面臨電晶體漏電的問題。故,設計符合內嵌式觸控結構的GOA電路成為內嵌式觸控技術的發展目標。However, applying the GOA circuit to the in-cell touch technology will face the problem of transistor leakage. Therefore, designing a GOA circuit conforming to the in-cell touch structure has become the development goal of in-cell touch technology.

本發明之目的,在於提供一種顯示面板之閘極驅動電路,其應用於內嵌式觸控結構並降低漏電流,使輸出脈衝可以有效控制像素電晶體。The purpose of the present invention is to provide a gate drive circuit of a display panel, which is applied to an in-cell touch structure and reduces leakage current, so that the output pulse can effectively control the pixel transistor.

本發明提供一種閘極驅動電路,其包含一上拉電路、一上拉控制電路、一下拉控制電路與一預先重置電路。上拉電路包含一上拉控制端及輸出一閘極訊號。上拉控制電路耦接上拉電路的上拉控制端,並控制上拉控制端的一上拉控制電位。下拉控制電路耦接上拉控制電路與上拉電路,及下拉控制電路包含一參考電位端,其中,參考電位端於一顯示期間耦接一第一參考訊號,參考電位端於一觸控偵測期間耦接一第二參考訊號,第二參考訊號的電壓準位高於第一參考訊號的電壓準位。預先重置電路耦接上拉電路的上拉控制端,並重置上拉控制端的上拉控制電位。The invention provides a gate driving circuit, which includes a pull-up circuit, a pull-up control circuit, a pull-down control circuit and a pre-reset circuit. The pull-up circuit includes a pull-up control terminal and outputs a gate signal. The pull-up control circuit is coupled to the pull-up control terminal of the pull-up circuit, and controls a pull-up control level of the pull-up control terminal. The pull-down control circuit is coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, wherein the reference potential terminal is coupled to a first reference signal during a display period, and the reference potential terminal is used for a touch detection A second reference signal is coupled during the period, and the voltage level of the second reference signal is higher than that of the first reference signal. The pre-reset circuit is coupled to the pull-up control terminal of the pull-up circuit, and resets the pull-up control potential of the pull-up control terminal.

本發明提供一種閘極驅動電路,其包含一上拉電路、一上拉控制電路、一下拉控制電路與一抗雜訊電路。上拉電路包含一上拉控制端及輸出一閘極訊號。上拉控制電路耦接上拉電路的上拉控制端,並控制上拉控制端的一上拉控制電位。下拉控制電路耦接上拉控制電路與上拉電路,及下拉控制電路包含一參考電位端,參考電位端於一顯示期間耦接一第一參考訊號。抗雜訊電路包含複數切換元件,該些切換元件之至少兩切換元件串聯於上拉電路與第一參考訊號之間。The invention provides a gate driving circuit, which includes a pull-up circuit, a pull-up control circuit, a pull-down control circuit and an anti-noise circuit. The pull-up circuit includes a pull-up control terminal and outputs a gate signal. The pull-up control circuit is coupled to the pull-up control terminal of the pull-up circuit, and controls a pull-up control level of the pull-up control terminal. The pull-down control circuit is coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, and the reference potential terminal is coupled to a first reference signal during a display period. The anti-noise circuit includes a plurality of switching elements, and at least two switching elements of the switching elements are connected in series between the pull-up circuit and the first reference signal.

本發明提供一種閘極驅動電路,其包含一上拉電路、一上拉控制電路、一下拉控制電路、一儲能元件與一預先重置電路。上拉電路包含一上拉控制端、一上拉輸出端及輸出一閘極訊號。上拉控制電路耦接上拉電路的上拉控制端,並控制上拉控制端的一上拉控制電位。下拉控制電路耦接上拉控制電路與上拉電路,及下拉控制電路包含一參考電位端,參考電位端於一顯示期間耦接一第一參考訊號。儲能元件耦接於上拉電路的上拉控制端與上拉輸出端之間。預先重置電路耦接上拉電路的上拉控制端,並重置上拉控制端的上拉控制電位。The invention provides a gate driving circuit, which includes a pull-up circuit, a pull-up control circuit, a pull-down control circuit, an energy storage element and a pre-reset circuit. The pull-up circuit includes a pull-up control terminal, a pull-up output terminal and an output gate signal. The pull-up control circuit is coupled to the pull-up control terminal of the pull-up circuit, and controls a pull-up control level of the pull-up control terminal. The pull-down control circuit is coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, and the reference potential terminal is coupled to a first reference signal during a display period. The energy storage element is coupled between the pull-up control end and the pull-up output end of the pull-up circuit. The pre-reset circuit is coupled to the pull-up control terminal of the pull-up circuit, and resets the pull-up control potential of the pull-up control terminal.

在說明書及請求項當中使用了某些詞彙指稱特定的元件,然,所屬本發明技術領域中具有通常知識者應可理解,製造商可能會用不同的名詞稱呼同一個元件,而且,本說明書及請求項並不以名稱的差異作為區分元件的方式,而是以元件在整體技術上的差異作為區分的準則。在通篇說明書及請求項當中所提及的「包含」為一開放式用語,故應解釋成「包含但不限定於」。再者,「耦接」一詞在此包含任何直接及間接的連接手段。因此,若文中描述一第一裝置耦接一第二裝置,則代表第一裝置可直接連接第二裝置,或可透過其他裝置或其他連接手段間接地連接至第二裝置。Certain terms are used in the description and claims to refer to specific elements. However, those with ordinary knowledge in the technical field of the present invention should understand that manufacturers may use different terms to refer to the same element. The claim does not take the difference in name as a way of distinguishing elements, but takes the difference in the overall technology of the elements as a criterion for distinguishing. The "comprising" mentioned throughout the specification and claims is an open-ended term, so it should be interpreted as "including but not limited to". Furthermore, the term "coupled" herein includes any direct and indirect means of connection. Therefore, if a first device is described as being coupled to a second device, it means that the first device can be directly connected to the second device, or can be indirectly connected to the second device through other devices or other connecting means.

請參閱第一A圖,其為本發明之內嵌式觸控面板與驅動電路之實施例的示意圖。如圖所示,驅動電路驅動內嵌式觸控面板30,驅動電路包含一閘極驅動電路10與一源極驅動電路20。內嵌式觸控面板30的驅動模式可以分為long-H 及 long-V,如第一B圖所示,其為本發明之閘極驅動電路之驅動模式之實施例的示意圖,如第一B圖右側所示long-H模式是將觸控偵測的掃描(即一觸控偵測期間)穿插在閘極線掃描(即一顯示期間)之間,而如第一B圖左側所示long-V模式是將觸控偵測的掃描(即觸控偵測期間)設定在閘極線掃描(即顯示期間)完畢後。此外,實施例選擇以long-H模式的內嵌式觸控面板30作為說明態樣。Please refer to FIG. 1 A, which is a schematic diagram of an embodiment of an in-cell touch panel and a driving circuit of the present invention. As shown in the figure, the driving circuit drives the in-cell touch panel 30 , and the driving circuit includes a gate driving circuit 10 and a source driving circuit 20 . The driving modes of the in-cell touch panel 30 can be divided into long-H and long-V. As shown in Figure B, which is a schematic diagram of an embodiment of the driving mode of the gate driving circuit of the present invention, as shown in Figure 1 The long-H mode shown on the right side of Figure B intersperses the scan of the touch detection (ie a touch detection period) between the gate line scans (ie a display period), as shown on the left side of the first Figure B In the long-V mode, the scan of the touch detection (ie, the touch detection period) is set after the gate line scan (ie, the display period) is completed. In addition, the embodiment selects the in-cell touch panel 30 in the long-H mode as an illustration aspect.

復參閱第一A圖,閘極驅動電路10經由複數閘極線輸出複數閘極訊號G[1]、G[2]、G[3]…G[n]、G[n+m]至內嵌式觸控面板30,其中,閘極訊號G[1]…G[n+m]是一輸出脈衝。源極驅動電路20經由複數源極線輸出複數源極訊號S[1]、S[2]、S[3]…S[n]、S[n+m]至內嵌式觸控面板30。請參閱第一C圖,其為本發明之閘極驅動電路之long-H驅動模式之實施例的時序圖。如圖所示,該些閘極訊G[1]、G[2]…G[72]、G[73]、G[74]…G[160]、G[161]、G[162]…G[688]、G[689]、G[690]、G[n]依序為一高準位(即脈衝訊號),而且每一畫面期間Frame N、Frame N+1可以包含有複數顯示期間,且該些顯示期間包含N段的觸控偵測期間,其中,觸控偵測期間標示為Touch#1、Touch#2、Touch#8,剩餘時間為顯示期間。所以,閘極驅動電路10產生該些閘極訊號G[1]~G[72]掃描內嵌式觸動面板30,且於閘極訊號G[72]從高準位轉變為低準位時,進入觸控偵測期間Touch#1。觸控偵測期間Touch#1結束後,閘極訊號G[73]~G[160]依序為脈衝訊號,之後再進入下一個觸控偵測期間Touch#2。同理,於該些閘極訊號G[161]~G[688]為低準位期間可以再選擇一時間進入下一個觸控偵測期間Touch#8,如此,該些觸控偵測期間Touch#1、Touch#2、Touch#8穿插於該些顯示期間之間。此外,本發明於觸控偵測期間Touch#1、Touch#2、Touch#8可以達到降低漏電流的效果,其說明如後。Referring back to Figure 1A, the gate driving circuit 10 outputs the complex gate signals G[1], G[2], G[3]...G[n], G[n+m] through the complex gate lines to the In the embedded touch panel 30, the gate signals G[1]...G[n+m] are an output pulse. The source driving circuit 20 outputs the plurality of source signals S[1], S[2], S[3] . . . S[n], S[n+m] to the in-cell touch panel 30 through the plurality of source lines. Please refer to the first diagram C, which is a timing diagram of an embodiment of the long-H driving mode of the gate driving circuit of the present invention. As shown in the figure, the gate signals G[1], G[2]...G[72], G[73], G[74]...G[160], G[161], G[162]... G[688], G[689], G[690], G[n] are a high level in sequence (ie, a pulse signal), and each frame period Frame N, Frame N+1 can include multiple display periods , and the display periods include N segments of touch detection periods, wherein the touch detection periods are marked as Touch#1, Touch#2, and Touch#8, and the remaining time is the display period. Therefore, the gate driving circuit 10 generates the gate signals G[1]~G[72] to scan the in-cell touch panel 30, and when the gate signal G[72] changes from a high level to a low level, Enter Touch#1 during touch detection. After the touch detection period Touch#1 ends, the gate signals G[73]~G[160] are pulse signals in sequence, and then enter the next touch detection period Touch#2. Similarly, when the gate signals G[161]~G[688] are at low level, another time can be selected to enter the next touch detection period Touch#8. In this way, the touch detection period Touch#8 #1, Touch#2, and Touch#8 are interspersed between these display periods. In addition, the present invention can achieve the effect of reducing leakage current during the touch detection period Touch#1, Touch#2, and Touch#8, which will be described below.

請參閱第二圖,其為本發明之閘極驅動電路之第一實施例的電路圖。如圖所示,閘極驅動電路10包含一上拉控制電路11、一下拉控制電路13與一上拉電路15。上拉控制電路11耦接上拉電路15的一上拉控制端C1,並控制上拉控制端C1的一上拉控制電位An。上拉控制電路11包含一輸入端、一輸出端與一控制端,其中,輸入端耦接一供應電壓VDD,輸出端輸出供應電壓VDD,控制端耦接一閘極訊號G[n-2]。如此,上拉控制電路11輸出供應電壓VDD至上拉電路15的上拉控制端C1,而提升上拉控制電位An。此外,上拉控制電路11可以是一電晶體M1。Please refer to the second figure, which is a circuit diagram of the first embodiment of the gate driving circuit of the present invention. As shown in the figure, the gate driving circuit 10 includes a pull-up control circuit 11 , a pull-down control circuit 13 and a pull-up circuit 15 . The pull-up control circuit 11 is coupled to a pull-up control terminal C1 of the pull-up circuit 15 and controls a pull-up control potential An of the pull-up control terminal C1. The pull-up control circuit 11 includes an input terminal, an output terminal and a control terminal, wherein the input terminal is coupled to a supply voltage VDD, the output terminal outputs the supply voltage VDD, and the control terminal is coupled to a gate signal G[n-2] . In this way, the pull-up control circuit 11 outputs the supply voltage VDD to the pull-up control terminal C1 of the pull-up circuit 15 to raise the pull-up control potential An. In addition, the pull-up control circuit 11 may be a transistor M1.

下拉控制電路13耦接上拉控制電路11與上拉電路15,及下拉控制電路13包含一參考電位端Vref。再者,下拉控制電路13更包含一輸出端與一控制端,其中,輸出端耦接上拉控制電位An,控制端耦接一閘極訊號G[n+3]。此外,下拉控制電路13可以是一電晶體M3。下拉控制電路13的參考電位端Vref耦接一第一參考訊號VSS1或一第二參考訊號VSS2。第二參考訊號VSS2的電壓準位高於第一參考訊號VSS1的電壓準位。如此,為了減少上拉控制電位An因經由下拉控制電路13發生漏電流的現象,可以控制下拉控制電路13的輸出端與參考電位端Vref之間的電壓差。換言之,於顯示期間為使上拉電路15的上拉控制電位An夠高,控制下拉控制電路13的參考電位端Vref耦接第一參考訊號VSS1,而為第一參考訊號VSS1的電壓準位,以輸出正常的一閘極訊號G[n]。於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8),為減少下拉控制電路13的輸出端與參考電位端Vref之間的電壓差,控制下拉控制電路13的參考電位端Vref耦接第二參考訊號VSS2,而為第二參考訊號VSS2的電壓準位。此外,上拉電路15包含一電晶體M2,及上拉電路15包含一輸入端、一上拉輸出端VOUT與上拉控制端C1,其中,輸入端耦接一時脈訊號CLK1,上拉輸出端VOUT輸出閘極訊號G[n],上拉控制端C1耦接上拉控制訊號。此外,上拉電路15可以是一電晶體M2,而用於傳輸起始訊號。The pull-down control circuit 13 is coupled to the pull-up control circuit 11 and the pull-up circuit 15 , and the pull-down control circuit 13 includes a reference potential terminal Vref. Furthermore, the pull-down control circuit 13 further includes an output terminal and a control terminal, wherein the output terminal is coupled to the pull-up control potential An, and the control terminal is coupled to a gate signal G[n+3]. In addition, the pull-down control circuit 13 may be a transistor M3. The reference potential terminal Vref of the pull-down control circuit 13 is coupled to a first reference signal VSS1 or a second reference signal VSS2. The voltage level of the second reference signal VSS2 is higher than the voltage level of the first reference signal VSS1. In this way, in order to reduce the leakage current of the pull-up control potential An through the pull-down control circuit 13 , the voltage difference between the output terminal of the pull-down control circuit 13 and the reference potential terminal Vref can be controlled. In other words, in order to make the pull-up control potential An of the pull-up circuit 15 high enough during the display period, the reference potential terminal Vref of the control-pull-down control circuit 13 is coupled to the first reference signal VSS1 and is the voltage level of the first reference signal VSS1, To output a normal gate signal G[n]. During the touch detection period (such as Touch#1, Touch#2 or Touch#8 in the first picture C), in order to reduce the voltage difference between the output terminal of the pull-down control circuit 13 and the reference potential terminal Vref, the pull-down control circuit is controlled The reference potential terminal Vref of 13 is coupled to the second reference signal VSS2 and is the voltage level of the second reference signal VSS2. In addition, the pull-up circuit 15 includes a transistor M2, and the pull-up circuit 15 includes an input end, a pull-up output end VOUT and a pull-up control end C1, wherein the input end is coupled to a clock signal CLK1, and the pull-up output end VOUT outputs the gate signal G[n], and the pull-up control terminal C1 is coupled to the pull-up control signal. In addition, the pull-up circuit 15 can be a transistor M2 for transmitting the start signal.

復參閱第二圖,閘極驅動電路10包含一預先重置電路17,其包含一輸入端、一輸出端與一控制端,其中,輸入端耦接第一參考訊號VSS1,輸出端耦接上拉電路15的上拉控制端C1,控制端耦接一預先重置訊號Pre-Rst。此外,預先重置電路17包含一電晶體M14,其於一個顯示畫面開始前後時重置上拉控制電位An至低準位。如此,預先重置電路17可以依據預先重置訊號Pre-Rst,而重置上拉控制端C1的上拉控制電位An,於第二圖實施例上拉控制電位An是重置為第一參考訊號VSS1的電壓準位。換言之,於顯示期間與觸控偵測期間(如第一C圖之Touch#1、Touch#2與Touch#8),預先重置電路17重置上拉控制電位An為第一參考訊號VSS1的電壓準位。Referring to the second figure again, the gate driving circuit 10 includes a pre-reset circuit 17, which includes an input terminal, an output terminal and a control terminal, wherein the input terminal is coupled to the first reference signal VSS1, and the output terminal is coupled to The pull-up control terminal C1 of the pull-up circuit 15 is coupled to a pre-reset signal Pre-Rst. In addition, the pre-reset circuit 17 includes a transistor M14, which resets the pull-up control potential An to a low level before and after a display screen starts. In this way, the pre-reset circuit 17 can reset the pull-up control potential An of the pull-up control terminal C1 according to the pre-reset signal Pre-Rst. In the embodiment of the second figure, the pull-up control potential An is reset to the first reference The voltage level of the signal VSS1. In other words, during the display period and the touch detection period (such as Touch#1, Touch#2 and Touch#8 in the first picture C), the pre-reset circuit 17 resets the pull-up control potential An to the first reference signal VSS1 voltage level.

閘極驅動電路10包含一抗雜訊電路19,其耦接於第一參考訊號VSS1與上拉控制訊號(上拉控制電位An)之間。抗雜訊電路19可以為多級閘極驅動電路共用,並達到減少閘極線雜訊的效果,如第二圖實施例可以由第n極閘極驅動電路與第n+1極閘極驅動電路共用。再者,抗雜訊電路19包含複數切換元件,且該每一切換元件分別提供不同電流路徑。該些切換元件可以是複數電晶體M6、M8,電晶體M6耦接於第一參考訊號VSS1與第n閘極驅動電路的上拉控制訊號(上拉控制電位An)之間,電晶體M8耦接於第一參考訊號VSS1與第n+1閘極驅動電路的上拉控制訊號(上拉控制電位An+1)之間。所以,每一級閘極驅動電路耦接抗雜訊電路19的單一切換元件。再者,該些電晶體M6、M8的控制端可以由適合的控制訊號控制,實施例皆未限制控制各電晶體的電路。The gate driving circuit 10 includes an anti-noise circuit 19 which is coupled between the first reference signal VSS1 and the pull-up control signal (pull-up control potential An). The anti-noise circuit 19 can be shared by multi-stage gate drive circuits and achieve the effect of reducing gate line noise. As shown in the second embodiment, it can be driven by the nth gate drive circuit and the n+1th gate gate shared circuit. Furthermore, the anti-noise circuit 19 includes a plurality of switching elements, and each switching element provides a different current path. The switching elements can be a plurality of transistors M6 and M8. The transistor M6 is coupled between the first reference signal VSS1 and the pull-up control signal (pull-up control potential An) of the nth gate driving circuit, and the transistor M8 is coupled to Connected between the first reference signal VSS1 and the pull-up control signal (pull-up control potential An+1) of the n+1th gate driving circuit. Therefore, each stage of the gate driving circuit is coupled to a single switching element of the anti-noise circuit 19 . Furthermore, the control terminals of the transistors M6 and M8 can be controlled by suitable control signals, and the embodiments do not limit the circuits for controlling the transistors.

請參閱第三圖,其為本發明之閘極驅動電路之第二實施例的電路圖。如圖所示,當電晶體的一跨壓Vds較大時,上拉控制電位An容易經由電晶體發生漏電現象,所以降低跨壓Vds的電壓準位可以減少漏電流的現象,其中,跨壓Vds是指電晶體輸入與輸出間的跨壓。如此,除了第二圖實施例中下拉控制電路13的參考電位端Vref提升至第二參考訊號VSS1的電壓準位外,預先重置電路17亦可以在顯示期間與觸控偵測期間耦接不同電壓準位的參考訊號,於第三圖實施例是顯示期間耦接第一參考訊號VSS1,觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)耦接第二參考訊號VSS2。換言之,於顯示期間,預先重置電路17重置上拉控制電位An為第一參考訊號VSS1的電壓準位,於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8),預先重置電路17重置上拉控制電位An為第二參考訊號VSS2的電壓準位。所以,該些電晶體M3、M14的跨壓Vds於觸控偵測期間可以降低,而減少上拉控制電位An的降低,避免顯示品質降低。惟,第三圖實施例的該些電晶體M3、M14可以依據減少漏電流的程度,而選擇性降低跨壓Vds,實施例未限制該些電晶體M3、M14皆須降低跨壓Vds的電壓準位,同理上拉控制電位An可以選擇性於該些觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)之一重置為第二參考訊號VSS2的電壓準位。Please refer to FIG. 3 , which is a circuit diagram of a second embodiment of the gate driving circuit of the present invention. As shown in the figure, when a cross voltage Vds of the transistor is large, the pull-up control potential An is prone to leakage through the transistor, so reducing the voltage level of the cross voltage Vds can reduce the leakage current phenomenon. Vds refers to the voltage across the transistor input and output. In this way, in addition to raising the reference potential terminal Vref of the pull-down control circuit 13 to the voltage level of the second reference signal VSS1 in the second embodiment, the pre-reset circuit 17 can also be coupled differently during the display period and the touch detection period The reference signal of the voltage level is coupled to the first reference signal VSS1 during the display period in the embodiment of the third figure, and is coupled to the touch detection period (such as Touch#1, Touch#2 or Touch#8 in the first picture C) The second reference signal VSS2. In other words, during the display period, the pre-reset circuit 17 resets the pull-up control potential An to the voltage level of the first reference signal VSS1, and during the touch detection period (such as Touch#1, Touch#2 or Touch #8), the pre-reset circuit 17 resets the pull-up control potential An to the voltage level of the second reference signal VSS2. Therefore, the cross-voltage Vds of the transistors M3 and M14 can be reduced during the touch detection period, so as to reduce the reduction of the pull-up control potential An and avoid the degradation of the display quality. However, the transistors M3 and M14 in the embodiment in FIG. 3 can selectively reduce the cross-voltage Vds according to the degree of reducing the leakage current. The embodiment does not limit the transistors M3 and M14 to reduce the voltage of the cross-voltage Vds. In the same way, the pull-up control potential An can be selectively reset to the second reference signal VSS2 during one of the touch detection periods (such as Touch#1, Touch#2 or Touch#8 in the first picture C). voltage level.

請參閱第四圖,其為本發明之閘極驅動電路之第三實施例的電路圖。如圖所示,抗雜訊電路19的該些切換元件可以從第二圖與第三圖的實施方式,改為第四圖所繪該些切換元件之至少兩切換元件相互串聯,實施例中切換元件串聯連數量可以是兩個或三個以上。如此,該些切換元件之至少兩切換元件串聯於上拉電路15與第一參考訊號VSS1之間,即針對每一級閘極驅動電路的抗雜訊,改串聯兩顆電晶體M6、M16、M8、M15。於第四圖是電晶體M8至第一參考訊號VSS1的路徑上串聯一電晶體M15,及電晶體M6至第一參考訊號VSS1的路徑上串聯一電晶體M16。如此,降低該些電晶體M6、M8的跨壓Vds,且在保持抗雜訊電路19的工作週期(duty)100%的同時,有效減緩該些電晶體M6、M8發生漏電流的效果。再者,下拉控制電路13的參考電位端Vref僅耦接第一參考訊號VSS1,所以於顯示期間與於觸控偵測期間皆是耦接第一參考訊號VSS1。Please refer to FIG. 4 , which is a circuit diagram of a third embodiment of the gate driving circuit of the present invention. As shown in the figure, the switching elements of the anti-noise circuit 19 can be changed from the implementation of the second and third figures to at least two of the switching elements shown in the fourth figure in series with each other. In the embodiment The number of switching elements connected in series may be two or more. In this way, at least two switching elements of the switching elements are connected in series between the pull-up circuit 15 and the first reference signal VSS1, that is, for the anti-noise of each stage of the gate driving circuit, two transistors M6, M16, M8 are connected in series , M15. In the fourth figure, a transistor M15 is connected in series with the path from the transistor M8 to the first reference signal VSS1, and a transistor M16 is connected in series with the path from the transistor M6 to the first reference signal VSS1. In this way, the cross-voltage Vds of the transistors M6 and M8 is reduced, and while the duty cycle of the anti-noise circuit 19 is maintained at 100%, the effect of the leakage current of the transistors M6 and M8 is effectively reduced. Furthermore, the reference potential terminal Vref of the pull-down control circuit 13 is only coupled to the first reference signal VSS1, so it is both coupled to the first reference signal VSS1 during the display period and the touch detection period.

請參閱第五圖,其為本發明之閘極驅動電路之第四實施例的電路圖。如圖所示,抗雜訊電路19包含串聯的該些電晶體M6、M16與串聯的該些電晶體M8、M15而降低漏電流的程度。再者,第五圖實施例更可以搭配下拉控制電路13的電晶體M3降低跨壓Vds,如此,電晶體M3於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)耦接第二參考訊號VSS2,及預先重置電路17的電晶體M14降低跨壓Vds,如此,電晶體M14於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8)耦接第二參考訊號VSS2。此外,於顯示期間,上拉電路15需提升閘極訊號G[n]的準位,所以下拉控制電路13耦接第一參考訊號VSS1,而使上拉控制電位An提升。Please refer to FIG. 5 , which is a circuit diagram of a fourth embodiment of the gate driving circuit of the present invention. As shown in the figure, the anti-noise circuit 19 includes the series-connected transistors M6 and M16 and the series-connected transistors M8 and M15 to reduce the degree of leakage current. Furthermore, in the embodiment of FIG. 5, the transistor M3 of the pull-down control circuit 13 can be used to reduce the cross-voltage Vds, so that the transistor M3 can be used during touch detection (such as Touch#1, Touch#2 or Touch#8) is coupled to the second reference signal VSS2, and the transistor M14 of the pre-reset circuit 17 reduces the cross-voltage Vds, so that the transistor M14 is in the touch detection period (such as Touch#1, Touch #2 or Touch#8) is coupled to the second reference signal VSS2. In addition, during the display period, the pull-up circuit 15 needs to raise the level of the gate signal G[n], so the pull-down control circuit 13 is coupled to the first reference signal VSS1 to raise the pull-up control potential An.

請參閱第六圖,其為本發明之閘極驅動電路之第五實施例的電路圖。如圖所示,閘極驅動電路包含一儲能元件CTH,其耦接於上拉電路15的上拉控制端C1與上拉輸出端VOUT之間,其中,儲能元件CTH可以是一電容器。如此,因儲能元件CTH的特性,可以增加上拉控制端C1(An節點)的電容值,而增加上拉控制電位An的抬升量,並且可以降低上拉控制電位An的下降斜率,即減緩上拉控制電位An的漏電流速度。Please refer to FIG. 6 , which is a circuit diagram of a fifth embodiment of the gate driving circuit of the present invention. As shown in the figure, the gate driving circuit includes an energy storage element CTH, which is coupled between the pull-up control terminal C1 of the pull-up circuit 15 and the pull-up output terminal VOUT, wherein the energy storage element CTH may be a capacitor. In this way, due to the characteristics of the energy storage element CTH, the capacitance value of the pull-up control terminal C1 (node An) can be increased, the lifting amount of the pull-up control potential An can be increased, and the falling slope of the pull-up control potential An can be reduced, that is, slowing down The pull-up controls the leakage current speed of the potential An.

請參閱第七圖,其為本發明之閘極驅動電路之第六實施例的電路圖。如圖所示,除了如第六圖利用儲能元件CTH的特性而減緩漏電流的速度外,更可以參考第二圖至第五圖實施例的技術內容,將下拉控制電路13與預先重置電路17於顯示期間與觸控偵測期間耦接不同電壓準位的參考訊號,而控制電壓差對漏電流的影響。即於顯示期間,電晶體M3、M14耦接於上拉電路15與第一參考訊號VSS1之間。於觸控偵測期間(如第一C圖之Touch#1、Touch#2或Touch#8),電晶體M3、M14耦接於上拉電路15與第二參考訊號VSS2之間。Please refer to FIG. 7 , which is a circuit diagram of a sixth embodiment of the gate driving circuit of the present invention. As shown in the figure, in addition to using the characteristics of the energy storage element CTH to slow down the leakage current as shown in Figure 6, it is also possible to refer to the technical contents of the embodiments in Figures 2 to 5, and the pull-down control circuit 13 and the pre-reset The circuit 17 is coupled to reference signals of different voltage levels during the display period and the touch detection period, and controls the influence of the voltage difference on the leakage current. That is, during the display period, the transistors M3 and M14 are coupled between the pull-up circuit 15 and the first reference signal VSS1. During the touch detection period (eg, Touch#1, Touch#2 or Touch#8 in the first C diagram), the transistors M3 and M14 are coupled between the pull-up circuit 15 and the second reference signal VSS2.

請參閱第八圖,其為本發明之上拉控制電位的變化之實施例的模擬圖。如圖所示,顯示上拉控制電位An於高溫環境(例如85℃)下的變化,且上拉控制電位An可以經由上述不同實施例減緩漏電流的影響。因此,可以比較上拉控制電位An的準位於高溫環境下在一般無改善漏電流(如An(0))與本發明不同實施例(如An(1)、An(2)、An(3)、An(4))的差異。由第八圖實施例可知,初始的上拉控制電位An差異不大,而進入觸控偵測期間後,因上拉控制電路13、預先重置電路17或/及抗雜訊電路19的漏電流路徑,導致上拉控制電位An逐漸降低。首先,在一般無改善漏電流下,假設初始的上拉控制電位An為12.78V,而在進入觸控偵測期間後,上拉控制電位An逐漸降低至 -2.16V,換言之,上拉控制電位An因漏電流的影響而降低14.94V。再者,第三圖實施例的上拉控制電位An(1),在顯示期間的初始準位假設為12.79V,而在進入觸控偵測期間後,上拉控制電位An(1)逐漸降低至1.29V,換言之,上拉控制電位An(1)因漏電流的影響而降低11.49V,即第二圖實施例確實改善上拉控制電位An(1)因漏電流而降低的幅度。Please refer to FIG. 8 , which is a simulation diagram of an embodiment of the variation of the pull-up control potential of the present invention. As shown in the figure, the variation of the pull-up control potential An under a high temperature environment (eg, 85° C.) is shown, and the pull-up control potential An can reduce the influence of the leakage current through the above different embodiments. Therefore, the quasi-position of the pull-up control potential An can be compared with the different embodiments of the present invention (such as An(1), An(2), An(3) under a high temperature environment without generally improving the leakage current (such as An(0)) , An(4)). It can be seen from the embodiment in FIG. 8 that the initial pull-up control potential An has little difference, and after entering the touch detection period, due to the leakage of the pull-up control circuit 13 , the pre-reset circuit 17 or/and the anti-noise circuit 19 current path, causing the pull-up control potential An to gradually decrease. First of all, under the condition that the leakage current is generally not improved, it is assumed that the initial pull-up control potential An is 12.78V, and after entering the touch detection period, the pull-up control potential An gradually decreases to -2.16V. In other words, the pull-up control potential An is Reduced by 14.94V due to leakage current. Furthermore, the pull-up control potential An(1) of the embodiment in the third figure is assumed to have an initial level of 12.79V during the display period, and the pull-up control potential An(1) gradually decreases after entering the touch detection period. To 1.29V, in other words, the pull-up control potential An(1) is reduced by 11.49V due to the leakage current, that is, the embodiment of the second figure does improve the magnitude of the reduction of the pull-up control potential An(1) due to the leakage current.

復參閱第八圖,於第四圖實施例的上拉控制電位An(2),在顯示期間的初始準位假設為13.30V,而在進入觸控偵測期間後,上拉控制電位An(2)逐漸降低至5.03V,換言之,上拉控制電位An(2)因漏電流的影響而降低8.27V,即第四圖實施例同樣可以改善上拉控制電位An(2)因漏電流而降低的幅度。於第五圖實施例的上拉控制電位An(3),在顯示期間的初始準位假設為13.30V,而在進入觸控偵測期間後,上拉控制電位An(3)逐漸降低至8.67V,換言之,上拉控制電位An(3)因漏電流的影響而降低4.63V,即閘極驅動電路10包含第三圖實施與第四圖實施例的實施方式時漏電流更小,所以上拉控制電位An(3)的準位於顯示期間與觸控偵測期間的差異更小。於第七圖實施例的上拉控制電位An(4),在顯示期間的初始準位假設為13.28V,而在進入觸控偵測期間後,上拉控制電位An(4)逐漸降低至9.41V,換言之,上拉控制電位An(4)因漏電流的影響而降低3.87V,即第七圖實施例的閘極驅動電路10相比於其他實施例的方式,能更有效控制上拉控制電位An(4)的下降斜率。Referring back to FIG. 8, the pull-up control potential An(2) of the embodiment in the fourth figure is assumed to be 13.30V at the initial level during the display period, and after entering the touch detection period, the pull-up control potential An(2) 2) Gradually reduce to 5.03V, in other words, the pull-up control potential An(2) is reduced by 8.27V due to the influence of leakage current, that is, the fourth embodiment can also improve the reduction of the pull-up control potential An(2) due to leakage current. Amplitude. In the pull-up control potential An(3) of the embodiment in Fig. 5, the initial level during the display period is assumed to be 13.30V, and after entering the touch detection period, the pull-up control potential An(3) gradually decreases to 8.67V V, in other words, the pull-up control potential An(3) is reduced by 4.63V due to the influence of the leakage current, that is, the leakage current is smaller when the gate drive circuit 10 includes the implementation of the third and fourth diagrams, so the upper The difference between the level of the pull control potential An(3) during the display period and the touch detection period is smaller. In the pull-up control potential An(4) of the embodiment in Fig. 7, the initial level during the display period is assumed to be 13.28V, and after entering the touch detection period, the pull-up control potential An(4) gradually decreases to 9.41V V, in other words, the pull-up control potential An(4) is reduced by 3.87V due to the influence of the leakage current, that is, the gate driving circuit 10 of the embodiment of FIG. 7 can control the pull-up control more effectively than other embodiments. The falling slope of the potential An(4).

綜上所述,本發明提供一種閘極驅動電路,其包含上拉電路、上拉控制電路與下拉控制電路。上拉電路包含上拉控制端及輸出閘極訊號。上拉控制電路耦接上拉控制端並控制上拉控制端的上拉控制電位。下拉控制電路包含參考電位端及耦接上拉控制電路與上拉電路。閘極驅動電路更包含預先重置電路或儲能元件。參考電位端及/或預先重置電路於顯示期間與觸控偵測期間耦接第一參考訊號,或者,於顯示期間耦接第一參考訊號而於觸控偵測期間耦接第二參考訊號。第二參考訊號的電壓準位高於第一參考訊號的電壓準位。如此,閘極驅動電路應用於內嵌式觸控結構,並降低漏電流,使輸出脈衝可以有效控制像素電晶體。To sum up, the present invention provides a gate driving circuit, which includes a pull-up circuit, a pull-up control circuit and a pull-down control circuit. The pull-up circuit includes a pull-up control terminal and an output gate signal. The pull-up control circuit is coupled to the pull-up control terminal and controls the pull-up control potential of the pull-up control terminal. The pull-down control circuit includes a reference potential terminal and is coupled to the pull-up control circuit and the pull-up circuit. The gate driving circuit further includes a pre-reset circuit or an energy storage element. The reference potential terminal and/or the pre-reset circuit are coupled to the first reference signal during the display period and the touch detection period, or are coupled to the first reference signal during the display period and are coupled to the second reference signal during the touch detection period . The voltage level of the second reference signal is higher than that of the first reference signal. In this way, the gate driving circuit is applied to the in-cell touch structure, and the leakage current is reduced, so that the output pulse can effectively control the pixel transistor.

10:閘極驅動電路 11:上拉控制電路 13:下拉控制電路 15:上拉電路 17:預先重置電路 19:抗雜訊電路 20:源極驅動電路 30:內嵌式觸控面板 An:上拉控制電位 An(0):上拉控制電位 An(1):上拉控制電位 An(2):上拉控制電位 An(3):上拉控制電位 An(4):上拉控制電位 An+1:上拉控制電位 C1:上拉控制端 CLK1:時脈訊號 CTH:儲能元件 Frame N:畫面期間 Frame N+1:畫面期間 G[1]:閘極訊號 G[2]:閘極訊號 G[3]:閘極訊號 G[72]:閘極訊號 G[73]:閘極訊號 G[74]:閘極訊號 G[160]:閘極訊號 G[161]:閘極訊號 G[162]:閘極訊號 G[688]:閘極訊號 G[689]:閘極訊號 G[690]:閘極訊號 G[n-2]:閘極訊號 G[n]:閘極訊號 G[n+3]:閘極訊號 G[n+m]:閘極訊號 M1:電晶體 M2:電晶體 M3:電晶體 M4:電晶體 M6:電晶體 M8:電晶體 M14:電晶體 M15:電晶體 M16:電晶體 Pre-Rst:預先重置訊號 S[1]:源極訊號 S[2]:源極訊號 S[3]:源極訊號 S[n]:源極訊號 S[n+m]:源極訊號 Touch#1:觸控偵測期間 Touch#2:觸控偵測期間 Touch#8:觸控偵測期間VDD 供應電壓 VOUT:上拉輸出端 Vref:參考電位端 VSS1:第一參考訊號 VSS2:第二參考訊號10: Gate drive circuit 11: Pull-up control circuit 13: Pull-down control circuit 15: Pull-up circuit 17: Pre-reset circuit 19: Anti-noise circuit 20: Source driver circuit 30: Embedded touch panel An: Pull-up control potential An(0): Pull-up control potential An(1): Pull-up control potential An(2): Pull-up control potential An(3): Pull-up control potential An(4): Pull-up control potential An+1: Pull-up control potential C1: Pull-up control terminal CLK1: Clock signal CTH: energy storage element Frame N: Frame period Frame N+1: Frame period G[1]: Gate signal G[2]: Gate signal G[3]: Gate signal G[72]: Gate signal G[73]: Gate signal G[74]: Gate signal G[160]: Gate signal G[161]: Gate signal G[162]: Gate signal G[688]: Gate signal G[689]: Gate signal G[690]: Gate signal G[n-2]: Gate signal G[n]: Gate signal G[n+3]: Gate signal G[n+m]: Gate signal M1: Transistor M2: Transistor M3: Transistor M4: Transistor M6: Transistor M8: Transistor M14: Transistor M15: Transistor M16: Transistor Pre-Rst: Pre-reset signal S[1]: source signal S[2]: source signal S[3]: source signal S[n]: source signal S[n+m]: source signal Touch#1: During touch detection Touch#2: During touch detection Touch#8: VDD supply voltage during touch detection VOUT: pull-up output Vref: reference potential terminal VSS1: The first reference signal VSS2: Second reference signal

第一A圖:其為本發明之內嵌式觸控面板與驅動電路之實施例的示意圖; 第一B圖:其為本發明之閘極驅動電路之驅動模式之實施例的示意圖; 第一C圖:其為本發明之閘極驅動電路之long-H驅動模式之實施例的時序圖; 第二圖:其為本發明之閘極驅動電路之第一實施例的電路圖; 第三圖:其為本發明之閘極驅動電路之第二實施例的電路圖; 第四圖:其為本發明之閘極驅動電路之第三實施例的電路圖; 第五圖:其為本發明之閘極驅動電路之第四實施例的電路圖; 第六圖:其為本發明之閘極驅動電路之第五實施例的電路圖; 第七圖:其為本發明之閘極驅動電路之第六實施例的電路圖;及 第八圖:其為本發明之上拉控制電位的變化之實施例的高溫模擬圖。Figure 1 A: It is a schematic diagram of an embodiment of an in-cell touch panel and a driving circuit of the present invention; Figure 1 B: It is a schematic diagram of an embodiment of the driving mode of the gate driving circuit of the present invention; The first C diagram: it is a timing diagram of an embodiment of the long-H driving mode of the gate driving circuit of the present invention; The second figure: it is the circuit diagram of the first embodiment of the gate driving circuit of the present invention; Figure 3: It is a circuit diagram of the second embodiment of the gate drive circuit of the present invention; Figure 4: It is a circuit diagram of the third embodiment of the gate driving circuit of the present invention; Figure 5: It is a circuit diagram of the fourth embodiment of the gate driving circuit of the present invention; The sixth figure: it is the circuit diagram of the fifth embodiment of the gate driving circuit of the present invention; Figure 7: It is a circuit diagram of the sixth embodiment of the gate driving circuit of the present invention; and Figure 8: It is a high-temperature simulation diagram of an embodiment of the variation of the pull-up control potential of the present invention.

11:上拉控制電路11: Pull-up control circuit

13:下拉控制電路13: Pull-down control circuit

15:上拉電路15: Pull-up circuit

17:預先重置電路17: Pre-reset circuit

19:抗雜訊電路19: Anti-noise circuit

An:上拉控制電位An: Pull-up control potential

An+1:上拉控制電位An+1: Pull-up control potential

C1:上拉控制端C1: Pull-up control terminal

CLK1:時脈訊號CLK1: Clock signal

G[n-2]:閘極訊號G[n-2]: Gate signal

G[n]:閘極訊號G[n]: Gate signal

G[n+3]:閘極訊號G[n+3]: Gate signal

M1:電晶體M1: Transistor

M2:電晶體M2: Transistor

M3:電晶體M3: Transistor

M4:電晶體M4: Transistor

M6:電晶體M6: Transistor

M8:電晶體M8: Transistor

M14:電晶體M14: Transistor

Pre-Rst:預先重置訊號Pre-Rst: Pre-reset signal

VDD:供應電壓VDD: Supply voltage

VOUT:上拉輸出端VOUT: pull-up output

Vref:參考電位端Vref: reference potential terminal

VSS1:第一參考訊號VSS1: The first reference signal

VSS2:第二參考訊號VSS2: Second reference signal

Claims (16)

一種顯示面板之閘極驅動電路,其包含: 一上拉電路,包含一上拉控制端,及輸出一閘極訊號; 一上拉控制電路,耦接該上拉電路的該上拉控制端,並控制該上拉控制端的一上拉控制電位; 一下拉控制電路,耦接該上拉控制電路與該上拉電路,及該下拉控制電路包含一參考電位端,該參考電位端於一顯示期間耦接一第一參考訊號,該參考電位端於一觸控偵測期間耦接一第二參考訊號,該第二參考訊號的電壓準位高於該第一參考訊號的電壓準位;及 一預先重置電路,耦接該上拉電路的該上拉控制端,並重置該上拉控制端的該上拉控制電位。A gate drive circuit of a display panel, comprising: a pull-up circuit, including a pull-up control terminal and outputting a gate signal; a pull-up control circuit coupled to the pull-up control terminal of the pull-up circuit and controlling a pull-up control potential of the pull-up control terminal; A pull-down control circuit is coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, the reference potential terminal is coupled to a first reference signal during a display period, and the reference potential terminal is at A second reference signal is coupled during a touch detection period, and the voltage level of the second reference signal is higher than the voltage level of the first reference signal; and A pre-reset circuit is coupled to the pull-up control terminal of the pull-up circuit and resets the pull-up control potential of the pull-up control terminal. 如請求項1所述之顯示面板之閘極驅動電路,其中,於該顯示期間與該觸控偵測期間,該預先重置電路重置該上拉控制電位為該第一參考訊號的電壓準位。The gate driving circuit of a display panel according to claim 1, wherein during the display period and the touch detection period, the pre-reset circuit resets the pull-up control potential to the voltage level of the first reference signal bit. 如請求項1所述之顯示面板之閘極驅動電路,其中,於該顯示期間,該預先重置電路重置該上拉控制電位為該第一參考訊號的電壓準位,於該觸控偵測期間該預先重置電路重置該上拉控制電位為該第二參考訊號的電壓準位。The gate driving circuit of a display panel according to claim 1, wherein, during the display period, the pre-reset circuit resets the pull-up control potential to the voltage level of the first reference signal, and the touch detection During the test period, the pre-reset circuit resets the pull-up control potential to the voltage level of the second reference signal. 如請求項1所述之顯示面板之閘極驅動電路,其包含: 一抗雜訊電路,其中,該抗雜訊電路包含複數切換元件,該每一切換元件分別提供不同電流路徑,及該抗雜訊電路耦接該上拉電路的該上拉控制端,該抗雜訊電路於該觸控偵測期間維持該上拉控制電位於該第一參考訊號的電壓準位。The gate drive circuit of a display panel as claimed in claim 1, comprising: An anti-noise circuit, wherein the anti-noise circuit includes a plurality of switching elements, each switching element provides a different current path, and the anti-noise circuit is coupled to the pull-up control terminal of the pull-up circuit, the anti-noise circuit The noise circuit maintains the pull-up control voltage at the voltage level of the first reference signal during the touch detection period. 一種顯示面板之閘極驅動電路,其包含: 一上拉電路,包含一上拉控制端,及輸出一閘極訊號; 一上拉控制電路,耦接該上拉電路的該上拉控制端,並控制該上拉控制端的一上拉控制電位; 一下拉控制電路,耦接該上拉控制電路與該上拉電路,及該下拉控制電路包含一參考電位端,該參考電位端於一顯示期間耦接一第一參考訊號;及 一抗雜訊電路,包含複數切換元件,該些切換元件之至少兩切換元件串聯於該上拉電路與該第一參考訊號之間。A gate drive circuit of a display panel, comprising: a pull-up circuit, including a pull-up control terminal and outputting a gate signal; a pull-up control circuit coupled to the pull-up control terminal of the pull-up circuit and controlling a pull-up control potential of the pull-up control terminal; a pull-down control circuit coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, the reference potential terminal is coupled to a first reference signal during a display period; and An anti-noise circuit includes a plurality of switching elements, and at least two switching elements of the switching elements are connected in series between the pull-up circuit and the first reference signal. 如請求項5所述之顯示面板之閘極驅動電路,其包含: 一預先重置電路,耦接該上拉電路的該上拉控制端,並於一顯示期間與一觸控偵測期間重置該上拉控制端的該上拉控制電位為一第一參考訊號的電壓準位。The gate drive circuit of a display panel as claimed in claim 5, comprising: a pre-reset circuit, coupled to the pull-up control terminal of the pull-up circuit, and resets the pull-up control potential of the pull-up control terminal to a first reference signal during a display period and a touch detection period voltage level. 如請求項5所述之顯示面板之閘極驅動電路,其包含: 一預先重置電路,耦接該上拉電路的該上拉控制端,並於一顯示期間重置該上拉控制端的該上拉控制電位為一第一參考訊號的電壓準位,於一觸控偵測期間重置該上拉控制端的該上拉控制電位為一第二參考訊號的電壓準位。The gate drive circuit of a display panel as claimed in claim 5, comprising: A pre-reset circuit is coupled to the pull-up control terminal of the pull-up circuit, and resets the pull-up control potential of the pull-up control terminal to the voltage level of a first reference signal during a display period. During the control detection period, the pull-up control potential of the pull-up control terminal is reset to the voltage level of a second reference signal. 如請求項7所述之顯示面板之閘極驅動電路,其中,該下拉控制電路的該參考電位端於該顯示期間與該觸控偵測期間耦接一第一參考訊號。The gate driving circuit of a display panel according to claim 7, wherein the reference potential terminal of the pull-down control circuit is coupled to a first reference signal during the display period and the touch detection period. 如請求項7所述之顯示面板之閘極驅動電路,其中,該下拉控制電路的該參考電位端於該顯示期間耦接一第一參考訊號,於該觸控偵測期間耦接一第二參考訊號,該第二參考訊號的電壓準位高於該第一參考訊號的電壓準位。The gate driving circuit of a display panel according to claim 7, wherein the reference potential terminal of the pull-down control circuit is coupled to a first reference signal during the display period, and is coupled to a second reference signal during the touch detection period For the reference signal, the voltage level of the second reference signal is higher than the voltage level of the first reference signal. 一種顯示面板之閘極驅動電路,其包含: 一上拉電路,包含一上拉控制端與一上拉輸出端,及輸出一閘極訊號; 一上拉控制電路,耦接該上拉電路的該上拉控制端,並控制該上拉控制端的一上拉控制電位; 一下拉控制電路,耦接該上拉控制電路與該上拉電路,及該下拉控制電路包含一參考電位端,該參考電位端於一顯示期間耦接一第一參考訊號; 一儲能元件,耦接於該上拉電路的該上拉控制端與該上拉輸出端之間;及 一預先重置電路,耦接該上拉電路的該上拉控制端,並重置該上拉控制端的該上拉控制電位。A gate drive circuit of a display panel, comprising: a pull-up circuit, comprising a pull-up control terminal and a pull-up output terminal, and outputs a gate signal; a pull-up control circuit coupled to the pull-up control terminal of the pull-up circuit and controlling a pull-up control potential of the pull-up control terminal; a pull-down control circuit, which is coupled to the pull-up control circuit and the pull-up circuit, and the pull-down control circuit includes a reference potential terminal, and the reference potential terminal is coupled to a first reference signal during a display period; an energy storage element coupled between the pull-up control terminal and the pull-up output terminal of the pull-up circuit; and A pre-reset circuit is coupled to the pull-up control terminal of the pull-up circuit and resets the pull-up control potential of the pull-up control terminal. 如請求項10所述之顯示面板之閘極驅動電路,其中,該預先重置電路於一顯示期間與一觸控偵測期間重置該上拉控制端的該上拉控制電位為一第一參考訊號的電壓準位。The gate driving circuit of a display panel according to claim 10, wherein the pre-reset circuit resets the pull-up control potential of the pull-up control terminal during a display period and a touch detection period as a first reference The voltage level of the signal. 如請求項10所述之顯示面板之閘極驅動電路,其中,該預先重置電路於一顯示期間重置該上拉控制端的該上拉控制電位為一第一參考訊號的電壓準位,於一觸控偵測期間重置該上拉控制端的該上拉控制電位為一第二參考訊號的電壓準位,該第二參考訊號的電壓準位高於該第一參考訊號的電壓準位。The gate driving circuit of a display panel according to claim 10, wherein the pre-reset circuit resets the pull-up control potential of the pull-up control terminal to the voltage level of a first reference signal during a display period, The pull-up control potential of the pull-up control terminal is reset to the voltage level of a second reference signal during a touch detection period, and the voltage level of the second reference signal is higher than the voltage level of the first reference signal. 如請求項12所述之顯示面板之閘極驅動電路,其中,該下拉控制電路的該參考電位端於該顯示期間與該觸控偵測期間耦接一第一參考訊號。The gate driving circuit of a display panel according to claim 12, wherein the reference potential terminal of the pull-down control circuit is coupled to a first reference signal during the display period and the touch detection period. 如請求項12所述之顯示面板之閘極驅動電路,其中,該下拉控制電路的該參考電位端於該顯示期間耦接一第一參考訊號,於該觸控偵測期間耦接一第二參考訊號,該第二參考訊號的電壓準位高於該第一參考訊號的電壓準位。The gate driving circuit of a display panel according to claim 12, wherein the reference potential terminal of the pull-down control circuit is coupled to a first reference signal during the display period, and is coupled to a second reference signal during the touch detection period For the reference signal, the voltage level of the second reference signal is higher than the voltage level of the first reference signal. 如請求項14所述之顯示面板之閘極驅動電路,更包含一抗雜訊電路,其中,該抗雜訊電路包含複數切換元件,該每一切換元件分別提供不同電流路徑,該切換元件於該顯示期間與該觸控偵測期間耦接於該上拉電路與該第一參考訊號之間。The gate driving circuit of the display panel according to claim 14, further comprising an anti-noise circuit, wherein the anti-noise circuit comprises a plurality of switching elements, each of the switching elements respectively provides a different current path, and the switching elements are in The display period and the touch detection period are coupled between the pull-up circuit and the first reference signal. 如請求項14所述之顯示面板之閘極驅動電路,更包含一抗雜訊電路,其中,該抗雜訊電路包含複數切換元件,該些切換元件之至少兩切換元件串聯於該顯示期間與該觸控偵測期間耦接於該上拉電路與該第一參考訊號之間。The gate driving circuit of a display panel as claimed in claim 14, further comprising an anti-noise circuit, wherein the anti-noise circuit comprises a plurality of switching elements, and at least two switching elements of the switching elements are connected in series with the display period. The touch detection period is coupled between the pull-up circuit and the first reference signal.
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