TWI733011B - Manufacturing method of electronic component mounting module - Google Patents

Manufacturing method of electronic component mounting module Download PDF

Info

Publication number
TWI733011B
TWI733011B TW107110597A TW107110597A TWI733011B TW I733011 B TWI733011 B TW I733011B TW 107110597 A TW107110597 A TW 107110597A TW 107110597 A TW107110597 A TW 107110597A TW I733011 B TWI733011 B TW I733011B
Authority
TW
Taiwan
Prior art keywords
layer
silver
silver paste
bonding
lead frame
Prior art date
Application number
TW107110597A
Other languages
Chinese (zh)
Other versions
TW201943323A (en
Inventor
大開智哉
大井宗太郎
Original Assignee
日商三菱綜合材料股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商三菱綜合材料股份有限公司 filed Critical 日商三菱綜合材料股份有限公司
Priority to TW107110597A priority Critical patent/TWI733011B/en
Publication of TW201943323A publication Critical patent/TW201943323A/en
Application granted granted Critical
Publication of TWI733011B publication Critical patent/TWI733011B/en

Links

Images

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

具有:層積體形成工程,在具有電路層之絕緣電路基板的該電路層與電子零件的一面之間,形成由銀膠所構成的第1銀膠層,該電路層,係由陶瓷基板及被接合於該陶瓷基板的鋁或鋁合金所構成,並且在電子零件的另一面與由銅或銅合金所構成的引線框架之間,形成由銀膠所構成的第2銀膠層,以形成該些層積體;及統括接合工程,在層積體形成工程後,在使1MPa以上20MPa以下之加壓力作用於層積方向的狀態下,將層積體加熱至180℃以上350℃以下的加熱溫度,藉此,燒結第1銀膠層而形成使該第1銀膠層燒結的第1燒結銀接合層,並且燒結第2銀膠層而形成使該第2銀膠層燒結的第2燒結銀接合層,統括地接合電路層、電子零件及引線框架。It has: a laminated body forming process, between the circuit layer of the insulated circuit substrate with the circuit layer and one side of the electronic component, the first silver glue layer composed of silver glue is formed, and the circuit layer is made of a ceramic substrate and It is composed of aluminum or aluminum alloy bonded to the ceramic substrate, and a second silver paste layer composed of silver paste is formed between the other side of the electronic component and the lead frame composed of copper or copper alloy to form These laminated bodies; and the integrated joining process. After the laminated body formation process, the laminated body is heated to 180°C or higher and 350°C or lower in a state in which a pressure of 1 MPa or more and 20 MPa or less is applied to the lamination direction. The heating temperature is used to sinter the first silver paste layer to form a first sintered silver bonding layer for sintering the first silver paste layer, and to sinter the second silver paste layer to form a second silver paste layer for sintering the second silver paste layer. The sintered silver bonding layer collectively bonds the circuit layer, electronic parts and lead frame.

Description

電子零件安裝模組之製造方法Manufacturing method of electronic component mounting module

本發明,係關於功率元件或LED元件、熱電元件、其他電子零件被安裝於絕緣電路基板的電子零件安裝模組之製造方法。The present invention relates to a method of manufacturing an electronic component mounting module in which power components, LED components, thermoelectric components, and other electronic components are mounted on an insulated circuit board.

電子零件安裝模組中用於控制大電流、高電壓之半導體裝置的功率模組,係需要因應大電流容量並降低配線電阻。因此,在例如專利文獻1中,係採用如下述之構造:藉由以銅所構成之引線框架,形成被連接於半導體元件的配線,並藉由環氧樹脂等,對電子零件(功率半導體元件、控制半導體元件)及引線框架(外部引線框架、內部引線框架)之接合部份進行樹脂密封。Power modules used to control high-current, high-voltage semiconductor devices in electronic component mounting modules need to respond to large current capacity and reduce wiring resistance. Therefore, in Patent Document 1, for example, a structure is adopted: a lead frame made of copper is used to form wiring connected to a semiconductor element, and an epoxy resin or the like is used for electronic parts (power semiconductor elements). , Control semiconductor device) and lead frame (outer lead frame, inner lead frame) joint part is sealed with resin.

又,在電子零件安裝模組中,係例如如專利文獻2所示,使用絕緣電路基板(功率模組用基板),該絕緣電路基板,係在以氮化鋁為首之絕緣基板的一面,接合有由鋁板等所構成的電路層,並且在另一面,接合有由鋁板等所構成的金屬層。在該絕緣電路基板之金屬層,接合有由銅等所構成的散熱片。In addition, in electronic component mounting modules, for example, as shown in Patent Document 2, an insulated circuit substrate (a substrate for power module) is used. The insulated circuit substrate is bonded to one side of an insulating substrate such as aluminum nitride. There is a circuit layer composed of an aluminum plate or the like, and on the other side, a metal layer composed of an aluminum plate or the like is joined. A heat sink made of copper or the like is joined to the metal layer of the insulated circuit board.

作為將電子零件及引線框架接合於該絕緣電路基板而製造電子零件安裝模組的方法,係例如,藉由燒結銀接合或銲接等的方法,將電子零件接合於絕緣電路基板之電路層上,該絕緣電路基板,係在陶瓷基板的兩面接合了電路層及金屬層。其後,藉由銲接等,將由銅所構成的引線框架接合於其電子零件上。 先前技術文獻 專利文獻As a method of manufacturing an electronic component mounting module by bonding electronic components and lead frames to the insulated circuit board, for example, by sintering silver bonding or soldering, the electronic components are bonded to the circuit layer of the insulated circuit board. In this insulated circuit board, a circuit layer and a metal layer are bonded to both sides of a ceramic substrate. After that, the lead frame made of copper is joined to the electronic component by welding or the like. Prior Art Documents Patent Documents

專利文獻1:日本特開2001‐291823號公報   專利文獻2:日本特開2005‐328087號公報Patent Document 1: Japanese Patent Application Publication No. 2001-291823    Patent Document 2: Japanese Patent Application Publication No. 2005-328087

本發明所欲解決之課題Problems to be solved by the present invention

在上述的電子零件安裝模組之製造方法中,在安裝了電子零件後,係由於線膨脹係數小的電子零件被接合於絕緣電路基板之單面,因此,有產生翹曲的情形。因產生該翹曲,從而在例如如專利文獻1所示般之將由銅所構成的引線框架接合於電子零件上之工程中,恐有發生接合不良或電子零件本身損傷等之虞。In the above-mentioned method of manufacturing an electronic component mounting module, after the electronic component is mounted, the electronic component with a small coefficient of linear expansion is bonded to one side of the insulated circuit board, and therefore, warpage may occur. Due to this warpage, in the process of bonding a lead frame made of copper to an electronic component as shown in Patent Document 1, for example, there is a possibility that poor bonding or damage to the electronic component itself may occur.

本發明,係有鑑於像這樣的情事而進行研究者,其目的在於:抑制翹曲之產生,不發生接合不良或電子零件之損傷等地接合電子零件及引線框架,且簡單地製造電子零件安裝模組。 用以解決課題之手段The present invention is a researcher in view of such circumstances, and its purpose is to suppress warpage, join electronic parts and lead frames without occurrence of poor bonding or damage to electronic parts, and to easily manufacture electronic parts and mounts. Module. Means to solve the problem

本發明之功率模組之製造方法,係具有:層積體形成工程,在具有電路層之絕緣電路基板的該電路層與電子零件的一面之間,形成由銀膠所構成的第1銀膠層,該電路層,係由陶瓷基板及被接合於該陶瓷基板的鋁或鋁合金所構成,並且在前述電子零件的另一面與由銅或銅合金所構成的引線框架之間,形成由銀膠所構成的第2銀膠層,以形成該些層積體;及統括接合工程,在前述層積體形成工程後,在使1MPa以上20MPa以下之加壓力作用於層積方向的狀態下,將前述層積體加熱至180℃以上350℃以下的加熱溫度,藉此,燒結前述第1銀膠層而形成使該第1銀膠層燒結的第1燒結銀接合層,並且燒結前述第2銀膠層而形成使該第2銀膠層燒結的第2燒結銀接合層,統括地接合前述電路層、前述電子零件及前述引線框架。The manufacturing method of the power module of the present invention includes: a laminated body forming process, forming a first silver paste composed of silver paste between the circuit layer of the insulating circuit substrate with a circuit layer and one side of the electronic component The circuit layer is composed of a ceramic substrate and aluminum or aluminum alloy bonded to the ceramic substrate, and between the other side of the aforementioned electronic component and the lead frame composed of copper or copper alloy is formed of silver The second silver glue layer composed of glue to form these laminated bodies; and the overall joining process, after the aforementioned laminated body forming process, in a state where a pressure of 1 MPa or more and 20 MPa or less is applied to the lamination direction, The laminate is heated to a heating temperature of not less than 180°C and not more than 350°C, thereby sintering the first silver paste layer to form a first sintered silver bonding layer that sinters the first silver paste layer, and sintering the second The silver paste layer forms a second sintered silver bonding layer that sinters the second silver paste layer, and collectively bonds the circuit layer, the electronic component, and the lead frame.

在該製造方法中,係在將電子零件安裝於絕緣電路基板的電路層之際,引線框架亦統括地接合。具有陶瓷基板之絕緣電路基板與由銅或銅合金所構成的引線框架,係剛性比較高而難以變形。由於電子零件,係在被夾置於絕緣電路基板與引線框架之間的狀態下予以接合且加壓,因此,可抑制翹曲之產生。In this manufacturing method, when the electronic component is mounted on the circuit layer of the insulated circuit board, the lead frame is also collectively bonded. The insulated circuit board with ceramic substrate and the lead frame made of copper or copper alloy have relatively high rigidity and are difficult to deform. Since the electronic components are joined and pressurized while being sandwiched between the insulated circuit board and the lead frame, the occurrence of warpage can be suppressed.

在電路層與電子零件之接合材料及電子零件與引線框架之接合材料為焊料的情況下,由於因加熱而形成液相,因此,當加壓於層積方向時,恐有熔融焊料從各構件之間流出之虞。因此,不加壓層積體而進行接合,從而難以均勻地進行接合。另一方面,在使用了銀膠層(第1銀膠層及第2銀膠層)的情況下,藉由不生成液相而進行燒結的方式予以接合。因此,可使足夠的加壓力作用於層積體之層積方向。又,由於銀膠層,係比燒結溫度(接合溫度)低,因此,對於防止翹曲之產生為有效。When the bonding material between the circuit layer and the electronic part and the bonding material between the electronic part and the lead frame is solder, the liquid phase is formed by heating. Therefore, when the pressure is applied to the lamination direction, there is a risk of molten solder from each member The fear of outflow between. Therefore, bonding is performed without pressing the laminate, and it is difficult to perform bonding uniformly. On the other hand, when the silver paste layer (the first silver paste layer and the second silver paste layer) is used, the bonding is performed by sintering without generating a liquid phase. Therefore, sufficient pressure can be applied to the stacking direction of the laminate. In addition, since the silver paste layer is lower than the sintering temperature (joining temperature), it is effective for preventing warpage.

當加壓力未滿1MPa時,接合不充分,當超過20MPa時,恐有損壞電子零件之虞。加熱溫度未滿180℃時,無法使銀膠層充分燒結,當超過350℃時,恐有損壞電子零件之虞。另外,由於電路層係由鋁或鋁合金所構成,因此,對於加壓力具有緩衝作用,可使高達20MPa之相對較大的加壓力作用而不損壞電子零件。When the pressure is less than 1 MPa, the bonding is insufficient, and when it exceeds 20 MPa, there is a risk of damaging the electronic components. When the heating temperature is less than 180°C, the silver glue layer cannot be fully sintered, and when it exceeds 350°C, there is a risk of damaging electronic parts. In addition, since the circuit layer is made of aluminum or aluminum alloy, it has a buffering effect on the pressing force, and a relatively large pressing force of up to 20 MPa can be used without damaging the electronic parts.

作為本發明之電子零件安裝模組之製造方法的較佳實施態樣,前述絕緣電路基板,係具有:散熱層,由被接合於前述陶瓷基板之與前述電路層的接合面相反側的面之鋁或鋁合金所構成;及散熱片,由被接合於該散熱層的銅或銅合金所構成。As a preferred embodiment of the method of manufacturing an electronic component mounting module of the present invention, the insulated circuit substrate has: a heat dissipation layer formed from a surface that is bonded to the ceramic substrate on the opposite side to the bonding surface of the circuit layer The heat sink is made of aluminum or aluminum alloy; and the heat sink is made of copper or copper alloy joined to the heat dissipation layer.

在絕緣電路基板中,係在與被接合於電路層之電子零件或被接合於電子零件之引線框架相反側,設置有由銅或銅合金所構成之高剛性的散熱片。因此,可進一步抑制翹曲之產生。In the insulated circuit board, a high-rigidity heat sink made of copper or copper alloy is provided on the opposite side of the electronic component bonded to the circuit layer or the lead frame bonded to the electronic component. Therefore, the occurrence of warpage can be further suppressed.

作為本發明之電子零件安裝模組之製造方法的較佳實施態樣,在前述層積體形成工程中,係進一步在前述第1銀膠層與前述電路層之間,配置由銅或銅合金所構成的間隔物,並且在該間隔物與前述電路層之間,形成由銀膠所構成的第3銀膠層,在前述統括接合工程中,係亦可在使前述加壓力作用於層積方向的狀態下,將前述層積體加熱至前述加熱溫度,藉此,燒結前述第3銀膠層而形成使該第3銀膠層燒結的第3燒結銀接合層,同時地接合前述絕緣電路基板、前述間隔物、前述電子零件及前述引線框架。As a preferred embodiment of the method of manufacturing the electronic component mounting module of the present invention, in the laminate forming process, a copper or copper alloy is further arranged between the first silver glue layer and the circuit layer. The third silver paste layer composed of silver paste is formed between the spacer and the aforementioned circuit layer. In the aforementioned general bonding process, the system can also be used to apply the aforementioned pressure to the laminate In the state of orientation, the laminate is heated to the heating temperature, thereby sintering the third silver paste layer to form a third sintered silver bonding layer that sinters the third silver paste layer, and simultaneously bonding the insulation circuit The substrate, the spacer, the electronic component, and the lead frame.

作為本發明之電子零件安裝模組之製造方法的較佳實施態樣,在前述層積體形成工程中,係進一步在前述第2銀膠層與前述引線框架之間,配置由銅或銅合金所構成的間隔物,並且在該間隔物與前述引線框架之間,形成由銀膠所構成的第3銀膠層,在前述統括接合工程中,係亦可在使前述加壓力作用於層積方向的狀態下,將前述層積體加熱至前述加熱溫度,藉此,燒結前述第3銀膠層而形成使該第3銀膠層燒結的第3燒結銀接合層,同時地接合前述絕緣電路基板、前述電子零件、前述間隔物及前述引線框架。As a preferred embodiment of the method of manufacturing the electronic component mounting module of the present invention, in the laminate forming process, a copper or copper alloy is further arranged between the second silver glue layer and the lead frame. Formed spacer, and between the spacer and the lead frame, a third silver paste layer composed of silver paste is formed. In the general bonding process, the pressure may be applied to the lamination In the state of orientation, the laminate is heated to the heating temperature, thereby sintering the third silver paste layer to form a third sintered silver bonding layer that sinters the third silver paste layer, and simultaneously bonding the insulation circuit The substrate, the electronic component, the spacer, and the lead frame.

藉由間隔物,可調整引線框架之高度位置(層積方向之位置),並可在適當位置拉出引線框架。又,由於該間隔物,係被接合於電子零件,因此,亦具有快速擴散電子零件的熱之效果。 發明之效果With spacers, the height position of the lead frame (position in the stacking direction) can be adjusted, and the lead frame can be pulled out at an appropriate position. In addition, since the spacer is joined to the electronic component, it also has the effect of rapidly diffusing the heat of the electronic component. Effect of invention

根據本發明,由於統括地接合絕緣電路基板之電路層、電子零件及引線框架,因此,可消解電子零件安裝模組之翹曲的問題,並可不發生接合不良或電子零件之損傷等地進行接合。而且,由於可將該些層積而一次進行接合,因此,電子零件安裝模組之製造亦變得容易。According to the present invention, since the circuit layers, electronic components, and lead frames of the insulated circuit board are collectively bonded, the problem of warpage of the electronic component mounting module can be eliminated, and bonding can be performed without occurrence of poor bonding or damage to the electronic components. . Moreover, since these layers can be laminated and joined at once, the manufacture of the electronic component mounting module becomes easy.

以下,參閱圖面,說明關於本發明之實施形態。Hereinafter, referring to the drawings, the embodiments of the present invention will be described.

1.第1實施形態 <整體構造>   第1實施形態,係說明關於將電子零件安裝模組應用於功率模組100的例子。功率模組100中所使用之功率模組用基板(本發明之絕緣電路基板)10,係如圖2B所示,具備有:絕緣層即陶瓷基板11;電路層12,被形成於其中一面;及散熱層13,被形成於另一面。而且,如圖3所示,在該功率模組用基板10之電路層12的表面,經由間隔物20搭載有半導體元件(本發明之電子零件)30,在半導體元件30,係接合有引線框架40,以構成功率模組100。而且,功率模組100,係藉由以環氧樹脂等所構成的壓模樹脂50,一體地密封半導體元件30與功率模組用基板10與引線框架40。1. The first embodiment <Overall structure>   The first embodiment describes an example of applying an electronic component mounting module to the power module 100. The power module substrate (the insulated circuit substrate of the present invention) 10 used in the power module 100 is shown in FIG. 2B, and includes: an insulating layer, namely a ceramic substrate 11; and a circuit layer 12, formed on one side; And the heat dissipation layer 13 is formed on the other side. Furthermore, as shown in FIG. 3, on the surface of the circuit layer 12 of the power module substrate 10, a semiconductor element (electronic component of the present invention) 30 is mounted via a spacer 20, and a lead frame is bonded to the semiconductor element 30 40 to form a power module 100. Furthermore, the power module 100 is integrally sealed with the semiconductor element 30, the power module substrate 10, and the lead frame 40 by a stamper resin 50 made of epoxy resin or the like.

構成功率模組用基板10之陶瓷基板11,係例如可使用AlN(氮化鋁)、Si3 N4 (氮化矽)等的氮化物系陶瓷或Al2 O3 (氧化鋁)等的氧化物系陶瓷。陶瓷基板11之厚度,係被設定於0.2mm~1.5mm的範圍內。The ceramic substrate 11 constituting the power module substrate 10 is, for example , nitride-based ceramics such as AlN (aluminum nitride), Si 3 N 4 (silicon nitride), or oxidation of Al 2 O 3 (aluminum oxide). Material ceramics. The thickness of the ceramic substrate 11 is set in the range of 0.2 mm to 1.5 mm.

電路層12及散熱層13,係藉由純度99.00質量%以上的鋁(所謂2N鋁)或純度99.99質量%以上的鋁(所謂4N鋁)或鋁合金而形成。電路層12及散熱層13之厚度,係例如被設成為0.1mm~5.0mm之厚度。電路層12及散熱層13,係通常被形成為比陶瓷基板11小之平面形狀的矩形狀。而且,電路層12與散熱層13,係藉由Al‐Si系、Al‐Ge系、Al‐Cu系、Al‐Mg系、或Al‐Mn系等的合金之焊材,被接合於陶瓷基板11。另外,電路層12與散熱層13,係分別藉由如下述方法中之任一種方法,形成為所期望的形狀:將藉由衝壓加工而衝壓成所期望的外形者連接於陶瓷基板11,或者,在將平板狀者接合於陶瓷基板11後,藉由蝕刻加工形成為所期望的形狀。The circuit layer 12 and the heat dissipation layer 13 are formed of aluminum with a purity of 99.00% by mass or more (so-called 2N aluminum) or aluminum with a purity of 99.99% by mass or more (so-called 4N aluminum) or an aluminum alloy. The thickness of the circuit layer 12 and the heat dissipation layer 13 is, for example, set to a thickness of 0.1 mm to 5.0 mm. The circuit layer 12 and the heat dissipation layer 13 are generally formed into a rectangular shape having a smaller planar shape than the ceramic substrate 11. In addition, the circuit layer 12 and the heat dissipation layer 13 are joined to the ceramic substrate by soldering materials of Al-Si series, Al-Ge series, Al-Cu series, Al-Mg series, or Al-Mn series alloys. 11. In addition, the circuit layer 12 and the heat dissipation layer 13 are respectively formed into the desired shape by any one of the following methods: the ceramic substrate 11 is connected to the ceramic substrate 11 which is punched into a desired shape by a punching process, or After joining a flat plate to the ceramic substrate 11, it is formed into a desired shape by etching.

間隔物20,係藉由以具有導電性之銅或銅所構成的塊體而形成。為了調整電路層12與半導體元件30之間的間隔,間隔物20,係被介設於該些之間而將該些電性連接。在圖3中,係於電路層12上,並排於面方向地接合有2個間隔物20。The spacer 20 is formed by a block made of copper or copper having conductivity. In order to adjust the interval between the circuit layer 12 and the semiconductor element 30, the spacer 20 is interposed between these and electrically connects these. In FIG. 3, two spacers 20 are connected to the circuit layer 12 side by side in the surface direction.

半導體元件30,係具備有半導體之電子零件。半導體元件30,係因應所需之功能,選擇IGBT (Insulated Gate Bipolar Transistor)、MOSFET(Metal Oxide Semiconductor Field Effect Transistor)、FWD(Free Wheeling Diode)等的各種半導體元件。在像這樣的半導體元件30中,係上面及下面設置有電極,並在電路層12與引線框架40之間成為電性連接狀態。在圖3中,半導體元件30被接合於2個間隔物20之各者,並在相互連接了該些半導體元件30的狀態下,設置有引線框架。The semiconductor element 30 is an electronic component equipped with a semiconductor. For the semiconductor element 30, various semiconductor elements such as IGBT (Insulated Gate Bipolar Transistor), MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and FWD (Free Wheeling Diode) are selected according to the required functions. In such a semiconductor element 30, electrodes are provided on the upper and lower surfaces, and the circuit layer 12 and the lead frame 40 are electrically connected. In FIG. 3, the semiconductor element 30 is joined to each of the two spacers 20, and the lead frame is provided in a state where the semiconductor elements 30 are connected to each other.

引線框架40,係由銅或銅合金所構成。引線框架40,係例如形成為由無氧銅或精銅之純銅抑或磷青銅等的銅合金所構成之帶板狀,厚度被設成為0.05mm以上3.0mm以下。而且,在功率模組用基板10之電路層12上,分別經由燒結銀接合層711~713接合有間隔物20、半導體元件30、引線框架40。如圖3所示,在本實施形態中,係將該些燒結銀接合層711~713中之接合半導體元件30與間隔物20之間的燒結銀接合層作為第1燒結銀接合層711,將連接半導體元件30與引線框架40之間的燒結銀接合層作為第2燒結銀接合層712,將接合間隔物20與電路層12之間的燒結銀接合層作為第3燒結銀接合層713,以區分各燒結銀接合層711~713。The lead frame 40 is made of copper or copper alloy. The lead frame 40 is formed in a strip shape made of, for example, oxygen-free copper, pure copper of refined copper, or a copper alloy such as phosphor bronze, and the thickness is set to be 0.05 mm or more and 3.0 mm or less. Furthermore, on the circuit layer 12 of the power module substrate 10, the spacer 20, the semiconductor element 30, and the lead frame 40 are bonded via the sintered silver bonding layers 711 to 713, respectively. As shown in FIG. 3, in this embodiment, the sintered silver bonding layer between the semiconductor element 30 and the spacer 20 among the sintered silver bonding layers 711 to 713 is used as the first sintered silver bonding layer 711. The sintered silver bonding layer connecting the semiconductor element 30 and the lead frame 40 is used as the second sintered silver bonding layer 712, and the sintered silver bonding layer between the bonding spacer 20 and the circuit layer 12 is used as the third sintered silver bonding layer 713. Separate the sintered silver bonding layers 711 to 713.

又,為了藉由第3燒結銀接合層713接合間隔物20,從而在電路層12之接合面形成由金(Au)、銀(Ag)、鎳(Ni)等所構成的基底金屬層60。另外,雖省略圖示,但亦可在間隔物20、半導體元件30、引線框架40之各者的接合預定面,藉由鍍敷或濺鍍等來形成由金、銀、鎳等所構成的基底金屬層。In addition, in order to bond the spacer 20 by the third sintered silver bonding layer 713, an underlying metal layer 60 made of gold (Au), silver (Ag), nickel (Ni), etc. is formed on the bonding surface of the circuit layer 12. In addition, although the illustration is omitted, it is also possible to form gold, silver, nickel, etc., on the planned bonding surface of each of the spacer 20, the semiconductor element 30, and the lead frame 40 by plating or sputtering. Base metal layer.

壓模樹脂50,係由環氧系樹脂等所構成。壓模樹脂50,係除了功率模組用基板10之散熱層13的背面以外,一體地密封散熱層13之側面、陶瓷基板11、電路層12、間隔物20、半導體元件30及引線框架40與半導體元件30之連接部分的周邊。引線框架40之端部,係從壓模樹脂50被引出至外部。The stamper resin 50 is made of epoxy resin or the like. The mold resin 50 integrally seals the side surface of the heat dissipation layer 13, the ceramic substrate 11, the circuit layer 12, the spacer 20, the semiconductor element 30, and the lead frame 40, except for the back surface of the heat dissipation layer 13 of the power module substrate 10 The periphery of the connection part of the semiconductor element 30. The end of the lead frame 40 is led out from the mold resin 50 to the outside.

<第1實施形態之製造方法>   其次,說明關於製造像這樣所構成之功率模組100的方法。該功率模組製造方法,係如圖1所示,形成功率模組用基板10[功率模組用基板形成工程],並在其功率模組用基板10之電路層12的接合預定面形成基底金屬層60[基底金屬層形成工程]。其後,在電路層12形成依序層積有間隔物20、半導體元件30、引線框架40的層積體[層積體形成工程],並在統括地接合該些層積體[統括接合工程]後,藉由壓模樹脂50進行樹脂密封[樹脂密封工程],藉此予以形成。以下,以工程順序進行說明。<The manufacturing method of the first embodiment>    Next, a method of manufacturing the power module 100 configured as described above will be described. The power module manufacturing method is as shown in FIG. 1, forming a power module substrate 10 [power module substrate formation process], and forming a base on the bonding plan surface of the circuit layer 12 of the power module substrate 10 Metal layer 60 [underlying metal layer formation process]. Thereafter, a laminate in which the spacer 20, the semiconductor element 30, and the lead frame 40 are sequentially laminated is formed on the circuit layer 12 [Laminate Formation Process], and these laminates are collectively bonded [Integrated Bonding Process ] Then, resin sealing [resin sealing process] is performed by the press-molded resin 50 to form it. Hereinafter, the description will be made in the order of processes.

[功率模組用基板形成工程]   如圖2A所示,在陶瓷基板11之各面,經由焊材15層積作為電路層12的鋁板12’與作為散熱層13的鋁板13’。而且,在加壓至層積方向的狀態下,對該些層積構造體進行加熱而使焊材15熔融,藉此,接合各自的鋁板12’,13’與陶瓷基板11,以形成具有電路層12與散熱層13的功率模組用基板10(參閱圖2B)。具體而言,係在加壓層積構造體的狀態下被放入爐,於真空氛圍中,以610℃以上650℃以下的溫度來加熱1分~60分。[Power module substrate formation process]   As shown in FIG. 2A, on each surface of the ceramic substrate 11, an aluminum plate 12' as a circuit layer 12 and an aluminum plate 13' as a heat dissipation layer 13 are laminated via a solder 15. In the state of being pressed to the lamination direction, these laminated structures are heated to melt the solder 15 to thereby join the respective aluminum plates 12', 13' and the ceramic substrate 11 to form a circuit The power module substrate 10 of the layer 12 and the heat dissipation layer 13 (see FIG. 2B). Specifically, it is placed in a furnace in the state of a pressurized laminated structure, and heated in a vacuum atmosphere at a temperature of 610° C. or more and 650° C. or less for 1 minute to 60 minutes.

[基底金屬層形成工程]   在層積體形成工程之前,在電路層12之接合預定面,形成由金、銀、鎳等所構成的基底金屬層60。基底金屬層15,係可藉由將金、銀、鎳等以鍍敷或濺鍍形成為薄膜狀的方式來獲得。又,電路層12之表面的基底金屬層60,係亦可藉由塗佈含有玻璃之銀膠而進行燒成的方式來形成。[Underlying metal layer formation process]   Before the layered body forming process, the underlying metal layer 60 made of gold, silver, nickel, etc. is formed on the surface of the circuit layer 12 to be joined. The base metal layer 15 can be obtained by plating or sputtering gold, silver, nickel, etc., into a thin film. In addition, the base metal layer 60 on the surface of the circuit layer 12 can also be formed by coating and firing a silver paste containing glass.

(含有玻璃之銀膠所致之基底金屬層形成方法)   說明在電路層12之表面,藉由含有玻璃之銀膠來形成基底金屬層60的方法。含有玻璃之銀膠,係含有銀粉末、玻璃(無鉛玻璃)粉末、樹脂、溶劑及分散劑,由銀粉末與玻璃粉末所構成之粉未成分的含有量被設成為含有玻璃之銀膠整體的60質量%以上90質量%以下,殘餘部分被設成為樹脂、溶劑、分散劑。銀粉末,係其粒徑被設成為0.05μm以上1.0μm以下,例如平均粒徑0.8μm者較佳。玻璃粉末,係作為主成分,被設成為包含氧化鉍(Bi2 O3 )、氧化鋅(ZnO)、氧化硼(B2 O3 )、氧化鉛(PbO2 )、氧化磷(P2 O5 )的任1種或2種以上者,其玻璃轉移溫度被設成為300℃以上450℃以下,軟化溫度被設成為600℃以下,結晶化溫度被設成450℃以上。   例如,含有氧化鉛與氧化鋅與氧化硼,平均粒徑0.5μm之玻璃粉末較佳。(Method of forming base metal layer by silver paste containing glass) The method of forming the base metal layer 60 on the surface of the circuit layer 12 by using a silver paste containing glass will be described. The silver glue containing glass is composed of silver powder, glass (lead-free glass) powder, resin, solvent and dispersant. The content of the powder composed of silver powder and glass powder is set as the whole silver glue containing glass 60% by mass or more and 90% by mass or less, and the remainder is set as resin, solvent, and dispersant. The particle size of the silver powder is set to 0.05 μm or more and 1.0 μm or less, for example, the average particle diameter is 0.8 μm. Glass powder, as the main component, is set to contain bismuth oxide (Bi 2 O 3 ), zinc oxide (ZnO), boron oxide (B 2 O 3 ), lead oxide (PbO 2 ), phosphorus oxide (P 2 O 5) For any one or two or more types of ), the glass transition temperature is set to 300°C or higher and 450°C or lower, the softening temperature is set to 600°C or lower, and the crystallization temperature is set to 450°C or higher. For example, glass powder containing lead oxide, zinc oxide, and boron oxide and having an average particle diameter of 0.5 μm is preferable.

又,銀粉末之重量A與玻璃粉末之重量G的重量比A/G,係被調整成80/20~99/1的範圍內,例如A/G= 80/5。溶劑,係沸點為200℃以上者較佳,例如可使用二乙二醇二丁基醚。樹脂,係調整含有玻璃之銀膠的黏度者,被350℃以上分解較佳。例如,可使用乙基纖維素。又,可適當添加二羧酸系之分散劑。亦可不添加分散劑而構成含有玻璃之銀膠。In addition, the weight ratio A/G of the weight A of the silver powder to the weight G of the glass powder is adjusted to a range of 80/20~99/1, for example, A/G=80/5. The solvent preferably has a boiling point of 200°C or higher. For example, diethylene glycol dibutyl ether can be used. The resin is the one that adjusts the viscosity of the silver glue containing glass, and it is better to be decomposed above 350°C. For example, ethyl cellulose can be used. In addition, a dicarboxylic acid-based dispersant can be appropriately added. It is also possible to form a silver paste containing glass without adding a dispersant.

該含有玻璃之銀膠,係藉由下述方式而製造出:將「混合有銀粉末與玻璃粉末之混合粉末」和「混合有溶劑與樹脂之有機混合物」,藉由混合器來與分散劑一起進行預備混合,並在一面藉由輥軋機揉搓所獲得的預備混合物,一面進行混合後,藉由電糊過濾機來過濾所獲得的混練物。該含有玻璃之銀膠,係其黏度被調整成10Pa・s以上500Pa・s以下,更佳為50Pa・s以上300Pa・s以下。The glass-containing silver paste is manufactured by the following method: "Mixed powder mixed with silver powder and glass powder" and "Organic mixture mixed with solvent and resin" are mixed with a dispersant by a mixer Preliminary mixing is performed together, and the obtained preliminary mixture is kneaded by a rolling mill on one side, and after mixing on the other side, the obtained kneaded material is filtered by an electro-paste filter. The glass-containing silver glue has its viscosity adjusted to 10Pa・s or more and 500Pa・s or less, more preferably 50Pa・s or more and 300Pa・s or less.

將該含有玻璃之銀膠,藉由網版印刷法等來塗佈於電路層12的接合預定面,並在乾燥後,以350℃以上645℃以下的溫度燒成1分以上60分以下的時間。藉此,如圖4所示,形成有玻璃層61與銀層62之二層構造的基底金屬層60,該玻璃層61,係被形成於接合預定面側,該銀層62,係被形成於該玻璃層61上。在形成玻璃層61之際,自然產生於電路層12之表面的鋁氧化被膜12a會被熔融去除,從而在電路層12直接形成玻璃層61,並在該玻璃層61上形成銀層62。藉由該玻璃層61被堅固地固著於電路層12的方式,銀層62會被確實地保持固定於電路層12上。This glass-containing silver paste is applied to the bonding surface of the circuit layer 12 by screen printing or the like, and after drying, it is fired at a temperature of 350°C or higher and 645°C or lower for 1 minute or more and 60 minutes or less time. As a result, as shown in FIG. 4, a base metal layer 60 having a two-layer structure of a glass layer 61 and a silver layer 62 is formed. The glass layer 61 is formed on the side where the bonding is planned, and the silver layer 62 is formed On the glass layer 61. When the glass layer 61 is formed, the aluminum oxide film 12a naturally generated on the surface of the circuit layer 12 is melted and removed, so that the glass layer 61 is directly formed on the circuit layer 12, and the silver layer 62 is formed on the glass layer 61. By the way that the glass layer 61 is firmly fixed to the circuit layer 12, the silver layer 62 is surely held and fixed on the circuit layer 12.

在玻璃層61中,含有銀或鋁之至少一方的導電性粒子(結晶性粒子)63被分散。導電性粒子63,係被推測為在燒成之際,析出於玻璃層61內部者。又,在銀層62之內部,微細之玻璃粒子64亦被分散。該玻璃粒子64,係被推測為在銀粒子之燒成進行的過程中,所殘存之玻璃成分產生凝聚者。In the glass layer 61, conductive particles (crystalline particles) 63 containing at least one of silver or aluminum are dispersed. The conductive particles 63 are inferred to be precipitated inside the glass layer 61 at the time of firing. In addition, within the silver layer 62, fine glass particles 64 are also dispersed. The glass particles 64 are estimated to be those that aggregate the remaining glass components during the firing of the silver particles.

像這樣所形成的基底金屬層60中之銀層62的平均結晶粒徑被調整成0.5μm以上3.0μm以下的範圍內。在此,在加熱溫度未滿350℃及加熱溫度之保持時間未滿1分的情況下,燒成變得不充分,恐有無法充分形成基底金屬層60之虞。另一方面,在加熱溫度超過645℃的情況及加熱溫度之保持時間超過60分的情況下,燒成會過度進行,恐有在熱處理後所形成的基底金屬層60中之銀層62的平均結晶粒徑無法成為0.5μm以上3.0μm以下的範圍內之虞。The average crystal grain size of the silver layer 62 in the base metal layer 60 formed in this way is adjusted to be in the range of 0.5 μm or more and 3.0 μm or less. Here, when the heating temperature is less than 350° C. and the heating temperature retention time is less than 1 minute, the firing becomes insufficient, and the underlying metal layer 60 may not be sufficiently formed. On the other hand, when the heating temperature exceeds 645°C and the heating temperature retention time exceeds 60 minutes, the firing will proceed excessively, and the silver layer 62 in the base metal layer 60 formed after the heat treatment may be averaged There is a possibility that the crystal grain size cannot be within the range of 0.5 μm or more and 3.0 μm or less.

另外,為了確實形成基底金屬層60,從而將熱處理時之加熱溫度的下限設成為400℃以上為較佳,且設成為450℃以上為更佳。又,加熱溫度之保持時間,係設成為5分以上為較佳,且設成為10分為更佳。另外一方,為了確實抑制燒成之進行,從而將熱處理時之加熱溫度設成為600℃以下為較佳,且設成為575℃以下為更佳。又,將加熱溫度之保持時間設成為45分以下為較佳,且設成為30分以下為更佳。In addition, in order to surely form the base metal layer 60, the lower limit of the heating temperature during the heat treatment is preferably 400°C or higher, and more preferably 450°C or higher. In addition, the holding time of the heating temperature is preferably set to 5 minutes or more, and more preferably set to 10 minutes. On the other hand, in order to surely suppress the progress of firing, it is preferable to set the heating temperature during the heat treatment to 600°C or lower, and more preferably to set it to 575°C or lower. Moreover, it is preferable to set the holding time of the heating temperature to 45 minutes or less, and it is more preferable to set it to 30 minutes or less.

[層積體形成工程]   基底金屬層形成工程後,在形成有基底金屬層60的電路層12、間隔物20、半導體元件30、引線框架40之間,形成由銀膠所構成的銀膠層701~703,並形成層積有該些之層積體。如圖2C所示,將該些銀膠層701~703中之被形成於半導體元件30與間隔物20之間的銀膠層作為第1銀膠層701,將被形成於半導體元件30與引線框架40之間的銀膠層作為第2銀膠層702,將被形成於間隔物20與電路層12之間的銀膠層作為第3銀膠層703,以區分各銀膠層701~ 703。[Laminated body formation process] After the    base metal layer formation process, between the circuit layer 12 on which the base metal layer 60 is formed, the spacer 20, the semiconductor element 30, and the lead frame 40, a silver paste layer made of silver paste is formed 701~703, and form a layered body with these layers. As shown in FIG. 2C, among the silver glue layers 701 to 703, the silver glue layer formed between the semiconductor element 30 and the spacer 20 is used as the first silver glue layer 701 to be formed on the semiconductor element 30 and the lead The silver glue layer between the frames 40 serves as the second silver glue layer 702, and the silver glue layer formed between the spacer 20 and the circuit layer 12 serves as the third silver glue layer 703 to distinguish the silver glue layers 701 to 703 .

銀膠層701~703,係塗佈銀膠而形成之層,該銀膠,係含有粒徑0.05μm~100μm的銀粉末、樹脂、溶劑而形成。作為銀膠所使用之樹脂,係可使用乙基纖維素等。作為銀膠所使用之溶劑,係可使用α-松油醇等。作為銀膠之組成,係亦可使銀粉末之含有量成為銀膠整體的60質量%以上92質量%以下,使樹脂之含有量成為銀膠整體的1質量%以上10質量%以下,使殘餘部分成為溶劑。The silver glue layers 701 to 703 are layers formed by coating silver glue, and the silver glue is formed by containing silver powder with a particle diameter of 0.05 μm-100 μm, resin, and solvent. As the resin used for the silver glue, ethyl cellulose or the like can be used. As the solvent used for the silver glue, α-terpineol and the like can be used. As the composition of the silver glue, the content of silver powder can also be made 60% by mass to 92% by mass of the whole silver glue, and the content of the resin can be made 1% by mass to 10% by mass of the whole silver glue, so that the residual Part of it becomes a solvent.

又,在銀膠中,係亦可使甲酸銀、乙酸銀、丙酸銀、安息香酸銀、草酸銀等的羧酸系金屬鹽等的有機金屬化合物粉末含有銀膠整體的0質量%以上10質量%以下。又,因應所需,亦可使醇或有機酸等的還原劑相對於銀膠整體含有0質量%以上10質量%以下。另外,該銀膠,係其黏度被調整成10Pa・s以上100Pa・s以下,更佳為30Pa・s以上80Pa・s以下。In addition, in the silver paste, organic metal compound powders such as silver formate, silver acetate, silver propionate, silver benzoate, silver oxalate, and other carboxylic acid metal salts may contain 0% by mass or more of the entire silver paste. Less than mass%. In addition, if necessary, a reducing agent such as an alcohol or an organic acid may be contained from 0% by mass to 10% by mass relative to the entire silver paste. In addition, the viscosity of the silver paste is adjusted to 10 Pa・s or more and 100 Pa・s or less, more preferably 30 Pa・s or more and 80 Pa・s or less.

例如如圖2C所示,藉由例如網版印刷法等,將該銀膠分別塗佈於電路層12之基底金屬層60上、間隔物20之表面、引線框架40之表面而進行乾燥,藉此,形成銀膠層701~703。該些銀膠層701~703,係只要在接合時被形成於相對向之接合預定面的任一表面即可。在圖2C所示的例子中,在電路層12之表面、間隔物20之與半導體元件30相對向之側的表面、引線框架40之與半導體元件30相對向之側的表面,分別形成有銀膠層701~703。For example, as shown in FIG. 2C, the silver paste is respectively coated on the base metal layer 60 of the circuit layer 12, the surface of the spacer 20, and the surface of the lead frame 40 by screen printing, etc., and then dried. Thus, silver glue layers 701 to 703 are formed. The silver glue layers 701 to 703 only need to be formed on any surface of the opposing bonding plan surfaces during bonding. In the example shown in FIG. 2C, silver is formed on the surface of the circuit layer 12, the surface of the spacer 20 on the side facing the semiconductor element 30, and the surface of the lead frame 40 on the side facing the semiconductor element 30, respectively. Adhesive layer 701~703.

另外,作為銀膠層701~703,亦可使用以銀粉末代替氧化銀粉末的銀膠。該銀膠,係含有氧化銀粉末與還原劑與樹脂與溶劑,並且,除了該些之外,含有有機金屬化合物粉末。氧化銀粉末之含有量被設成為銀膠整體的60質量%以上92質量%以下,還原劑之含有量被設置為銀膠整體的5質量%以上15質量%以下,有機金屬化合物粉末之含有量被設成為銀膠整體的0質量%以上10質量%以下,殘餘部分被設成為溶劑。In addition, as the silver paste layers 701 to 703, silver paste in which silver powder is used instead of silver oxide powder may also be used. The silver paste contains silver oxide powder, reducing agent, resin and solvent, and, in addition to these, contains organometallic compound powder. The content of silver oxide powder is set to 60% by mass to 92% by mass of the entire silver paste, the content of reducing agent is set to 5% to 15% by mass of the entire silver paste, and the content of organic metal compound powder It is set to be 0 mass% or more and 10 mass% or less of the entire silver paste, and the remaining part is set as a solvent.

而且,如圖2C所示,將間隔物20重疊於電路層12之第3銀膠層703上,且將半導體元件30重疊於其間隔物20之第1銀膠層701上,且將引線框架40之第2銀膠層702重疊於其半導體元件30上,使該些成為層積狀態而形成層積體。2C, the spacer 20 is overlapped on the third silver paste layer 703 of the circuit layer 12, and the semiconductor element 30 is overlapped on the first silver paste layer 701 of the spacer 20, and the lead frame The second silver glue layer 702 of 40 is superimposed on the semiconductor element 30, and these are placed in a laminated state to form a laminated body.

[統括接合工程]   在層積體形成工程後,在使1MPa以上20MPa以下之加壓力作用於層積方向的狀態下,將層積體加熱至180℃以上350℃以下的加熱溫度。其加熱溫度之保持時間,係只要為1分以上60分以下的範圍內即可。藉由該熱處理,燒結銀膠層701~703,在電路層12、間隔物20、半導體元件30、引線框架40的相互間形成燒結銀接合層711~713。詳細而言,係燒結第1銀膠層701而形成使該第1銀膠層701燒結的第1燒結銀接合層711,並且燒結第2銀膠層702而形成使第2銀膠層702燒結的第2燒結銀接合層712。又,燒結第3銀膠層703而形成使該第3銀膠層703燒結的第3燒結銀接合層713。而且,藉由該些燒結銀接合層711~713,統括而同時地接合電路層12、間隔物20、半導體元件30及引線框架40。[Overall joining process]    After the layered body formation process, the layered body is heated to a heating temperature of 180°C or more and 350°C or less in a state where a pressure of 1 MPa or more and 20 MPa or less is applied to the layering direction. The holding time of the heating temperature may be within the range of 1 minute or more and 60 minutes or less. By this heat treatment, the silver paste layers 701 to 703 are sintered, and sintered silver bonding layers 711 to 713 are formed among the circuit layer 12, the spacer 20, the semiconductor element 30, and the lead frame 40. In detail, the first silver paste layer 701 is sintered to form the first sintered silver bonding layer 711 that sinters the first silver paste layer 701, and the second silver paste layer 702 is sintered to form the second silver paste layer 702. The second sintered silver bonding layer 712. In addition, the third silver paste layer 703 is sintered to form a third sintered silver bonding layer 713 for sintering the third silver paste layer 703. Furthermore, by these sintered silver bonding layers 711 to 713, the circuit layer 12, the spacer 20, the semiconductor element 30, and the lead frame 40 are collectively and simultaneously bonded.

另外,在使用了由包含氧化銀與還原劑之銀膠所構成的銀膠層701~703之情況下,在接合(燒成)時,藉由氧化銀還原而析出之還原銀粒子會變成非常微細,例如粒徑10nm~1μm。因此,可形成緻密之燒結銀接合層711~713,從而更堅固地接合電路層12、間隔物20、半導體元件30及引線框架40。In addition, when the silver paste layers 701 to 703 composed of silver paste containing silver oxide and a reducing agent are used, the reduced silver particles precipitated by the reduction of silver oxide will become very unusual during bonding (sintering). Fine, for example, the particle size is 10 nm to 1 μm. Therefore, dense sintered silver bonding layers 711 to 713 can be formed to bond the circuit layer 12, the spacer 20, the semiconductor element 30, and the lead frame 40 more firmly.

[樹脂封裝工程]   如以上般,在將間隔物20、半導體元件30及引線框架40接合於功率模組用基板10後,除了功率模組用基板10之散熱層13的下面以外,藉由壓模樹脂50一體地密封功率模組用基板10、間隔物20、半導體元件30及引線框架40的連接部分附近。具體而言,係例如使用由環氧樹脂等所構成的密封材料,藉由轉移模製方法,形成並密封壓模樹脂50。引線框架40之外側端部,係從壓模樹脂50露出。[Resin Encapsulation Process]    As described above, after the spacer 20, the semiconductor element 30, and the lead frame 40 are bonded to the power module substrate 10, except for the underside of the heat dissipation layer 13 of the power module substrate 10, press The mold resin 50 integrally seals the vicinity of the connection portion of the power module substrate 10, the spacer 20, the semiconductor element 30, and the lead frame 40. Specifically, for example, a sealing material made of epoxy resin or the like is used to form and seal the stamper resin 50 by a transfer molding method. The outer end of the lead frame 40 is exposed from the mold resin 50.

像這樣所製造之功率模組100,係由於半導體元件30在被夾置於高剛性之功率模組用基板10與引線框架40之間的狀態下予以接合且加壓,因此,可抑制翹曲之產生。因此,不會使半導體元件30損壞,半導體元件30、功率模組用基板10、間隔物20及引線框架40,係可獲得良好的接合狀態。又,可將間隔物20、半導體元件30、引線框架40一次接合於功率模組用基板10,且製造亦變得容易。In the power module 100 manufactured in this way, the semiconductor element 30 is bonded and pressurized while being sandwiched between the highly rigid power module substrate 10 and the lead frame 40. Therefore, warpage can be suppressed. The production. Therefore, the semiconductor element 30 is not damaged, and the semiconductor element 30, the power module substrate 10, the spacer 20, and the lead frame 40 can be bonded in a good state. In addition, the spacer 20, the semiconductor element 30, and the lead frame 40 can be bonded to the power module substrate 10 at a time, and manufacturing becomes easy.

2.第2實施形態   圖5,係表示第2實施形態之功率模組101。在該第2實施形態之功率模組101中,係在功率模組用基板10具備有散熱片80。具備有該散熱片80之功率模組用基板10,係指在與第1實施形態相同之功率模組用基板10的散熱層13接合有由銅或銅合金所構成的散熱片80者。散熱片80,係例如由無氧銅或精銅等的純銅抑或Cu-Zr合金等的銅合金所構成。2. The second embodiment "Figure 5" shows the power module 101 of the second embodiment. In the power module 101 of the second embodiment, a heat sink 80 is provided on the power module substrate 10. The power module substrate 10 provided with the heat sink 80 refers to a heat sink 80 made of copper or copper alloy bonded to the heat sink layer 13 of the power module substrate 10 that is the same as the first embodiment. The heat sink 80 is made of, for example, pure copper such as oxygen-free copper or refined copper, or a copper alloy such as Cu-Zr alloy.

散熱片80,係具有:平板狀之頂板部81;及多數個銷狀散熱片82,一體地突出形成於其頂板部81的一面。頂板部81之厚度,係被設成為0.6mm以上6.0mm以下。而且,將與該散熱片80之頂板部81的銷狀散熱片82相反側之表面和散熱層13接合。藉由擴散接合,將該些散熱片80與散熱層13接合。在該擴散接合中,係藉由下述而進行:使0.3MPa以上10MPa以下之加壓力作用於層積方向,且加熱至400℃以上550℃以下的溫度。The radiating fin 80 has a flat top plate portion 81 and a plurality of pin-shaped radiating fins 82 integrally protruding and formed on one surface of the top plate portion 81. The thickness of the top plate 81 is set to be 0.6 mm or more and 6.0 mm or less. Then, the surface on the opposite side of the pin-shaped heat sink 82 of the top plate portion 81 of the heat sink 80 and the heat sink layer 13 are joined. The heat dissipation fins 80 and the heat dissipation layer 13 are bonded by diffusion bonding. In this diffusion bonding, it is performed by applying a pressure of 0.3 MPa or more and 10 MPa or less in the lamination direction, and heating to a temperature of 400° C. or more and 550° C. or less.

具備該散熱片80之功率模組用基板10的情況雖亦省略圖示,但與第1實施形態相同地,在電路層12、間隔物20、半導體元件30、引線框架40之間,形成銀膠層701~703且層積該些而形成層積體[層積體形成工程]。而且,在使1MPa以上20MPa以下之加壓力作用於該些層疊體的層積方向之狀態下,加熱至180℃以上350℃以下之溫度1分以上60分以下的保持時間,藉此,統括地接合該些[統括接合工程]。Although not shown in the case of the power module substrate 10 provided with the heat sink 80, similar to the first embodiment, silver is formed between the circuit layer 12, the spacer 20, the semiconductor element 30, and the lead frame 40. The adhesive layers 701 to 703 are laminated to form a laminate [Laminate Formation Process]. In addition, in a state where a pressure of 1 MPa or more and 20 MPa or less is applied to the stacking direction of the laminates, heating to a temperature of 180°C or more and 350°C or less for a holding time of 1 minute or more and 60 minutes or less can be used in a comprehensive manner. Join these [overall joining works].

另外,在由鋁或鋁合金所構成的電路層12中,係在統括接合之前,形成有由金、銀、鎳等所構成的基底金屬層60。間隔物20、半導體元件30、引線框架40,雖係不需設置基底金屬層60,但亦可在各自之接合預定面形成由金、銀、鎳等所構成的基底金屬層。   而且,在統括接合工程後,藉由壓模樹脂50一體地進行密封直至散熱片80之頂板部81的上面[樹脂封裝工程],藉此,製造圖5所示之功率模組101。In addition, in the circuit layer 12 made of aluminum or aluminum alloy, a base metal layer 60 made of gold, silver, nickel, or the like is formed before the collective bonding. Although the spacer 20, the semiconductor element 30, and the lead frame 40 do not need to be provided with the base metal layer 60, a base metal layer composed of gold, silver, nickel, etc. may be formed on the respective bonding surfaces. "Furthermore, after the overall bonding process, the molding resin 50 is used to integrally seal to the upper surface of the top plate 81 of the heat sink 80 [resin encapsulation process], thereby manufacturing the power module 101 shown in FIG. 5.

在具備該散熱片80之功率模組101的情況下,由於散熱片80為高剛性,因此,防止翹曲之效果變得更高。In the case of the power module 101 provided with the heat sink 80, since the heat sink 80 has high rigidity, the effect of preventing warpage becomes higher.

在圖5所示的例子中,散熱片80,雖係設成為在頂板部81具有銷狀散熱片82之構造,但亦可設成為具有板狀散熱片者、經由分隔壁而設置有複數個冷卻流路的多孔管狀者、在一個扁平之流路內設置有波紋狀的散熱片者、抑或僅由不具有散熱片之平板狀的頂板部81所構成者等,以代替銷狀散熱片82。In the example shown in FIG. 5, although the heat sink 80 is configured to have a pin-shaped heat sink 82 on the top plate portion 81, it may also be provided with a plate-shaped heat sink, and a plurality of heat sinks may be provided through the partition wall. Instead of pin-shaped fins 82, the cooling channel has a porous tube shape, a flat channel with corrugated fins, or only a flat top plate 81 without fins, etc. .

此外,本發明,係並不限定於上述實施形態者,可在不脫離發明之主要內容的範圍下進行各種變更。In addition, the present invention is not limited to the above-mentioned embodiment, and various changes can be made without departing from the scope of the main content of the invention.

例如,即便在任一實施形態中,雖亦設置有間隔物20,但在不需調整引線框架40之位置的情況下等,係亦可不設置間隔物。For example, even in any embodiment, although the spacer 20 is also provided, it is not necessary to provide the spacer when the position of the lead frame 40 does not need to be adjusted.

又,即便在任一實施形態中,雖亦將間隔物20配置於第1銀膠層701與電路層12之間,但間隔物20,係亦可配置於第2銀膠層702與引線框架40之間。在該情況下,在層積體形成工程中,在間隔物20與引線框架40形成第3銀膠層703。藉此,可在統括接合工程中,燒結第3銀膠層703而形成使第3銀膠層703燒結的第3燒結銀接合層,並可同時接合功率模組用基板10、半導體元件30、間隔物20及引線框架40。 實施例In addition, even in any embodiment, although the spacer 20 is arranged between the first silver glue layer 701 and the circuit layer 12, the spacer 20 may also be arranged on the second silver glue layer 702 and the lead frame 40. between. In this case, in the laminate forming process, the third silver paste layer 703 is formed on the spacer 20 and the lead frame 40. As a result, the third silver paste layer 703 can be sintered to form the third sintered silver bonding layer that sinters the third silver paste layer 703 in the integrated bonding process, and the power module substrate 10, the semiconductor element 30, and the semiconductor element 30 can be bonded at the same time. The spacer 20 and the lead frame 40. Example

製作了如下述三種類的功率模組:「不設置間隔物,將半導體元件、引線框架統括地接合於功率模組用基板之電路層上的功率模組(實施形態1)」、「經由間隔物,將半導體元件、引線框架統括地接合於功率模組用基板之電路層上的功率模組(實施形態2)」、「經由間隔物,將半導體元件、引線框架統括地接合於具備有散熱片之功率模組用基板之電路層上的功率模組(實施形態3)」。Three types of power modules were produced as follows: "A power module in which a semiconductor element and a lead frame are collectively bonded to the circuit layer of a power module substrate without spacers (Embodiment 1)", "Across the gap This is a power module in which a semiconductor element and a lead frame are collectively bonded to the circuit layer of a power module substrate (Embodiment 2)", "the semiconductor element and lead frame are collectively bonded via spacers to a power module equipped with a heat sink The power module on the circuit layer of the substrate for the power module of the chip (Embodiment 3)".

在任一中,功率模組用基板,係使用厚度0.635mm的氮化鋁作為陶瓷基板,使用厚度0.4mm之純度99.99%的鋁作為電路層,使用厚度2.0mm的無氧銅作為間隔物,使用厚度0.15mm的矽晶片作為半導體元件,使用厚度1.0mm的無氧銅作為引線框架。In either case, the power module substrate uses aluminum nitride with a thickness of 0.635mm as the ceramic substrate, aluminum with a thickness of 0.4mm and a purity of 99.99% as the circuit layer, and oxygen-free copper with a thickness of 2.0mm as the spacer. A silicon wafer with a thickness of 0.15 mm is used as a semiconductor element, and an oxygen-free copper with a thickness of 1.0 mm is used as a lead frame.

電路層表面之基底金屬層,係使用上述的含有玻璃之銀膠而形成,如圖2C所示,在塗佈銀膠後,進行層積而統括接合。改變接合時之加熱溫度與接合時之加壓力,製作複數個試樣,並確認有無接合性、構件的損壞、半導體元件的損壞(元件的損壞)。The base metal layer on the surface of the circuit layer is formed by using the above-mentioned silver paste containing glass. As shown in FIG. 2C, after coating the silver paste, it is laminated to form an overall bonding. Change the heating temperature during bonding and the pressure applied during bonding to prepare a plurality of samples, and confirm whether there are bonding properties, damage to the components, and damage to the semiconductor element (damage of the element).

接合性,係使用insight公司製之超音波影像診斷裝置,以取得接合界面的超音波探傷影像,在接合率為90%以上的情況下設成為「良」,在未滿90%的情況下設成為「不良」。The bonding property is obtained by using the ultrasonic imaging diagnostic device manufactured by Insight to obtain the ultrasonic flaw detection image of the bonding interface. When the bonding rate is more than 90%, it is set to "good", and when the bonding rate is less than 90%, it is set to "good". Become "bad".

有無構件之損壞,係觀察電路層之變形程度,將正常的情況設成為「良」,將在端部見到壓潰的情況設成為「不良」。Whether there is damage to the component, observe the degree of deformation of the circuit layer, and set the normal condition as "good", and the situation with crushing at the end as "bad".

有無半導體元件之損壞,係使用insight公司製之超音波影像診斷裝置,將在半導體元件見到裂縫之機率為10%以下的情況設成為「良」,將在半導體元件見到裂縫之機率為超過10%的情況設成為「不良」。Whether there is damage to the semiconductor device, the ultrasonic imaging diagnostic device manufactured by Insight is used, and the probability of seeing a crack in the semiconductor device is set as "good", and the probability of seeing a crack in the semiconductor device is more than 10%. 10% of cases are set as "bad".

將該些結果表示於表1。These results are shown in Table 1.

Figure 02_image001
Figure 02_image001

從該表1可知,藉由在使1MPa以上20MPa以下之加壓力作用的狀態下,以180℃以上350℃以下之加熱溫度進行統括接合的方式,無法確定接合性良好且構件之損壞或半導體元件之損壞。 產業上之可利用性It can be seen from the table 1 that by applying a pressure of 1 MPa to 20 MPa, and a heating temperature of 180°C to 350°C for all-in-one bonding, it is impossible to determine whether the bonding is good and the components are damaged or the semiconductor device is completely bonded. The damage. Industrial availability

由於統括地接合電路層、半導體元件引線框架,因此,可消解翹曲的問題而不發生接合不良或電子零件之損傷等地進行接合,而且可將該些層積而一次進行接合,故,電子零件安裝模組之製造亦變得容易。Since the circuit layer and the lead frame of the semiconductor element are collectively bonded, the problem of warpage can be eliminated without the occurrence of poor bonding or damage to electronic parts, etc., and the bonding can be carried out at a time by stacking these layers. Therefore, the electronic The manufacturing of the component mounting module has also become easier.

10‧‧‧功率模組用基板(絕緣電路基板)11‧‧‧陶瓷基板12‧‧‧電路層13‧‧‧散熱層15‧‧‧焊材20‧‧‧間隔物30‧‧‧半導體元件(電子零件)40‧‧‧引線框架50‧‧‧壓模樹脂60‧‧‧基底金屬層61‧‧‧玻璃層62‧‧‧銀層701‧‧‧第1銀膠層702‧‧‧第2銀膠層703‧‧‧第3銀膠層711‧‧‧第1燒結銀接合層712‧‧‧第2燒結銀接合層713‧‧‧第3燒結銀接合層80‧‧‧散熱片100,101‧‧‧功率模組(電子零件安裝模組)10‧‧‧Power module substrate (insulated circuit substrate) 11‧‧‧Ceramic substrate 12‧‧‧Circuit layer 13‧‧‧Heat dissipation layer 15‧‧‧Solder 20‧‧‧Spacer 30‧‧‧Semiconductor element (Electronic parts) 40‧‧‧Lead frame 50‧‧‧Compression molding resin 60‧‧‧Base metal layer 61‧‧‧Glass layer 62‧‧‧Silver layer 701‧‧‧First silver glue layer 702‧‧‧ 2Silver glue layer 703‧‧‧The third silver glue layer 711‧‧‧The first sintered silver bonding layer 712‧‧The second sintered silver bonding layer 713‧‧ The third sintered silver bonding layer 80‧‧‧The heat sink 100 , 101‧‧‧Power module (electronic parts installation module)

[圖1] 表示本發明之第1實施形態之功率模組之製造方法的流程圖。   [圖2A] 說明第1實施形態的製造方法中之功率模組用基板形成工程的剖面圖。   [圖2B] 功率模組用基板的剖面圖。   [圖2C] 說明統括接合工程的剖面圖。   [圖3] 由第1實施形態的製造方法所製造之功率模組的剖面圖。   [圖4] 說明基底金屬層的放大剖面圖。   [圖5] 藉由本發明之第2實施形態的製造方法所製造之功率模組的剖面圖。[Fig. 1] A flowchart showing the manufacturing method of the power module according to the first embodiment of the present invention.   [FIG. 2A] A cross-sectional view explaining the power module substrate forming process in the manufacturing method of the first embodiment.  [Figure 2B] A cross-sectional view of a power module substrate.  [Figure 2C] A cross-sectional view illustrating the integrated joining project.   [Fig. 3] A cross-sectional view of the power module manufactured by the manufacturing method of the first embodiment.   [Figure 4] An enlarged cross-sectional view of the base metal layer is illustrated.   [FIG. 5] A cross-sectional view of a power module manufactured by the manufacturing method of the second embodiment of the present invention.

Claims (4)

一種電子零件安裝模組之製造方法,係具有:   層積體形成工程,在具有電路層之絕緣電路基板的該電路層與電子零件的一面之間,形成由銀膠所構成的第1銀膠層,該電路層,係由陶瓷基板及被接合於該陶瓷基板的鋁或鋁合金所構成,並且在前述電子零件的另一面與由銅或銅合金所構成的引線框架之間,形成由銀膠所構成的第2銀膠層,以形成該些層積體;及   統括接合工程,在前述層積體形成工程後,在使1MPa以上20MPa以下之加壓力作用於層積方向的狀態下,將前述層積體加熱至180℃以上350℃以下的加熱溫度,藉此,燒結前述第1銀膠層而形成使該第1銀膠層燒結的第1燒結銀接合層,並且燒結前述第2銀膠層而形成使該第2銀膠層燒結的第2燒結銀接合層,統括地接合前述電路層、前述電子零件及前述引線框架。A method of manufacturing an electronic component mounting module includes:    layered body forming process, forming a first silver paste composed of silver paste between the circuit layer of an insulating circuit substrate with a circuit layer and one side of the electronic part The circuit layer is composed of a ceramic substrate and aluminum or aluminum alloy bonded to the ceramic substrate, and between the other side of the aforementioned electronic component and the lead frame composed of copper or copper alloy is formed of silver The second silver glue layer composed of glue to form these laminated bodies; and the overall joining process, after the aforementioned laminated body forming process, in a state where a pressure of 1 MPa or more and 20 MPa or less is applied to the lamination direction, The laminate is heated to a heating temperature of not less than 180°C and not more than 350°C, thereby sintering the first silver paste layer to form a first sintered silver bonding layer that sinters the first silver paste layer, and sintering the second The silver paste layer forms a second sintered silver bonding layer that sinters the second silver paste layer, and collectively bonds the circuit layer, the electronic component, and the lead frame. 如申請專利範圍第1項之電子零件安裝模組之製造方法,其中,   前述絕緣電路基板,係具有:   散熱層,由被接合於前述陶瓷基板之與前述電路層的接合面相反側的面之鋁或鋁合金所構成;及   散熱片,由被接合於該散熱層的銅或銅合金所構成。For example, the method for manufacturing an electronic component mounting module in the scope of the patent application, wherein the    said insulated circuit board has:    heat dissipation layer, which is bonded to the surface of the ceramic board on the opposite side to the bonding surface of the circuit layer The heat sink is made of aluminum or aluminum alloy; and the heat sink is made of copper or copper alloy joined to the heat dissipation layer. 如申請專利範圍第1項之電子零件安裝模組之製造方法,其中,   在前述層積體形成工程中,係進一步在前述第1銀膠層與前述電路層之間,配置由銅或銅合金所構成的間隔物,並且在該間隔物與前述電路層之間,形成由銀膠所構成的第3銀膠層,   在前述統括接合工程中,係在使前述加壓力作用於層積方向的狀態下,將前述層積體加熱至前述加熱溫度,藉此,燒結前述第3銀膠層而形成使該第3銀膠層燒結的第3燒結銀接合層,同時地接合前述絕緣電路基板、前述間隔物、前述電子零件及前述引線框架。For example, the method for manufacturing an electronic component mounting module in the scope of the patent application, in which    is further arranged between the first silver glue layer and the circuit layer in the above-mentioned layered body formation process by copper or copper alloy And between the spacer and the aforementioned circuit layer, a third silver glue layer composed of silver glue is formed.    In the aforementioned general bonding process, the pressure is applied to the lamination direction. In the state, the laminate is heated to the heating temperature, thereby sintering the third silver paste layer to form a third sintered silver bonding layer that sinters the third silver paste layer, and simultaneously bonding the insulating circuit board, The spacer, the electronic component, and the lead frame. 如申請專利範圍第1項之電子零件安裝模組之製造方法,其中,   在前述層積體形成工程中,係進一步在前述第2銀膠層與前述引線框架之間,配置由銅或銅合金所構成的間隔物,並且在該間隔物與前述引線框架之間,形成由銀膠所構成的第3銀膠層,   在前述統括接合工程中,係在使前述加壓力作用於層積方向的狀態下,將前述層積體加熱至前述加熱溫度,藉此,燒結前述第3銀膠層而形成使該第3銀膠層燒結的第3燒結銀接合層,同時地接合前述絕緣電路基板、前述電子零件、前述間隔物及前述引線框架。For example, the method for manufacturing an electronic component mounting module in the scope of the patent application, wherein    is further arranged between the second silver glue layer and the lead frame in the above-mentioned layered body formation process by copper or copper alloy And the third silver paste layer composed of silver paste is formed between the spacer and the aforementioned lead frame.    In the above-mentioned integrated bonding process, the pressure is applied to the lamination direction. In the state, the laminate is heated to the heating temperature, thereby sintering the third silver paste layer to form a third sintered silver bonding layer that sinters the third silver paste layer, and simultaneously bonding the insulating circuit board, The electronic component, the spacer, and the lead frame.
TW107110597A 2018-03-28 2018-03-28 Manufacturing method of electronic component mounting module TWI733011B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW107110597A TWI733011B (en) 2018-03-28 2018-03-28 Manufacturing method of electronic component mounting module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW107110597A TWI733011B (en) 2018-03-28 2018-03-28 Manufacturing method of electronic component mounting module

Publications (2)

Publication Number Publication Date
TW201943323A TW201943323A (en) 2019-11-01
TWI733011B true TWI733011B (en) 2021-07-11

Family

ID=69184494

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107110597A TWI733011B (en) 2018-03-28 2018-03-28 Manufacturing method of electronic component mounting module

Country Status (1)

Country Link
TW (1) TWI733011B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW558773B (en) * 2002-08-23 2003-10-21 Jung-Chun Shih A structure without Ag epoxy and die pad in lead frame packaging producing process and its method
TW200516737A (en) * 2003-11-05 2005-05-16 Cyntec Co Ltd Chip package and substrate
US20090215230A1 (en) * 2008-02-22 2009-08-27 Renesas Technology Corp. Manufacturing method of semiconductor device
TW201444031A (en) * 2013-03-15 2014-11-16 Renesas Electronics Corp Semiconductor device and manufacturing method of the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW558773B (en) * 2002-08-23 2003-10-21 Jung-Chun Shih A structure without Ag epoxy and die pad in lead frame packaging producing process and its method
TW200516737A (en) * 2003-11-05 2005-05-16 Cyntec Co Ltd Chip package and substrate
US20090215230A1 (en) * 2008-02-22 2009-08-27 Renesas Technology Corp. Manufacturing method of semiconductor device
TW201444031A (en) * 2013-03-15 2014-11-16 Renesas Electronics Corp Semiconductor device and manufacturing method of the same

Also Published As

Publication number Publication date
TW201943323A (en) 2019-11-01

Similar Documents

Publication Publication Date Title
EP3352233B1 (en) Thermoelectric conversion module and thermoelectric conversion device
KR102163532B1 (en) Semiconductor device, ceramic circuit board, and semiconductor device manufacturing method
JP6146007B2 (en) Manufacturing method of joined body, manufacturing method of power module, power module substrate and power module
JP6643975B2 (en) Method for manufacturing semiconductor device
US11476127B2 (en) Manufacturing method of electronic-component-mounted module
JP6907546B2 (en) Power module
TWI711141B (en) Semiconductor device
TWI726048B (en) Metal member with ag base layer, insulated circuit substrate with ag base layer, semiconductor devices, insulated circuit substrate with heat sink, and method for producing metal member with ag base layer
WO2019180914A1 (en) Electronic-component-mounted module
JP5954374B2 (en) Insulating substrate, manufacturing method thereof, semiconductor module, and semiconductor device
JP2014175492A (en) Metal composite body, circuit board, semiconductor device, and method of manufacturing metal composite body
JP6853435B2 (en) Power module manufacturing method
WO2017047627A1 (en) Thermoelectric conversion module and thermoelectric conversion device
JP2012114224A (en) Power module substrate with heat sink and manufacturing method of the power module and the power module substrate
TWI733011B (en) Manufacturing method of electronic component mounting module
TWI745572B (en) Electronic parts installation module
US11101246B2 (en) Semiconductor device having chips attached to support members through silver sintered bodies with particles
JP2014160707A (en) Method for manufacturing conjugant, method for manufacturing power module, and power module
JP5630375B2 (en) Insulating substrate, manufacturing method thereof, semiconductor module, and semiconductor device
JP2014029964A (en) Joint body manufacturing method, power module manufacturing method, and power module
JP2014030059A (en) Insulating substrate, method for manufacturing the same, semiconductor module, and semiconductor device
JP2018032731A (en) Substrate for heat sink-equipped power module, and method for manufacturing the same
JP2024025271A (en) Method of manufacturing semiconductor module
CN116982153A (en) Semiconductor device and method for manufacturing semiconductor device