TWI713047B - Dram式處理單元的電路和微架構 - Google Patents

Dram式處理單元的電路和微架構 Download PDF

Info

Publication number
TWI713047B
TWI713047B TW106131455A TW106131455A TWI713047B TW I713047 B TWI713047 B TW I713047B TW 106131455 A TW106131455 A TW 106131455A TW 106131455 A TW106131455 A TW 106131455A TW I713047 B TWI713047 B TW I713047B
Authority
TW
Taiwan
Prior art keywords
row
dram
cell
calculation
array
Prior art date
Application number
TW106131455A
Other languages
English (en)
Chinese (zh)
Other versions
TW201816785A (zh
Inventor
李双辰
牛迪民
克里希納 馬拉迪
郑宏忠
Original Assignee
南韓商三星電子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 南韓商三星電子股份有限公司 filed Critical 南韓商三星電子股份有限公司
Publication of TW201816785A publication Critical patent/TW201816785A/zh
Application granted granted Critical
Publication of TWI713047B publication Critical patent/TWI713047B/zh

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4087Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4096Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Semiconductor Memories (AREA)
TW106131455A 2016-10-28 2017-09-13 Dram式處理單元的電路和微架構 TWI713047B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201662414426P 2016-10-28 2016-10-28
US62/414,426 2016-10-28
US15/425,996 US9922696B1 (en) 2016-10-28 2017-02-06 Circuits and micro-architecture for a DRAM-based processing unit
US15/425,996 2017-02-06

Publications (2)

Publication Number Publication Date
TW201816785A TW201816785A (zh) 2018-05-01
TWI713047B true TWI713047B (zh) 2020-12-11

Family

ID=61598574

Family Applications (1)

Application Number Title Priority Date Filing Date
TW106131455A TWI713047B (zh) 2016-10-28 2017-09-13 Dram式處理單元的電路和微架構

Country Status (5)

Country Link
US (1) US9922696B1 (enExample)
JP (1) JP6785738B2 (enExample)
KR (1) KR102182217B1 (enExample)
CN (1) CN108022615B (enExample)
TW (1) TWI713047B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11354383B2 (en) 2019-09-27 2022-06-07 Applied Materials, Inc Successive bit-ordered binary-weighted multiplier-accumulator

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10180808B2 (en) * 2016-10-27 2019-01-15 Samsung Electronics Co., Ltd. Software stack and programming for DPU operations
US10628295B2 (en) * 2017-12-26 2020-04-21 Samsung Electronics Co., Ltd. Computing mechanisms using lookup tables stored on memory
US10956814B2 (en) 2018-08-27 2021-03-23 Silicon Storage Technology, Inc. Configurable analog neural memory system for deep learning neural network
TWI714003B (zh) * 2018-10-11 2020-12-21 力晶積成電子製造股份有限公司 可執行人工智慧運算的記憶體晶片及其操作方法
US11100193B2 (en) 2018-12-07 2021-08-24 Samsung Electronics Co., Ltd. Dataflow accelerator architecture for general matrix-matrix multiplication and tensor computation in deep learning
CN110414677B (zh) * 2019-07-11 2021-09-03 东南大学 一种适用于全连接二值化神经网络的存内计算电路
US11074214B2 (en) * 2019-08-05 2021-07-27 Arm Limited Data processing
US11562205B2 (en) * 2019-09-19 2023-01-24 Qualcomm Incorporated Parallel processing of a convolutional layer of a neural network with compute-in-memory array
US11226816B2 (en) 2020-02-12 2022-01-18 Samsung Electronics Co., Ltd. Systems and methods for data placement for in-memory-compute
US11081149B1 (en) 2020-03-31 2021-08-03 Winbond Electronics Corp. Memory device for artificial intelligence operation
KR102833655B1 (ko) 2021-04-15 2025-07-14 에스케이하이닉스 주식회사 인메모리 연산을 수행하는 반도체 장치 및 그 동작 방법
KR20250145258A (ko) 2024-03-28 2025-10-13 경희대학교 산학협력단 Dram의 비트 단위 논리 연산을 수행하는 pim 연산 장치 및 pim 연산 방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050024923A1 (en) * 2003-07-15 2005-02-03 International Business Machines Corporation Gain cell memory having read cycle interlock
US20100164972A1 (en) * 2008-04-02 2010-07-01 Avidan Akerib System, method and apparatus for memory with embedded associative section for computations
US20120293200A1 (en) * 2011-05-18 2012-11-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving semiconductor device
US20160232951A1 (en) * 2015-02-05 2016-08-11 The Board Of Trustees Of The University Of Illinois Compute memory
US9455020B2 (en) * 2014-06-05 2016-09-27 Micron Technology, Inc. Apparatuses and methods for performing an exclusive or operation using sensing circuitry

Family Cites Families (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1540996A (en) * 1975-05-12 1979-02-21 Plessey Co Ltd Associative processors
US4955020A (en) * 1989-06-29 1990-09-04 Infotron Systems Corporation Bus architecture for digital communications
CN1120373A (zh) * 1993-03-17 1996-04-10 蔡卡得公司 基于随机存储存贮器(ram)的可配置阵列
US6173385B1 (en) 1993-11-19 2001-01-09 Disk Emulation Systems, Inc. Address generator for solid state disk drive
US6195738B1 (en) 1993-12-12 2001-02-27 Associative Computing Ltd. Combined associative processor and random access memory architecture
US5847577A (en) * 1995-02-24 1998-12-08 Xilinx, Inc. DRAM memory cell for programmable logic devices
US5901095A (en) 1997-12-23 1999-05-04 Lsi Logic Corporation Reprogrammable address selector for an embedded DRAM
JPH11338767A (ja) * 1998-05-22 1999-12-10 Mitsubishi Heavy Ind Ltd 画像処理用機能メモリ装置
US6467020B1 (en) * 2000-05-17 2002-10-15 Neomagic Israel Ltd. Combined associate processor and memory architecture
TW514931B (en) 2000-09-29 2002-12-21 Agilent Technologies Inc Apparatus and method for performing conditional calculations
US7299099B1 (en) 2004-02-18 2007-11-20 Divelbiss Corporation Programmable logic controller contained on a chip
JP2006127460A (ja) * 2004-06-09 2006-05-18 Renesas Technology Corp 半導体装置、半導体信号処理装置、およびクロスバースイッチ
US20070226567A1 (en) 2006-03-23 2007-09-27 Gorman Kevin W High speed bist utilizing clock multiplication
CA2645774C (en) * 2006-12-22 2010-01-12 Sidense Corp. A power up detection system for a memory device
US8120989B2 (en) 2007-06-25 2012-02-21 Qualcomm Incorporated Concurrent multiple-dimension word-addressable memory architecture
US8042082B2 (en) 2007-09-12 2011-10-18 Neal Solomon Three dimensional memory in a system on a chip
US8631195B1 (en) * 2007-10-25 2014-01-14 Netlogic Microsystems, Inc. Content addressable memory having selectively interconnected shift register circuits
US8694776B2 (en) * 2007-12-21 2014-04-08 Spansion Llc Authenticated memory and controller slave
US8332580B2 (en) * 2008-04-02 2012-12-11 Zikbit Ltd. System, method and apparatus for memory with embedded associative section for computations
US10832746B2 (en) * 2009-07-16 2020-11-10 Gsi Technology Inc. Non-volatile in-memory computing device
WO2011048522A2 (en) 2009-10-21 2011-04-28 Zikbit Ltd. Neighborhood operations for parallel processing
US9026714B2 (en) 2010-06-04 2015-05-05 Cisco Technology, Inc. Memory expansion using rank aggregation
WO2013062596A1 (en) * 2011-10-28 2013-05-02 Hewlett-Packard Development Company, L.P. Row shifting shiftable memory
KR101990971B1 (ko) 2012-01-30 2019-06-19 삼성전자 주식회사 메모리, 메모리 시스템, 및 메모리에 대한 에러 검출/정정 방법
WO2013115778A1 (en) * 2012-01-30 2013-08-08 Hewlett-Packard Development Company, L.P. Dynamic/static random access memory (d/sram)
US9317482B2 (en) 2012-10-14 2016-04-19 Microsoft Technology Licensing, Llc Universal FPGA/ASIC matrix-vector multiplication architecture
US9378181B2 (en) 2012-11-09 2016-06-28 Intel Corporation Scalable computing array
US9197285B2 (en) 2012-12-20 2015-11-24 Deere & Company Methods and apparatus for ameliorating signal reception
US8971124B1 (en) * 2013-08-08 2015-03-03 Micron Technology, Inc. Apparatuses and methods for performing logical operations using sensing circuitry
US9153305B2 (en) * 2013-08-30 2015-10-06 Micron Technology, Inc. Independently addressable memory array address spaces
US9019785B2 (en) * 2013-09-19 2015-04-28 Micron Technology, Inc. Data shifting via a number of isolation devices
US9639458B2 (en) 2013-09-26 2017-05-02 Emu Solutions, Inc. Reducing memory accesses for enhanced in-memory parallel operations
US9934856B2 (en) * 2014-03-31 2018-04-03 Micron Technology, Inc. Apparatuses and methods for comparing data patterns in memory
US9711206B2 (en) * 2014-06-05 2017-07-18 Micron Technology, Inc. Performing logical operations using sensing circuitry
US9847110B2 (en) * 2014-09-03 2017-12-19 Micron Technology, Inc. Apparatuses and methods for storing a data value in multiple columns of an array corresponding to digits of a vector
US20160147667A1 (en) 2014-11-24 2016-05-26 Samsung Electronics Co., Ltd. Address translation in memory
US9954533B2 (en) 2014-12-16 2018-04-24 Samsung Electronics Co., Ltd. DRAM-based reconfigurable logic
US10996959B2 (en) * 2015-01-08 2021-05-04 Technion Research And Development Foundation Ltd. Hybrid processor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050024923A1 (en) * 2003-07-15 2005-02-03 International Business Machines Corporation Gain cell memory having read cycle interlock
US20100164972A1 (en) * 2008-04-02 2010-07-01 Avidan Akerib System, method and apparatus for memory with embedded associative section for computations
US20120293200A1 (en) * 2011-05-18 2012-11-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving semiconductor device
US9455020B2 (en) * 2014-06-05 2016-09-27 Micron Technology, Inc. Apparatuses and methods for performing an exclusive or operation using sensing circuitry
US20160232951A1 (en) * 2015-02-05 2016-08-11 The Board Of Trustees Of The University Of Illinois Compute memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11354383B2 (en) 2019-09-27 2022-06-07 Applied Materials, Inc Successive bit-ordered binary-weighted multiplier-accumulator

Also Published As

Publication number Publication date
US9922696B1 (en) 2018-03-20
JP6785738B2 (ja) 2020-11-18
KR102182217B1 (ko) 2020-11-25
CN108022615B (zh) 2023-03-28
JP2018073452A (ja) 2018-05-10
CN108022615A (zh) 2018-05-11
KR20180046846A (ko) 2018-05-09
TW201816785A (zh) 2018-05-01

Similar Documents

Publication Publication Date Title
TWI714806B (zh) 動態隨機存取記憶體處理單元架構
TWI713047B (zh) Dram式處理單元的電路和微架構
CN108010551B (zh) 用于dpu运算的软件栈和编程
JP7173709B2 (ja) ニューラルネットワーク回路
Talati et al. mmpu—a real processing-in-memory architecture to combat the von neumann bottleneck
JP6791522B2 (ja) インデータパス計算動作のための装置及び方法
TWI671744B (zh) 用於在記憶體中資料切換網路的裝置及方法
US11355181B2 (en) High bandwidth memory and system having the same
JP5162024B2 (ja) マルチポート型メモリスーパーセル及びデータ経路スイッチング回路を伴う集積回路
TWI825849B (zh) 存算一體裝置及相關的方法
Bottleneck mMPU-A Real Processing-in-Memory
CN117636956A (zh) 存储器内计算(imc)电路和设备、以及神经网络设备
CN119301679A (zh) 存储器架构
신현승 McDRAM: Low Latency and Energy-Efficient Matrix Computation in DRAM
CN118246501A (zh) 一种计算阵列、计算方法、装置及设备
CN118412029A (zh) 存储器装置以及操作存储器装置的方法
Kim et al. DRAM-Based Processing-in-Memory