TWI711133B - Electronic structure and manufacturing method thereof - Google Patents

Abstract

An electronic structure including a substrate, a circuit board, a plurality of conductive structures and a plurality of supporting structures is provided. The substrate has a plurality of first connection pads. The circuit board is disposed on the substrate and has a plurality of second connection pads. The conductive structures are respectively connected to the first connection pads, and are respectively connected to the second connection pads. The supporting structures are respectively connected to at least one of the first connecting pads or the second connection pads, wherein the supporting structures and the conductive structures are electrically insulated from each other, and the structural strength of the supporting structures is greater than the structural strength of the conductive structures. In addition, a manufacturing method thereof is also provided.

Description

Electronic structure and its manufacturing method

The present invention relates to an electronic structure and a manufacturing method thereof, and particularly relates to an electronic structure and a manufacturing method thereof applied in the field of chip packaging.

In the field of semiconductor packaging technology, a chip carrier is a type of electronic component used to connect an integrated circuit chip (IC chip) to the next level, such as a motherboard or a module board. Circuit boards with high wiring density are often used as chip carriers with high contact counts. The circuit substrate is mainly composed of a plurality of patterned conductive layers (patterned conductive layers) and a plurality of dielectric layers (dielectric layers) alternately laminated, and the two patterned conductive layers can be electrically connected to each other through conductive vias. Sexual connection. In the current chip package, a heat dissipation module, such as a heat dissipation structure or a heat sink, is arranged on the top of the chip package as required. Specifically, the heat dissipation module can be arranged on the top of the chip package by being fixed on the circuit board to dissipate the chip. In the above process of disposing the heat dissipation module, a certain mechanical stress will be generated on the chip package.

However, as the power demand of the device gradually increases, the The size requirement will also increase, and the mechanical stress generated by the dissipating module on the circuit board will also be greater. This will result in a reduction in the flatness of the chip package and increase the risk of solder ball deformation.

The present invention provides an electronic structure and a manufacturing method thereof, which can maintain good flatness, and at the same time prevent the conductive structure from being squeezed and deformed by gravity, thereby maintaining good electrical effects.

The invention provides an electronic structure, which includes a substrate, a circuit board, a plurality of conductive structures and a plurality of supporting structures. The substrate has a first surface and a second surface opposite to each other, and has a plurality of first connection pads on the first surface. The circuit board is disposed on the substrate, has a third surface and a fourth surface opposite to each other, and has a plurality of second connection pads on the third surface. The conductive structure is respectively connected to the first connection pad and the second connection pad. The support structure is respectively connected to at least one of the first connection pad or the second connection pad, wherein the support structure and the conductive structure are electrically insulated from each other, and the structural strength of the support structure is greater than that of the conductive structure.

The present invention also provides a method for manufacturing an electronic structure, including: providing a combination of a substrate, a plurality of conductive structures, and a plurality of supporting structures, wherein the substrate has a plurality of first connection pads; and connecting the conductive structure to a circuit board, wherein the supporting structure The conductive structure is respectively connected to the first connection pad of the substrate. The support structure and the conductive structure are electrically insulated from each other, and the structural strength of the support structure is greater than that of the conductive structure.

The present invention also provides an electronic structure manufacturing method, including: providing a base A combination of a board and a plurality of conductive structures, wherein the substrate has a plurality of first connection pads; and a combination of connecting the conductive structure to a circuit board and a plurality of supporting structures, wherein the supporting structure and the conductive structure are respectively connected to the second connections of the circuit board pad. The support structure and the conductive structure are electrically insulated from each other, and the structural strength of the support structure is greater than that of the conductive structure.

Based on the above, in the electronic structure and the manufacturing method thereof of the present invention, a support structure with a stronger structure than the conductive structure is arranged between the substrate and the circuit board to provide a good support effect. In this way, the good support effect provided by the support structure can maintain the electronic structure with good flatness. In addition, if the heat sink is configured, because the supporting structure is symmetrically arranged, it can also prevent the conductive structure from being squeezed and deformed by gravity, thereby maintaining the electronic structure with good electrical effects.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

10: chip

20: The first template

30: second template

100, 100A, 100B, 100C1, 100C2, 100D1, 100D2, 100E1, 100E2, 100F1, 100F2, 100F3, 100F4, 100G, 100H, 100I, 100J, 100K: electronic devices

110: substrate

112: The first connection pad

114: The first line structure

120: circuit board

122: second connecting pad

124: Second line structure

130: conductive structure

140, 140A, 140B: supporting structure

150: Adhesive layer

G: gap

M: solder mask

P1, P2: connection layer

S1: First side

S2: Second side

S3: Third side

S4: Fourth side

1A to 1H are schematic cross-sectional views of an electronic structure manufacturing method according to an embodiment of the present invention in sequence.

2A to 2B are schematic cross-sectional views of a method of manufacturing an electronic structure according to another embodiment of the present invention in sequence.

3A to 3B are schematic cross-sectional views of a manufacturing method of an electronic structure part according to another embodiment of the present invention in sequence.

4A and 4B are respectively cross-sectional views of the electronic structure of other embodiments of the present invention Schematic diagram.

5A and 5B are respectively schematic cross-sectional views of the electronic structure of other embodiments of the present invention.

6A to 6F are respectively schematic cross-sectional views of electronic structures of other embodiments of the present invention.

7A to 7C are schematic top views of partial electronic structures of other embodiments of the present invention.

8A to 8H are schematic cross-sectional views of a method of manufacturing an electronic structure according to another embodiment of the present invention in sequence.

FIG. 9 is a flowchart of steps of a method for manufacturing an electronic structure according to an embodiment of the present invention.

FIG. 10 is a flowchart of steps of a method for manufacturing an electronic structure according to another embodiment of the present invention.

11 is a schematic cross-sectional view of an electronic structure according to another embodiment of the invention.

12 is a schematic cross-sectional view of an electronic structure according to another embodiment of the invention.

1A to 1H are schematic cross-sectional schematic diagrams of an electronic structure manufacturing method according to an embodiment of the present invention. Please refer to FIG. 1A first. This embodiment provides a manufacturing method of an electronic structure (see electronic structure 100 in FIG. 1H). In the manufacturing method, first, a combination of a substrate 110 and a plurality of connection layers P1 is provided. The substrate 110 has a plurality of first connection pads 112. In detail, the substrate 110 has a first surface S1 and a second surface opposite to each other. S2, and the plurality of first connecting pads 112 are located on the first surface S1, a part (the first One part) of the first connection pad 112 is not connected to the connection layer P1, and the plurality of connection layers P1 are respectively connected to the other part (the second part) of the first connection pad 112. In this embodiment, a first template 20 corresponding to the position of the first connection pad 112 of the first part can be formed or additionally configured on the substrate 110 first, and then these connection layers P1 are respectively arranged on the first template 20 corresponding to the first connection In the opening at the position of the pad 112, the first template 20 and the corresponding connection layers P1 do not overlap each other in a direction perpendicular to the substrate 110. In this embodiment, the connection layer P1 is a solder paste, but in other embodiments, a flux can be selected as required, and the invention is not limited to this. In addition, in this embodiment, the center of the second surface S2 of the substrate 110 is suitable for connecting at least one chip 10, as shown in FIG. 1A.

Please refer to Figure 1B. Then, after the above steps, a plurality of supporting structures 140 are arranged on the corresponding connection layer P1 to be connected to the substrate 110 through the corresponding connection layer P1. In other words, in this step, a combination of the substrate 110, the multiple connection layers P1, and the multiple support structures 140 is formed. In this embodiment, the support structure 140 is, for example, a copper pillar, a copper ring, or other block structure with a structural strength greater than that of a solder ball, and the present invention is not limited thereto. In addition, in this embodiment, the support structure 140 is symmetrically distributed on the substrate 110. Specifically, in this embodiment, taking the center of the substrate 110 as the center of symmetry, the distribution positions of the supporting structures 140 are correspondingly and symmetrically arranged at the edge and the center of the substrate 110, where the center is the corresponding wafer 10 Relative position. In other words, the orthographic projection of a part of the support structure 140 on the substrate 110 overlaps the orthographic projection of the wafer 10 on the substrate 110, and the orthographic projection of the other part of the support structure 140 on the substrate 110 does not overlap the orthographic projection of the wafer 10 on the substrate 110. Substrate 110 Orthographic projection on.

Please refer to Figure 1C. Then, after the above steps, the formed or additionally configured first template 20 is removed for subsequent manufacturing steps.

Please refer to Figure 1D. Then, after the above steps, a second template 30 corresponding to the position of another part of the first connection pad 112 is formed or additionally configured on the substrate 110, and a connection layer is respectively arranged at the position of the first connection pad 112 of the first part where no component has been arranged. P2 for subsequent production steps. Wherein, the second template 30 and the corresponding connection layers P2 do not overlap each other in a direction perpendicular to the substrate 110. In this embodiment, the connection layer P2 is flux, but in other embodiments, a solder paste can be selected as required, and the invention is not limited to this.

Please refer to Figure 1E. Next, after the above steps, a plurality of conductive structures 130 are configured to be connected to the first connection pad 112 of the first part via the corresponding connection layer P2. In other words, in this step, a combination of the substrate 110, the plurality of conductive structures 130, and the plurality of support structures 140 is formed. The conductive structure 130 is, for example, a solder ball. In addition, it can be seen from the related description of FIG. 1B above that the support structure 140 is not the conductive structure 130, and the structural strength of the support structure 140 is greater than the structural strength of the conductive structure 130. In addition, in this embodiment, the support structures 140 and the conductive structures 130 are electrically insulated from each other. That is, in the substrate 110 or other connected circuit board circuits, the support structure 140 and the conductive structure 130 are electrically non-conductive. In addition, the support structure 140 has nothing to do with the signal conduction of the chip 10, that is, the support structure 140 does not provide a conduction path so that the signal of the chip 10 or the substrate 110 can be conducted through the support structure 140; on the contrary, the conductive structure 130 provides a conduction path for the chip 10 or the signal of the substrate 110 can be transparent The conductive structure 130 is turned on.

Please refer to Figure 1F. Then, after the above steps, the formed or additionally configured second template 30 is removed to expose the conductive structure 130 and the supporting structure 140 for subsequent manufacturing steps. In addition, in this embodiment, the conductive structure 130 and the connection layer P2 are made of the same material, so the junction boundary between the two is blurred, and may even be fused together due to thermal deformation. Conversely, because the material of the support structure 140 and the connection layer P1 are different, the joint boundary between the two is clear. In other embodiments, the step of configuring the support structure 140 in FIG. 1B can be adjusted to the step of configuring the conductive structure 130 in FIG. 1E according to requirements. The present invention does not have the order of configuring the conductive structure 130 and configuring the support structure 140. limit.

Please refer to Figure 1G. Then, after the above steps, a combination of a circuit board 120 and a plurality of connection layers P1 is provided, wherein the circuit board 120 has a plurality of second connection pads 122. In detail, the circuit board 120 has a third surface S3 and a fourth surface S4 opposite to each other, and the plurality of second connection pads 122 are located on the third surface S3. The multiple connection layers P1 on the circuit board 120 are respectively connected to the second connection pads 122. In this embodiment, a template (not shown) corresponding to the position of the second connection pad 122 may be formed or additionally configured on the circuit board 120 first, and then these connection layers P1 are respectively arranged at the position of the second connection pad 122 corresponding to the above-mentioned template. In the opening. In this embodiment, the connection layer P1 on the circuit board 120 can be selected by using flux or solder paste as required, and the invention is not limited to this. In this embodiment, the circuit board 120 includes a circuit structure (not shown).

Please refer to Figure 1H. Next, after the above steps, the substrate 110, The combination of one conductive structure 130 and a plurality of supporting structures 140 is connected to the circuit board 120. In detail, in this step, the circuit board 120 is disposed on the substrate 110, and the plurality of conductive structures 130 and the plurality of support structures 140 are respectively connected to the second connection pad 122 via the connection layer P1 to form the electronic structure 100. In addition, in this embodiment, the conductive structure 130 and the connection layer P1 on the circuit board 120 are made of the same material, so the bonding boundary between the two is blurred, and may even be fused together due to thermal deformation. Conversely, because the material of the support structure 140 and the connection layer P1 are different, the joint boundary between the two is clear. In addition, in this embodiment, the circuit structure of the circuit board 120 and the support structure 140 are electrically insulated from each other. In other words, the support structure 140 does not provide a conductive path so that the signal between the circuit board 120 and the chip 10 or the substrate 110 can be conducted through the support structure 140. In addition, when the substrate 110 and the circuit board 120 are combined, the supporting structure 140 having a stronger structure than the conductive structure 130 can provide a good supporting effect between the substrate 110 and the circuit board 120, but does not provide signal conduction. In this way, the electronic structure 100 can be maintained with good flatness due to the good supporting effect provided by the supporting structure 140. In addition, if a heat sink (not shown) is provided, because the support structure 140 is symmetrically arranged, it can also prevent the conductive structure 130 from being squeezed and deformed by gravity, thereby maintaining the electronic structure 100 with good electrical effects.

2A to 2B are schematic cross-sectional diagrams of a manufacturing method of an electronic structure according to another embodiment of the present invention in sequence. Please refer to Figure 2A first. In this embodiment, after the steps shown in FIG. 1F, a manufacturing method similar to that shown in FIG. 1G can be performed. The difference between the two is that, in this embodiment, the circuit board 120 is configured to correspond to the conductive structure 130 has multiple connection layers P1, and the configuration corresponding to the support structure 140 has multiple One adhesive layer 150, that is, two different film layers are configured on the circuit board 120. In this way, the connection layer can be saved, and at the same time, the support structure 140 is connected to the adhesive layer 150 of the circuit board 120 to produce electrical insulation. In some embodiments, the adhesive layer 150 can also be used to replace part of the connection layer P1 on the substrate 110 (for example, the connection layer P1 connected to the support structure 140), so that the support structure 140 is connected to the first substrate 110 through the adhesion layer 150. The connection pad 112, the present invention is not limited to this.

Please refer to Figure 2B. Next, after the above steps, the combination of the substrate 110, the plurality of conductive structures 130, and the plurality of support structures 140 is connected to the circuit board 120 to form the electronic structure 100A. Therefore, after the substrate 110 and the circuit board 120 are combined, the supporting structure 140 having a stronger structure than the conductive structure 130 can provide a good supporting effect between the substrate 110 and the circuit board 120. Moreover, since the support structure 140 can be symmetrically arranged, the good support effect provided by the support structure 140 can maintain the electronic structure 100A with good flatness, while preventing the conductive structure 130 from being squeezed and deformed by gravity, thereby maintaining the electronic structure 100A Has good electrical effects. In addition, because the adhesive layer 150 with electrical insulation is used to connect the support structure 140, the circuit design near the adhesive layer 150 on the substrate 110 will be more flexible; the circuit design near the adhesive layer 150 in the circuit board 120 is the same.

3A to 3B are schematic cross-sectional views of a manufacturing method of an electronic structure part according to another embodiment of the present invention in sequence. Please refer to Figure 3A first. In this embodiment, after the steps shown in FIG. 1F, a manufacturing method similar to that shown in FIG. 1G can be performed. The difference between the two is that, in this embodiment, the circuit board 120 is configured to correspond to the conductive structure 130 has multiple connection layers P2, while the configuration corresponding to the support structure 140 can save Slightly configure the connection layer. In other words, the supporting structure 140 is connected to the circuit board 120 in abutting manner. In this way, the use of connecting layers can be saved, and the subsequent electronic structure can be completed at the same time, because there can be some gaps G between the support structure 140 and the circuit board 120 (shown in FIG. 3B), and the assembly can be slightly elastic or slightly misaligned. space. In some embodiments, the supporting structure 140 can also be connected to the substrate 110 in abutting manner, and the invention is not limited thereto.

Please refer to Figure 3B. Next, after the above steps, the combination of the substrate 110, the plurality of conductive structures 130, and the plurality of support structures 140 is connected to the circuit board 120 to form an electronic structure 100B. The support structure 140 of the electronic structure 100B and the circuit board 120 There may be some gaps G. Therefore, when the substrate 110 is combined with the circuit board 120, the supporting structure 140 having a stronger structure than the conductive structure 130 can provide a good supporting effect between the substrate 110 and the circuit board 120, and has a buffer space. In this way, the good support effect provided by the support structure 140 can maintain the electronic structure 100B with good flatness, while preventing the conductive structure 130 from being deformed by gravity, thereby maintaining the electronic structure 100B with good electrical effects.

4A and 4B are respectively schematic cross-sectional views of the electronic structure of other embodiments of the present invention. Please refer to Figure 4A first. The electronic structure 100C1 of this embodiment is similar to the electronic structure 100 of FIG. 1H. The difference between the two is that, in this embodiment, the support structure 140A can select passive components, such as a dummy capacitor, so that the support structure 140A provides a good support effect between the substrate 110 and the circuit board 120, but the present invention does not Not limited to this. Please refer to Figure 4B again. The electronic structure 100C2 of this embodiment is similar to the electronic structure 100C1 of FIG. 4A. The difference between the two is that in this embodiment, The connection layer configured on the circuit board 120 corresponding to the support structure 140A may be omitted. In other words, the supporting structure 140A is connected to the circuit board 120 in abutting manner. Therefore, in addition to saving the use of the connection layer, since there may be some gaps G between the support structure 140A and the circuit board 120, it is possible to have a slight elastic or slightly dislocated assembly space in the subsequent steps of completing the electronic structure 100C2. In this way, the good support effect provided by the support structure 140A can maintain the electronic structure 100C2 to have a good flatness, while preventing the conductive structure 130 from being deformed by gravity, thereby maintaining the electronic structure 100C2 with good electrical effects. In some embodiments, the support structure 140A can also be connected to the substrate 110 in abutting manner, and the invention is not limited to this.

5A and 5B are respectively schematic cross-sectional views of the electronic structure of other embodiments of the present invention. Please refer to Figure 5A first. The electronic structure 100D1 of this embodiment is similar to the electronic structure 100 of FIG. 1H. The difference between the two is that, in this embodiment, the support structure 140B can select tin alloy balls, such as a copper core tin ball, so that the support structure 140B provides a good supporting effect between the substrate 110 and the circuit board 120. However, the present invention is not limited to this. Please refer to Figure 5B again. The electronic structure 100D2 of this embodiment is similar to the electronic structure 100D1 of FIG. 5A. The difference between the two is that, in this embodiment, the connection layer disposed on the circuit board 120 corresponding to the support structure 140B can be omitted. In other words, the supporting structure 140B is connected to the circuit board 120 in abutting manner. Therefore, in addition to saving the use of the connection layer, since there may be some gaps G between the support structure 140B and the circuit board 120, it is possible to have a slight elastic or slightly dislocated assembly space in the subsequent steps of completing the electronic structure 100D2. In this way, the good support effect provided by the support structure 140B can maintain the electronic structure 100D2 to have a good level. The straightness prevents the conductive structure 130 from being squeezed and deformed by gravity, thereby maintaining the electronic structure 100D2 with good electrical effects. In some embodiments, the supporting structure 140B can also be connected to the substrate 110 in abutting manner, and the invention is not limited to this.

6A to 6F are respectively schematic cross-sectional views of electronic structures of other embodiments of the present invention. 7A to 7C are schematic top views of partial electronic structures of other embodiments of the present invention. Please refer to Figure 6A and Figure 7A first. The cross section of the electronic structure 100E1 shown in FIG. 6A is the cross section shown along the section line A-A' in FIG. 7A. The electronic structure 100E1 of this embodiment is similar to the electronic structure 100 of FIG. 1H. The difference between the two is that in this embodiment, the distribution mode of the support structure 140 between the substrate 110 and the circuit board 120 is different from the distribution mode shown in FIG. 1H. Specifically, in this embodiment, the orthographic projection of the support structure 140 on the substrate 110 presents two ring-shaped rectangles distributed on the periphery of the orthographic projection of the wafer 10 on the substrate 110 and the outermost periphery of the substrate 110, as shown in FIG. 7A As shown, the support structure in FIG. 1H is roughly disposed under the wafer 10 (at the center of the wafer). Therefore, it can be adapted to different types of electronic devices 100E1 and provide a good supporting effect, but the invention is not limited to this. Please refer to Figure 6B again. The electronic structure 100E2 of this embodiment is similar to the electronic structure 100E1 of FIG. 6A. The difference between the two is that, in this embodiment, the connection layer corresponding to the supporting structure 140 on the circuit board 120 can be omitted. In other words, the supporting structure 140 is connected to the circuit board 120 in abutting manner. Therefore, in addition to saving the use of the connection layer, since there may be some gaps G between the support structure 140 and the circuit board 120, it is possible to have a slight elastic or slightly misaligned assembly space in the subsequent steps of completing the electronic structure 100E2. In this way, the good support provided by the support structure 140 can be The supporting effect maintains the electronic structure 100E2 to have good flatness, and at the same time prevents the conductive structure 130 from being squeezed and deformed by gravity, thereby maintaining the electronic structure 100E2 to have a good electrical effect. In some embodiments, the supporting structure 140 can also be connected to the substrate 110 in abutting manner, and the invention is not limited thereto.

Please refer to Figure 6C. The electronic structure 100F1 of this embodiment is similar to the electronic structure 100E1 of FIG. 6A. The difference between the two is that in this embodiment, the support structure 140B uses tin alloy balls, such as a copper core tin ball, so that the support structure 140B provides a good support effect between the substrate 110 and the circuit board 120. On the other hand, the electronic structure 100F1 of this embodiment is similar to the electronic structure 100D1 of FIG. 5A. The difference between the two is that the orthographic projection of the support structure 140B in FIG. 6C on the substrate 110 presents two ring-shaped rectangles arranged continuously on the periphery of the wafer 10, while the support structure 140B in FIG. 5A is roughly located below the wafer 10 (at the center of the wafer). ). Please refer to Figure 6D again. The electronic structure 100F2 of this embodiment is similar to the electronic structure 100F1 of FIG. 6A. The difference between the two is that, in this embodiment, the connection layer disposed on the substrate 110 corresponding to the support structure 140B can be omitted. In other words, the supporting structure 140B is connected to the substrate 110 in abutting manner. Therefore, in addition to saving the use of the connection layer, since there may be some gaps G between the support structure 140B and the substrate 110, the subsequent steps of completing the electronic structure 100F2 can have a slightly elastic or slightly misplaced assembly space. In this way, the good support effect provided by the support structure 140B can maintain the electronic structure 100F2 to have a good flatness, and at the same time prevent the conductive structure 130 from being squeezed and deformed by gravity, thereby maintaining the electronic structure 100F2 with good electrical effects. In some embodiments, the supporting structure 140B can also be connected to the circuit board in abutting manner 120. The present invention is not limited to this.

Please refer to Figure 6E. The electronic structure 100F3 of this embodiment is similar to the electronic structure 100E1 of FIG. 6A. The difference between the two is that, in this embodiment, the supporting structure 140B uses passive components, such as dummy capacitors, so that the supporting structure 140B provides a good supporting effect between the substrate 110 and the circuit board 120. On the other hand, the electronic structure 100F3 of this embodiment is similar to the electronic structure 100D1 of FIG. 4A. The difference between the two is that the orthographic projection of the support structure 140B in FIG. 6E on the substrate 110 presents two ring-shaped rectangles distributed on the periphery of the orthographic projection of the wafer 10 on the substrate 110, while the support structure 140A in FIG. 4A is roughly located on the wafer. 10 below (at the center of the wafer). Please refer to Figure 6F again. The electronic structure 100F4 of this embodiment is similar to the electronic structure 100F3 of FIG. 6E. The difference between the two is that, in this embodiment, the connection layer disposed on the circuit board 120 corresponding to the support structure 140B can be omitted. In other words, the supporting structure 140B is connected to the circuit board 120 in abutting manner. Therefore, in addition to saving the use of the connection layer, since there may be some gaps G between the support structure 140B and the circuit board 120, it is possible to have a slight elastic or slightly misaligned assembly space in the subsequent steps of completing the electronic structure 100F4. In this way, the good support effect provided by the support structure 140B can maintain the electronic structure 100F4 to have a good flatness, while preventing the conductive structure 130 from being deformed by gravity, thereby maintaining the electronic structure 100F4 with good electrical effects. In some embodiments, the supporting structure 140B can also be connected to the substrate 110 in abutting manner, and the invention is not limited thereto.

Please refer to Figure 7B. The electronic structure 100G of this embodiment is similar to the electronic structure 100E1 of FIG. 7A. The difference between the two is that in this embodiment, the supporting structure The distribution manner of 140 between the substrate 110 and the circuit board 120 is different from the distribution manner shown in FIG. 7A. Specifically, in this embodiment, the supporting structures 140 are distributed on the substrate 110 in an L shape, as shown in FIG. 7B. In detail, in this embodiment, the orthographic projection of the support structure 140 on the substrate 110 presents at least one L shape distributed on the periphery of the orthographic projection of the wafer 10 on the substrate 110 or the outermost periphery of the substrate 110. More specifically, the supporting structure 140 is arranged in an L shape at the four corners of the periphery of the wafer 10 and the four corners of the substrate 110. Therefore, it can be adapted to different types of electronic devices 100G and provide a good supporting effect, but the invention is not limited to this.

Please refer to Figure 7C. The electronic structure 100H of this embodiment is similar to the electronic structure 100E1 of FIG. 7A. The difference between the two is that in this embodiment, the distribution mode of the support structure 140 between the substrate 110 and the circuit board 120 is different from the distribution mode shown in FIG. 7A. Specifically, in this embodiment, the supporting structures 140 are distributed on the substrate 110 with intervals, as shown in FIG. 7C. In detail, in this embodiment, the orthographic projection of the support structure 140 on the substrate 110 presents at least one ring-shaped rectangular dot arrangement distributed on the periphery of the orthographic projection of the wafer 10 on the substrate 110 or the outermost periphery of the substrate 110. Therefore, it can be adapted to different types of electronic devices 100H and provide a good supporting effect, but the present invention is not limited to this.

It should be particularly noted that the distribution of the support structure 140 between the substrate 110 and the circuit board 120 in FIGS. 7A to 7C can also be applied to the electronic structures in FIGS. 1 to 6, and the end depends on different requirements. In addition, the support structure 140 of FIGS. 7A to 7C is distributed symmetrically between the substrate 110 and the circuit board 120.

FIGS. 8A to 8H show the manufacturing of an electronic structure according to another embodiment of the present invention in sequence Schematic cross-section of the method. Please refer to Figure 8A first. This embodiment provides a method for manufacturing an electronic structure (see electronic structure 100I in FIG. 8H). In this manufacturing method, first, a combination of a substrate 110 and a plurality of connection layers P2 is provided, which is similar to the manufacturing method of the electronic structure 100 shown in FIG. 1A. The difference between the two is that, in this embodiment, the spacing between the first connection pads 112 on the first surface S1 of the substrate 110 is different, and the first template 20 formed or additionally configured on the substrate 110 corresponds to the first Connection pad 112 position. Wherein, the first template 20 and the corresponding connection layers P2 do not overlap with each other in one direction of the vertical substrate 110.

Please refer to Figure 8B. Then, after the above steps, a plurality of conductive structures 130 are arranged on the corresponding connection layer P2 to be connected to the substrate 110 via the corresponding connection layer P2.

Please refer to Figure 8C. Then, after the above steps, the formed or additionally configured first template 20 is removed for subsequent manufacturing steps.

Please refer to Figure 8D. On the other hand, in this manufacturing method, a combination of a circuit board 120 and a plurality of connection layers P1 can be additionally provided. In this embodiment, a second template 30 corresponding to the position of the non-conductive structure 130 (the position of the conductive structure 130 is shown in FIG. 8C) is formed or additionally configured on the circuit board 120 for subsequent manufacturing steps. Wherein, the second template 30 and the corresponding connection layers P1 do not overlap with each other in a direction perpendicular to the circuit board 120.

Please refer to Figure 8E. Then, after the above steps, a plurality of support structures 140 are arranged on the corresponding connection layer P1 to be connected to the circuit board 120 through the corresponding connection layer P1.

Please refer to Figure 8F. Then, after the above steps, the formed or additionally configured second template 30 is removed for subsequent manufacturing steps. In other embodiments, the part of the electronic structure shown in FIG. 8F can be made according to requirements prior to the part of the electronic structure shown in FIG. 8C. The present invention provides the part of the electronic structure shown in FIG. 8C and the part of the electronic structure shown in FIG. 8F. The order of precedence is unlimited.

Please refer to Figure 8G and Figure 8H. Next, after the above steps, a plurality of connecting layers P1 are arranged on the circuit board 120 corresponding to the conductive structure 130 in FIG. 8C, so as to connect the combination of the substrate 110 and the plurality of conductive structures 130 to the circuit board 120 having the connecting layer P1 And a combination of multiple supporting structures 140. That is, part of the electronic structure shown in FIG. 8C is combined with the part of the electronic structure shown in FIG. 8F. In this embodiment, because the support structure 140 is connected to the substrate 110 in abutting manner, when the substrate 110 is combined with the circuit board 120, there may be some gaps G between the support structure 140 and the substrate 110, and have a slight elasticity or a slight elasticity. Due to the dislocation of the assembly space, the supporting structure 140 with greater structural strength than the conductive structure 130 will provide a good supporting effect between the substrate 110 and the circuit board 120. In this way, the good support effect provided by the support structure 140 can maintain the electronic structure 100I with good flatness, while preventing the conductive structure 130 from being squeezed and deformed by gravity, thereby maintaining the electronic structure 100I with good electrical effects. In addition, because the support structure 140 is connected to the substrate 110 in abutting manner, there is no need to configure the first connection pad 112 on the substrate 110 corresponding to the position of the support structure 140, so that the position on the substrate 110 close to the support structure 140 Circuit design will be more flexible. Conversely, if the supporting structure 140 is located on the circuit board 120 in abutting manner, the circuit on the circuit board 120 that is close to the supporting structure 140 The design will also be more flexible.

FIG. 9 is a flowchart of steps of a method for manufacturing an electronic structure according to an embodiment of the present invention. Please refer to Figure 1G, Figure 1H and Figure 9. This embodiment provides a manufacturing method of an electronic structure, which can be applied at least to the electronic structure 100 shown in FIG. 1H, but the present invention is not limited to this. For the convenience of description, the electronic structure 100 shown in FIG. 1H will be taken as an example below. In the method for manufacturing the electronic structure 100 provided in this embodiment, first, step S200 is performed to provide a combination of a substrate 110, a plurality of conductive structures 130, and a plurality of supporting structures 140, wherein the substrate 110 has a plurality of first connection pads 112 , As shown in Figure 1G.

Next, after the above step S200, step S210 is performed to connect the conductive structure 130 to a circuit board 120, as shown in FIG. 1H. In detail, the support structure 140 and the conductive structure 130 are respectively connected to the first connection pad 112 of the substrate 110. The support structure 140 and the conductive structure 130 are electrically insulated from each other, and the structural strength of the support structure 140 is greater than that of the conductive structure 130. Therefore, after the substrate 110 and the circuit board 120 are combined, the supporting structure 140 having a stronger structure than the conductive structure 130 can provide a good supporting effect between the substrate 110 and the circuit board 120. In this way, the good support effect provided by the support structure 140 can maintain the electronic structure 100 to have a good flatness, while preventing the conductive structure 130 from being deformed by gravity, thereby maintaining the electronic structure 100 with good electrical effects.

FIG. 10 is a flowchart of steps of a method for manufacturing an electronic structure according to another embodiment of the present invention. Please refer to Figure 8G, Figure 8H and Figure 10. This embodiment provides a manufacturing method of an electronic structure, which can be applied at least to the electronic structure 100I shown in FIG. 8H, but The present invention is not limited to this. For convenience of description, the electronic structure 100I shown in FIG. 8H will be taken as an example below. In the manufacturing method of the electronic structure 100 provided in this embodiment, first, step S300 is performed to provide a combination of a substrate 110 and a plurality of conductive structures 130, wherein the substrate 110 has a plurality of first connection pads 112, as shown in FIG. 8G .

Then, after the above step S300, step S310 is performed to connect the conductive structure 130 to a circuit board 120 and a combination of a plurality of supporting structures 140, as shown in FIG. 8H. In detail, the support structure 140 and the conductive structure 130 are respectively connected to the second connection pad 122 of the circuit board 120. The support structure 140 and the conductive structure 130 are electrically insulated from each other, and the structural strength of the support structure 140 is greater than that of the conductive structure 130. Therefore, after the substrate 110 and the circuit board 120 are combined, the supporting structure 140 having a stronger structure than the conductive structure 130 can provide a good supporting effect between the substrate 110 and the circuit board 120. In this way, the good support effect provided by the support structure 140 can maintain the electronic structure 100I with good flatness, while preventing the conductive structure 130 from being squeezed and deformed by gravity, thereby maintaining the electronic structure 100I with good electrical effects.

11 is a schematic cross-sectional view of an electronic structure according to another embodiment of the invention. Please refer to Figure 11. The electronic structure 100J of this embodiment is similar to the electronic structure 100B of FIG. 3B. The difference between the two is that, in this embodiment, a solder mask M can be configured to cover the second circuit structure 124 in the circuit board 120 at the position on the circuit board 120 corresponding to the support structure 140. In this way, the support structure 140 and the circuit board 120 can be electrically insulated from each other through the solder mask M, and the electronic structure 100J can be routed through the space below the solder mask M. Regarding the solder mask M in this embodiment, it can be applied to other embodiments according to requirements, and it is not limited thereto.

12 is a schematic cross-sectional view of an electronic structure according to another embodiment of the invention. Please refer to Figure 12. The electronic structure 100K of this embodiment is similar to the electronic structure 100J of FIG. 11. The difference between the two is that, in this embodiment, a solder mask M can be configured to cover the first circuit structure 114 in the substrate 110 at the position on the substrate 110 corresponding to the support structure 140. In this way, the support structure 140 and the substrate 110 can be electrically insulated from each other through the solder mask M, and the electronic structure 100K can be routed through the space above the solder mask M. Regarding the solder mask M in this embodiment, it can be applied to other embodiments according to requirements, and it is not limited thereto.

In summary, in the electronic structure and the manufacturing method thereof of the present invention, a support structure with a stronger structure than a conductive structure is arranged between the substrate and the circuit board to provide a good support effect. In this way, the electronic structure can be maintained with good flatness due to the good supporting effect provided by the supporting structure. In addition, if the heat sink is configured, because the supporting structure is symmetrically arranged, it can also prevent the conductive structure from being squeezed and deformed by gravity, thereby maintaining the electronic structure with good electrical effects.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be determined by the scope of the attached patent application.

10: chip

100: electronic device

110: substrate

112: The first connection pad

120: circuit board

122: second connecting pad

130: conductive structure

140: support structure

P1: Connection layer

S1: First side

S2: Second side

S3: Third side

S4: Fourth side

Claims (37)

An electronic structure including: A substrate having a first surface and a second surface opposite to each other, and having a plurality of first connection pads on the first surface; A circuit board disposed on the substrate, having a third surface and a fourth surface opposite to each other, and having a plurality of second connection pads on the third surface; A plurality of conductive structures are respectively connected to the first connection pads and the second connection pads; and A plurality of support structures are respectively connected to at least one of the first connection pads or the second connection pads, wherein the support structures and the conductive structures are electrically insulated from each other, and the structural strength of the support structures is greater than The structural strength of these conductive structures. In the electronic structure described in item 1 of the scope of patent application, one end of the supporting structures abuts against the substrate or the circuit board. According to the electronic structure described in item 1 of the scope of patent application, the supporting structures are connected to at least one of the substrate or the circuit board by welding. The electronic structure described in item 1 of the scope of patent application also includes: A solder mask layer is disposed on the substrate to cover a first circuit structure in the substrate or disposed on the circuit board to cover a second circuit structure in the circuit board. According to the electronic structure described in claim 1, wherein the circuit board includes a circuit structure, and the circuit structure and the supporting structures are electrically insulated from each other. As for the electronic structure described in claim 1, wherein the center of the second surface of the substrate is suitable for connecting at least one chip, and the center of the substrate is the center of symmetry, and at least a part of the support structures are The orthographic projection of the substrate on the substrate overlaps the orthographic projection of the at least one chip on the substrate. As for the electronic structure described in claim 1, wherein the center of the second surface of the substrate is suitable for connecting at least one chip, and the center of the substrate is the center of symmetry, and at least a part of the support structures are The orthographic projection on the substrate does not overlap the orthographic projection of the at least one chip on the substrate. The electronic structure described in item 7 of the scope of patent application, wherein the orthographic projection of the supporting structures on the substrate presents at least one ring-shaped rectangle distributed on the periphery of the orthographic projection of the at least one chip on the substrate or on the substrate The outermost part. The electronic structure described in item 7 of the scope of patent application, wherein the orthographic projection of the supporting structures on the substrate presents at least one ring-shaped rectangular dot arrangement distributed on the periphery of the orthographic projection of the at least one chip on the substrate or The outermost part of the substrate. As for the electronic structure described in item 7 of the scope of patent application, wherein the orthographic projection of the supporting structures on the substrate presents at least one L shape distributed on the periphery of the orthographic projection of the at least one chip on the substrate or the outermost portion of the substrate. The periphery. As for the electronic structure described in item 1 of the scope of patent application, the supporting structures are copper pillars, copper rings, passive components or copper core solder balls. The electronic structure described in item 1 of the scope of patent application also includes: A plurality of adhesive layers are suitable for connecting between the supporting structures and the substrate or at least one of the supporting structures and the circuit board, and the adhesive layer is made of an electrically insulating material. An electronic structure manufacturing method, including: A combination of a substrate, a plurality of conductive structures and a plurality of supporting structures is provided, wherein the substrate has a plurality of first connection pads; and The conductive structures are connected to a circuit board, wherein the support structures and the conductive structures are respectively connected to the first connection pads of the substrate, the support structures and the conductive structures are electrically insulated from each other, and the supports The structural strength of the structure is greater than the structural strength of the conductive structures. According to the electronic structure manufacturing method described in item 13 of the scope of patent application, the supporting structures abut against the circuit board. According to the electronic structure manufacturing method described in item 13 of the scope of patent application, the supporting structures are connected to at least one of the substrate or the circuit board by welding. The electronic structure manufacturing method described in item 13 of the scope of patent application also includes: A solder mask is arranged on the substrate to cover a first circuit structure in the substrate or the solder mask is configured on the circuit board to cover a second circuit structure in the circuit board. According to the method for manufacturing an electronic structure as described in claim 13, wherein the circuit board includes a circuit structure, and the circuit structure and the supporting structures are electrically insulated from each other. According to the method for manufacturing an electronic structure as described in claim 13, wherein the step of providing the combination of the substrate, the conductive structures and the supporting structures includes: Provide the substrate; Configure a template on the substrate; Connecting the conductive structures and the supporting structures to the substrate; and Remove the template. The electronic structure manufacturing method as described in claim 13, wherein the center of the substrate is suitable for connecting at least one chip, and the center of the substrate is the center of symmetry, and at least a part of the support structures are on the substrate The orthographic projection of is overlapped with the orthographic projection of the at least one chip on the substrate. The electronic structure manufacturing method as described in claim 13, wherein the center of the substrate is suitable for connecting at least one chip, and the center of the substrate is the center of symmetry, and at least a part of the support structures are on the substrate The orthographic projection does not overlap the orthographic projection of the at least one chip on the substrate. According to the electronic structure manufacturing method described in claim 20, wherein the orthographic projection of the support structures on the substrate presents at least one ring-shaped rectangle distributed on the periphery or the orthographic projection of the at least one chip on the substrate The outermost part of the substrate. The electronic structure manufacturing method according to claim 20, wherein the orthographic projection of the support structures on the substrate presents at least one ring-shaped rectangular dot arrangement distributed on the orthographic projection of the at least one chip on the substrate The periphery or the outermost part of the substrate. The electronic structure manufacturing method according to claim 20, wherein the orthographic projection of the supporting structures on the substrate presents at least one L shape distributed on the periphery of the orthographic projection of the at least one chip on the substrate or the substrate The outermost part. According to the electronic structure manufacturing method described in claim 13, wherein the supporting structures are respectively adhered to at least one of the substrate or the circuit board by a plurality of adhesive layers. An electronic structure manufacturing method, including: Providing a combination of a substrate and a plurality of conductive structures, wherein the substrate has a plurality of first connection pads; and The conductive structures are connected to a combination of a circuit board and a plurality of support structures, wherein the support structures and the conductive structures are respectively connected to the second connection pads of the circuit board, the support structures and the conductive structures They are electrically insulated from each other, and the structural strength of the supporting structures is greater than the structural strength of the conductive structures. According to the electronic structure manufacturing method described in item 25 of the scope of patent application, the supporting structures abut against the substrate. According to the electronic structure manufacturing method described in item 25 of the scope of patent application, the supporting structures are connected to at least one of the substrate or the circuit board by welding. The electronic structure manufacturing method as described in item 25 of the scope of patent application also includes: A solder mask is arranged on the substrate to cover a first circuit structure in the substrate or the solder mask is arranged on the circuit board to cover a second circuit structure in the circuit board. According to the electronic structure manufacturing method described in the 25th patent application, the circuit board includes a circuit structure, and the circuit structure and the supporting structures are electrically insulated from each other. According to the electronic structure manufacturing method described in item 25 of the scope of patent application, the step of providing the combination of the substrate and the conductive structures includes: Provide the substrate; Disposing a first template on the substrate; Connecting the conductive structures to the substrate; and Remove the first template. For the electronic structure manufacturing method described in item 25 of the scope of patent application, the step of connecting the conductive structures to the circuit board and the combination of the supporting structures includes: Provide the circuit board; Configure a second template on the circuit board; Connecting the conductive structures to the circuit board; and Remove the second template. The electronic structure manufacturing method according to the 25th patent application, wherein the center of the substrate is suitable for connecting at least one chip, and the center of the substrate is the center of symmetry, and at least a part of the support structures are on the substrate The orthographic projection of is overlapped with the orthographic projection of the at least one chip on the substrate. The method for manufacturing an electronic structure according to claim 25, wherein the center of the substrate is suitable for connecting at least one chip, and the center of the substrate is the center of symmetry, and at least a part of the support structures are on the substrate The orthographic projection of is not overlapped with the orthographic projection of the at least one chip on the substrate. According to the electronic structure manufacturing method described in item 33 of the scope of patent application, the orthographic projection of the support structures on the substrate presents at least one ring-shaped rectangle distributed on the periphery or the orthographic projection of the at least one chip on the substrate The outermost part of the substrate. The electronic structure manufacturing method described in item 33 of the scope of patent application, wherein the orthographic projection of the supporting structures on the substrate presents at least one ring-shaped rectangular dot arrangement distributed on the orthographic projection of the at least one chip on the substrate The periphery or the outermost part of the substrate. According to the electronic structure manufacturing method described in claim 33, wherein the orthographic projection of the supporting structures on the substrate presents at least one L shape distributed on the periphery of the orthographic projection of the at least one chip on the substrate or the substrate The outermost part. According to the electronic structure manufacturing method described in claim 25, the supporting structures are adhered to at least one of the substrate or the circuit board by a plurality of adhesive layers.

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