TWI703909B - Manufacturing method of multilayer wiring board - Google Patents
Manufacturing method of multilayer wiring board Download PDFInfo
- Publication number
- TWI703909B TWI703909B TW108110633A TW108110633A TWI703909B TW I703909 B TWI703909 B TW I703909B TW 108110633 A TW108110633 A TW 108110633A TW 108110633 A TW108110633 A TW 108110633A TW I703909 B TWI703909 B TW I703909B
- Authority
- TW
- Taiwan
- Prior art keywords
- metal foil
- layer
- wiring layer
- insulating layer
- laminate
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
提供一種多層配線板的製造方法,電路密著性佳,且能極有效地防止雷射加工造成的內層電路的貫通。該多層配線板的製造方法包含:(a)在第1金屬箔上將第1絕緣層及第2金屬箔依序層積形成第1層積體的工程;(b)形成第2配線層的工程;(c)將第2絕緣層及第3金屬箔依序層積形成第2層積體的工程;(d)形成第1通孔和第2通孔的工程;(e)形成包含第1配線層、第2配線層及第3配線層的多層配線板的工程;第2金屬箔的至少與第1絕緣層對向的面,藉由傅立葉轉換紅外分光光度計(FT-IR)測定的波長10.6μm的雷射的反射率為80%以上,且以ISO25178為準據測定的峰的頂點密度Spd為7000個/mm2 以上15000個/mm2 以下。The invention provides a manufacturing method of a multilayer wiring board, which has good circuit adhesion and can effectively prevent the penetration of inner layer circuits caused by laser processing. The manufacturing method of the multilayer wiring board includes: (a) a process of sequentially laminating a first insulating layer and a second metal foil on a first metal foil to form a first laminate; (b) forming a second wiring layer Process; (c) The process of laminating the second insulating layer and the third metal foil in order to form the second laminate; (d) The process of forming the first through hole and the second through hole; (e) The process of forming the second layer 1 Wiring layer, 2nd wiring layer and 3rd wiring layer multilayer wiring board; at least the surface of the second metal foil opposite to the first insulating layer, measured by Fourier transform infrared spectrophotometer (FT-IR) The reflectance of the laser with a wavelength of 10.6μm is 80% or more, and the peak apex density Spd measured according to ISO25178 is 7000/mm 2 or more and 15000/mm 2 or less.
Description
本發明係有關於多層配線板的製造方法。The present invention relates to a method of manufacturing a multilayer wiring board.
近年,為了提升印刷配線板的實裝密度並小型化,廣泛地進行印刷配線板的多層化。這種多層印刷配線板,在多種攜帶用電子機器中,以輕量化及小型化作為目的被利用。接著,該多層印刷配線板,要求層間絕緣層厚度的更加降低、及作為配線板的更薄型化及輕量化。In recent years, in order to increase the mounting density and miniaturization of printed wiring boards, multilayer printed wiring boards have been widely used. Such multilayer printed wiring boards are used for the purpose of weight reduction and miniaturization in various portable electronic devices. Next, the multilayer printed wiring board is required to further reduce the thickness of the interlayer insulating layer, and to reduce the thickness and weight of the wiring board.
作為滿足這種要求的技術,採用利用無芯積層法的多層印刷配線板的製造方法。無芯積層法為不利用所謂的核芯基板,而將絕緣層與配線層交互層積(積層)而多層化的方法。在無芯積層法,為了使支持體與多層印刷配線板的剝離能容易進行,提案使用附載體金屬箔。例如,專利文獻1(特許第4460013號公報)揭示:在附載體金屬箔的金屬箔側將絕緣層及厚度18μm的金屬層依序層積,加工金屬層形成內層電路(第1導體圖案),在內層電路又將絕緣層及金屬箔再依序層積,將載體剝離而形成在內層電路的兩面側具備金屬箔的基板之後,將基板兩面的金屬箔與內層電路通過孔電連接的配線基板的製造方法。又,專利文獻1也揭示:從基板的兩面進行雷射加工形成各個貫通金屬箔及絕緣層到達內層電路的通孔,對基板兩面的金屬箔以乾薄膜施予圖案化之後,藉由電鍍將通孔鍍膜金屬填充,並將外層電路(導體圖案)形成於基板的兩面。 [先前技術文獻] [專利文獻]As a technology to meet this requirement, a manufacturing method of a multilayer printed wiring board using a coreless build-up method is adopted. The coreless build-up method is a method in which an insulating layer and a wiring layer are alternately stacked (stacked) to form multiple layers without using a so-called core substrate. In the coreless build-up method, in order to facilitate the peeling of the support and the multilayer printed wiring board, it is proposed to use a metal foil with a carrier. For example, Patent Document 1 (Patent No. 4460013) discloses that an insulating layer and a metal layer with a thickness of 18 μm are sequentially laminated on the metal foil side of the metal foil with a carrier, and the metal layer is processed to form an inner layer circuit (first conductor pattern) In the inner layer circuit, the insulating layer and the metal foil are layered in sequence, and the carrier is peeled to form a substrate with metal foil on both sides of the inner layer circuit. Then, the metal foil and the inner layer circuit on both sides of the substrate are electrically connected through the holes. Manufacturing method of connected wiring board. In addition, Patent Document 1 also discloses that laser processing is performed from both sides of the substrate to form each through hole that penetrates the metal foil and insulating layer to the inner layer circuit, and the metal foil on both sides of the substrate is patterned with a dry film and then electroplated Fill the through-hole with plating metal, and form outer layer circuits (conductor patterns) on both sides of the substrate. [Prior Technical Literature] [Patent Literature]
[專利文獻1] 特許第4460013號公報[Patent Document 1] Patent No. 4460013
近年,隨著對多層印刷配線板更加要求的薄型化,用於多層配線板的內層電路的金屬箔(以下,稱為「內層金屬箔」)的厚度也跟著降低。關於此點,在記載於專利文獻1的那種配線基板的製造中,也期望使用極薄化的內層金屬箔。不過,將既存的超薄銅箔(例如厚度6μm以上12μm以下)作為內層金屬箔使用時,有在形成層間連接用的通孔的工程中,因雷射加工不只是兩面(外層)的金屬箔及絕緣層也貫通到內層電路而產生孔的問題。In recent years, as the thickness of the multilayer printed wiring board has become more demanding, the thickness of the metal foil used for the inner circuit of the multilayer wiring board (hereinafter referred to as "inner metal foil") has also decreased. In this regard, in the production of the wiring board described in Patent Document 1, it is also desirable to use an extremely thin inner layer metal foil. However, when an existing ultra-thin copper foil (for example, a thickness of 6 μm or more and 12 μm or less) is used as an inner layer metal foil, there is a process of forming through holes for interlayer connection, because laser processing is not only the metal on both sides (outer layer) The foil and the insulating layer also penetrate the inner circuit and cause the problem of holes.
本發明者們現今得到藉由將具備波長10.6μm的雷射的反射率及峰的頂點密度Spd滿足預定條件的特定面的金屬箔作為內層金屬箔使用而進行多層配線板的製造,電路密著性佳,且能極有效地防止雷射加工造成的內層電路的貫通的見解。The inventors have now obtained the manufacture of multilayer wiring boards by using a metal foil on a specific surface that has a 10.6 μm wavelength laser reflectance and peak apex density Spd satisfying predetermined conditions as an inner metal foil. It has good adhesion and can effectively prevent the penetration of the inner circuit caused by laser processing.
因此,本發明的目的提供一種多層配線板的製造方法,電路密著性佳,且能極有效地防止雷射加工造成的內層電路的貫通。Therefore, the object of the present invention is to provide a method for manufacturing a multilayer wiring board, which has good circuit adhesion and can extremely effectively prevent the penetration of the inner layer circuit caused by laser processing.
根據本發明的一態樣,提供一種多層配線板的製造方法,具備: (a)在第1金屬箔上將第1絕緣層及第2金屬箔依序層積形成第1層積體的工程; (b)對前述第2金屬箔施予圖案化形成第2配線層的工程; (c)在形成前述第2配線層的前述第1層積體上將第2絕緣層及第3金屬箔依序層積形成第2層積體的工程; (d)對前述第2層積體從前述第1金屬箔及前述第3金屬箔的各者施予雷射加工,形成貫通前述第1金屬箔及前述第1絕緣層到達前述第2配線層的第1通孔、和貫通前述第3金屬箔及前述第2絕緣層到達前述第2配線層的第2通孔的工程; (e)對前述第2層積體的兩面,施予鍍膜及圖案化以形成通過前述第1通孔、前述第2配線層及前述第2通孔的電連接,形成包含鄰接前述第1絕緣層的第1配線層、由前述第2金屬箔而來的第2配線層、及鄰接前述第2絕緣層的第3配線層的多層配線板的工程; 其中, 前述第2金屬箔的至少與前述第1絕緣層對向的面,藉由傅立葉轉換紅外分光光度計(FT-IR)測定的波長10.6μm的雷射的反射率為80%以上,且以ISO25178為準據測定的峰的頂點密度Spd為7000個/mm2 以上15000個/mm2 以下。According to one aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board, comprising: (a) a process of sequentially laminating a first insulating layer and a second metal foil on a first metal foil to form a first laminate (B) The process of patterning the second metal foil to form a second wiring layer; (c) The second insulating layer and the third metal foil are formed on the first layered body forming the second wiring layer The process of laminating sequentially to form a second laminate; (d) applying laser processing to the second laminate from each of the first metal foil and the third metal foil to form a penetrating through the first metal The process in which the foil and the first insulating layer reach the first through hole of the second wiring layer, and the second through hole that penetrates the third metal foil and the second insulating layer to reach the second wiring layer; (e) Yes Both surfaces of the second laminate are plated and patterned to form electrical connections through the first through hole, the second wiring layer, and the second through hole to form a first insulating layer adjacent to the first insulating layer. The wiring layer, the second wiring layer from the second metal foil, and the multilayer wiring board of the third wiring layer adjacent to the second insulating layer; wherein, the second metal foil is at least insulated from the first On the opposite side of the layer, the reflectance of a 10.6μm laser measured by Fourier Transform Infrared Spectrophotometer (FT-IR) is 80% or more, and the peak apex density Spd measured according to ISO25178 is 7000 Pieces/mm 2 or more and 15000 pieces/mm 2 or less.
[實施形態][Implementation form]
定義 用來特定本發明的參數的定義如以下所示。definition The definitions of the parameters used to specify the present invention are as follows.
本說明書中「波長10.6μm的雷射的反射率」指的是藉由傅立葉轉換紅外光度計(FT-IR)測定的將波長10.6μm的雷射照射試料(金屬箔)表面時的相對於被基準板(例如Au蒸鍍反射鏡)反射的光的量的被試料反射的光的量之比例。波長10.6μm的雷射的反射率的測定,能使用市售的傅立葉轉換紅外光度計,依照本說明書的實施例記載的諸條件進行。此外,因為在雷射加工典型使用的二氧化碳雷射的波長為10.6μm,將傅立葉轉換紅外光度計的雷射波長設為10.6μm。In this manual, the "reflectance of a laser with a wavelength of 10.6 μm" refers to the measurement of the laser with a wavelength of 10.6 μm relative to the surface of the sample (metal foil) measured by a Fourier transform infrared photometer (FT-IR). The ratio of the amount of light reflected by the reference plate (for example, an Au vapor deposition mirror) to the amount of light reflected by the sample. The measurement of the reflectance of a laser with a wavelength of 10.6 μm can be carried out using a commercially available Fourier transform infrared photometer under the conditions described in the examples of this specification. In addition, since the wavelength of the carbon dioxide laser typically used in laser processing is 10.6 μm, the laser wavelength of the Fourier transform infrared photometer is set to 10.6 μm.
本說明書中「峰的頂點密度Spd」指的是以ISO25178為準據測定的表示每單位面積的峰頂點之數的參數。該值越大暗示與其他物體的接觸點之數越多。峰的頂點密度Spd能夠藉由將在金屬箔表面的預定測定面積(例如107μm×143μm的區域)的表面輪廓以市售的雷射顯微鏡測定來算出。The "peak apex density Spd" in this specification refers to a parameter that indicates the number of peak apexes per unit area measured in accordance with ISO25178. The larger the value, the greater the number of contact points with other objects. The peak apex density Spd can be calculated by measuring the surface profile of a predetermined measurement area (for example, an area of 107 μm×143 μm) on the surface of the metal foil with a commercially available laser microscope.
本說明書的「十點平均粗糙度Rz」指的是能以JIS B 0601-1994為準據決定的參數,於基準長度的粗糙曲線中,從最高的峰頂到第5高的峰高的平均、與從最深的谷底到第5深的谷深的平均值之和。The "ten-point average roughness Rz" in this manual refers to a parameter that can be determined based on JIS B 0601-1994. In the rough curve of the reference length, the average of the peak height from the highest peak to the fifth highest , And the sum of the average value from the deepest valley bottom to the fifth deepest valley depth.
多層配線板的製造方法 本發明係有關於多層配線板的製造方法。本發明的方法包含:(1)第1層積體的形成、(2)第2配線層的形成、(3)第2層積體的形成、(4)適其需要進行的載體的剝離、(5)第1及第2通孔的形成、(6)第1及3配線層的形成的各工程。Manufacturing method of multilayer wiring board The present invention relates to a method of manufacturing a multilayer wiring board. The method of the present invention includes: (1) formation of a first laminate, (2) formation of a second wiring layer, (3) formation of a second laminate, (4) peeling of the carrier as required, (5) Formation of the first and second via holes, (6) Formation of the first and third wiring layers.
以下,參照圖1~3,說明關於工程(1)~(6)的各者。Hereinafter, referring to FIGS. 1 to 3, each of the processes (1) to (6) will be described.
(1)第1層積體的形成
如圖1(i)及(ii)所示,準備第1金屬箔16,在該第1金屬箔16上將第1絕緣層18及第2金屬箔20依序層積形成第1層積體22。第1金屬箔16以附載體金屬箔10的形態提供也可以。附載體金屬箔10典型依序具備第1載體12、第1剝離層14、及第1金屬箔16。又,在第1載體12的兩面以呈上下對稱的方式依序具備上述各種層也可以。或者,將附載體金屬箔10的第1載體12側貼附至預浸物等的暫支持體(圖未示)而附加剛性也可以。此時,在暫支持體的兩面將附載體金屬箔10以上下對稱的方式貼附,在得到的層積體的兩面以呈上下對稱的方式形成後述各層,之後將暫支持體與第1載體12一同除去較佳。此外,預浸物為使合成樹脂含浸至合成樹脂板、玻璃板、玻璃織布、玻璃不織布、紙等基材的複合材料之總稱。(1) Formation of the first layered body
As shown in Fig. 1 (i) and (ii), a
第1載體12為用以將第1金屬箔16支持並使其處理性提升的箔乃至層。作為第1載體12的較佳例,可以是鋁、銅箔、不銹鋼(SUS)箔、樹脂薄膜、將表面以銅等進行金屬塗佈的樹脂薄膜、樹脂板、玻璃板、及其等的組合。第1載體12的厚度典型為5μm以上250μm以下、較佳為9μm以上200μm以下。The
第1剝離層14只要是使第1載體12的剝離成為可能的層,材質則沒有特別限定。例如,第1剝離層14可以由作為附載體金屬箔的剝離層採用的公知材料構成。第1剝離層14可以是有機剝離層及無機剝離層的任一者、也可以是有機剝離層與無機剝離層的複合剝離層。剝離層的厚度典型為1nm以上1μm以下、較佳為5nm以上500nm以下、更佳為6nm以上100nm以下。The material of the first peeling layer 14 is not particularly limited as long as it is a layer that enables peeling of the
第1金屬箔16可以是採用於無芯積層法的配線層用金屬箔的公知的構成。例如:第1金屬箔16可以是藉由無電鍍法及電鍍法等濕式等成膜法、濺鍍及化學蒸鍍等乾式成膜法、或組合該等方法形成者。作為第1金屬箔16之例可以是鋁、銅箔、不銹鋼(SUS)箔、鎳箔等、較佳為銅箔。銅箔不管是壓延銅箔或電解銅箔都可以。又,第1金屬箔16的較佳厚度為0.1μm以上12μm以下、更佳為0.5μm以上9μm以下、再佳為1μm以上7μm以下、特佳為1.5μm以上5μm以下。若在這種範圍內,在後述的通孔形成工程中,從第1金屬箔16進行直接雷射加工形成通孔會變得容易。又,第1金屬箔16用於配線層的形成時,若在上述厚度的範圍內則對微細電路的形成性也佳。The
第1絕緣層18可以是採用於無芯積層法的絕緣層的公知的構成,沒有特別的限定。例如,第1絕緣層18更佳能藉由將預浸物及樹脂片等絕緣樹脂材料在第1金屬箔16上層積之後,施予熱間壓印成形而形成。作為含浸於使用的預浸物的絕緣性樹脂較佳的例子,可以是環氧樹脂、氰酸酯樹脂、雙馬來醯亞胺三嗪樹脂(BT樹脂)、聚苯醚樹脂、酚醛樹脂等。又,作為構成樹脂片的絕緣性樹脂較佳的例子,可以是環氧樹脂、聚醯亞胺樹脂、聚酯纖維樹脂等。再來,從對第1絕緣層18提升絕緣性等的觀點來看,也可以含有由二氧化矽、氧化鋁等各種無機粒子構成的填料粒子等。第1絕緣層18的厚度雖沒有特別限定,但較佳為1μm以上100μm以下、更佳為5μm以上40μm以下、再佳為10μm以上30μm以下。第1絕緣層18也可以由複數的層構成。The first insulating
第2金屬箔20的至少與第1絕緣層18對向的面,藉由傅立葉轉換紅外分光光度計(FT-IR)測定的波長10.6μm的雷射的反射率為80%以上,且以ISO25178為準據測定的峰的頂點密度Spd為7000個/mm2
以上15000個/mm2
以下。藉由將滿足這種條件的金屬箔作為內層金屬箔(亦即第2金屬箔20)使用而進行多層配線板的製造,電路密著性佳,且能極有效地防止雷射加工造成的內層電路(亦即第2金屬箔20)的貫通。At least the surface of the
亦即,藉由將第2金屬箔20的與第1絕緣層18對向的面中藉由傅立葉轉換紅外分光光度計測定的波長10.6μm的雷射的反射率設為80%以上,能有效地阻礙用於通孔形成的雷射光的吸收。其結果,能夠極有效地防止因第2金屬箔20而來的第2配線層24的雷射加工造成的貫通。該波長10.6μm的雷射反射率若第2金屬箔20的表面越平滑則越大。但是,為了增加雷射反射率而單純使第2金屬箔20的表面平滑時,第2金屬箔20與第1絕緣層18的密著性會降低,容易產生電路剝落。因此,兼顧雷射加工造成的內層電路的貫通防止、與電路密著性不是容易的。關於此點,在本發明中,在第2金屬箔20的與第1絕緣層18對向的面,藉由保持有助於波長10.6μm的雷射反射率提升的平滑性,同時將峰的頂點密度Spd設為7000個/mm2
以上15000個/mm2
以下,能夠以多的接點數確保第2金屬箔20的向第1絕緣層18的陷入。其結果,在確保高電路密著性的同時,能極有效地防止雷射加工造成的內層電路的貫通。That is, it is effective by setting the reflectance of a 10.6 μm laser with a wavelength of 10.6 μm measured by a Fourier transform infrared spectrophotometer on the surface of the
從上述觀點來看,第2金屬箔20的與第1絕緣層18對向的面,藉由傅立葉轉換紅外分光光度計(FT-IR)測定的波長10.6μm的雷射的反射率為80%以上、較佳為85%以上、更佳為90%以上、再佳為95%以上。上限值沒有特別的限定,雖可以是100%但典型為98%以下。又,第2金屬箔20的與第1絕緣層18對向的面,以ISO25178為準據測定的峰的頂點密度Spd為7000個/mm2
以上15000個/mm2
以下、較佳為10000個/mm2
以上15000個/mm2
以下、更佳為13000個/mm2
以上15000個/mm2
以下。在上述較佳的範圍內,在更加確保高電路密著性的同時,能極有效地防止雷射加工的第2配線層24的貫通。From the above point of view, the surface of the
較佳為第2金屬箔20中與第1絕緣層18對向的面的十點平均粗糙度Rz為0.2μm以上2.0μm以下、更佳為0.5μm以上1.8μm以下、再佳為0.8μm以上1.5μm以下。在該範圍內可以有助於更加提升微細電路形成性。Preferably, the ten-point average roughness Rz of the surface facing the first insulating
第2金屬箔20的與第1絕緣層18對向的面中的上述範圍內的波長10.6μm的雷射反射率、峰的頂點密度Spd及十點平均粗糙度Rz,能夠藉由在銅箔表面以公知乃至所期望的條件施予粗糙化處理來實現。因此,第2金屬箔20的與第1絕緣層18對向的面為粗化面較佳。又,選擇性入手具有滿足上述諸條件的表面的市售的銅箔也可以。On the surface of the
第2金屬箔20可以是藉由無電鍍法及電鍍法等濕式等成膜法、濺鍍及化學蒸鍍等乾式成膜法、或組合該等方法形成者。作為第2金屬箔20之例可以是鋁箔、銅箔、不銹鋼(SUS)箔等、較佳為銅箔。銅箔不管是壓延銅箔或電解銅箔都可以。第2金屬箔20的較佳厚度為0.1μm以上12μm以下、更佳為1μm以上9μm以下、再佳為5μm以上7μm以下。若在該範圍內,進行微細化電路形成極為適合。又,第2金屬箔20以依序具備第2載體(圖未示)、第2剝離層(圖未示)、及第2金屬箔20的附載體金屬箔的形態提供也可以,在該情形中,將第2金屬箔20層積於第1絕緣層18上後,形成第2配線層24前,將第2載體從第1層積體22剝離即可。第2載體及第2剝離層的構成為準用於上述第1載體12及第1剝離層14者即可,並沒有特別限定。The
(2)第2配線的形成
如圖1(iii)所示,藉由對第2金屬箔20施予圖案化形成第2配線層24。圖案化藉由公知的手法進行即可。較佳的電路形成手法可以是將第2金屬箔20維持原狀或作為一部分使用形成第2配線層24的手法、更佳為不在第2金屬箔20上進行鍍膜等,而將第2金屬箔20維持原狀使用形成第2配線層24的手法。作為這種可電路形成的方法的較佳例可以是減法製程法。作為減法製程法的電路形成的一例,首先在第2金屬箔20的表面貼附乾薄膜,以預定的圖案進行曝光及顯像,形成蝕刻光阻(圖未示)。接著,藉由將構成第2金屬箔20的金屬以可溶解的蝕刻液進行處理,將從蝕刻光阻間露出的金屬溶解去除後,能將蝕刻光阻剝離而成為第2配線層24。(2) Formation of the second wiring
As shown in FIG. 1(iii), the
第2配線層24的形成工程較佳為更包含在第2配線層24施予內層處理的工程。內層處理包含CZ處理等粗糙化處理較佳、CZ處理使用有機酸系微蝕刻劑(例如MEC股份公司製,產品號CZ-8101),在第2配線層24表面施予微細粗糙化能更佳地進行。藉此,在第2配線層24表面形成微細凹凸,能夠使後述的第2層積體的形成工程中的第2配線層24與第2絕緣層26的密著性提升。The process of forming the
第2配線層24的厚度較佳為3μm以上12μm以下、更佳為5μm以上10μm以下、再佳為5μm以上8μm以下。若在該範圍內,對多層印刷配線板要求的薄型化極為有利。又,根據本發明的方法,第2配線層24的厚度即便像上述那樣薄時,也能夠有效地防止伴隨著雷射加工的貫通。此外,在第2配線層24施予上述內層處理時,內層處理後的第2配線層24的厚度期望在上述範圍內。The thickness of the
(3)第2層積體的形成
如圖2(iv)所示,在形成第2配線層24的第1層積體22上將第2絕緣層26及第3金屬箔28層積形成第2層積體30。藉此,第2配線層24成為埋入第1絕緣層18與第2絕緣層26之間的內層電路。第2絕緣層26及第3金屬箔28的構成準用於第1絕緣層18及第1金屬箔16的各者即可。因此,關於第1金屬箔16及第1絕緣層18的較佳態樣也能夠套用至第3金屬箔28及第2絕緣層26的各者。又,第3金屬箔28以依序具備第3載體(圖未示)、第3剝離層(圖未示)、及第3金屬箔28的附載體金屬箔的形態提供也可以。第3載體及第3剝離層的構成為準用於上述第1載體12及第1剝離層14者即可,並沒有特別限定。(3) Formation of the second layered body
As shown in FIG. 2(iv), the second insulating
第2配線層24的與第2絕緣層26對向的面,藉由傅立葉轉換紅外分光光度計(FT-IR)測定的波長10.6μm的雷射的反射率為80%以上、較佳為85%以上、更佳為90%以上、再佳為95%以上。上限值沒有特別的限定,雖可以是100%但典型為98%以下。又,第2配線層24的與第2絕緣層26對向的面,以ISO25178為準據測定的峰的頂點密度Spd為7000個/mm2
以上15000個/mm2
以下、較佳為10000個/mm2
以上15000個/mm2
以下、更佳為13000個/mm2
以上15000個/mm2
以下。在上述較佳的範圍內,在能確保第2配線層24與第2絕緣層26的高密著性的同時,在來自第3金屬箔28的雷射加工時也能夠防止第2配線層24的貫通。第2配線層24的與第2絕緣層26對向的面中的上述範圍內的波長10.6μm的雷射反射率及峰的頂點密度Spd,雖然也可以讓第2金屬箔20的表面預先具備,但藉由上述的內層處理(例如CZ處理等的粗糙化處理)在第2配線層24的表面事後賦予也可以。因此,第2配線層24的與第2絕緣層26對向的面為粗化面較佳。The surface of the
較佳為第1金屬箔16的厚度T1
相對於第2配線層24的厚度T2
之比T1
/T2
為0.23以上、且/或第3金屬箔28的厚度T3
相對於第2配線層24的厚度T2
之比T3
/T2
為0.23以上。更佳為T1
/T2
及T3
/T2
的兩者為0.23以上。根據本發明,因為由第2金屬箔20而來的第2配線層24具有難以吸收雷射光的表面,即便以滿足上述範圍的方式將第2金屬箔20極薄化,也能夠抑制內層電路即第2配線層24的雷射加工造成的損傷。T1
/T2
及/或T3
/T2
較佳為1.0以下、更佳為0.50以下、再佳為0.33以下。此外,施予雷射加工前在金屬箔乃至配線層進行表面處理(亦即使金屬箔乃至配線層的厚度變化)時,上述T1
、T2
及T3
分別指該表面處理後的第1金屬箔16的厚度、第2配線層24的厚度、及第3金屬箔28的厚度。例如,在第2配線層24施予上述內層處理時,T2
成為內層處理後的第2配線層24的厚度。Preferably the first metal
(4)載體的剝離(任意工程)
第1金屬箔16及/或第3金屬箔28以附載體金屬箔的形態提供時,如圖2(v)所示,將第1載體12及/或第3載體(圖未示)從第2層積體30剝離。藉此,在後述的第1及第2通孔的形成工程中,能從第1金屬箔16及第3金屬箔28的各者施予雷射加工。又,第2層積體30因為第1絕緣層18及第2絕緣層26而剛性增加,在將載體剝離的狀態下也能夠確保充分的處理性。此外,如同前述將附載體金屬箔貼附至預浸物等暫支持體(圖未示)時,暫支持體與第1載體12及/或第3載體(圖未示)一同從第2層積體30被除去。(4) Stripping of the carrier (arbitrary engineering)
When the
(5)第1及第2通孔的形成
如圖3(vi)所示,藉由對第2層積體30從第1金屬箔16及第3金屬箔28的各者施予雷射加工,形成貫通第1金屬箔16及第1絕緣層18到達第2配線層24的第1通孔32、和貫通第3金屬箔28及第2絕緣層26到達第2配線層24的第2通孔34。雷射加工雖然可以使用二氧化碳雷射、準分子雷射、UV雷射、YAG雷射等各種雷射,但使用二氧化碳雷射特佳。根據本發明的方法,在通孔的形成工程中,能夠有效地防止雷射加工造成的第2配線層24的貫通。(5) Formation of the first and second through holes
As shown in FIG. 3(vi), by applying laser processing to the
第1及第2通孔的形成工程,作為除去在以雷射加工形成通孔時產生的通孔底部的樹脂殘渣(膠渣)的處理,更包含使用鉻酸鹽溶液及過錳酸鹽溶液的至少一者的除膠渣工程較佳。共面性工程為將膨潤處理、鉻酸處理或過錳酸處理、及還原處理這些處理依序進行的處理,能採用公知的濕式製程。作為鉻酸鹽之例可以是鉻酸鉀。作為過錳酸鹽之例,可以是過錳酸鈉、過錳酸鉀等。特別是從除膠渣處理液的環境負荷物質的排出降低、電解再生性等的點來看,使用過錳酸鹽較佳。The process of forming the first and second through-holes, as a treatment to remove the resin residue (smudge) at the bottom of the through-hole generated when the through-hole is formed by laser processing, includes the use of chromate solution and permanganate solution At least one of the slag removal engineering is better. The coplanarity process is a process in which swelling treatment, chromic acid treatment or permanganic acid treatment, and reduction treatment are sequentially performed, and a known wet process can be used. As an example of chromate, potassium chromate can be used. As an example of permanganate, sodium permanganate, potassium permanganate, etc. may be mentioned. In particular, it is preferable to use permanganate from the viewpoints of reduced discharge of environmentally hazardous substances in the desmear treatment liquid and electrolytic regeneration.
第1通孔32及第2通孔34的直徑都是30μm以上80μm以下較佳、更佳為30μm以上60μm以下、再佳為30μm以上40μm以下。若在該範圍內,對多層印刷配線板的高密度化極為有利。又,為了形成具有上述那種小直徑的通孔,縮小雷射的射束直徑(點徑)較佳。此時,因為雷射的能量容易集中於第2配線層24的雷射照射部分,本來就容易產生第2配線層24的貫通。關於該點,根據本發明的方法,因為由第2金屬箔20而來的第2配線層24具有難以吸收雷射光的表面,即便雷射的能量集中時,也能夠有效地防止第2配線層24的貫通。The diameter of the first through
(6)第1及第3配線的形成
如3(vii)所示,對第2層積體30的兩面,施予鍍膜及圖案化以形成通過第1通孔32、第2配線層24及第2通孔34的電連接,形成包含鄰接第1絕緣層18的第1配線層38、由第2金屬箔20而來的第2配線層24、及鄰接第2絕緣層26的第3配線層40的多層配線板42。第1配線層38典型為由第1金屬箔16而來者,典型包含由第1金屬箔16而來的金屬,但作為僅接續第1金屬箔16的表面輪廓的新配線層(未包含由第1金屬箔16而來的金屬)形成也可以。同樣地,第3配線層40典型為由第3金屬箔28而來者,典型包含由第3金屬箔28而來的金屬,但作為僅接續第3金屬箔28的表面輪廓的新配線層(未包含由第3金屬箔28而來的金屬)形成也可以。關於第1配線層38及第3配線層40的形成方法的工法並沒有特別限定,可以使用減法製程法、MSAP(改良的半加成法(modified-semi-additive process))法、SAP(半加成)法等的公知的手法。在這裡,圖3(vii)為藉由MSAP法進行電路形成者。作為MSAP法的電路形成的一例,首先在第1金屬箔16及第3金屬箔28的表面將光阻(圖未示)以預定的圖案形成。光阻為感光性薄膜較佳,此時藉由曝光及顯像將預定的配線圖案賦予至光阻即可。接著,在第1金屬箔16及第3金屬箔28的露出表面(亦即未被光阻層遮蔽的部分)、和第1通孔32及第2通孔34形成電鍍層36。此時,因為在第1通孔32及第2通孔34填充鍍膜金屬,第2層積體30的兩面通過第1通孔32、第2配線層24及第2通孔34電連接。電鍍藉由公知的方法進行即可,沒有特別的限定。將光阻層剝離後,藉由將第1金屬箔16、第3金屬箔28及電鍍層36進行蝕刻加工,得到形成第1配線層38及第3配線層40的多層配線板42。(6) Formation of the first and third wiring
As shown in 3(vii), both sides of the
在多層配線板42上又再形成積層配線層也可以。亦即,藉由在多層配線板42上再將包含絕緣層與配線圖案的配線層交互層積配置,能夠得到形成到第n配線層(n為4以上的整數、更佳為5、7、9等的奇數)為止的多層配線板。該工程的重複到形成所期望的層數的積層配線層為止即可。又,因應必要,在外層面形成焊料光阻、及柱等的實裝用的凸塊等也可以。
[實施例]A build-up wiring layer may be further formed on the
以下,利用實施例來更進一步說明本發明。Hereinafter, examples are used to further illustrate the present invention.
例1~6 準備6種作為多層配線板的內層金屬箔使用的銅箔,進行各種評價。具體的順序如以下所示。Examples 1~6 Six types of copper foils used as inner layer metal foils of multilayer wiring boards were prepared, and various evaluations were performed. The specific sequence is as follows.
(1)銅箔的準備 準備6種在至少一面具有表1所示的各參數的厚度12μm的電解銅箔。該等銅箔之中幾種為市售品,其他為基於公知的方法特別製作者。準備的銅箔的各參數的測定乃至算出方法如同以下。(1) Preparation of copper foil Six kinds of electrolytic copper foils having a thickness of 12 μm having the parameters shown in Table 1 on at least one side were prepared. Some of these copper foils are commercially available products, and the others are specially produced by known methods. The measurement and calculation methods of each parameter of the prepared copper foil are as follows.
(FT-IR中的波長10.6μm的雷射的反射率) 使用紅外分光光度計(Thermo Fisher SCIENTIFIC社製、Nicolet Nexus 640 FT-IR Spectrometer),對銅箔表面以下記條件進行測定,取得IR光譜資料。藉由解析取得的IR光譜資料,算出波長10.6μm的雷射的反射率。 <測定條件> ‐測定法:正反射法 ‐背景:Au蒸鍍反射鏡 ‐解析度:4cm-1 ‐掃描次數:64scan ‐檢出器:DTGS(Deuterium Tri-Glycine Sulfate)檢出器(Reflectance of a laser with a wavelength of 10.6μm in FT-IR) Using an infrared spectrophotometer (manufactured by Thermo Fisher Scientific, Nicolet Nexus 640 FT-IR Spectrometer), the surface of the copper foil was measured under the conditions described below to obtain an IR spectrum data. By analyzing the obtained IR spectrum data, the reflectance of the laser with a wavelength of 10.6μm is calculated. <Measurement conditions> -Measurement method: Specular reflection method -Background: Au vapor-deposited mirror -Resolution: 4cm -1 -Number of scans: 64scan -Detector: DTGS (Deuterium Tri-Glycine Sulfate) detector
(峰的頂點密度Spd) 利用雷射顯微鏡(股份公司基恩斯製,VK-X100),以S濾光器所致的截止波長0.8μm、倍率2000倍(測定面積107μm×143μm)的條件,以ISO25178為準據測定銅箔表面的峰的頂點密度Spd。(Peak apex density Spd) Using a laser microscope (manufactured by Keynes Co., Ltd., VK-X100), the cut-off wavelength of the S filter is 0.8μm, and the magnification is 2000 times (measurement area 107μm×143μm), and the surface of copper foil is measured according to ISO25178. The apex density of the peak is Spd.
(十點平均粗糙度Rz) 利用雷射顯微鏡(股份公司基恩斯製,VK-X100),以倍率2000倍、截止值0.8μm、測定長度100μm的條件,以JIS B 0601-1994為準據測定銅箔表面的十點平均粗糙度Rz。(Ten point average roughness Rz) Using a laser microscope (manufactured by Keynes Co., Ltd., VK-X100), the ten-point average roughness of the copper foil surface was measured under the conditions of a magnification of 2000 times, a cut-off value of 0.8 μm, and a measuring length of 100 μm according to JIS B 0601-1994 Rz.
(2)銅箔的評價 就準備的銅箔將各種特性的評價如同以下進行。(2) Evaluation of copper foil The various characteristics of the prepared copper foil were evaluated as follows.
<雷射加工性>
將在上述(1)準備的銅箔作為內層金屬箔使用將雷射加工性評價用層積體如同以下製作。首先,將厚度2μm的銅箔作為第1金屬箔16準備,在第1金屬箔16上作為第1絕緣層18將厚度0.02mm的預浸物(三菱瓦斯化學股份公司製,GHPL-830NSF)層積。接著,作為第2金屬箔20,將在上述(1)準備的銅箔,以具有表1所示的各參數側的面抵接至第1絕緣層18上的方式層積,以壓力4.0MPa、溫度220℃進行90分間的熱間壓印成形得到第1層積體22。將第2金屬箔20的表面以微蝕刻液進行1μm蝕刻後,貼附乾薄膜,以預定的圖案進行曝光及顯像,形成蝕刻光阻。將第2銅箔表面以氯化銅蝕刻液進行處理,從蝕刻光阻間將銅溶解去除後,將蝕刻光阻剝離形成第2配線層24。對第2配線層24表面施予粗糙化處理(CZ處理)。粗糙化處理後的第2配線層24的厚度為9μm。因此,第1金屬箔的厚度T1
(2μm)相對於第2配線層的厚度T2
(9μm)之比T1
/T2
為2/9=約0.22。之後,在形成第2配線層24的第1層積體22上將厚度0.02mm的預浸物(三菱瓦斯化學股份公司製,GHPL-830NSF)及厚度2μm的銅箔分別作為第2絕緣層26及第3金屬箔28依序層積,以壓力4.0MPa、溫度220℃進行90分間的熱間壓印成形。藉此,得到雷射加工性評價用層積體。對得到的雷射加工性評價用層積體,利用二氧化碳雷射以9.5MW/cm2
的輸出密度從第1金屬箔16側施予雷射加工,形成貫通第1金屬箔16及第1絕緣層18到達第2配線層24的直徑65μm的通孔。將該通孔從第1金屬箔16側以金屬顯微鏡觀察,判定第2配線層24的貫通的有無。關於各例在每88孔進行通孔的形成及貫通判定,從通孔的形成數及第2配線層24的貫通數,算出雷射加工後的第2配線層24的貫通率。<Laser processability> The copper foil prepared in (1) above was used as the inner layer metal foil, and the laminate for laser processability evaluation was produced as follows. First, a copper foil with a thickness of 2 μm is prepared as the
<電路密著性>
層積3枚厚度0.1mm的預浸物(三菱瓦斯化學股份公司製,GHPL-830NSF),在層積的預浸物將在上述(1)準備的銅箔,以具有表1所示的各參數側的面抵接的方式層積,以壓力4.0MPa、溫度220℃進行90分間的熱間壓印成形製作覆銅層積板樣本。在該覆銅層積板樣本的兩面貼合乾薄膜,形成蝕刻光阻層。接著,在該兩面的蝕刻光阻層,將0.8mm寬度的剝離強度測定試驗用電路曝光顯像,形成蝕刻圖案。之後,以銅蝕刻液進行電路蝕刻,將蝕刻光阻剝離得到電路。將這樣形成的電路(厚度12μm、電路寬度0.8mm)以JIS C 6481-1996為準據對預浸物表面在90°方向剝離測定剝離強度(kgf/cm)。<Circuit adhesion>
Three prepregs (manufactured by Mitsubishi Gas Chemical Co., Ltd., GHPL-830NSF) with a thickness of 0.1mm are laminated, and the laminated prepreg will be prepared in the copper foil prepared in (1) above to have the respective Laminated in such a way that the surface on the parameter side was in contact with each other, and a copper-clad laminated board sample was produced by hot stamping at a pressure of 4.0 MPa and a temperature of 220°C for 90 minutes. A dry film was attached to both sides of the copper clad laminate sample to form an etching photoresist layer. Next, on the etching photoresist layer on both sides, a 0.8 mm width peel strength measurement test circuit was exposed and developed to form an etching pattern. After that, the circuit is etched with a copper etching solution, and the etching resist is stripped to obtain a circuit. The circuit formed in this way (
<電路形成性> 在上述覆銅層積板的表面進行電鍍直到電路高度成為20μm為止。在此方式形成的電鍍層的表面貼付乾薄膜,進行曝光及顯像,而形成蝕刻光阻。藉由氯化銅蝕刻液的處理,從蝕刻光阻間將銅溶解除去,形成電路高20μm、線/空間=25μm/25μm的直線狀配線圖案。將這樣得到的直線狀配線圖案以倍率1000倍的條件從正上方(觀察角度0°)以SEM觀察。將取得到的SEM影像裝至數位顯微鏡(股份公司基恩士製,VHX-500),將電路底部寬度進行100點量測。從量測結果,取代平均值而使用中央值算出標準差σ(μm),將3σ-(-3σ),亦即6σ作為電路直線性之值採用。<Circuit formation> Electroplating was performed on the surface of the above-mentioned copper clad laminate until the circuit height became 20 μm. A dry film is attached to the surface of the electroplated layer formed in this way, and exposed and developed to form an etching resist. The copper chloride etching solution is used to dissolve and remove copper from between the etching resists to form a linear wiring pattern with a circuit height of 20 μm and a line/space=25 μm/25 μm. The linear wiring pattern thus obtained was observed by SEM from directly above (observation angle 0°) under the condition of 1000 times magnification. Attach the acquired SEM image to a digital microscope (manufactured by Keyence Corporation, VHX-500), and measure the width of the bottom of the circuit at 100 points. From the measurement results, instead of the average value, the standard deviation σ (μm) is calculated using the median value, and 3σ-(-3σ), that is, 6σ, is adopted as the value of circuit linearity.
例7~12
取代厚度12μm的電解銅箔,除了使用在至少一面具有表1所示的各參數的厚度9μm的電解銅箔以外,與例1~6同樣進行各種特性的評價。此外,雷射加工性評價用層積體的粗糙化處理(CZ處理)後的第2配線層24的厚度為7μm、T1
/T2
為2/7=約0.29。Examples 7 to 12 Instead of the electrolytic copper foil having a thickness of 12 μm, the various characteristics were evaluated in the same manner as in Examples 1 to 6 except that an electrolytic copper foil having a thickness of 9 μm having the parameters shown in Table 1 was used on at least one side. In addition, the thickness of the
例13~16
取代厚度12μm的電解銅箔,除了使用在至少一面具有表1所示的各參數的厚度7μm的電解銅箔以外,與例1~6同樣進行各種特性的評價。此外,雷射加工性評價用層積體的粗糙化處理(CZ處理)後的第2配線層24的厚度為5μm、T1
/T2
為2/5=約0.40。Examples 13 to 16 In place of the electrolytic copper foil having a thickness of 12 μm, various characteristics were evaluated in the same manner as in Examples 1 to 6, except that an electrolytic copper foil having a thickness of 7 μm having the parameters shown in Table 1 was used on at least one side. In addition, the thickness of the
結果 在例1~16中得到的評價結果顯示於表1中。result The evaluation results obtained in Examples 1 to 16 are shown in Table 1.
例17
除了1)取代厚度2μm的銅箔,作為第1金屬箔16及第3金屬箔28分別使用厚度3μm的銅箔、2)調整蝕刻量將粗糙化處理(CZ處理)後的第2配線層24的厚度設為5μm(亦即將T1
/T2
設為3/5=0.60)、及3)將二氧化碳雷射的輸出密度從9.5MW/cm2
變更成9.75MW/cm2
以外,與例11同樣進行雷射加工性的評價。Example 17 Except for 1) instead of copper foil with a thickness of 2 μm, a copper foil with a thickness of 3 μm was used as the
例18
除了1)取代厚度2μm的銅箔,作為第1金屬箔16及第3金屬箔28分別使用厚度3μm的銅箔、及2)將二氧化碳雷射的輸出密度從9.5MW/cm2
變更成9.75MW/cm2
以外,與例16同樣進行雷射加工性的評價。此外,雷射加工性評價用層積體的粗糙化處理(CZ處理)後的第2配線層24的厚度為5μm、T1
/T2
為3/5=約0.60。Example 18 Except for 1) instead of copper foil with a thickness of 2μm, a copper foil with a thickness of 3μm was used as the
例19
除了1)取代厚度2μm的銅箔,作為第1金屬箔16及第3金屬箔28分別使用厚度3μm的銅箔、及2)將二氧化碳雷射的輸出密度從9.5MW/cm2
變更成9.75MW/cm2
以外,與例14同樣進行雷射加工性的評價。此外,雷射加工性評價用層積體的粗糙化處理(CZ處理)後的第2配線層24的厚度為5μm、T1
/T2
為3/5=約0.60。Example 19 Except for 1) instead of copper foil with a thickness of 2μm, a copper foil with a thickness of 3μm was used as the
例20
除了1)取代厚度2μm的銅箔,作為第1金屬箔16及第3金屬箔28分別使用厚度3μm的銅箔、及2)將二氧化碳雷射的輸出密度從9.75MW/cm2
變更成10.25MW/cm2
以外,與例17同樣進行雷射加工性的評價。此外,雷射加工性評價用層積體的粗糙化處理(CZ處理)後的第2配線層24的厚度為5μm、T1
/T2
為5/5=約1.0。Example 20 Except for 1) instead of copper foil with a thickness of 2μm, a copper foil with a thickness of 3μm was used as the
例21
除了1)取代厚度2μm的銅箔,作為第1金屬箔16及第3金屬箔28分別使用厚度3μm的銅箔、及2)將二氧化碳雷射的輸出密度從9.75MW/cm2
變更成10.25MW/cm2
以外,與例18同樣進行雷射加工性的評價。此外,雷射加工性評價用層積體的粗糙化處理(CZ處理)後的第2配線層24的厚度為5μm、T1
/T2
為5/5=約1.0。Example 21 Except for 1) instead of copper foil with a thickness of 2 μm, copper foil with a thickness of 3 μm was used as the
例22
除了1)取代厚度2μm的銅箔,作為第1金屬箔16及第3金屬箔28分別使用厚度5μm的銅箔、及2)將二氧化碳雷射的輸出密度從9.75MW/cm2
變更成10.25MW/cm2
以外,與例19同樣進行雷射加工性的評價。此外,雷射加工性評價用層積體的粗糙化處理(CZ處理)後的第2配線層24的厚度為5μm、T1
/T2
為5/5=約1.0。Example 22 Except 1) instead of copper foil with a thickness of 2μm, a copper foil with a thickness of 5μm was used as the
結果 在例17~22中得到的評價結果顯示於表2中。result The evaluation results obtained in Examples 17-22 are shown in Table 2.
16‧‧‧第1金屬箔
18‧‧‧第1絕緣層
20‧‧‧第2金屬箔
22‧‧‧第1層積體
10‧‧‧附載體金屬箔
12‧‧‧第1載體
14‧‧‧第1剝離層
24‧‧‧第2配線層
26‧‧‧第2絕緣層
28‧‧‧第3金屬箔
30‧‧‧第2層積體
32‧‧‧第1通孔
34‧‧‧第2通孔
40‧‧‧第3配線層
42‧‧‧多層配線板
38‧‧‧第1配線層
36‧‧‧電鍍層16‧‧‧The
[圖1] 表示本發明的製造方法的一例中的初期工程(工程(i)~(iii))的工程流程圖。 [圖2] 表示本發明的製造方法的一連串的接著圖1所示的工程的工程(工程(iv)~(v))的工程流程圖。 [圖3] 表示本發明的製造方法的一連串的接著圖2所示的工程的工程(工程(vi)~(vii))的工程流程圖。[Fig. 1] A process flow chart showing initial processes (processes (i) to (iii)) in an example of the manufacturing method of the present invention. [Fig. 2] A process flow chart showing a series of processes (processes (iv) to (v)) following the process shown in Fig. 1 in the manufacturing method of the present invention. [FIG. 3] A process flow chart showing a series of processes (processes (vi) to (vii)) following the process shown in FIG. 2 in the manufacturing method of the present invention.
16‧‧‧第1金屬箔 16‧‧‧The first metal foil
18‧‧‧第1絕緣層 18‧‧‧The first insulation layer
24‧‧‧第2配線層 24‧‧‧2nd wiring layer
26‧‧‧第2絕緣層 26‧‧‧Second insulation layer
28‧‧‧第3金屬箔 28‧‧‧The third metal foil
30‧‧‧第2層積體 30‧‧‧Layer 2
32‧‧‧第1通孔 32‧‧‧1st through hole
34‧‧‧第2通孔 34‧‧‧2nd through hole
36‧‧‧電鍍層 36‧‧‧Plating layer
38‧‧‧第1配線層 38‧‧‧The first wiring layer
40‧‧‧第3配線層 40‧‧‧3rd wiring layer
42‧‧‧多層配線板 42‧‧‧Multilayer wiring board
Claims (10)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018063193 | 2018-03-28 | ||
JP2018-063193 | 2018-03-28 | ||
JP2018183881 | 2018-09-28 | ||
JP2018-183881 | 2018-09-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201943324A TW201943324A (en) | 2019-11-01 |
TWI703909B true TWI703909B (en) | 2020-09-01 |
Family
ID=68058980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW108110633A TWI703909B (en) | 2018-03-28 | 2019-03-27 | Manufacturing method of multilayer wiring board |
Country Status (5)
Country | Link |
---|---|
JP (1) | JP6622444B1 (en) |
KR (1) | KR102231993B1 (en) |
CN (1) | CN111684869B (en) |
TW (1) | TWI703909B (en) |
WO (1) | WO2019188836A1 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201206284A (en) * | 2010-07-29 | 2012-02-01 | Advanced Semiconductor Eng | Manufacturing process of circuit substrate |
TW201542351A (en) * | 2014-01-27 | 2015-11-16 | Mitsui Mining & Smelting Co | Roughened copper foil, copper-clad laminate, and printed wiring board |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3512624B2 (en) * | 1998-03-13 | 2004-03-31 | 三菱電機株式会社 | Laser processing apparatus and method for wiring board processing |
JP2000165047A (en) * | 1998-11-26 | 2000-06-16 | Nippon Carbide Ind Co Inc | Manufacture of printed wiring board |
JP2003060352A (en) * | 2001-08-08 | 2003-02-28 | Asahi Kasei Corp | Multilayer printed wiring board |
JP4694349B2 (en) * | 2005-11-07 | 2011-06-08 | 日立ビアメカニクス株式会社 | Printed wiring board using laser processing and manufacturing method thereof |
KR100797719B1 (en) * | 2006-05-10 | 2008-01-23 | 삼성전기주식회사 | Process for build-up printed circuit board |
JP2008218489A (en) * | 2007-02-28 | 2008-09-18 | Sharp Corp | Method of manufacturing multilayer printed wiring board |
JP4460013B2 (en) | 2008-08-22 | 2010-05-12 | 新光電気工業株式会社 | Wiring board manufacturing method |
CN103327741B (en) * | 2013-07-04 | 2016-03-02 | 江俊逢 | A kind of base plate for packaging based on 3D printing and manufacture method thereof |
JP6305001B2 (en) * | 2013-10-15 | 2018-04-04 | Jx金属株式会社 | Copper foil, copper-clad laminate and flexible printed wiring board |
MY193192A (en) * | 2014-06-03 | 2022-09-26 | Mitsui Mining & Smelting Co Ltd | Metal foil with releasing resin layer, and printed wiring board |
MY186859A (en) * | 2016-04-14 | 2021-08-26 | Mitsui Mining & Smelting Co Ltd | Treated surface copper foil, copper foil with carrier as well as methods for manufacturing copper-clad laminate and printed circuit board using same |
-
2019
- 2019-03-22 WO PCT/JP2019/012233 patent/WO2019188836A1/en active Application Filing
- 2019-03-22 KR KR1020207021006A patent/KR102231993B1/en active IP Right Grant
- 2019-03-22 CN CN201980011459.2A patent/CN111684869B/en active Active
- 2019-03-22 JP JP2019548489A patent/JP6622444B1/en active Active
- 2019-03-27 TW TW108110633A patent/TWI703909B/en active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201206284A (en) * | 2010-07-29 | 2012-02-01 | Advanced Semiconductor Eng | Manufacturing process of circuit substrate |
TW201542351A (en) * | 2014-01-27 | 2015-11-16 | Mitsui Mining & Smelting Co | Roughened copper foil, copper-clad laminate, and printed wiring board |
Also Published As
Publication number | Publication date |
---|---|
TW201943324A (en) | 2019-11-01 |
KR102231993B1 (en) | 2021-03-25 |
KR20200091934A (en) | 2020-07-31 |
CN111684869A (en) | 2020-09-18 |
CN111684869B (en) | 2021-03-19 |
JP6622444B1 (en) | 2019-12-18 |
WO2019188836A1 (en) | 2019-10-03 |
JPWO2019188836A1 (en) | 2020-04-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7918021B2 (en) | Production of via hole in a flexible printed circuit board by applying a laser or punch | |
US6779262B1 (en) | Method for manufacturing a multilayer printed circuit board | |
US9338898B2 (en) | Method of producing a printed wiring board | |
JP2007073834A (en) | Wiring formation method on insulating resin layer | |
US20050244621A1 (en) | Printed circuit board and method for processing printed circuit board | |
US20070070613A1 (en) | Method of manufacturing high density printed circuit boad | |
TWI699148B (en) | Manufacturing method of multilayer wiring board | |
EP1229771A1 (en) | Method for manufacturing printed wiring board | |
CN108029202B (en) | Method for manufacturing printed circuit board | |
TWI703909B (en) | Manufacturing method of multilayer wiring board | |
JP2023030041A (en) | Manufacturing method of print circuit board | |
JP4240243B2 (en) | Manufacturing method of build-up multilayer wiring board | |
JP2000036660A (en) | Manufacture of build-up multilayer interconnection board | |
JP6622443B1 (en) | Manufacturing method of multilayer wiring board | |
JP2000036659A (en) | Manufacture of build-up multilayer interconnection board | |
KR20180108880A (en) | Printed wiring board production method and printed wiring board | |
JP2000036662A (en) | Manufacture of build-up multilayer interconnection board | |
TWI853007B (en) | Metal foil for printed wiring board, carrier metal foil and metal-clad laminate, and method for producing printed wiring board using the same | |
JPH1168291A (en) | Printed wiring board and production thereof |