TWI703193B - 將聚合物厚膜表面金屬化的方法 - Google Patents

將聚合物厚膜表面金屬化的方法 Download PDF

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TWI703193B
TWI703193B TW107125087A TW107125087A TWI703193B TW I703193 B TWI703193 B TW I703193B TW 107125087 A TW107125087 A TW 107125087A TW 107125087 A TW107125087 A TW 107125087A TW I703193 B TWI703193 B TW I703193B
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sinterable material
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派翠克 韋伯
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    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
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Abstract

一種製造方法包括:透過一聚合物厚膜(polymer thick film,PTF)製程將一漿料結合於一有機基板上以形成一PTF跡線,在PTF跡線上塗覆一可燒結材料,以及將可燒結材料燒結於PTF跡線。

Description

將聚合物厚膜表面金屬化的方法
本發明涉及電路領域,更具體涉及金屬化聚合物厚膜表面。
使用有機(像環氧樹脂的聚合物類)基板和無機(陶瓷或金屬)基板,可以在單層或多層上形成焊接(solder)的和可引線接合(wire bondable)的電路。由於節省成本和/或更好的電氣性能,有機基板是迄今為止最常用的材料。
在有機基板上製造多層電路通常涉及很多不同類型的非環境友好的濕法水性化學溶液,諸如化學鍍銅、電鍍銅、銅蝕刻、光刻膠(photoresist)顯影、光刻膠去除、阻焊(solder resistance)圖像顯影、微蝕刻劑、高錳酸鹽去汙、阻焊顯影以及諸如鍍鎳和金、或鍍鎳/鈀/金、或鍍銀或鍍錫的精鍍。
使用有機基板製造的電路具有一介電常數(Dk),該介電常數是用於低溫共燒陶瓷技術(LTCC)的介電常數的一半。電路通常由銅製成,其中電路跡線幾何形狀在批量生產中精細達25微米(μm)。使用有機基板製作電路的成本比使用LTCC技術低2-4倍。然而,有機基板上的單層電路通常需要至少四個分離的水性化學製程,包括光刻膠顯影、光刻膠去除、銅蝕刻以及精鍍。
作為濕法水性化學品的替代,低溫共燒陶瓷技術(LTCC)創建可焊接和可引線接合的電路。然而,當與用有機基板材料製成的電路相比時,LTCC技術涉及高材料成本、在800攝氏度下加工、重量重、電氣性能差並且電路幾何形狀有限(電路寬度和間距(space)為0.1/0.1mm)。
在第一方面,一種製造方法包括:透過一聚合物厚膜(PTF)製程將一漿料結合於一有機基板上以形成一PTF跡線,在PTF跡線上塗覆一可燒結材料,以及將可燒結材料燒結於PTF跡線。
在一些實施態樣中,所述可燒結材料是純金屬。
在一些實施態樣中,所述漿料具有重量至少為75%的金屬。
在一些實施態樣中,還包括:透過將一有機聚合物與一金屬填料混合形成所述漿料。
在一些實施態樣中,所述有機聚合物包括一環氧樹脂而所述金屬填料包括金屬片或金屬球。
在一些實施態樣中,所述金屬填料的尺寸在0.2微米與30微米之間。
在一些實施態樣中,所述環氧樹脂中的所述金屬填料按體積在30%至70%之間。
在一些實施態樣中,所述環氧樹脂中的所述金屬填料按重量在 60%與91%之間。
在一些實施態樣中,所述將漿料結合於所述有機基板上包括絲網印刷所述漿料並隨後固化。
在一些實施態樣中,所述固化在120至190攝氏度之間的溫度下進行約1小時。
在一些實施態樣中,所述可燒結材料為銀、銅或金中的至少一種。
在一些實施態樣中,所述可燒結材料包括尺寸在10奈米至100奈米之間的與一有機溶劑混合的奈米顆粒。
在一些實施態樣中,所述燒結在180至200攝氏度之間的溫度、680至2760千帕之間的壓力以及15至60分鐘之間的時間下進行。
在第二方面,一種電路結構,包括:一有機基板層;一聚合物厚膜(PTF)跡線,由透過一PTF製程結合於所述有機基板層上的一漿料形成;以及一可燒結材料,塗覆且燒結於所述PTF跡線上。
在一些實施態樣中,所述漿料具有重量至少為75%的金屬。
在一些實施態樣中,所述漿料透過將一有機聚合物與一金屬填料混合而形成。
在一些實施態樣中,所述有機聚合物包括一環氧樹脂而所述金屬填料包括金屬片或金屬球。
在一些實施態樣中,所述將漿料結合於所述有機基板上包括絲網印刷所述漿料並隨後固化。
在一些實施態樣中,所述可燒結材料為銀、銅或金中的至少一種。
在一些實施態樣中,所述可燒結材料包括尺寸在10奈米至100奈米之間的奈米顆粒。
100:電路結構
110:PTF跡線
120:電路板
130:半導體芯片
140:可燒結材料
155:引線接合
160:焊接
本發明之其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中:圖1示出一半導體封裝中的一示例的電路結構。
下面具體的說明描述多個示範性實施例且所公開的各種特徵不意欲限制到明確公開的組合。因此,除非另有說明,本文所公開的各種特徵可以組合在一起而形成出於簡明目的而未示出的多個另外組合。
本發明提供一種在有機物上製造電路的方法,使用一純添加劑和選擇性的製程而無需任何濕法水性化學製程,其允許其它部件使用引線接合和/或焊接製造方法或者為貼附(attching)部件特別配製的任何導電環氧樹脂來電連接。所公開的製造方法生成電路,其中電路跡線牢固地結合於可引線接合或可焊接的有機基板上,並且另外表現出低的跡線電阻(即電路跡線的電阻)。
圖1示出一半導體封裝中的一示例的電路結構100。電路結構100將一聚合物厚膜(polymer thick film,PTF)製程和燒結組合。使用PTF製程將 一漿料(paste material)印刷並結合(bond)於由一有機基板製成的電路板120上,以形成一PTF跡線110。例如,PTF跡線110能將信號從一半導體芯片130傳送到外部引線。
PTF跡線110則塗覆有一可燒結材料140,可燒結材料140提供對塗覆在PTF跡線110上的可燒結材料140進行引線接合155或焊接160的能力。PTF跡線110對電路板120的有機基板提供一聚合物鍵結(polymeric bond),而可燒結材料140對PTF跡線110的暴露的金屬微米級顆粒提供一冶金結合(metallurgical bond)。
在一示例的實施方式中,聚合物厚膜(PTF)製程使用一有機聚合物(諸如環氧樹脂),有機聚合物與小的微米級的金屬顆粒(填料)混合以形成漿料。通常的填料尺寸是0.2-30微米且顆粒可具有片狀(flake)或球狀。PTF跡線可以使用該漿料絲網印刷並在120-190攝氏度之間的溫度固化約1小時。
混入環氧樹脂中的金屬填料的量按體積通常在30%與70%之間。環氧樹脂與金屬顆粒結合(bind)在一起並使印刷的電路跡線結合到有機基板上。用在環氧樹脂中的典型的金屬填料是銀、銅和銀包覆銅(silver coated copper)。在一示例的方面中,用在環氧樹脂中的金屬填料的量按重量在60%與91%之間。可以使用各種金屬和環氧樹脂類型來形成漿料。一般地,按重量超過約90-92%的金屬是不希望的,因為漿料由於高稠度(rhickness)而變得難以印刷。
申請人透過印刷和固化一蛇形跡線來評價各種PTF材料的跡線電阻。固化後立即測試的各種PTF材料的跡線電阻在40歐姆至4歐姆之間。在四次回流焊循環(reflow cycles)後,電阻降至21歐姆至2.7歐姆之間。電阻的降低至少部分是由於聚合物收縮的聚合物的交聯增加和金屬填料顆粒的接觸增加。
體積電阻(bulk resistances)和跡線電阻之間存在普遍的相關性(general correlation)。作為一參考點,銅或銀的體積電阻約為1.6-1.7μm-cm。例如,100μm-cm的體積電阻轉化(translated)為18-21歐姆的跡線電阻而12μm-cm的體積電阻轉化為2.7歐姆的跡線電阻。
某些評價的PTF材料被發現具有約3歐姆的低跡線電阻,但不是可引線接合或可焊接的。引線接合涉及超聲波振動和加熱。當試圖引線接合時,小的金屬填料脫離將它們結合到一起的聚合物且因此使引線接合。對於焊接,在焊料回流溫度(solder reflow temperature)下,在導電聚合物中,金屬填料進入並溶(dissolve)在焊料中直到僅環氧樹脂表面留下。
透過使用銅或銀包覆銅填料,焊接PTF是可能的,但是需要權衡電氣和機械性能。PTF材料的各種配方(formulation)在可焊性、附著性(adhesion)和導電性之間進行權衡。例如,增加的可焊性會降低導電性(即增加電路電阻)。
在一示例的實施方式中,使用PTF技術將一選定的漿料絲網印刷到一有機基板上並使用固化,以形成一PTF導電跡線。然後將一可燒結材料塗 覆且燒結於PTF導電跡線上。
可燒結材料提供對塗覆在聚合物厚膜上的可燒結材料進行引線接合或焊接的能力。燒結是透過不液化(liquefaction)的加熱和加壓使粉末材料熔合(coalesce)成固體或多孔物質的製程。在一些實施方式中,燒結方法包括使用光(使用波長約1065nm)、使用熱(180-400攝氏度)以及使用熱和壓力(1Mpa-10Mpa)。用於燒結的典型材料包括銅、銀或金。
申請人評價一系列可燒結材料(包括銀、銅或金的奈米顆粒)透過燒結與一PTF跡線的結合強度(bonding strength),並確認根據對諸如溫度(通常在180-200℃之間)、壓力(通常在680與2760kpa之間)以及時間(通常在15-60分鐘之間)等參數的調整可提供不同的結果。當然,不限於上述參數,且應該注意的是,最佳參數取決於應用。
此外,PTF跡線中金屬填料含量越高,可燒結材料與PTF跡線之間的冶金結合越強。例如,按重量使金屬填料含量等於或高於75%有利於在可燒結材料的奈米顆粒與PTF跡線中的金屬填料之間產生強烈的冶金結合。
純燒結金屬不能很好地附著(adhere)到一有機基板上。然而,透過所公開的實施方式避免了該問題,因為可燒結材料塗覆並燒結於PTF導電跡線上,而不是直接燒結於有機基板上。此外,可燒結材料是可引線接合和可焊接的。
在一些實施方式中,可燒結材料包括10-100nm級的奈米顆粒,其中典型的尺寸為約30nm,與有機溶劑混合以形成能絲網印刷的一漿料。燒結 製程和燒結性能受如何製造奈米顆粒、尺寸分佈、它們如何被“封蓋(capped)”以防止聚集(aggregation)以及什麼有機溶劑用於製造漿料的影響。
可燒結材料(諸如銅或銀金屬)的低溫燒結具有約3-5μm-cm的體積電阻,這比目前生產的最導電的PTF材料低三至五倍。與單獨的PTF跡線相比,PTF跡線上燒結的可燒結材料提供更低的電阻。例如,燒結/PTF組合具有的電阻比當前使用的PTF技術的電阻小至少20倍,對於極小的窄電路線(例如25μm寬的電路)來說是非常有利的且是顯著減少的。
將認識到的是,前述說明書提供了所公開的系統和技術的示例。然而,可設想的是,本發明的其它實施方式可與前述示例在細節上不同。所有提及的本文的公開內容或示例意欲指的是在那個角度說明的特定的示例且不意欲暗含任何對公開內容的範圍更普遍的限制。針對某些特徵的所有差異和貶義的語言意欲表示那些特徵不是優選的,但不從所公開內容的範圍中完全排除,除非另有說明。
本文列舉的數值範圍僅是意圖用作簡化表達方式,該簡化表達方式指的是獨立地涉及落入該範圍內的各個單獨的值,除非本文另有說明,各獨立的值被併入到說明書中,就像它在本文中被獨立地列舉一樣。除非本文另有說明或與上下文明顯矛盾,本文所述的所有方法可按任何合適的順序執行。
相應地,本發明包括適用法律所允許的隨附申請專利範圍中所列舉的主題的所有修改和等同物。此外,除非本文另有說明或與上下文明顯矛盾,在本發明的所有可能的變形中的上述特徵(elements)的任意組合為本發 明所包含。
100:電路結構
110:PTF跡線
120:電路板
130:半導體芯片
140:可燒結材料
155:引線接合
160:焊接

Claims (14)

  1. 一種將聚合物厚膜表面金屬化的方法,包括:透過將一有機聚合物與一金屬填料混合形成一漿料,所述漿料中的所述金屬填料的量按重量超過85%而小於91%,所述金屬填料的量按體積在30%至70%之間;透過一聚合物厚膜(PTF)製程將所述漿料結合於一有機基板上以形成一PTF跡線;在所述PTF跡線上塗覆一可燒結材料;將所述可燒結材料燒結於PTF跡線上;以及透過引線接合的方式將一導線連接於所述可燒結材料,使得所述導線藉由所述可燒結材料電連接於所述PTF跡線。
  2. 如請求項1所述的方法,其中,所述可燒結材料是純金屬。
  3. 如請求項1所述的方法,其中,所述有機聚合物包括一環氧樹脂而所述金屬填料包括金屬片或金屬球。
  4. 如請求項1所述的方法,其中,所述金屬填料的尺寸在0.2微米與30微米之間。
  5. 如請求項1所述的方法,其中,所述將漿料結合於所述有機基板上包括絲網印刷所述漿料並隨後固化。
  6. 如請求項5所述的方法,其中,所述固化在120至190攝氏度之間的溫度下進行約1小時。
  7. 如請求項1所述的方法,其中,所述可燒結材料為銀、銅或金中的至少一種。
  8. 如請求項1所述的方法,其中,所述可燒結材料包括尺寸在10奈米至100奈米之間的與一有機溶劑混合的奈米顆粒。
  9. 如請求項1所述的方法,其中,所述燒結在180至200攝氏度之間的溫度、680至2760千帕之間的壓力以及15至60分鐘之間的時間下進行。
  10. 一種電路結構,包括:一有機基板層;一聚合物厚膜(PTF)跡線,由透過一PTF製程結合於所述有機基板層上的一漿料形成,所述漿料透過將一有機聚合物與一金屬填料混合而形成,所述漿料中的所述金屬填料的量按重量超過85%而小於91%,所述金屬填料的量按體積在30%至70%之間;以及一可燒結材料,塗覆且燒結於所述PTF跡線上。
  11. 如請求項10所述的電路結構,其中,所述有機聚合物包括一環氧樹脂而所述金屬填料包括金屬片或金屬球。
  12. 如請求項10所述的電路結構,其中,所述將漿料結合於所述有機基板上包括絲網印刷所述漿料並隨後固化。
  13. 如請求項10所述的電路結構,其中,所述可燒結材料為銀、銅或金中的至少一種。
  14. 如請求項10所述的電路結構,其中,所述可燒結材料包括尺寸在10奈米至100奈米之間的奈米顆粒。
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