TWI701715B - N-face III族/氮化物磊晶結構及其主動元件與其積體化之極性反轉製作方法 - Google Patents

N-face III族/氮化物磊晶結構及其主動元件與其積體化之極性反轉製作方法 Download PDF

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TWI701715B
TWI701715B TW106118759A TW106118759A TWI701715B TW I701715 B TWI701715 B TW I701715B TW 106118759 A TW106118759 A TW 106118759A TW 106118759 A TW106118759 A TW 106118759A TW I701715 B TWI701715 B TW I701715B
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TW201903845A (zh
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黃知澍
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黃知澍
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Priority to CN201810532705.6A priority patent/CN109004027B/zh
Priority to US15/997,907 priority patent/US10529821B2/en
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    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
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Abstract

本發明係關於一種N-face III族/氮化物磊晶結構及其主動元件與其製作 方法。在此N-Face AlGaN/GaN磊晶結構包含有一矽基底;一位於矽基底上之具碳摻雜之緩衝層(Buffer layer(C-doped));一位於具碳摻雜之緩衝層(Buffer layer(C-doped))上之具碳摻雜(C-doped)之GaN層;一位於具碳摻雜(C-doped)之GaN層上之i-Al(y)GaN層;一位於i-Al(y)GaN層上之i-GaN channel層;一位於i-GaN channel層上之i-Al(x)GaN層;一位於i-Al(x)GaN層內的氟離子結構;以及一位於氟離子結構上的第一閘極絕緣介電層,其中該x=0.1-0.3,該y=0.05-0.75。在元件設計上藉由氟離子結構使N-face III族/氮化物磊晶結構內之2-DEG在氟離子結構下方處能呈現空乏狀態,此時2-DEG位於i-GaN channel層與該i-Al(y)GaN層的接面處;爾後,藉由上述結構製作出氮化鎵加強型AlGaN/GaN高速電子遷移率電晶體、混合型蕭特基位障二極體或混合型元件,此時,經過極性反轉製程步驟(也就是絕緣保護介電層所產生的應力)後,2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處。

Description

N-face III族/氮化物磊晶結構及其主動元件與其積體化之 極性反轉製作方法
本發明係關於一種磊晶結構,特別是關於一種N-face III族/氮化物半導體系列成長的磊晶結構,其好處是i-Al(x)GaN層在N-face極性成長下會有較少的缺陷,藉由本發明利用製程的方式,也就是利用絕緣保護介電層所產生的應力,將N-face極性反轉為Ga-face極性使得2-DEG從iGaN/i-Al(y)GaN層介面的i-GaN channel層內轉至i-Al(x)GaN層/iGaN的i-GaN channel層內,除了得到較低的i-Al(x)GaN surface traps外,原本的i-Al(y)GaN層正好可以阻擋buffer trap的電子進入channel layer進而降低電流崩塌效應(Current Collapse)的問題之嶄新的主動元件與其積體化之製作方法,除此之外本發明也導入一閘極護城河結構,其係位於該i-Al(x)GaN層1並圍繞氟離子結構兩側。
在過去的習知技藝中,以磊晶結構來達到E-Mode AlGaN/GaN HEMT(加強型AlGaN/GaN高速電子遷移率電晶體)最常見的方式就是1.Ga-Face P-GaN Gate E-Mode HEMT structure、2.N-Face Al(x)GaN Gate E-Mode HEMT structure,但正如兩者元件的命名方式就可知只有Gate的區域會保留P-GaN或Al(x)GaN。
最常見的製程方式就是在傳統的D-Mode AlGaN/GaN HEMT磊晶結構上額外成長一層P-GaN層,之後再將Gate區域以外的P-GaN以乾式蝕刻的方式蝕刻掉,並盡量保持下一層AlGaN磊晶層厚度的完整性,因為當下一層AlGaN磊晶層被蝕刻掉太多的話會連帶造成Ga-Face P-GaN Gate E-Mode HEMT structure之AlGaN/GaN介面的2-DEG無法形成。因此,以乾式蝕刻的方式其實難度很高因為:1.蝕刻深度難掌控、2.磊晶片上每一個磊晶層的厚度還是會有不均勻的;此外,此磊晶結構與一般D-Mode AlGaN/GaN HEMT磊晶結構皆有電流崩塌效應(Current Collapse)的問題必須去解決,例如:緩衝層的缺陷(Buffer Traps)及表面缺陷(Surface Traps)。
有鑒於此,本發明係針對上述之缺失,提出一種嶄新的N-face III族/氮化物磊晶結構與以及利用該磊晶結構之極性反轉後所形成之主動元件與其積體化之製作方法。
本發明之主要目的在於提供一種嶄新的N-face III族/氮化物磊晶結構與利用該磊晶結構所形成之主動元件與其積體化之極性反轉製作方法,以解決磊晶結構在高速電子遷移率電晶體所遇到的製程瓶頸,並且本發明之N-face III族/氮化物磊晶結構基板上在極性反轉製程後可一次性形成數種能夠在高電壓高速操作之主動元件。
本發明之另一目的在於藉由一氟離子結構使N-face III族/氮化物磊晶結構在主動區(AlGaN/GaN/AlGaN)極性反轉之後之2-DEG在氟離子結構下方處能呈現空乏狀態,以製作出具有閘極護城河結構之氮化鎵加強型AlGaN/GaN高速 電子遷移率電晶體、混合型蕭特基位障二極體或混合強型AlGaN/GaN高速電子遷移率電晶體等元件。
為達上述目的,本發明提出一種N-face之AlGaN/GaN磊晶結構,其包含有一矽基底;一位於矽基底上之具碳摻雜之緩衝層(Buffer layer(C-doped));一位於具碳摻雜之緩衝層(Buffer layer(C-doped))上之具碳摻雜(C-doped)之GaN層;一位於具碳摻雜(C-doped)之GaN層上之i-Al(y)GaN層;一位於i-Al(y)GaN層上之i-GaN channel層;以及一位於i-GaN channel層上之i-Al(x)GaN層;一位於i-Al(x)GaN層內的氟離子結構;一位於氟離子結構上的第一閘極絕緣介電層,其中該x=0.1-0.3,該y=0.05-0.75;以及一閘極護城河結構,其係位於該i-Al(x)GaN層並圍繞氟離子結構兩側。
本發明更提出數種使用該N-face之AlGaN/GaN磊晶結構所製得之具有氟離子及閘極護城河結構之高速電子遷移率電晶體及蕭特基位障二極體元件,與其積體化之製作方法。
1:磊晶結構
11:矽基底
12:Buffer layer(C-doped)
13:具碳摻雜(C-doped)之GaN層
14:i-Al(y)GaN層
15:i-GaN channel層
150:2-DEG
16:i-Al(x)GaN層
160:氟離子結構
161:閘極護城河結構
2:磊晶結構
21:i-Al(z)GaN Grading Buffer Layer
30:第一源極電極金屬
31:第一汲極電極金屬
32:第二源極電極金屬
33:第二汲極電極金屬
34:陰極電極金屬
40:離子佈植
41:離子佈植
42:乾式蝕刻
43:乾式蝕刻
44:離子佈植
45:離子佈植
46:乾式蝕刻
47:乾式蝕刻
50:第一閘極絕緣介電層
51:側向電容
52:側向電容
53:第二閘極絕緣介電層
60:第一閘極電極金屬
61:第一源極電極連接金屬
601:閘極電極連接金屬
62:第一汲極電極連接金屬
63:第二閘極電極金屬
64:第二源極電極連接金屬
65:第二汲極電極連接金屬
66:陰極電極連接金屬
67:第一閘極電極連接金屬
70:絕緣保護介電層
80:第一閘極電極打線區域
82:源極電極打線區域
83:汲極電極打線區域
90:陽極(含陽極電極金屬)
901:陽極電極金屬
91:陰極
92:陽極場板絕緣介電層
93:陰極金屬
D:汲極
G:閘極
L1:左側區域
R1:右側區域
S:源極
第1A圖,其為本發明所設計的N-face AlGaN/GaN-HEMT磊晶結構的第一結構圖;第1B圖,其為本發明所設計的N-face AlGaN/GaN-HEMT磊晶結構的第二結構圖;第2A圖,其為本發明之氟離子注入加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體的第一結構示意圖; 第2B圖,其為本發明之氟離子注入加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體的第二結構示意圖;第2C圖,其為本發明之氟離子注入加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體的俯視圖;第3A圖,其為本發明之N-face AlGaN/GaN磊晶結構上形成閘極護城河結構、源極歐姆接觸電極及汲極歐姆接觸電極的示意圖;第3B-1圖,其為本發明之元件隔離製程的第一實施例的示意圖;第3B-2圖,其為本發明之元件隔離製程的第二實施例的示意圖;第3C-1圖,其為第3B-1圖結構上形成氟離子結構的示意圖;第3C-2圖,其為第3B-2圖結構上形成氟離子結構的示意圖;第3D-1圖,其為第3C-1圖結構上形成第一閘極絕緣介電層的示意圖;第3D-2圖,其為第3C-2圖結構上形成第一閘極絕緣介電層的示意圖;第3E-1圖,其為第3D-1圖結構上形成第一閘極電極金屬、源極連接金屬與汲極連接金屬的示意圖;第3E-2圖,其為第3D-2圖結構上形成第一閘極電極金屬、源極連接金屬與汲極連接金屬的示意圖;第4A圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體的第一結構圖;第4B圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體的第二結構圖; 第4C圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高電子遷移率電晶體的俯視圖;第4D圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高電子遷移率電晶體的等效電路圖;第4D-1圖,其為傳統的Ga-face HEMT結構之所有存在會造成電流崩塌效應的各種缺陷分佈圖;第4D-2圖,其為Ga-face及N-face GaN成長在一基板的示意圖;第5A圖,其為本發明之N-face AlGaN/GaN磊晶結構上形成閘極護城河結構、源極歐姆接觸電極及汲極歐姆接觸電極的示意圖;第5B-1圖,其為本發明之元件隔離製程的第一實施例的示意圖;第5B-2圖,其為本發明之元件隔離製程的第二實施例的示意圖;第5C-1圖,其為本發明之第5B-1圖的結構形成氟離子結構的示意圖;第5C-2圖,其為本發明之第5B-2圖的結構形成氟離子結構的示意圖;第5D-1圖,其為本發明之第5C-1圖的結構形成閘極氧化層的示意圖;第5D-2圖,其為本發明之第5C-2圖的結構形成閘極氧化層的示意圖;第5E-1圖,其為本發明之第5D-1圖的結構形成閘極電極金屬與連接金屬的示意圖;第5E-2圖,其為本發明之第5D-2圖的結構形成閘極電極金屬與連接金屬的示意圖; 第6A圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體的第一結構圖;第6B圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體的第二結構圖;第6C圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體的俯視圖;第6D圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接空乏型N-face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體的等效電路圖;第7A圖,其為本發明之N-face AlGaN/GaN磊晶結構上形成閘極護城河結構、源極歐姆接觸電極及汲極歐姆接觸電極的示意圖;第7A-1圖,其為本發明之元件隔離製程的第一實施例的示意圖;第7A-2圖,其為本發明之元件隔離製程的第二實施例的示意圖;第7B-1圖,其為本發明之第7A-1圖的結構形成氟離子結構與閘極氧化層的示意圖;第7B-2圖,其為本發明之第7A-2圖的結構形成氟離子結構與閘極氧化層的示意圖; 第7C-1圖,其為本發明之第7B-1圖的結構形成閘極電極金屬與連接金屬的示意圖;第7C-2圖,其為本發明之第7B-2圖的結構形成閘極電極金屬與連接金屬的示意圖;第8A-1圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接一AlGaN/GaN蕭特基位障二極體(SBD)之混合型蕭特基位障二極體的第一結構圖;第8A-2圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接AlGaN/GaN蕭特基位障二極體(SBD)之混合型蕭特基位障二極體的第二結構圖;第8B圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接AlGaN/GaN蕭特基位障二極體(SBD)之混合型蕭特基位障二極體的俯視圖;第8C圖,其為本發明之加強型N-face極性反轉具有閘極護城河結構AlGaN/GaN高速電子遷移率電晶體串接AlGaN/GaN蕭特基位障二極體(SBD)之混合型蕭特基位障二極體的等效電路圖。
如第1A圖所示,其為本發明所設計的N-face AlGaN/GaN-HEMT磊晶結構1的第一結構圖。此磊晶結構1依序包含有一矽基底(Silicon Substrate)11、一Buffer layer(C-doped)12,一具碳摻雜(C-doped)之GaN層13,一i-Al(y)GaN層14,一i-GaN channel層15,以及一i-Al(x)GaN層16,此磊晶結構具有i-Al(y)GaN層14,此磊晶層(i-Al(y)GaN層14)在主動區(AlGaN/GaN/AlGaN)極性反轉製程之後,主 要的功用是阻擋Buffer Trap的電子進入Channel Layer(i-GaN channel層15)進而降低元件電流崩塌(Current Collapse)的現象。如下第1B圖所示,為本發明所設計的N-Face AlGaN/GaN-HEMT磊晶結構2的第二結構圖,主要是考量i-Al(y)GaN層14直接成長在具碳摻雜(C-doped)之GaN層13會有過大的晶格不匹配問題,因此加入i-Al(z)GaN Grading Buffer Layer 21,Z=0.01-0.75。
第1A及1B圖的結構更可以用於製作實施例一:氟離子注入加強型具有閘極護城河結構N-face極性反轉AlGaN/GaN高速電子遷移率電晶體。
如第2A圖所示,其為本發明之氟離子注入i-Al(x)GaN層16內,在極性反轉製程(也就是絕緣保護介電層所產生的應力)後,形成加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體第一結構示意圖。如圖所示,本發明之加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體之特徵在於包含有本發明所設計之N-Face AlGaN/GaN磊晶結構1(如第1A圖所示)、2(如第1B圖所示);以及一氟離子結構160,其係位於i--Al(x)GaN層16內,其中2-DEG 150雖形成在i--Al(x)GaN層16/i-GaN channel層15接面的i-GaN channel層15內,但因為氟離子結構160之存在,使得位於i-GaN channel層15內之2-DEG 150位於氟離子結構160下方處將是呈現空乏狀態,最後則是利用絕緣保護介電層70所產生的應力將主動區(i-Al(x)GaN層/iGaN/i-Al(y)GaN層)從N-face極性反轉成Ga-face極性。這也就是為何第2A圖的2-DEG 150在製程完成之後是位於i-Al(x)GaN層16/iGaN介面處的i-GaN channel層15內,因為原本的N-face極性已反轉成Ga-face極性。
如第2A圖所示,本發明導入以乾式蝕刻的方式在氟離子結構160兩側的i--Al(x)GaN層16蝕刻出兩條閘極護城河結構(161),其主要用意是在防止氟離子在元件工作時因高溫而導致氟離子側向擴散進而導致元件的電流電壓特性 改變。除此之外,此閘極護城河結構使得閘極電極包覆部分氟離子結構160,如此一來閘極控制元件的開關能力會更強進而使得元件開關速度變快及開關損耗降低。
本發明之加強型N-face極性反轉AlGaN/GaN高速電子遷移率電晶體之結構,於N-Face AlGaN/GaN磊晶結構1上形成有一第一源極歐姆接觸電極(即第一源極電極金屬)30與一第一汲極歐姆接觸電極(即第一汲極電極金屬)31,且分設於N-Face AlGaN/GaN磊晶結構1之i-Al(x)GaN層16的表面,在來就是經由乾式蝕刻的方式在氟離子結構160預定區兩側的i--Al(x)GaN層16蝕刻出兩條閘極護城河結構(161),之後經由氟離子注入後形成氟離子結構160,在來就是在氟離子結構160上形成一第一閘極絕緣介電層50,並且位於其上形成一第一閘極金屬60,並且同步形成與第一源極歐姆接觸電極30及第一汲極歐姆接觸電極31連接之源極電極連接金屬61、汲極電極連接金屬62及閘極電極連接金屬601等,其中圖號61、62、601皆屬於與圖號60之相同金屬層,但為了方便示意則以不同圖號61、62、601表示各電極之連接金屬,之後則是在整個磊晶片表面附蓋一層絕緣保護介電層70,並且利用絕緣保護介電層70所產生的應力使得主動區(i-Al(x)GaN層16/i-GaN channel層15/i-Al(y)GaN層14)的極性由N-face轉Ga-Face使得2-DEG 150由i-GaN channel層15/i-Al(y)GaN層14介面的i-GaN channel層15內移動至i--Al(x)GaN層16/i-GaN channel層15介面的i-GaN channel層15內,最後則是在絕緣保護介電層70上蝕刻出源極、汲極及閘極的打線區域以及磊晶片上元件與元件之間的切割道。另外第2B圖同樣是本發明之氟離子注入加強型具有閘極護城河結構N-face極性反轉AlGaN/GaN高速電子遷移率電晶體的第二結構示意圖,其與第2A圖的差 異同樣是在利用多重能量破壞性離子佈植(Ion-Implant)40、41方式或是利用乾式蝕刻(Dry etching)42、43方式的差異。
參閱第2C圖,其為本發明之氟離子注入加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體的俯視圖。如圖所示,第2C圖具有第一閘極電極打線區域80、一源極電極打線區域82與一汲極電極打線區域83,而第2C圖的第一閘極電極打線區域80亦為陰極打線區域81。再者,第2C圖同樣可以看到i-Al(x)GaN層16、閘極護城河結構(161)、第一源極電極金屬30、第一汲極電極金屬31、一第一閘極絕緣介電層50、第一閘極電極金屬60、第一源極電極連接金屬61與第一汲極電極連接金屬62的位置。
以下是此實施例一之製作方法,但並不因此拘限本實施例僅可以此方式製作,而其金屬線路佈局方式也是如此。
請參閱第3A圖,其為本發明之N-Face AlGaN/GaN磊晶結構上形成源極歐姆接觸電極及汲極歐姆接觸電極的示意圖。步驟S11:形成源極歐姆接觸電極30以及汲極歐姆接觸電極31。此步驟利用金屬蒸鍍的方式,於N-Face AlGaN/GaN磊晶結構1上鍍上金屬層,例如一般為Ti/Al/Ti/Au或Ti/Al/Ni/Au所組成之金屬層,再利用金屬掀離的方式將所鍍上之金屬層圖案化為所設定的圖形,以形成位於磊晶片(N-Face AlGaN/GaN磊晶結構1)上之第一源極電極金屬30以及第一汲極電極金屬31,之後再經過700~900℃,30秒的熱處理,使得第一源極電極金屬30以及第一汲極電極金屬31成為歐姆接觸電極,在來就是經由乾式蝕刻的方式在氟離子結構160預定區兩側的i--Al(x)GaN層16蝕刻出兩條閘極護城河結構(161)。
請參閱第3B-1圖,其為本發明之元件隔離製程的第一實施例的示意圖。步驟S12:元件隔離製程。此步驟係利用多重能量破壞性離子佈植(Ion-Implant)40、41,一般使用Boron或Oxygen等重原子,使得元件與元件隔離,或者如第3B-2圖,其為本發明之元件隔離製程的第二實施例的示意圖。採用乾式蝕刻(Dry etching)42、43,蝕刻N-Face AlGaN/GaN磊晶結構1的i-Al(x)GaN層16、i-GaN channel層15及i-Al(y)GaN層14而至高阻值的具碳摻雜(C-doped)之GaN層13,使得元件與元件隔離。
請參閱第3C-1圖,其為第3B-1圖結構上形成氟離子結構的示意圖。步驟S13:氟離子植入製程。此步驟以F-植入在欲形成第一閘極電極金屬60(如第3E-1圖所示)的位置的下方i-Al(x)GaN層16內使其下方區域i-GaN channel層15無法形成2-DEG 150,之後再經過425℃、600秒的熱處理之後,氟離子結構160會穩定的占據i-Al(x)GaN層16內的空間。
再者,氟離子植入製程更包含,利用黃光曝光顯影定義i-Al(x)GaN層16的氟離子注入的區域,利用CF4在乾式蝕刻系統或離子佈植機系統內產生氟離子電漿,在特定電場(或特定電壓)下將氟離子(F-)注入i-Al(x)GaN層16內後,再經過425℃、600秒的熱處理,使氟離子結構160穩定的占據i-Al(x)GaN層16內的空間。此外,第3C-2圖,其為第3B-2圖結構上形成氟離子結構的示意圖,其與第3C-1圖相同,所以不再覆述。
請參閱第3D-1圖,其為第3C-1圖結構上形成第一閘極絕緣介電層的示意圖。步驟14:閘極絕緣介電層製程。此步驟利用PECVD沉積一層絕緣介電層,其材質可以為SiOx、SiOxNy或SiNx,用來作為第一閘極絕緣介電層50,厚度=10~100nm,接下來利用光阻(Photo Resist)以曝光顯影的方式定義出第一閘 極絕緣介電層50的區域;最後再使用BOE(Buffered Oxide Etchant)利用濕式蝕刻的方式將第一閘極絕緣介電層50的區域以外的絕緣介電層蝕刻掉,只保留欲形成第一閘極絕緣介電層50的區域,之後再將光阻以去光阻液蝕刻掉。此外,第3D-2圖,其為第3C-2圖結構上形成第一閘極絕緣介電層的示意圖,其與第3D-1圖相同,所以不再覆述。
請參閱第3E-1圖,其為第3D-1圖結構上形成第一閘極電極金屬、源極連接金屬與汲極連接金屬的示意圖。步驟S15:金屬線路佈局製程。此步驟包含有進行金屬鍍膜,利用金屬蒸鍍結合金屬掀離方式將材質為Ni/Au之金屬層圖案化形成一第一閘極電極金屬60、閘極電極連接金屬601(包含形成第3C圖的第一閘極電極打線區域(Bonding Pad)80)、源極電極連接金屬61(包含源極電極打線區域(Bonding Pad)82)與汲極電極連接(Interconnection)金屬62(包含汲極電極打線區域(Bonding Pad)83)。而在金屬線路佈局上,舉例來說,位於氟離子結構160及第一閘極絕緣介電層50上之第一閘極電極金屬60與第一閘極電極打線區域80連接。此外,第3E-2圖,其為第3D-2圖結構上形成第一閘極電極金屬、源極連接金屬與汲極連接金屬的示意圖,其與第3E-1圖相同,所以不再覆述。
接著步驟S16:介電層的沉積與圖案化。此步驟是利用PECVD成長一層絕緣保護介電層70,其材質可以為SiOx、SiOxNy或SiNx,厚度為>2000A,此絕緣保護介電層70夠厚,才能夠對元件造成足夠的應力而改變其原有的極性。最後再對絕緣保護介電層70進行圖案化,以顯露出各打線區域82、83(亦顯露出第2C圖的第一閘極電極打線區域80),舉例來說以BOE(Buffered Oxide Etchant)以濕式蝕刻(Wet Etching)的方式將Bonding Pad Region蝕刻出來成為之後打 線的區域。此步驟完成後,就形成如第2A、2B圖的具有氟離子注入加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體。
此外,第3E-1、3E-2圖的虛線圈圍處的地方會形成一個具有側向的電容,此側向電容51、52會形成場板效應(Field Plate Effect),其主要功能是利用此側向電容51、52的電場將第一閘極電極金屬60下方高密度的電場均勻分散開來,其用處除了增加元件(HEMT)的汲極至源極的崩潰電壓(Vds),也可以抑制第一閘極電極金屬60下方的Electron trapping effect進而降低元件(HEMT)在工作時的電流崩塌效應(Current Collapse)。
實施例二:如第4A、4B圖,為本發明之加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體所形成的混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體的第一結構圖與第二結構圖。如圖4A、4B所示,經由乾式蝕刻的方式在氟離子結構160預定區兩側的i-Al(x)GaN層16蝕刻出兩條閘極護城河結構(161),之後再將氟離子(F-)植入在第一閘極電極金屬60下方i-Al(x)GaN層16內形成加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接一個空乏型N-Face極性反轉不具有閘極絕緣介電層(Gate Dielectric)AlGaN/GaN高速電子遷移率電晶體而成的“混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體”。
本發明的混合型加強型AlGaN/GaN高速電子遷移率電晶體可以解決一般AlGaN/GaN E-Mode HEMT(High electron mobility transistor,HEMT,高速電子遷移率電晶體)常會出現的問題,也就是元件操作在飽和區時(閘極電壓Vg固定),導通電流Ids會隨著汲源極電壓Vds提升而增加的現象,其主要原因是來 自於空乏區沒有截止(Pinch-off)掉整個通道(i-GaN channel層15),因此藉由串接(Cascode)一個D-HEMT,而利用D-HEMT的飽和電流來限制E-Mode HEMT的飽和電流正好可以解決此問題。
如第4A、4B圖所示,實施例二之混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有本發明所設計之N-Face AlGaN/GaN磊晶結構在極性反轉後之元件結構圖,其區分為一左側區域L1與一右側區域R1。左側區域L1形成有一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,此氮化鎵加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有一氟離子結構160,其中2-DEG 150雖形成在i-Al(x)GaN層16/i-GaN channel層15接面的i-GaN channel層15內,但因為氟離子結構160之存在,使得i-GaN channel層15內之2-DEG 150位於氟離子結構160下方處將是呈現空乏狀態。右側區域R1形成有一空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體。
請參閱第4C圖,其為本發明之加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接空乏型N-Face極性反轉不具有閘極絕緣介電層之混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體的俯視圖。如圖所示,氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體的第一源極電極金屬30上形成源極電極連接金屬61,且第一源極電極金屬30透過源極電極連接金屬61與空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/Ga高速電子遷移率電晶體的第二閘極電極金屬63連接,另外第一汲極電極連接金屬與第二源極電極連接金屬是電性相連接 的。於混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體中,第4C圖中的S為其一源極、G為其一閘極及D為其一汲極。
此實施例之製程方式,首先,如第5A圖,其為本發明之N-Face AlGaN/GaN磊晶結構上形成源極歐姆接觸電極及汲極歐姆接觸電極的示意圖。提供一本發明之N-face AlGaN/GaN磊晶結構,並將左側區域L1設定為製作氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,將右側區域R1設定為是製作空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體。當然左右兩側區域L1、R1的設定可依需求變更,這是無庸置疑的。
接續,如同先前所述之步驟11的製作方法,於N-face AlGaN/GaN磊晶結構上利用金屬蒸鍍的方式結合金屬掀離的方式形成第一源極電極金屬30、第一汲極電極金屬31、第二源極電極金屬32及第二汲極電極金屬33,之後再經過700~900℃,歷時約30秒的熱處理使得第一源極電極金屬30、第一汲極電極金屬31、第二源極電極金屬32及第二汲極電極金屬33成為第一源極歐姆接觸電極30、第一汲極歐姆接觸電極31、第二源極歐姆接觸電極32及第二汲極歐姆接觸電極33,之後經由乾式蝕刻的方式在氟離子結構160預定區兩側的i-Al(x)GaN層16蝕刻出兩條閘極護城河結構161(如第4B圖所示)。
請參閱第5B-1圖,其為本發明之元件隔離製程的第一實施例的示意圖。利用如第5B-1圖所示之破壞性離子佈植40、41、44、45或者如第5B-2圖所示之乾式蝕刻N-face AlGaN/GaN磊晶結構42、43、46、47至高阻值的具碳摻雜(C-doped)之GaN層13,來施行元件(左側區域L1的電晶體)與元件(右側區域R1 的電晶體)間的隔離製程。再者,第5B-2圖為本發明之元件隔離製程的第二實施例的示意圖,其與第5B-1圖相似於此不再覆述。
請參閱第5C-1圖,其為本發明之第5B-1圖的結構形成氟離子結構的示意圖。如圖所示,利用F-植入在欲形成第一閘極金屬60的位置(如第4B圖所示)的下方i-Al(x)GaN層16內使其下方區域i-GaN channel層15無法形成2-DEG 150,之後再經過425℃、600秒的熱處理之後,氟離子結構會穩定的占據i-Al(x)GaN層內的空間。第5C-2圖為本發明之第5B-2圖的結構形成氟離子結構的示意圖,其與第5C-1圖相似於此不再覆述。
請參閱第5D-1圖,其為本發明之第5C-1圖的結構形成閘極絕緣介電層50的示意圖。如圖所示,利用PECVD沉積一層絕緣介電層,其材質可以為SiOx、SiOxNy或SiNx,用來作為第一閘極絕緣介電層50,厚度=10~100nm,接下來利用光阻(Photo Resist)以曝光顯影的方式定義出第一閘極絕緣介電層的區域;最後再使用BOE(Buffered Oxide Etchant)利用濕式蝕刻的方式將第一閘極絕緣介電層50的區域以外的絕緣介電層蝕刻掉,只保留欲形成第一閘極絕緣介電層50的區域,之後再將光阻以去光阻液蝕刻掉。第5D-2圖為本發明之第5C-2圖的結構形成閘極絕緣介電層50的示意圖,其與第5C-1圖相似於此不再覆述。
請參閱第5E-1圖,其為本發明之第5D-1圖的結構形成閘極電極金屬與連接金屬的示意圖。如圖所示,利用金屬蒸鍍結合金屬掀離的方式形成第一閘極電極金屬60、第一源極電極連接金屬(具有如第4C圖所示具有源極電極打線區域82)61及第一汲極電極連接金屬62、第二閘極電極金屬63、第二源極電極連接金屬64及第二汲極電極連接金屬(具有如第4C圖所示具有汲極電極打線區域83)65。當然也可於此步驟同時形成與第一閘極電極金屬層60電性連接之第 一閘極電極連接金屬67(具有如第4C圖所示具有第一閘極電極打線區域80),另外第一閘極電極金屬60、第一源極電極連接金屬61、第一汲極電極連接金屬62、第二閘極電極金屬63、第二源極電極連接金屬64及第二汲極電極連接金屬65皆是一次性金屬鍍膜完成,其中第一源極電極連接金屬61與第二閘極電極金屬63是電性相連接的,而第一汲極電極連接金屬62與第二源極電極連接金屬64是電性相連接的。第5E-2圖為本發明之第5D-2圖的結構形成閘極電極金屬與連接金屬的示意圖,其與第5E-1圖相似於此不再覆述。
同樣接著利用PECVD沉積較大壓縮(介電常數n~1.45)或擴張應力(介電常數n~2.0)的一層絕緣保護介電層(Passivation Dielectric)70,其材質可以選自於SiOx、SiOxNy或SiNx,而且厚度至少大於200nm,以將元件主動區磊晶層內的i-Al(x)GaN層16/i-GaN channel層15/i-Al(y)GaN層14,由N-Face反轉至Ga-Face(極性反轉),如此一來氟離子結構160比較能夠完全空乏掉2-DEG。最後再對絕緣保護介電層70進行圖案化,以顯露出第4C圖的各打線區域80、82、83而完成第4A、4B圖的結構。
如第4A圖所示,同樣的,虛線圈起來的地方會形成一個具有側向的電容,此側向電容51、52會形成場板效應(Field Plate Effect),其主要功能是利用此側向電容51、52的電場將第一閘極電極金屬60下方高密度的電場均勻分散開來,其用處除了增加元件(HEMT)汲極至源極的崩潰電壓(Vds),也可以抑制第一閘極電極金屬60下方的Electron trapping effect進而降低元件(HEMT)在工作時的電流崩塌效應(Current Collapse)。
第4D-1圖,其結構為傳統的Ga-face HEMT結構,由於極性(自發極化_Spontaneous Polarization)向下加上壓電效應(Piezoelectric Effect),因此造成 AlGaN底部累積正電荷+σ pol,而AlGaN底部累積負電荷-σ pol,而σ T(Donor-like Surface Traps)正是我們所謂的“表面缺陷”(Suface Traps),這種表面缺陷會“捕捉電子”進而造成電流崩塌效應的問題。
依先前所提到,隨著本發明N-face磊晶結構1、2內的絕緣保護介電層70越來越厚,絕緣保護介電層70對下方的壓縮或擴張應力越來越大,當大到某一種程度時,元件主動區磊晶(i-Al(x)GaN層16/i-GaN channel層15/i-Al(y)GaN層14)層由N-Face反轉至Ga-Face,此時i-GaN channel層15/i-Al(y)GaN層14接面處的i-GaN channel層15內的2-DEG 150會移動至i-Al(x)GaN層16/i-GaN channel層15接面處的i-GaN channel層15內;其伴隨的好處是1.N-Face i-Al(x)GaN層16內的表面缺陷(Surface Traps)比較低,因此可以利用先前所形成的微量“淺層缺陷(Shallow Traps)”以極小的漏電流排除位於表面缺陷(Surface Traps)內的電子,2.由於i-Al(y)GaN層14的能帶較寬因此正好可以阻檔緩衝缺陷(Buffer Traps)的電子進入i-GaN channel層15。
再者,請參閱第4D-2圖,N-Face的磊晶表面i-Al(x)GaN層16的表面是帶有補償性的負電荷,因此當保護介電層(SiOx or SiNx)剛開始沉積上去時,由於i-Al(x)GaN層16的表面是帶有補償性的負電荷,因此PECVD電漿中所產生的氧離子(O-2)或氮離子(N-3)與帶補償性的負電荷的i-Al(x)GaN層16的表面是有不會形成鍵結或表面修復的動作,反而是在兩者之間形成微量的“Vacancy”空缺,而這種缺陷是屬於“Shallow Traps”(這種淺層缺陷是擁有容易補捉電子也容易釋放電子的特性)。因此當Suface Traps捕捉電子後,電子很容易被“Vacancy”搶過去,而這些電子會藉由這些“Vacancies”之間進行Electron Hopping在 i-Al(x)GaN層16的表面排除掉。此方式可以有效的解決i-Al(x)GaN層16內的“表面缺陷”(Suface Traps)所造成電流崩塌效應。
請參閱第6A、6B圖,其為本發明之加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接空乏型N-Face極性反轉具有閘極絕緣介電層(50)AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體的第一結構圖與第二結構圖。如圖所示,本發明的實施例三:以F-植入在第一閘極電極金屬60下方i-Al(x)GaN層16內形成加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接一個空乏型N-Face極性反轉具有閘極絕緣介電層50(Gate Dielectric)AlGaN/Ga高速電子遷移率電晶體而成的“混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體”之積體化製作方式。
如第6A、6B圖所示,實施例三之混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有本發明所設計之N-Face AlGaN/GaN磊晶結構,其區分為左側區域L1與右側區域R1。左側區域L1形成有一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,此氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有一氟離子結構160,其中2-DEG 150雖形成在i-Al(x)GaN層16/i-GaN channel層15接面的i-GaN channel層15內,但因為氟離子結構160之存在,使得i-GaN channel層15內之2-DEG 150位於氟離子結構160下方處將是呈現空乏狀態。右側區域R1形成有一空乏型N-Face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體,其具有一第二閘極絕緣介電層53。
請參閱第6C圖,其為本發明之加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接空乏型N-Face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體之混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體的俯視圖。如圖所示,空乏型N-Face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體具有第二閘極絕緣介電層53,其餘與第4C圖相似,不再覆述。
請參閱第7A-1圖,其為本發明之元件隔離製程的第一實施例的示意圖。此實施例之製程方式,首先,如實施例二之步驟,提供一本發明之N-face AlGaN/GaN磊晶結構,並將左側區域L1設定為製作氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,將右側區域R1設定為是製作空乏型N-Face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體。接續,如同先前所述之製作方法,於N-face AlGaN/GaN磊晶結構上形成第一源極電極金屬30、第一汲極電極金屬31、第二源極電極金屬32及第二汲極電極金屬33,,之後經由乾式蝕刻的方式在氟離子結構160預定區兩側的i-Al(x)GaN層16蝕刻出兩條閘極護城河結構(161),然後施行元件與元件間的隔離製程。再者,第7A-2圖,其為本發明之元件隔離製程的第二實施例的示意圖,其與第7A-1圖相似,不再覆述。
請參閱第7B-1圖,其為本發明之第7A-1圖的結構形成氟離子結構與閘極絕緣介電層的示意圖。隨後,進行左側區域L1(E-Mode HEMT)的第一閘極絕緣介電層50及右側區域(D-Mode HEMT)的第二閘極絕緣介電層53製作,其步驟包含有:利用PECVD沉積一層絕緣介電層,其材質可以為SiOx、SiOxNy或SiNx,厚度為10~100nm,接下來利用光阻(Photo Resist)以曝光顯影的方式定義出 E-Mode HEMT第一閘極絕緣介電層50的區域及D-Mode HEMT的第二閘極絕緣介電層53的區域,最後再使用BOE(Buffered Oxide Etchant)利用濕式蝕刻的方式將第一閘極絕緣介電層50的區域及第二閘極絕緣介電層53的區域以外的絕緣介電層蝕刻掉,只保留E-Mode HEMT第一閘極絕緣介電層50的區域及D-Mode HEMT的第二閘極絕緣介電層53的區域,之後再將光阻以去光阻液蝕刻掉。再者,第7B-2圖,其為本發明之第7A-2圖的結構形成氟離子結構與閘極絕緣介電層的示意圖,其與第7B-1圖相似,不再覆述。
請參閱第7C-1圖,其為本發明之第7B-1圖的結構形成閘極電極金屬與連接金屬的示意圖。如圖所示,利用金屬蒸鍍(一般為Ni/Au)+金屬掀離的方式形成第一閘極電極金屬60、第一源極電極連接金屬61、第一汲極電極連接金屬62、第二閘極電極金屬63、第二源極電極連接金屬64及第二汲極電極連接金屬65。此時,同樣可一併形成元件運作所需的線路金屬部分,例如與第一閘極電極金屬60連接之第一閘極電極打線區域80。但不以本發明圖式中的上視圖作為權利範疇之侷限。再者,第7C-2圖,其為本發明之第7B-2圖的結構形成閘極電極金屬與連接金屬的示意圖,其與第7C-1圖相似,不再覆述。
接著同樣接著利用PECVD沉積較大壓縮(介電常數n~1.45)或擴張應力(介電常數n~2.0)的一層絕緣保護介電層(Passivation Dielectric)70,其材質可以選自於SiOx、SiOxNy或SiNx,而且厚度至少大於200nm,以將元件主動區磊晶層內的i-Al(x)GaN層16/i-GaN channel層15/i-Al(y)GaN層14,由N-Face反轉至Ga-Face(極性反轉),再者,本發明的N-face磊晶結構1、2與絕緣保護介電層70可以克服一般的電流崩塌效應問題,其是因隨著絕緣保護介電層70越來越厚,絕緣保護介電層70對下方的壓縮或擴張應力越來越大,當大到某一種程度時, 元件主動區磊晶(i-Al(x)GaN層16/i-GaN channel層15/i-Al(y)GaN層14)由N-Face反轉至Ga-Face,此時i-GaN channel層15/i-Al(y)GaN層14接面處的i-GaN channel層15內的2-DEG 150會移動至i-Al(x)GaN層16/i-GaN channel層15接面處的i-GaN channel層15內;其伴隨的好處是1.極性反轉過程中i-Al(x)GaN層16/i-GaN channel層15接面處的表面缺陷(Surface Traps)會降低,而且可以利用先前所形成的微量“淺層缺陷(Shallow Traps)”以極小的漏電流排除位於表面缺陷(Surface Traps)內的電子,2.由於i-Al(y)GaN層14的能帶較寬因此正好可以阻檔緩衝缺陷(Buffer Traps)的電子進入i-GaN channel層15。最後再對絕緣保護介電層70進行圖案化,以將各打線區域蝕刻顯露出來,形成如第6A、6B圖所示之結構。
同樣得由於第一閘極電極金屬60與第一閘極絕緣介電層50會形成側向電容51、52,此側向電容51、52會形成場板效應(Field Plate Effect),利用此側向電容51、52的電場將第一閘極電極金屬60與第二閘極電極金屬63下方高密度的電場均勻分散開來,其用處除了增加元件(HEMT)汲極至源極的崩潰電壓(Vds),也可以抑制第一閘極電極金屬60與第二閘極電極金屬63下方的Electron trapping effect進而降低元件(HEMT)在工作時的電流崩塌效應(Current Collapse)。
請參閱第8A-1圖,其為本發明之加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接一氮化鎵N-Face極性反轉AlGaN/GaN蕭特基位障二極體(SBD)之混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體的第一結構圖。本發明之實施例四:一氮化鎵加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體(HEMT)串接一氮化鎵極N-Face性反轉AlGaN/GaN蕭特基位障二極體(SBD)而成的混合型極性反轉蕭特基位障二極體。其中N-Face極性反轉蕭特基位障二極體(SBD)的陽極(Anode)90與第一閘極 是藉由第一閘極電極金屬(Gate)60在電性上相連接的,其中第一閘極電極金屬60、陽極電極金屬901、陰極金屬93及其之間的陰極電極連接金屬66可以是同步完成。當N-Face極性反轉AlGaN/GaN蕭特基位障二極體(SBD)的陽極(Anode)90給予正電壓時,除了SBD會導通之外,陽極(Anode)90同時也給予第一閘極電極金屬(Gate)60正電壓,也因此加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體是屬於完全導通的狀態,如此一來電流便可順利的送到陰極(Cathode)91。當陰極91(陰極金屬93)給予正電壓時,加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體的電壓Vgs是個“負值”,因此加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體是呈現關閉狀態,如此一來可以保護N-Face極性反轉AlGaN/GaN SBD不會在逆向電壓崩潰。除此之外由於加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體是“電流負溫度係數的元件”而N-Face極性反轉AlGaN/GaN SBD是“電流正溫度係數的元件”,因此兩者互相串接之後有互補作用進而使得此“混合元件”在給予固定電壓工作時,其電流不容易受到溫度影響而改變。
此混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體之特色在於氮化鎵第一閘極電極金屬60下方如先前所述是無法存在2-DEG 150的,除非給予正電壓才能夠使得2-DEG 150恢復。也因此陰極91在承受逆電壓時可以有效的提升反向崩潰電壓並且抑制逆向漏電流。
如第8A-1、8A-2圖所示,實施例四之混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體主要包含有本發明所設計之N-face AlGaN/GaN磊晶結構,其區分為一左側區域L1與一右側區域R1。左側區域L1形成有一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,此 氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有一氟離子結構160,其中2-DEG雖形成在i-Al(x)GaN層16/i-GaN channel層15接面的i-GaN channel層15內,但因為氟離子結構160之存在,使得i-GaN channel層15內之2-DEG 150位於氟離子結構160下方處將是呈現空乏狀態。右側區域R1形成有一具有陽極場板(field plate)N-Face極性反轉AlGaN/GaN蕭特基位障二極體。
實施例四之製程上與前述實施例在於,於N-face AlGaN/GaN磊晶結構上施行氟離子植入製程後,於左側區域L1形成第一源極歐姆接觸電極30與第一汲極歐姆接觸電極31,同步於右側區域R1形成SBD的陰極歐姆接觸電極(陰極電極金屬)34。再於右側區域R1上形成一陽極場板絕緣介電層92,此時也在左側區域L1形成第一閘極絕緣介電層50。
接續,如同先前所述,形成第一閘極電極金屬60與各連接金屬,例如:混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體的第一閘極電極連接金屬、第一源極電極連接金屬及N-Face極性反轉AlGaN/GaN SBD的陽極電極連接金屬,以及相關的線路佈局金屬導線部分,並於磊晶層(N-face AlGaN/GaN磊晶結構)上形成一層圖案化絕緣保護介電層70,以顯露出部分絕緣介電層,形成如第9B圖所示之俯視圖。
第8B圖為本發明之加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體串接一氮化鎵N-Face極性反轉AlGaN/GaN蕭特基位障二極體(SBD)之混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體的俯視圖。如圖所示,混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體(SBD)的陽極電極與第一閘極電極金屬60是以第一閘極電極金屬60作為連接金屬並且 電性上相連接的(位於絕緣保護介電層70下)。再者,混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體(SBD)的陽極電極連接金屬具有陽極電極打線區域83,第一陰極電極連接金屬93具有源極電極打線區域82。
15:i-GaN channel層
150:2-DEG
16:i-Al(x)GaN層
160:氟離子結構
51:側向電容
52:側向電容
53:第二閘極絕緣介電層
60:第一閘極電極金屬
63:第二閘極電極金屬
70:絕緣保護介電層

Claims (10)

  1. 一種製作混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體之方法,其特徵在於包含有下列步驟:提供一N-face AlGaN/GaN磊晶結構,該N-face AlGaN/GaN磊晶結構包含:一矽基底;一具碳摻雜之緩衝層(Buffer layer(C-doped)),其係位於該矽基底上;一具碳摻雜(C-doped)之GaN層,其係位於該具碳摻雜之緩衝層上;一i-Al(y)GaN層,其係位於該具碳摻雜之GaN層上;一i-GaN channel層,其係位於該i-Al(y)GaN層上;以及一i-Al(x)GaN層,其係位於該i-GaN channel層上;利用乾式蝕刻的方式在氟離子結構預定區兩側的i-Al(x)GaN層蝕刻出兩條閘極護城河結構,之後再利用氟離子電漿,在特定電場(或特定電壓)下將氟離子(F-)注入i-Al(x)GaN層內後,經過425℃、600秒熱處理後,該氟離子結構穩定的占據於該i-Al(x)GaN層內;製作一第一閘極絕緣介電層,該第一閘極絕緣介電層位於該氟離子結構上;將該N-Face AlGaN/GaN磊晶結構區分為一左側區域與一右側區域;於該左側區域形成一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體;及於該右側區域形成一氮化鎵空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體;其中該氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體與該氮化鎵空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體是一次性完成。
  2. 如請求項1所述之製作混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體之方法,其特徵在於包含有下列步驟:利用金屬蒸鍍與金屬掀離的方式於該左側區域形成一第一源極電極金屬及一第一汲極電極金屬,及於該右側區域形成一第二源極電極金屬及一第二汲極電極金屬;經過700~900℃、30秒熱處理使得該第一源極電極金屬、該第一汲極電極金屬、該第二源極電極金屬及該第二汲極電極金屬成為歐姆接觸電極;利用多重能量破壞性離子佈植,以隔離該氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體與該氮化鎵空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體;乾蝕刻該i-Al(x)GaN層、該i-GaN channel層及該i-Al(y)GaN層,以顯露出部分該具碳摻雜(C-doped)之GaN層,以隔離該氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體與該氮化鎵空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體;及利用金屬蒸鍍與金屬掀離的方式同步形成一第一閘極電極金屬、一第一源極電極連接金屬、一第一汲極電極連接金屬、一第二源極電極連接金屬、一第二汲極電極連接金屬及一第二閘極電極金屬;其中,該第一閘極電極金屬位於該第一閘極絕緣介電層上,該第一源極電極連接金屬位於該第一源極電極金屬上,該第二閘極電極金屬位於該N-Face AlGaN/GaN磊晶結構上的該右側區域,該第二汲極電極連接金屬位於該第二汲極電極金屬上。
  3. 一種混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其特徵在於包含有:一N-Face AlGaN/GaN磊晶結構,包含有: 一矽基底;一具碳摻雜之緩衝層(Buffer layer(C-doped)),其係位於該矽基底上;一具碳摻雜(C-doped)之GaN層,其係位於該具碳摻雜之緩衝層上;一i-Al(y)GaN層,其係位於該具碳摻雜之GaN層上;一i-GaN channel層,其係位於該i-Al(y)GaN層上;以及一i-Al(x)GaN層,其係位於該i-GaN channel層上;其中,該N-Face AlGaN/GaN磊晶結構,其區分為一左側區域與一右側區域;一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其係位於該左側區域,該氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有一閘極護城河結構及一氟離子結構,該閘極護城河結構係位於氟離子結構兩側之i-Al(x)GaN層,其中2-DEG位於該氟離子結構下方是呈現空乏狀態,經過壓縮或擴張應力的一層絕緣保護介電層沉積之後而且厚度至少大於200nm,並將元件主動區磊晶層內的i-Al(x)GaN層/i-GaN channel層/i-Al(y)GaN層,由N-Face反轉至Ga-Face使得該2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處;以及一氮化鎵空乏型N-Face極性反轉不具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體,其係位於該右側區域,也因該絕緣保護介電層的應力使得主動區磊晶層內的i-Al(x)GaN層/i-GaN channel層/i-Al(y)GaN層產生極性反轉使得該2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處。
  4. 如請求項3所述之混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其特徵在於包含有:一第一閘極電極金屬,形成於該第一閘極絕緣介電層上; 一第一源極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該左側區域;一第一汲極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該左側區域;一第二閘極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該右側區域;一第二源極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該右側區域;一第二汲極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該右側區域;一閘極電極連接金屬,耦接該第一閘極電極金屬,具有一閘極打線區域;一第一源極電極連接金屬,形成於該第一源極電極金屬上,具有一源極打線區域;一第一汲極電極連接金屬,形成於該第一汲極電極金屬上;一第二源極電極連接金屬,形成於該第二源極電極金屬上;一第二汲極電極連接金屬,形成於該第二汲極電極金屬上,具有一汲極打線區域;第一閘極電極金屬、第一閘極電極連接金屬、第一源極電極連接金屬、第一汲極電極連接金屬、第二閘極電極金屬、第二閘極電極連接金屬、第二源極電極連接金屬及第二汲極電極連接金屬皆是一次性金屬鍍膜完成;及第一源極電極連接金屬與第二閘極電極金屬是電性相連接的,而第一汲極電極連接金屬與第二源極電極連接金屬是電性相連接的。
  5. 一種製作混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體之方法,其特徵在於包含有下列步驟:提供一N-face AlGaN/GaN磊晶結構,該N-face AlGaN/GaN磊晶結構包含:一矽基底;一具碳摻雜之緩衝層(Buffer layer(C-doped)),其係位於該矽基底上;一具碳摻雜(C-doped)之GaN層,其係位於該具碳摻雜之緩衝層上;一i-Al(y)GaN層,其係位於該具碳摻雜之GaN層上; 一i-GaN channel層,其係位於該i-Al(y)GaN層上;以及一i-Al(x)GaN層,其係位於該i-GaN channel層上;利用乾式蝕刻的方式在氟離子結構預定區兩側的i-Al(x)GaN層蝕刻出兩條閘極護城河結構,之後再利用氟離子電漿,在特定電場(或特定電壓)下將氟離子(F-)注入i-Al(x)GaN層內後,經過425℃、600秒熱處理後,該氟離子結構穩定的占據於該i-Al(x)GaN層內;製作該第一閘極絕緣介電層及一第二閘極絕緣介電層;將該N-Face AlGaN/GaN磊晶結構區分為一左側區域與一右側區域;於該左側區域形成一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其包含該氟離子結構,以控制該氟離子結構下方的2-DEG是空乏狀態,經過壓縮或擴張應力的一層絕緣保護介電層沉積之後而且厚度至少大於200nm,並將元件主動區磊晶層內的i-Al(x)GaN層/i-GaN channel層/i-Al(y)GaN層,由N-Face反轉至Ga-Face使得該2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處;以及於該右側區域形成一氮化鎵空乏型N-Face極性反轉具有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體,其係位於該右側區域,也因該絕緣保護介電層的應力使得主動區磊晶層內的i-Al(x)GaN層/i-GaN channel層/i-Al(y)GaN層產生極性反轉使得該2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處,並具有該第二閘極絕緣介電層。
  6. 如請求項5所述之製作混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體之方法,其特徵在於包含有下列步驟:利用金屬蒸鍍與金屬掀離的方式於該左側區域形成一第一源極電極金屬及一第一汲極電極金屬,及於該右側區域形成一第二源極電極金屬及一第二汲極電極金屬; 經過700~900℃、30秒熱處理使得該第一源極電極金屬、該第一汲極電極金屬、該第二源極電極金屬及該第二汲極電極金屬成為歐姆接觸電極;及利用金屬蒸鍍與金屬掀離的方式同步形成一第一閘極電極金屬、一第一源極電極連接金屬、一第一汲極電極連接金屬、一第二源極電極連接金屬、一第二汲極電極連接金屬及一第二閘極電極金屬;其中,該第一閘極電極金屬位於該第一閘極絕緣介電層上,該第一源極電極連接金屬位於該第一源極電極金屬上,該第二閘極電極金屬位於該第二閘極絕緣介電層上,該第二汲極電極連接金屬位於該第二汲極電極金屬上。
  7. 一種混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其特徵在於包含有:一N-Face AlGaN/GaN磊晶結構,包含有:一矽基底;一具碳摻雜之緩衝層(Buffer layer(C-doped)),其係位於該矽基底上;一具碳摻雜(C-doped)之GaN層,其係位於該具碳摻雜之緩衝層上;一i-Al(y)GaN層,其係位於該具碳摻雜之GaN層上;一i-GaN channel層,其係位於該i-Al(y)GaN層上;以及一i-Al(x)GaN層,其係位於該i-GaN channel層上;其中,該N-Face AlGaN/GaN磊晶結構,其區分為一左側區域與一右側區域;一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其係位於該左側區域,該加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有該氟離子結構,該閘極護城河結構係位於氟離子結構兩側之i-Al(x)GaN層,其中2-DEG位於該氟離子結構下方是呈現空乏狀態,經過壓縮或擴張應力的一層絕緣保護介電層沉積之後而且厚度至少大於200nm,並將元件主動區磊晶層內的i-Al(x)GaN層/i-GaN channel層/i-Al(y)GaN 層,由N-Face反轉至Ga-Face使得該2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處;以及一氮化鎵空乏型N-Face極性反轉有閘極絕緣介電層AlGaN/GaN高速電子遷移率電晶體,其係位於該右側區域並具有一第二閘極絕緣介電層。
  8. 如請求項7所述之混合型加強型N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其特徵在於包含有:一第一閘極電極金屬,形成於該第一閘極絕緣介電層上;一第一源極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該左側區域;一第一汲極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該左側區域;一第二閘極電極金屬,形成於該第二閘極絕緣介電層上;一第二源極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該右側區域;一第二汲極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該右側區域;一閘極電極連接金屬,耦接該第一閘極電極金屬,具有一閘極打線區域;一第一源極電極連接金屬,形成於該第一源極電極金屬上,具有一源極打線區域;一第一汲極電極連接金屬,形成於該第一汲極電極金屬上;一第二源極電極連接金屬,形成於該第二源極電極金屬上;一第二汲極電極連接金屬,形成於該第二汲極電極金屬上,具有一汲極打線區域;第一閘極電極金屬、第一閘極電極連接金屬、第一源極電極連接金屬、第一汲極電極連接金屬、第二閘極電極金屬、第二閘極電極連接金屬、第二源極電極連接金屬及第二汲極電極連接金屬皆是一次性金屬鍍膜完成;及第一源極電極連接金屬與第二閘極電極金屬是電性相連接的,而第一汲極電極連接金屬與第二源極電極連接金屬是電性相連接的。
  9. 一種混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體,其特徵在於包含有:一N-Face AlGaN/GaN磊晶結構,包含有:一矽基底;一具碳摻雜之緩衝層(Buffer layer(C-doped)),其係位於該矽基底上;一具碳摻雜(C-doped)之GaN層,其係位於該具碳摻雜之緩衝層上;一i-Al(y)GaN層,其係位於該具碳摻雜之GaN層上;一i-GaN channel層,其係位於該i-Al(y)GaN層上;以及一i-Al(x)GaN層,其係位於該i-GaN channel層上;其中,該N-Face AlGaN/GaN磊晶結構,其區分為一左側區域與一右側區域;一氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體,其係位於該左側區域,該氮化鎵加強型具有閘極護城河結構N-Face極性反轉AlGaN/GaN高速電子遷移率電晶體包含有該氟離子結構,該閘極護城河結構係位於氟離子結構兩側之i-Al(x)GaN層,其中2-DEG位於該氟離子結構下方是呈現空乏狀態,經過壓縮或擴張應力的一層絕緣保護介電層沉積之後而且厚度至少大於200nm,並將元件主動區磊晶層內的i-Al(x)GaN層/i-GaN channel層/i-Al(y)GaN層,由N-Face反轉至Ga-Face使得該2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處;以及一N-Face極性反轉AlGaN/GaN蕭特基位障二極體,其係位於該右側區域,該N-Face極性反轉AlGaN/GaN蕭特基位障二極體具有一陽極場板絕緣介電層,其係位於該右側區域,也因該絕緣保護介電層的應力使得主動區磊晶層內的i-Al(x)GaN層/i-GaN channel層/i-Al(y)GaN層產生極性反轉使得該2-DEG從該i-GaN channel層與該i-Al(y)GaN層的接面處上升至該i-GaN channel層與該i-Al(x)GaN層的接面處。
  10. 如請求項9所述之混合型N-Face極性反轉AlGaN/GaN蕭特基位障二極體,其特徵在於包含有:提供該N-Face AlGaN/GaN磊晶結構;一第一閘極電極金屬,形成於該第一閘極絕緣介電層上,該第一閘極絕緣介電層形成於該氟離子結構上;一第一源極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該左側區域;一第一汲極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該左側區域;一陰極電極金屬,形成於該N-Face AlGaN/GaN磊晶結構上的該右側區域;一閘極電極連接金屬,耦接該第一閘極電極金屬;一第一源極電極連接金屬,形成於該第一源極電極金屬上,具有一源極打線區域;一第一汲極電極連接金屬,形成於該第一汲極電極金屬上;一陰極電極連接金屬,形成於該陰極電極金屬上;一陽極電極連接金屬,形成於該陽極場板絕緣介電層上,具有一陽極打線區域;及第一閘極電極金屬、第一閘極電極連接金屬、第一源極電極連接金屬、第一汲極電極連接金屬、陰極電極連接金屬、陽極電極連接金屬皆是一次性金屬鍍膜完成;第一汲極電極連接金屬與陰極電極連接金屬是電性相連接的,而第一閘極電極接金屬與陽極電極連接金屬是電性相連接的。
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