TWI683411B - 半導體封裝結構及其製造方法 - Google Patents
半導體封裝結構及其製造方法 Download PDFInfo
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- TWI683411B TWI683411B TW107126040A TW107126040A TWI683411B TW I683411 B TWI683411 B TW I683411B TW 107126040 A TW107126040 A TW 107126040A TW 107126040 A TW107126040 A TW 107126040A TW I683411 B TWI683411 B TW I683411B
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Abstract
本發明實施例提供一種半導體封裝的製造方法,所述方法包含:在載體上方形成離形薄膜;在所述離形薄膜上方形成聚合物緩衝層;在所述聚合物緩衝層上形成金屬支柱;將所述金屬支柱包封於包封材料中;對所述包封材料執行平坦化以暴露所述金屬支柱;在所述包封材料及所述金屬支柱上方形成重佈線結構;以及分解所述離形薄膜之第一部分。所述離形薄膜之第二部分在所述分解之後保留。在所述聚合物緩衝層中形成開口以暴露所述金屬支柱。
Description
本發明實施例是有關於一種半導體封裝及其製造方法。
隨著半導體技術的發展,半導體晶片/晶粒正變得愈來愈小。同時,需要將更多功能整合於半導體晶粒中。因此,半導體晶粒需要在更小的面積中封裝有更多輸入/輸出(I/O)接墊,且I/O接墊的密度隨時間推移而迅速增加。如此一來,半導體晶粒之封裝變得更困難,此對封裝的良率有不利影響。
習知封裝技術可劃分成兩種類別。在第一類別中,晶圓上之晶粒在被鋸切之前就被封裝。此封裝技術具有一些有利的特徵,諸如更大的產能及較低的成本。另外,需要較少底膠或模製化合物。然而,此封裝技術亦存在缺點。由於晶粒尺寸正變得愈來愈小,且各別封裝僅可為扇入型封裝,其中每一晶粒之I/O接墊受限於直接位於各別晶粒之表面上方的區域。隨著晶粒之區域受限,I/O接墊之數目由於I/O接墊之間距受限而受到限制。若接墊之間距減小,則焊料橋可能會出現。另外,根據固定的焊球尺寸需求,焊料球必須具有特定尺寸,此舉又限制可封裝於晶粒之表面上的
焊料球之數目。
在封裝之另一類別中,晶圓上之晶粒在被封裝之前就被鋸切。此封裝技術之有利特徵為可能形成扇出型封裝件,此意謂可將晶粒上之I/O接墊重新分配至比晶粒大的區域,且因此可增大封裝於晶粒之表面上的I/O接墊之數目。此封裝技術之另一有利特徵為封裝「已知良好晶粒」且捨棄有缺陷的晶粒,且因此不會將成本及精力浪費在有缺陷的晶粒上。
根據本發明之一些實施例,一種半導體封裝的製造方法包含:在載體上方形成離形薄膜;在離形薄膜上方形成聚合物緩衝層;在聚合物緩衝層上形成金屬支柱;將金屬支柱包封於包封材料中;對包封材料執行平坦化以暴露金屬支柱;在包封材料及金屬支柱上方形成重佈線結構;以及分解離形薄膜之第一部分。離形薄膜之第二部分在分解之後保留。在聚合物緩衝層中形成開口以暴露金屬支柱。
根據本發明之一些實施例,一種半導體封裝的製造方法包含:將LTHC塗佈材料塗佈於載體上;在LTHC塗佈材料上方形成聚合物緩衝層;形成與聚合物緩衝層接觸之金屬晶種層;在金屬晶種層上方形成經圖案化光阻,其中經圖案化光阻中之開口暴露出金屬晶種層之一部分;在金屬晶種層上方鍍覆金屬支柱;移除經圖案化光阻;蝕刻金屬晶種層以暴露聚合物緩衝層;將雷射光束投射於LTHC塗佈材料上,其中雷射光束之工作範圍覆蓋LTHC塗佈材料之第一部分,且LTHC塗佈材料之第二部分在工作範圍
之外;剝離載體;以及形成穿過LTHC塗佈材料之第二部分的焊料區。
根據本發明之一些實施例,一種半導體封裝包含:包封材料、穿透包封材料之穿孔、接觸穿孔及包封材料之聚合物緩衝層、接觸聚合物緩衝層之LTHC塗佈材料以及穿過LTHC塗佈材料及聚合物緩衝層之焊料區。
20‧‧‧載體
22‧‧‧離形薄膜
22A、22B、222A、222B‧‧‧部分
23‧‧‧聚合物緩衝層
24‧‧‧金屬晶種層
24A‧‧‧鈦層
26‧‧‧光阻
28、52、72‧‧‧開口
32‧‧‧金屬支柱/穿孔
36、202‧‧‧裝置晶粒
38‧‧‧晶粒貼合膜
40‧‧‧接墊
42‧‧‧金屬柱
44‧‧‧介電層
48‧‧‧包封材料
48A、122B‧‧‧基材
48B‧‧‧填充劑顆粒
50、60、62、66‧‧‧介電層
54、58、64‧‧‧RDL
54A‧‧‧通孔
54B‧‧‧金屬跡線
68‧‧‧凸塊下金屬
70‧‧‧電連接件
74‧‧‧膠帶
76‧‧‧框架
78‧‧‧光/雷射光束
79、84‧‧‧區域
80‧‧‧焊料區
81‧‧‧層面
86‧‧‧封裝組件
88‧‧‧結合接墊
100‧‧‧封裝/複合晶圓
100'、200、302‧‧‧封裝
122A‧‧‧碳黑顆粒
204‧‧‧封裝基底
206‧‧‧金屬接墊
208‧‧‧底膠
300‧‧‧封裝
400‧‧‧製程流程
402、404、406、408、410、412、414、416、418、420、422、424、426‧‧‧步驟
Dia‧‧‧直徑
T1、T2、T3A、T3B‧‧‧厚度
△D‧‧‧深度
當結合附圖閱讀時,自以下實施方式最佳地理解本發明之態樣。應注意,根據業界中之標準慣例,各種構件未按比例繪製。事實上,可出於論述清楚起見,而任意地增加或縮減各種構件之尺寸。
圖1至圖18A說明根據一些實施例之封裝之形成的中間階段的剖視圖。
圖18B說明根據一些實施例之封裝的剖視圖。
圖19A及圖19B分別說明根據一些實施例之封裝中之離形薄膜之一部分的上視圖及剖視圖。
圖19C說明根據一些實施例之離形薄膜之一部分的放大視圖。
圖20A及圖20B示意性地說明在雷射掃描之前及雷射掃描之後的離形薄膜之一部分。
圖21說明根據一些實施例之用於形成封裝的製程流程。
以下揭露內容提供用於實施本發明之不同構件的許多不同實施例或實例。下文描述組件及配置之特定實例以簡化本發明。當然,此等組件及配置僅為實例且並不意欲為限制性的。舉例而言,在以下描述中,第一構件形成於第二構件上方或第二構件上可包含第一構件及第二構件直接接觸形成之實施例,且亦可包含其他構件可在第一構件與第二構件之間形成使得第一構件及第二構件可不直接接觸之實施例。另外,本發明可在各種實例中重複參考編號及/或字母。此重複是出於簡單性及清晰性之目的,且本身並不指示所論述之各種實施例及/或組態之間的關係。
另外,出於描述圖式中所說明之一個元件或構件對另一元件或構件之關係的簡單描述起見,空間相對術語諸如「在...之下」、「下方」、「下部」、「上覆」、「上部」以及類似者可用於本文中。除了圖式中所描繪之定向外,空間相對術語意欲涵蓋裝置在使用或操作中之不同定向。設備可以其他方式定向(旋轉90度或處於其他定向)且本文中所使用之空間相對描述詞可同樣相應地進行解釋。
根據各種例示性實施例提供積體扇出型(INTEGRATED FAN-OUT;INFO)封裝件及形成封裝件之方法。根據一些實施例說明形成INFO封裝件之中間階段。論述一些實施例之一些變型。在各個視圖及說明性實施例中,相似的參考標號用以表示相似元件。
圖1至圖18A說明根據一些實施例之封裝之形成的中間階段的剖視圖。亦在圖21中所展示之製程流程400中示意性地說明圖1至圖18A中所展示之步驟。
參考圖1,提供載體20,且將離形薄膜22塗佈於載體20上。各別步驟為圖21所展示之製程流程中的步驟402。載體20由透明材料形成,且可為玻璃載體、陶瓷載體、有機載體或類似者。載體20可具有圓形上視圖形狀,且可具有矽晶圓之大小。舉例而言,載體20可具有8吋直徑、12吋直徑等。離形薄膜22與載體20之頂部表面實體接觸。離形薄膜22可由光熱轉化(LIGHT TO HEAT CONVERSION;LTHC)塗佈材料形成。可經由塗佈將離形薄膜22塗覆於載體20上。根據本發明之一些實施例,LTHC塗佈材料在光/輻射(諸如雷射)之熱能下能夠分解,且因此可將載體20自其上形成之結構脫離(RELEASE)。根據本發明之一些實施例,LTHC塗佈材料(離形薄膜)22包含碳黑(具有黑色顏色之碳顆粒)、溶劑、矽填充物及/或環氧樹脂。環氧樹脂可包含丙烯酸或另一聚合物諸如聚醯亞胺。若聚醯亞胺包含於LTHC塗佈材料中,則其不同於用於微影之典型的聚醯亞胺,此是因為其不再是感光的且不可經由曝光及顯影來移除。根據本發明之一些例示性實施例,LTHC塗佈材料(離形薄膜)22之厚度T1可大於約1微米,且可在約1微米至約2.5微米之間的範圍內。在後續段落中詳細論述厚度T1。應理解,全文描述的值是實例,且可變為不同的值。LTHC塗佈材料(離形薄膜)22可以可流動形式塗佈,且接著在例如紫外線(ULTRA-VIOLET;UV)光下進行固化。LTHC塗佈材料(離形薄膜)22為同質材料,且整個LTHC塗佈材料(離形薄膜)22之頂部部分及底部部分具有相同的組成物。
根據一些實施例,亦如圖1中所展示,於LTHC塗佈材料(離形薄膜)22上形成聚合物緩衝層23。各別步驟亦為圖21所
展示之製程流程的步驟402。根據一些實施例,聚合物緩衝層23由聚苯并噁唑(POLYBENZOXAZOLE;PBO)、聚醯亞胺、苯并環丁烯(BENZOCYCLOBUTENE;BCB)或另一可塗覆聚合物形成。
圖2至圖4說明金屬支柱32之形成。各別步驟為圖21所展示之製程流程中的步驟404。全文所描述的金屬支柱32替代地稱為穿孔32,此是因為金屬支柱32穿過後續分配的包封材料。
參考圖2,經由例如是物理氣相沈積(PHYSICAL VAPOR DEPOSITION;PVD)法形成金屬晶種層24。金屬晶種層24可與聚合物緩衝層23實體接觸。根據本發明之一些實施例,金屬晶種層24包含鈦層及鈦層上方之銅層。根據本發明之替代性實施例,金屬晶種層24包含接觸LTHC塗層22之銅層。
亦如圖2中所展示,光阻26形成於金屬晶種層24上方。接著使用光微影罩幕(未示出)對光阻26執行曝光。在顯影之後,於光阻26中形成開口28。開口28暴露出金屬晶種層24之一些部分。
接下來,如圖3中所展示,藉由將金屬材料鍍覆於開口28中形成金屬支柱32。金屬支柱32替代地稱為穿孔或模塑通孔(THROUGH-MOLDING VIA),此是因為其將穿過最終封裝中之後續形成的包封材料(其可為模製化合物)。經鍍覆金屬材料可以是銅或銅合金。金屬支柱32之頂部表面低於光阻26之頂部表面,以使得金屬支柱32之形狀受開口28限制。金屬支柱32可具有實質上豎直且筆直的邊緣。替代地,金屬支柱32在剖視圖中可具有砂漏形狀,其中金屬支柱32之中間部分比各頂部部分及底部部分窄。
在後續步驟中,移除光阻26,且因此暴露金屬晶種層24之底層部分。接著用蝕刻步驟(例如以等向性蝕刻步驟或非等向性蝕刻步驟)移除金屬晶種層24之經暴露部分。剩餘晶種層24之邊緣因此與各別上覆部分之金屬支柱32共面(CO-TERMINUS)。在圖4中說明所得金屬支柱32。綜觀全文,金屬晶種層24之剩餘部分被視為金屬支柱32之部分,且可不單獨說明。金屬支柱32之頂部視圖形狀包含但不限於圓形形狀、矩形形狀、六邊形形狀、八邊形形狀以及類似形狀。形成金屬支柱32之後,暴露出聚合物緩衝層23。
圖5說明裝置晶粒36之置放/附接。各別步驟為圖21所展示之製程流程中的步驟406。裝置晶粒36經由晶粒貼合膜(DIE-ATTACH FILM;DAF)38附接至聚合物緩衝層23,所述晶粒貼合膜為在裝置晶粒36置放於聚合物緩衝層23上之前預附接於裝置晶粒36上的黏著膜。因此,DAF 38及裝置晶粒36在附接至聚合物緩衝層23之前是呈組合形式之積體件(INTEGRATED PIECE)。裝置晶粒36可包含具有與DAF 38實體接觸之背表面(朝下的表面)的半導體基底。裝置晶粒36可包含在半導體基底之前表面(朝上的表面)處的積體電路裝置(諸如主動裝置,其包含例如電晶體,未示出)。根據本發明之一些實施例,裝置晶粒36為邏輯晶粒,其可為中央處理單元(CENTRAL PROCESSING UNIT;CPU)晶粒、圖形處理單元(GRAPHIC PROCESSING UNIT;GPU)晶粒、行動應用程式晶粒、微型控制單元(MICRO CONTROL UNIT;MCU)晶粒、輸入輸出(INPUT-OUTPUT;IO)晶粒、基頻(BASEBAND;BB)晶粒或應用程式處理器(APPLICATION
PROCESSOR;AP)晶粒。由於載體20為晶圓級,將多個相同的裝置晶粒36(儘管只繪示了一個裝置晶粒36)置放於聚合物緩衝層23上方,且可經分配為包含多個列及多個行之陣列。
根據一些例示性實施例,金屬柱42(諸如銅柱)預成型為裝置晶粒36之部分,且金屬柱42經由接墊40電耦接至裝置晶粒36中之積體電路裝置,諸如電晶體(未示出)。根據本發明之一些實施例,諸如聚合物之介電材料填充相鄰金屬柱42之間的間隙以形成頂部介電層44。頂部介電層44亦可包含覆蓋及保護金屬柱42之部分。根據本發明之一些實施例,聚合物層(介電層)44可由PBO或聚醯亞胺形成。
接著,將裝置晶粒36及金屬支柱32包封於包封材料48中,如圖6中所展示。各別步驟為圖21所展示之製程流程的步驟408。包封材料48填充相鄰穿孔32之間的間隙及穿孔32與裝置晶粒36之間的間隙。包封材料48可包含模製化合物、模製底膠、環氧樹脂及/或樹脂。包封材料48之頂部表面高於金屬柱42之頂端。當包封材料48由模製化合物形成時,包封材料48可包含基材及所述基材中之填充劑顆粒(未示出,參考圖19C),所述基材可為聚合物、樹脂、環氧樹脂或類似者。填充劑顆粒可為SIO2、AL2O3、二氧化矽或類似者之介電顆粒,且可具有球形形狀。此外,球形填充劑顆粒可具有多個不同的直徑。模製化合物中之填充劑顆粒及基材兩者均可與聚合物緩衝層23實體接觸,如圖19C中亦示意性展示。
在後續步驟中,如圖7中所展示,對薄包封材料48及介電層44執行平坦化步驟,諸如化學機械研磨(CHEMICAL
MECHANICAL POLISH;CMP)步驟或機械研磨(MECHANICAL GRINDING)步驟,直至暴露所有穿孔32及金屬柱42為止。各別步驟為圖21所展示之製程流程的步驟408。歸因於平坦化製程,穿孔32之頂端實質上與金屬柱42之頂部表面齊平(共平面),且實質上與包封材料48之頂部表面共平面。
圖8至圖12說明前側重佈線結構之形成。圖8及圖9說明重佈線(REDISTRIBUTION LINE;RDL)之第一層及各別介電層之形成。參考圖8,形成介電層50。各別步驟為圖21所展示之製程流程的步驟410。根據本發明之一些實施例,介電層50山諸如PBO、聚醯亞胺或類似者之聚合物形成。形成方法包含以可流動形式塗佈介電層50,且接著固化介電層50。根據本發明之替代性實施例,介電層50由諸如氮化矽、氧化矽或類似者之無機介電材料形成。形成方法可包含化學氣相沈積(CVD)、原子層沈積(ATOMIC LAYER DEPOSITION;ALD)、電漿增強型化學氣相沈積(PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION;PECVD)或其他可應用的沈積法。接著,經由例如是光微影製程形成開口52。根據介電層50由諸如PBO或聚醯亞胺之光敏性材料形成之一些實施例,開口52之形成涉及使用微影罩幕(未示出)曝光及顯影步驟。開口52暴露出穿孔32及金屬柱42。
接著,參考圖9,於介電層50上方形成RDL 54。各別步驟為圖21所展示之製程流程的步驟412。RDL 54包含形成於介電層50中以連接至金屬柱42及穿孔32之通孔54A以及介電層50上方之金屬跡線(金屬線)54B。根據本發明之一些實施例,藉由鍍覆製程形成RDL 54(包含通孔54A及金屬跡線54B),所述
鍍覆製程包含:沈積金屬晶種層(未示出);在金屬晶種層上方形成光阻且圖案化光阻(未示出);以及在金屬晶種層上方鍍覆諸如銅及/或鋁之金屬材料。金屬晶種層及經鍍覆金屬材料可由相同材料或不同材料形成。接著移除經圖案化光阻,隨後蝕刻金屬晶種層之由經圖案化光阻預先覆蓋之部分。儘管未示出,但RDL 54的自開口52形成之部分的頂部表面可較RDL 54的直接上覆於介電層50上之部分凹陷得更低。
參考圖10,根據本發明之一些實施例,於圖9中所展示之結構的上方形成介電層60,隨後在介電層60中形成開口。開口暴露出RDL 54之一些部分。可使用選自用於形成介電層50之相同的候選材料中之材料形成介電層60,所述材料可包含PBO、聚醯亞胺、BCB或其他有機材料或無機材料。接著形成RDL 58。各別步驟為圖21所展示之製程流程的步驟414。RDL 58亦包含延伸至介電層60中之開口中以接觸RDL 54之通孔部分及介電層60正上方之金屬線部分。RDL 58之形成可與RDL 54之形成相同,其包含:形成晶種層;形成經圖案化罩幕;鍍覆RDL 58;以及接著移除經圖案化罩幕及晶種層之非所要部分。
圖11說明在介電層60及RDL 58上方形成介電層62及RDL 64。各別步驟為圖21所展示之製程流程的步驟416。介電層62可由選自用於形成介電層50及介電層60之候選材料之相同群組中的材料形成。RDL 64亦可由包含鋁、銅、鎢或其合金之金屬或金屬合金形成。應理解,儘管在所說明之例示性實施例中,形成了三層RDL(RDL 54、RDL 58以及RDL 64),但封裝可具有任意數目之RDL層,諸如一層、兩層或大於三層。
圖12說明根據一些例示性實施例之介電層66、凸塊下金屬(UNDER-BUMP METALLURGIES;UBM)68以及電連接件70。介電層66可由選自用於形成介電層50、介電層60、介電層62以及介電層66之候選材料之相同群組中的材料形成。舉例而言,介電層66可使用PBO、聚醯亞胺或BCB形成。在介電層66中形成開口以暴露底層金屬接墊,其為說明性例示性實施例中之RDL 64的部分。根據本發明之一些實施例,UBM 68形成為延伸至介電層66中之開口中以接觸RDL 64中之金屬接墊。UBM 68可由鎳、銅、鈦或其多層形成。根據一些例示性實施例,UBM 68包含鈦層及鈦層上方之銅層。
接著形成電連接件70。各別步驟為圖21所展示之製程流程的步驟418。電連接件70之形成可包含將焊料球置放於UBM 68之經暴露部分上且接著回焊焊料球,且因此電連接件70是焊料區。根據本發明之替代性實施例,電連接件70之形成包含執行鍍覆步驟以在UBM 68上方形成焊料層,且接著回焊焊料層。電連接件70亦可包含非焊料金屬柱,或非焊料金屬柱上方之金屬柱及焊蓋,其亦可經由鍍覆形成。綜觀全文,包含離形薄膜22及上覆結構的組合之結構被稱為封裝100,其為包含多個裝置晶粒36之複合晶圓(且在下文中亦稱為複合晶圓100)。
接著,參考圖13,複合晶圓100置放於膠帶74上,所述膠帶74附接至框架76。根據本發明之一些實施例,電連接件70與膠帶74接觸。接著,光78(或其他類型之攜載熱能的輻射源)投射於LTHC塗佈材料(離形薄膜)22上,且光78穿過透明的載體20。根據本發明之一些例示性實施例,光78是雷射光束,其可
在LTHC塗佈材料(離形薄膜)22上來回掃描,其中每一次掃描是對LTHC塗佈材料(離形薄膜)22之未經掃描部分執行。在後續論述中,出於簡單起見,輻射(光)78被稱為雷射光束78,即使其可以是其他類型之輻射。
圖20A展示執行雷射掃描之前的區域79(圖13中所展示)。在LTHC塗佈材料(離形薄膜)22中,碳黑顆粒122A散布於基材122B中,根據一些實施例的基材122B可為丙烯酸。碳黑顆粒122A不會形成連續的導電路徑,此是因為碳黑顆粒122A藉由基材122B而彼此分離。
圖20B說明在執行雷射掃描期間及雷射掃描之後的區域79(圖13)之放大視圖。LTHC塗佈材料(離形薄膜)22包含在雷射光束78之工作範圍內之部分22A。LTHC塗佈材料(離形薄膜)22之部分22B在雷射光束78之工作範圍外。雷射光束78之工作範圍是雷射光束78之能量足以分解LTHC塗佈材料(離形薄膜)22之範圍。在工作範圍之外,即使雷射光束78可能超出工作範圍,雷射光束78早已在工作範圍內被吸收或阻斷,或雷射光束78之能量並不足以分解LTHC塗佈材料(離形薄膜)22。因此,在雷射光束掃描期間,LTHC塗佈材料(離形薄膜)22之部分22A(部分22A中之基材122B)吸收由曝光引入之熱能而分解,且部分22B並未分解。
根據本發明之一些實施例,將雷射光束78聚焦至如圖20B中所展示之層面81。層面81在載體20與LTHC塗佈材料(離形薄膜)22之間的介面下方。雷射光束78之工作範圍包含高於聚焦層面81的深度△D之範圍及低於聚焦層面81的深度△D之範圍
兩者。根據一些實施例,深度△D可為約0.5微米。應理解,工作範圍受各種因素影響,包含且不限於雷射光束之能階、掃描速度、LTHC塗佈材料(離形薄膜)22對能量之吸收率等。根據本發明之一些實施例,調整聚焦層面81以允許工作範圍之頂部達到LTHC塗佈材料(離形薄膜)22與載體20之間的介面,且工作範圍之底部高於LTHC塗佈材料(離形薄膜)22之底部表面。
在雷射掃描期間,電荷(諸如由e符號指示之電子)經誘導,且經捕獲在碳黑顆粒122A中。另外,雷射掃描引起碳黑顆粒122A膨脹,且因此分離的碳黑顆粒122A經互連從而形成連續的導電路徑。
由於曝光(諸如雷射掃描),載體20可自塗佈材料22剝離,且因此複合晶圓100自載體20剝離(卸下)。各別步驟為圖21所展示之製程流程的步驟420。所得複合晶圓100展示於圖14中。在曝光期間,LTHC塗佈材料(離形薄膜)22之部分22A(圖20B)被分解。LTHC塗佈材料(離形薄膜)22之部分22B未被分解,且因此在剝離載體20之後保留。根據本發明之一些實施例,在分解之前,LTHC塗佈材料(離形薄膜)22之總厚度T1(圖13)在約1.5微米至約2.5微米之間的範圍內。根據一些例示性實施例,LTHC塗佈材料(離形薄膜)22之剩餘部分22B之厚度T2(圖14)可在約0.5微米至約1.5微米之間的範圍內。另外,經分解部分之厚度T2與LTHC塗佈材料(離形薄膜)22之總厚度T1的比率可在約0.4至約0.7之間的範圍內。另外,經分解部分之厚度T2可比碳黑顆粒122A之直徑Dia(圖20A及圖20B)大5倍,以確保部分22B具有足以充當有效介電障壁之厚度。
在載體20之剝離期間,歸因於對載體20的摩擦,可產生大量靜電荷。靜電荷可與雷射掃描中所產生之電荷混合,且經由由膨脹的碳黑顆粒122A形成之導電路徑傳導。若LTHC塗佈材料(離形薄膜)22之部分22B並不存在,則部分22A(因此,連續的導電路徑)將延伸至聚合物緩衝層23。大量電荷可穿過聚合物緩衝層23,且經傳導至穿孔32。經由穿孔32及RDL 54、RDL 58等,電荷可經傳導至裝置晶粒36中,且損壞裝置及裝置晶粒36中之細金屬線。此現象稱作電性過應力(electrical overstress;EOS)。
根據本發明之一些實施例,部分歸因於其中碳黑顆粒122A未形成連續的路徑,部分22B充當介電障壁。介電障壁防止電荷到達穿孔32。因此,EOS損壞之可能性減小。自樣本晶圓獲得之實驗結果顯示藉由採用本發明之實施例,可消除主要的EOS損壞,且EOS損壞可減少百分之98。
根據本發明之一些實施例,LTHC塗佈材料(離形薄膜)22之剩餘未分解部分22B(圖14)可為不具有用於暴露底層聚合物緩衝層23之任何開口的毯覆層(blanket layer)。
根據本發明之一些實施例,剝離載體20之後,移除剩餘的LTHC塗佈材料(離形薄膜)22,因此暴露底層聚合物緩衝層23。各別步驟為圖21所展示之製程流程的步驟422。可經由電漿清洗步驟(例如使用氮(N2)、氧(O2)、CF4以及類似者之電漿)來移除LTHC塗佈材料(離形薄膜)22。所得複合晶圓100展示於圖14中。
根據本發明之替代性實施例,未移除剩餘的LTHC塗佈材料(離形薄膜)22。因此圖21中之步驟422說明為虛線的,以
指示可執行或可不執行此步驟。LTHC塗佈材料(離形薄膜)22之頂部表面可具有滿足封裝之製造製程之規範的共面性(CO-PLANARITY)。因此,將不會對LTHC塗佈材料(離形薄膜)22之頂部表面執行平坦化。然而,若在剝離載體20之後,LTHC塗佈材料(離形薄膜)22的粗糙度大於產品規格所指定的可接受之最大粗糙度,且所述高粗糙度可造成良率損失,則可執行諸如化學機械研磨(CMP)或機械磨光之平坦化以使LTHC塗佈材料(離形薄膜)22之頂部表面齊平。平坦化移除LTHC塗佈材料(離形薄膜)22之頂部表面部分,同時留下未移除的毯覆式底部。參考圖15,在LTHC塗佈材料(離形薄膜)22及聚合物緩衝層23中形成開口72,且因此暴露穿孔32。各別步驟為圖21所展示之製程流程的步驟424。根據本發明之一些實施例,開口72經由雷射鑽孔形成,在此期間穿孔32正上方之LTHC塗佈材料(離形薄膜)22之一些部分由雷射燃燒且分解。根據本發明之替代性實施例,開口72經由微影製程中之蝕刻形成。
根據本發明之一些實施例,在雷射鑽孔之後暴露出鈦層24A。鈦層24A是如圖3中所展示之金屬晶種層24之剩餘部分。在後續步驟中,執行蝕刻步驟以移除鈦層。由於鈦具有比銅高的電阻率,因此藉由移除鈦層,穿孔32之具有比鈦層低的電阻率之銅部分暴露出來。因此,可利用較低電阻形成至穿孔32的電連接。根據本發明之一些實施例,鈦層之蝕刻是經由使用氟化氫(hydrogen fluoride;HF)溶液、磷酸或HF與磷酸之混合物的濕式蝕刻來執行。亦可使用乾式蝕刻來執行蝕刻。
在鈦層24A之蝕刻中,未蝕刻LTHC塗佈材料(離形薄
膜)22。因此,選擇LTHC塗佈材料(離形薄膜)22之材料及鈦層24A之蝕刻劑,使得蝕刻劑在能夠蝕刻鈦層24A的同時不會侵蝕LTHC塗佈材料(離形薄膜)22。
複合晶圓100包含多個彼此相同的封裝100'(參考圖17),其中封裝100'中之每一者包含多個穿孔32及一個裝置晶粒36。LTHC塗佈材料(離形薄膜)22橫跨整個晶圓級封裝100。圖16說明多個封裝200(具有所說明之一個封裝200)接合至複合晶圓100上,因此形成多個相同的疊層封裝(Package-on-Package;PoP)結構/封裝300(圖17)。所述接合經由焊料區80執行,其將穿孔32連接至上覆封裝200中之金屬接墊206。根據本發明之一些實施例,封裝200包含封裝基底204及裝置晶粒202,所述裝置晶粒可為諸如靜態隨機存取記憶體(Static Random Access Memory;SRAM)晶粒、動態隨機存取記憶體(Dynamic Random Access Memory;DRAM)晶粒或類似者之記憶體晶粒。底膠208亦設置於封裝200與底層複合晶圓100之間的間隙中,且經固化。底膠208可與LTHC塗佈材料(離形薄膜)22接觸。
根據本發明之替代性實施例,相較於經由開口72(圖15)直接將封裝200接合至複合晶圓100,形成背側RDL(未示出)且將封裝200接合於背側重佈線結構中之背側RDL上方。背側RDL因此將包含延伸至LTHC塗佈材料(離形薄膜)22中之通孔(未示出)及LTHC塗佈材料(離形薄膜)22上方之金屬線(未示出)。因為若形成背側RDL,則此等RDL將在裝置晶粒36之背側上,由此命名背側RDL。為形成背側RDL,載體(而非膠帶)可置放於複合晶圓100下方作為背側RDL之形成中的支架。因此,在形
成背側RDL期間,電連接件70經由黏著膜(未示出)黏附至載體。
接著,參考圖17,執行單體化(晶粒鋸切)製程以將複合晶圓100分隔成單獨的彼此相同的封裝300。單體化可在將複合晶圓100定位於膠帶74上時執行。可使用刀具來執行單體化,或可由以下來執行:使用雷射光束進行預開槽,以便形成凹槽,且接著使用刀具切割所述凹槽。
圖18A說明經單體化封裝300經由焊料區(電連接件)70接合至封裝組件86,因此形成封裝302。各別步驟為圖21所展示之製程流程的步驟426。根據本發明之一些實施例,封裝組件86為封裝基底,其可為無核心基底或具有核心之基底。根據本發明之其他實施例,封裝組件86是印刷電路板或封裝。可將焊料區(電連接件)70接合至封裝組件86中之結合接墊88。
圖18B說明根據本發明之替代性實施例而形成之封裝302。此等實施例類似於圖18A中所展示之實施例,不同之處在於,在剝離載體20之後移除剩餘的LTHC塗佈材料(離形薄膜)22(圖14)。因此,如圖18B中所展示,底膠208與聚合物緩衝層23接觸。
圖19A說明例示性封裝300中之一些部分的上視圖,其中出於簡單起見說明穿孔32、LTHC塗佈材料(離形薄膜)22以及裝置晶粒36,而不展示其他構件。根據本發明之一些實施例,經由雷射來執行LTHC塗佈材料(離形薄膜)22之分解,所述雷射呈雷射光束之形式。雷射光束比封裝300窄,且其採用多個雷射光束掃描路徑來覆蓋整個封裝300(且覆蓋如圖13中所展示之
複合晶圓100)。多個雷射光束掃描之路徑可彼此稍微重疊以確保完全覆蓋LTHC塗佈材料(離形薄膜)22而不會留下不合需要地未經掃描的一些部分。相比於非重疊部分,重疊部分接收雙倍的掃描。根據本發明之一些實施例,雙重掃描區中之經分解LTHC塗佈材料(離形薄膜)22之厚度大於單重掃描區中之經分解LTHC塗佈材料(離形薄膜)22之厚度。此致使LTHC塗佈材料(離形薄膜)22之頂部表面具有比其他部分更凹陷之一些部分。舉例而言,圖19A示意性地說明部分222A及比部分222A更凹陷的部分222B。部分222B及部分222A具有交替佈置,其中部分222A為單重掃描部分,且部分222B為雙重掃描部分。另外,部分222A及部分222B在上視圖中可為實質上筆直的。
圖19B說明根據本發明之一些例示性實施例的LTHC塗佈材料(離形薄膜)22之剖視圖。亦說明部分222A及部分222B。亦說明部分222A之厚度T3A及部分222B之厚度T3B。厚度T3A大於厚度T3B。根據本發明之一些實施例,差值(T3A-T3B)大於約0.1微米,且可在約0.1微米至約0.5微米之間的範圍內。因此,在封裝300中,LTHC塗佈材料(離形薄膜)22具有厚度交替的部分。部分222A可具有實質上均一的寬度,且部分222B可具有實質上均一的寬度,且部分222A之寬度可大於部分222B之寬度。
部分222B(且亦可能是部分222A)在剖視圖中可具有凹陷形狀,其中部分222B(或部分222A)之中間部分比部分222B/部分222A之邊緣部分更凹陷。另外,凹陷形狀可以是曲形的。
圖19C說明圖17中之區域84之放大視圖。如圖19C中所展示,包封材料48包含基材48A及基材48A中之填充劑顆粒
48B。由於包封材料48包封於聚合物緩衝層23(如圖6中所展示)上,且不對包封材料48之接觸聚合物緩衝層23之部分執行平坦化,因此與聚合物緩衝層23接觸之球形顆粒(填充劑顆粒)48B是圓形的,其中圓形表面與聚合物緩衝層23接觸。另外,此介面處之球形顆粒(填充劑顆粒)48B未經研磨以具有與所說明基材48之頂部表面共平面之平坦表面。作為比較,包封材料48之與介電層50接觸之部分已在圖7中所展示之步驟中經平坦化。因此,與介電層50接觸之球形顆粒(填充劑顆粒)48B在平坦化期間經部分切割,且因此將具有與介電層50接觸之實質上平坦的底部表面(而不是圓形的底部表面)。
在上述所說明之例示性實施例中,根據本發明之一些實施例論述一些例示性方法及構件。亦可包含其他構件及方法。舉例而言,可包含測試結構以幫助對3D封裝或3DIC裝置之校驗測試。測試結構可包含例如形成於重佈層中或基底上之測試接墊,從而允許測試3D封裝或3DIC、使用探測器及/或探測卡以及類似者。可對中間結構以及最終結構執行校驗測試。另外,本文中所揭露之結構及方法可結合併有對已知良好晶粒之中間校驗的測試方法使用,以增加良率且降低成本。
本發明之實施例具有一些有利特徵。藉由使LTHC塗佈材料具有大於用於分解LTHC塗佈材料之雷射之工作範圍的厚度,將LTHC塗佈材料之未分解的剩餘部分用作介電障壁層以防止電荷釋放至InFO封裝件中之裝置晶粒中,且避免EOS損壞。
根據本發明之一些實施例,一種半導體封裝的製造方法包含:在載體上方形成離形薄膜;在離形薄膜上方形成聚合物緩衝
層;在聚合物緩衝層上形成金屬支柱;將金屬支柱包封於包封材料中;對包封材料執行平坦化以暴露金屬支柱;在包封材料及金屬支柱上方形成重佈線結構;以及分解離形薄膜之第一部分。離形薄膜之第二部分在分解之後保留。在聚合物緩衝層中形成開口以暴露金屬支柱。在一實施例中,所述方法包含將封裝組件接合至金屬支柱;於封裝組件與離形薄膜之第二部分之間分配底膠。在一實施例中,分解離形薄膜之第一部分是藉由將雷射光束投射於離形薄膜上來執行。在一實施例中,離形薄膜包括聚合物基材及碳黑顆粒。在一實施例中,所述方法包含在於聚合物緩衝層中形成開口之前移除離形薄膜之第二部分。在一實施例中,開口延伸至聚合物緩衝層及離形薄膜之第二部分兩者中。在一實施例中,離形薄膜之第一部分在分解之前具有第一厚度,且離形薄膜在分解之前具有第二厚度,且第一厚度與第二厚度之比率在約0.4與0.7之間的範圍內。
根據本發明之一些實施例,一種半導體封裝的製造方法包含:將LTHC塗佈材料塗佈於載體上;在LTHC塗佈材料上方形成聚合物緩衝層;形成與聚合物緩衝層接觸之金屬晶種層;在金屬晶種層上方形成經圖案化光阻,其中經圖案化光阻中之開口暴露出金屬晶種層之一部分;在金屬晶種層上方鍍覆金屬支柱;移除經圖案化光阻;蝕刻金屬晶種層以暴露聚合物緩衝層;將雷射光束投射於LTHC塗佈材料上,其中雷射光束之工作範圍覆蓋LTHC塗佈材料之第一部分,且LTHC塗佈材料之第二部分在工作範圍之外;剝離載體;以及形成穿過LTHC塗佈材料之第二部分的焊料區。在一實施例中,剝離載體之後,LTHC塗佈材料之第二部分被
保留作為毯覆層,且所述毯覆層不含暴露聚合物緩衝層之任何開口。在一實施例中,所述方法包含在LTHC塗佈材料之第二部分及聚合物緩衝層中形成開口,其中焊料區延伸至所述開口中。在一實施例中,所述方法包含移除LTHC塗佈材料之第二部分。在一實施例中,投射雷射光束包括在整個LTHC塗佈材料上掃描雷射光束。在一實施例中,所述方法包含在剝離載體之後對LTHC塗層之第二部分執行平坦化。在一實施例中,所述方法包含在剝離載體之後及在形成焊料區之前,蝕刻金屬晶種層之剩餘部分的一部分。
根據本發明之一些實施例,一種半導體封裝包含:包封材料、穿透包封材料之穿孔、接觸穿孔及包封材料之聚合物緩衝層、接觸聚合物緩衝層之LTHC塗佈材料以及穿過LTHC塗佈材料及聚合物緩衝層之焊料區。在一實施例中,LTHC塗佈材料經配置以在雷射光束之熱量下分解。在一實施例中,LTHC塗佈材料包括基材及基材中之碳黑顆粒。在一實施例中,所述封裝更包含:裝置晶粒;及將裝置晶粒附接至聚合物緩衝層之晶粒貼合膜,其中包封材料包封裝置晶粒及晶粒貼合膜。在一實施例中,LTHC塗佈材料包括以交替佈置分配之多個第一部分及多個第二部分,且多個第一部分比多個第二部分薄。在一實施例中,LTHC塗佈材料之多個第一部分及多個第二部分是平行條帶。
前文概述若干實施例之特徵,從而使得本領域的技術人員可較好地理解本發明之態樣。本領域的技術人員應理解,其可易於使用本發明作為設計或修改用於實現本文中所引入之實施例的相同目的及/或達成相同優點的其他方法及結構之基礎。本領域的
技術人員應認識到,此類等效構造並不脫離本發明之精神及範疇,且本領域的技術人員可在不脫離本發明之精神及範疇之情況下在本文中作出各種改變、替代及更改。
22‧‧‧離形薄膜
22B‧‧‧部分
23‧‧‧聚合物緩衝層
32‧‧‧金屬支柱/穿孔
36‧‧‧裝置晶粒
38‧‧‧晶粒貼合膜
40‧‧‧接墊
42‧‧‧金屬柱
44‧‧‧介電層
48‧‧‧包封材料
50、60、62、66‧‧‧介電層
54、58、64‧‧‧RDL
54A‧‧‧通孔
54B‧‧‧金屬跡線
68‧‧‧凸塊下金屬
70‧‧‧電連接件
74‧‧‧膠帶
76‧‧‧框架
100‧‧‧封裝/複合晶圓
T2‧‧‧厚度
Claims (16)
- 一種半導體封裝的製造方法,包括:在載體上方形成離形薄膜;在所述離形薄膜上方形成聚合物緩衝層;在所述聚合物緩衝層上形成金屬支柱;將所述金屬支柱包封於包封材料中;對所述包封材料執行平坦化以暴露所述金屬支柱;在所述包封材料及所述金屬支柱上方形成重佈線結構;分解所述離形薄膜之第一部分,其中所述離形薄膜之第二部分在所述分解之後保留;以及在所述聚合物緩衝層中形成開口以暴露所述金屬支柱。
- 如申請專利範圍第1項所述之半導體封裝的製造方法,更包括:將封裝組件接合至所述金屬支柱;及於所述封裝組件與所述離形薄膜之所述第二部分之間分配底膠。
- 如申請專利範圍第1項所述之半導體封裝的製造方法,其中分解所述離形薄膜之所述第一部分是藉由將雷射光束投射於所述離形薄膜上來執行。
- 如申請專利範圍第1項所述之半導體封裝的製造方法,其中所述離形薄膜包括聚合物基材及碳黑顆粒。
- 如申請專利範圍第1項所述之半導體封裝的製造方法,更包括在於所述聚合物緩衝層中形成所述開口之前移除所述離形薄膜之所述第二部分。
- 如申請專利範圍第1項所述之半導體封裝的製造方法,其中所述開口延伸至所述聚合物緩衝層及所述離形薄膜之所述第二部分兩者中。
- 如申請專利範圍第1項所述之半導體封裝的製造方法,其中所述離形薄膜之所述第一部分在所述分解之前具有第一厚度,且所述離形薄膜在所述分解之前具有第二厚度,且所述第一厚度與所述第二厚度之比率在約0.4至0.7之間的範圍內。
- 一種半導體封裝的製造方法,包括:將光熱轉化塗佈材料塗佈於載體上;在所述光熱轉化塗佈材料上方形成聚合物緩衝層;形成與所述聚合物緩衝層接觸之金屬晶種層;在所述金屬晶種層上方形成經圖案化光阻,其中所述經圖案化光阻中之開口暴露出所述金屬晶種層之一部分;在所述金屬晶種層上方鍍覆金屬支柱;移除所述經圖案化光阻;蝕刻所述金屬晶種層以暴露所述聚合物緩衝層;將雷射光束投射於所述光熱轉化塗佈材料上,其中所述雷射光束之工作範圍覆蓋所述光熱轉化塗佈材料之第一部分,且所述光熱轉化塗佈材料之第二部分在所述工作範圍之外;剝離所述載體;以及形成穿過所述光熱轉化塗佈材料之所述第二部分之焊料區。
- 如申請專利範圍第8項所述之半導體封裝的製造方法,其中在剝離所述載體之後,所述光熱轉化塗佈材料之所述第二部分被保留作為毯覆層,且所述毯覆層不含暴露所述聚合物緩衝層 之任何開口。
- 如申請專利範圍第9項所述之半導體封裝的製造方法,更包括:在所述光熱轉化塗佈材料之所述第二部分及所述聚合物緩衝層中形成開口,其中所述焊料區延伸至所述開口中。
- 如申請專利範圍第8項所述之半導體封裝的製造方法,其中投射所述雷射光束包括在整個所述光熱轉化塗佈材料上掃描所述雷射光束。
- 如申請專利範圍第8項所述之半導體封裝的製造方法,更包括:在剝離所述載體之後,對所述光熱轉化塗佈材料之所述第二部分執行平坦化;或在剝離所述載體之後及在形成所述焊料區之前,蝕刻所述金屬晶種層之剩餘部分的一部分。
- 一種半導體封裝,包括:包封材料;穿孔,穿過所述包封材料;聚合物緩衝層,接觸所述穿孔且直接接觸所述包封材料;光熱轉化塗佈材料,接觸所述聚合物緩衝層;以及焊料區;穿過所述光熱轉化塗佈材料及所述聚合物緩衝層。
- 如申請專利範圍第13項所述之半導體封裝,更包括:裝置晶粒;及晶粒貼合膜,所述裝置晶粒附接至所述聚合物緩衝層,其中所述包封材料包封所述裝置晶粒及所述晶粒貼合膜。
- 如申請專利範圍第13項所述之半導體封裝,其中所述光熱轉化塗佈材料包括以交替佈置分配之多個第一部分及多個第二部分,且所述多個第一部分比所述多個第二部分薄。
- 如申請專利範圍第15項所述之半導體封裝,其中所述光熱轉化塗佈材料之所述多個第一部分及所述多個第二部分是平行條帶。
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