TWI667522B - Pixel structure - Google Patents

Pixel structure Download PDF

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TWI667522B
TWI667522B TW107131312A TW107131312A TWI667522B TW I667522 B TWI667522 B TW I667522B TW 107131312 A TW107131312 A TW 107131312A TW 107131312 A TW107131312 A TW 107131312A TW I667522 B TWI667522 B TW I667522B
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pixel
black
color resist
line segment
pixel structure
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TW107131312A
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Chinese (zh)
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TW202011096A (en
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林弘哲
曾文賢
何昇儒
張乃文
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友達光電股份有限公司
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Priority to TW107131312A priority Critical patent/TWI667522B/en
Priority to CN201811406921.2A priority patent/CN109270734B/en
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Publication of TW202011096A publication Critical patent/TW202011096A/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133514Colour filters
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133512Light shielding layers, e.g. black matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Geometry (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Optical Filters (AREA)

Abstract

畫素結構包括第一畫素、第二畫素、資料線及黑矩陣層。第一畫素包括第一色阻。第二畫素包括第二色阻。第一色阻與第二色阻排列在第一方向上。資料線包括延伸在第二方向上的第一線段與第二線段。第一方向與第二方向彼此交錯。黑矩陣層包括第一黑部件。第一黑部件與第一線段重疊,且未與第二線段重疊。第一色阻與第二色阻彼此堆疊以形成交疊區域。交疊區域重疊於第二線段上,而設置於第一黑部件上的第一色阻與第二色阻彼此不交疊。The pixel structure includes a first pixel, a second pixel, a data line, and a black matrix layer. The first pixel includes a first color block. The second pixel includes a second color block. The first color resist and the second color resist are arranged in the first direction. The data line includes a first line segment and a second line segment extending in the second direction. The first direction and the second direction are staggered with each other. The black matrix layer includes a first black component. The first black part overlaps the first line segment and does not overlap the second line segment. The first color resist and the second color resist are stacked on each other to form an overlapping area. The overlapping area overlaps the second line segment, and the first color resist and the second color resist provided on the first black member do not overlap each other.

Description

畫素結構Pixel structure

本發明是有關於一種畫素結構。The invention relates to a pixel structure.

隨著消費性電子及通訊產品的發展,液晶顯示器(Liquid Crystal Display,LCD)已廣泛地應用於液晶電視、筆記型電腦、桌上型電腦,以及智慧型手機(Smart Phone)等產品。但隨著液晶顯示器的畫素解析度不斷提升的發展,各畫素單元的尺寸必須愈來愈小。目前仍有受限於製程極限與元件的配置設計相關的議題需要克服。With the development of consumer electronics and communication products, Liquid Crystal Display (LCD) has been widely used in LCD TVs, notebook computers, desktop computers, and smart phones. However, as the pixel resolution of liquid crystal displays continues to improve, the size of each pixel unit must become smaller and smaller. At present, there are still issues that need to be overcome due to process limitations and device configuration design.

本發明是有關於一種畫素結構,其可具有較高的開口率。The invention relates to a pixel structure, which can have a high aperture ratio.

根據本發明之一實施例,提出一種畫素結構,其包括第一畫素、第二畫素、資料線及黑矩陣層。第一畫素包括第一色阻。第二畫素包括第二色阻。第一色阻與第二色阻排列在第一方向上。資料線包括延伸在第二方向上的第一線段與第二線段。第一方向與第二方向彼此交錯。黑矩陣層包括第一黑部件。第一黑部件與第一線段重疊,且未與第二線段重疊。第一色阻與第二色阻彼此堆疊以形成交疊區域。交疊區域重疊於第二線段上,而設置於第一黑部件上的第一色阻與第二色阻彼此不交疊。According to an embodiment of the invention, a pixel structure is proposed, which includes a first pixel, a second pixel, a data line, and a black matrix layer. The first pixel includes a first color block. The second pixel includes a second color block. The first color resist and the second color resist are arranged in the first direction. The data line includes a first line segment and a second line segment extending in the second direction. The first direction and the second direction are staggered with each other. The black matrix layer includes a first black component. The first black part overlaps the first line segment and does not overlap the second line segment. The first color resist and the second color resist are stacked on each other to form an overlapping area. The overlapping area overlaps the second line segment, and the first color resist and the second color resist provided on the first black member do not overlap each other.

為了對本發明之上述及其他方面有更佳的瞭解,下文特舉實施例,並配合所附圖式詳細說明如下:In order to have a better understanding of the above and other aspects of the present invention, the following examples are specifically described in conjunction with the accompanying drawings as follows:

在下文中將參照附圖更全面地描述本發明,在附圖中示出了本發明的示例性實施例。如本領域技術人員將認識到的,可以以各種不同的方式修改所描述的實施例,而不脫離本發明的精神或範圍。Hereinafter, the present invention will be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the present invention are shown. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

本文參考作為理想化實施例的示意圖的截面圖來描述示例性實施例。因此,可以預期到作為例如製造技術及/或公差的結果的圖示的形狀變化。因此,本文所述的實施例不應被解釋為限於如本文所示的區域的特定形狀,而是包括例如由製造導致的形狀偏差。例如,示出或描述為平坦的區域通常可以具有粗糙及/或非線性特徵。此外,所示的銳角可以是圓的。因此,圖中所示的區域本質上是示意性的,並且它們的形狀不是旨在示出區域的精確形狀,並且不是旨在限制權利要求的範圍。Exemplary embodiments are described herein with reference to cross-sectional views that are schematic diagrams of idealized embodiments. Therefore, it is possible to anticipate a change in shape as a result of, for example, manufacturing techniques and/or tolerances. Therefore, the embodiments described herein should not be construed as being limited to the specific shapes of the regions as shown herein, but include deviations in shapes caused by manufacturing, for example. For example, an area shown or described as flat may generally have rough and/or non-linear characteristics. In addition, the acute angle shown may be round. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the precise shapes of the regions, and are not intended to limit the scope of the claims.

以下係以一些實施例做說明。須注意的是,本揭露並非顯示出所有可能的實施例,未於本揭露提出的其他實施態樣也可能可以應用。再者,圖式上的尺寸比例並非按照實際產品等比例繪製。因此,說明書和圖示內容僅作敘述實施例之用,而非作為限縮本揭露保護範圍之用。另外,實施例中之敘述,例如細部結構、製程步驟和材料應用等等,僅為舉例說明之用,並非對本揭露欲保護之範圍做限縮。實施例之步驟和結構各之細節可在不脫離本揭露之精神和範圍內根據實際應用製程之需要而加以變化與修飾。以下是以相同/類似的符號表示相同/類似的元件做說明。The following is a description with some embodiments. It should be noted that this disclosure does not show all possible embodiments, and other implementations not proposed in this disclosure may also be applicable. Furthermore, the size ratios in the drawings are not drawn according to the actual products. Therefore, the description and illustrations are only used to describe the embodiments, not to limit the scope of disclosure of the present disclosure. In addition, the descriptions in the embodiments, such as the detailed structure, process steps and material application, etc., are for illustrative purposes only, and do not limit the scope of the disclosure to be protected. The details of the steps and structure of the embodiments can be changed and modified according to the needs of the actual application process without departing from the spirit and scope of the present disclosure. The following description uses the same/similar symbols to indicate the same/similar components.

請參照第1圖至第4圖。第1圖為依照本發明的一實施例的畫素結構之主動元件陣列基板的示意圖。第2圖為畫素結構之彩色濾光基板的示意圖。第3圖為畫素結構的剖面圖。第4圖繪示出畫素結構的色阻、黑矩陣層與資料線的配置示意圖。第3圖可對應第1圖、第2圖與第4圖之結構中的AB剖面線區域。為求簡單了解,第2圖與第4圖中係以透視第二基板的方式呈現在其下方的元件配置。Please refer to Figure 1 to Figure 4. FIG. 1 is a schematic diagram of a pixel structure active device array substrate according to an embodiment of the invention. FIG. 2 is a schematic diagram of a color filter substrate with pixel structure. Figure 3 is a cross-sectional view of the pixel structure. FIG. 4 is a schematic diagram showing the arrangement of color resist, black matrix layer and data lines of the pixel structure. Figure 3 can correspond to the AB hatching area in the structures of Figures 1, 2 and 4. For the sake of simplicity, Figures 2 and 4 show the component arrangement below the second substrate through the perspective.

請參照第1圖至第4圖。畫素結構102可包括多個畫素,例如包括第一畫素P1、第二畫素P2、第三畫素P3及第四畫素P4。第一畫素P1及第二畫素P2排列在第一方向D1上。第三畫素P3及第四畫素P4排列在第一方向D1上。第一畫素P1及第三畫素P3排列在第二方向D2上。第二畫素P2及第四畫素P4排列在第二方向D2上。第一方向D1與第二方向D2彼此交錯。一實施例中,第一方向D1係實質上垂直第二方向D2。例如第一方向D1為X方向,且第二方向D2為Y方向。第一畫素P1包括排列在第二方向D2上的第一子畫素SP1與第二子畫素SP2。第二畫素P2包括排列在第二方向D2上的第三子畫素SP3與第四子畫素SP4。第三畫素P3包括排列在第二方向D2上的第一子畫素SP1'與第二子畫素SP2'。第四畫素P4包括排列在第二方向D2上的第三子畫素SP3'與第四子畫素SP4'。Please refer to Figure 1 to Figure 4. The pixel structure 102 may include multiple pixels, for example, including a first pixel P1, a second pixel P2, a third pixel P3, and a fourth pixel P4. The first pixel P1 and the second pixel P2 are arranged in the first direction D1. The third pixel P3 and the fourth pixel P4 are arranged in the first direction D1. The first pixel P1 and the third pixel P3 are arranged in the second direction D2. The second pixel P2 and the fourth pixel P4 are arranged in the second direction D2. The first direction D1 and the second direction D2 cross each other. In one embodiment, the first direction D1 is substantially perpendicular to the second direction D2. For example, the first direction D1 is the X direction, and the second direction D2 is the Y direction. The first pixel P1 includes a first sub-pixel SP1 and a second sub-pixel SP2 arranged in the second direction D2. The second pixel P2 includes a third sub-pixel SP3 and a fourth sub-pixel SP4 arranged in the second direction D2. The third pixel P3 includes a first sub-pixel SP1' and a second sub-pixel SP2' arranged in the second direction D2. The fourth pixel P4 includes a third sub-pixel SP3' and a fourth sub-pixel SP4' arranged in the second direction D2.

請參照第1圖。第一畫素P1包括第一子畫素SP1、第二子畫素SP2、第一開關元件T1、第二開關元件T2以及第三開關元件T3。第一子畫素SP1包括第一畫素電極PE1。第二子畫素SP2包括第二畫素電極PE2。第二畫素P2包括第三子畫素SP3、第四子畫素SP4、第四開關元件T4、第五開關元件T5以及第六開關元件T6。第三子畫素SP3包括第三畫素電極PE3。第四子畫素SP4包括第四畫素電極PE4。第一畫素電極PE1、第二畫素電極PE2、第三畫素電極PE3、第四畫素電極PE4可為透明電極層(例如氧化铟锡等)、反射電極層或是半穿透半反射電極層。第一畫素電極PE1、第二畫素電極PE2、第三畫素電極PE3、第四畫素電極PE4可設置配向圖案(配向狹縫或配向凸起)。Please refer to Figure 1. The first pixel P1 includes a first sub-pixel SP1, a second sub-pixel SP2, a first switching element T1, a second switching element T2, and a third switching element T3. The first sub-pixel SP1 includes a first pixel electrode PE1. The second sub-pixel SP2 includes a second pixel electrode PE2. The second pixel P2 includes a third sub-pixel SP3, a fourth sub-pixel SP4, a fourth switching element T4, a fifth switching element T5, and a sixth switching element T6. The third sub-pixel SP3 includes a third pixel electrode PE3. The fourth sub-pixel SP4 includes a fourth pixel electrode PE4. The first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3, and the fourth pixel electrode PE4 may be a transparent electrode layer (such as indium tin oxide, etc.), a reflective electrode layer, or semi-transmission and semi-reflection Electrode layer. The first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3, and the fourth pixel electrode PE4 may be provided with alignment patterns (alignment slits or alignment protrusions).

請參照第1圖與第3圖。在本實施例中,第一開關元件T1、第二開關元件T2以及第三開關元件T3設置於第一基板112上。第一開關元件T1包含第一閘極G1、第一通道層CH1、第一源極SE1與第一汲極DE1。第一閘極G1與掃描線SL電性連接,且第一源極SE1與資料線DL1電性連接。第二開關元件T2包含第二閘極G2、第二通道層CH2、第二源極SE2與第二汲極DE2。第二閘極G2與掃描線SL電性連接,且第二源極SE2透過第一源極SE1與資料線DL1電性連接。第一通道層CH1與第二通道層CH2可為同一半導體圖案。第三開關元件T3包含第三閘極G3、第三通道層CH3、第三源極SE3與第三汲極DE3。第三閘極G3與掃描線SL電性連接,第三源極SE3與第二汲極DE2連接,且第三汲極DE3與訊號線CL1電性連接。同樣的,在本實施例中,第四開關元件T4、第五開關元件T5以及第六開關元件T6設置於第一基板112上。第四開關元件T4電性連接於掃描線SL與資料線DL2。第五開關元件T5電性連接於掃描線SL與資料線DL2。第六開關元件T6電性連接於掃描線SL與訊號線CL2。再者,關於第四開關元件T4、第五開關元件T5或第六開關元件T6的細部結構類似於前述的第一開關元件T1、第二開關元件T2或第三開關元件T3,在此不再贅述。在本實施例中,掃描線SL沿第一方向D1延伸;資料線DL1、DL2沿第二方向D2延伸;訊號線CL1、CL2沿第二方向D2延伸。掃描線SL與資料線DL1、DL2彼此交錯;掃描線SL與訊號線CL1、CL2彼此交錯。Please refer to Figure 1 and Figure 3. In this embodiment, the first switching element T1, the second switching element T2, and the third switching element T3 are disposed on the first substrate 112. The first switching element T1 includes a first gate G1, a first channel layer CH1, a first source SE1 and a first drain DE1. The first gate G1 is electrically connected to the scan line SL, and the first source SE1 is electrically connected to the data line DL1. The second switching element T2 includes a second gate G2, a second channel layer CH2, a second source SE2, and a second drain DE2. The second gate G2 is electrically connected to the scan line SL, and the second source SE2 is electrically connected to the data line DL1 through the first source SE1. The first channel layer CH1 and the second channel layer CH2 may be the same semiconductor pattern. The third switching element T3 includes a third gate G3, a third channel layer CH3, a third source SE3, and a third drain DE3. The third gate G3 is electrically connected to the scan line SL, the third source SE3 is connected to the second drain DE2, and the third drain DE3 is electrically connected to the signal line CL1. Similarly, in this embodiment, the fourth switching element T4, the fifth switching element T5, and the sixth switching element T6 are provided on the first substrate 112. The fourth switching element T4 is electrically connected to the scan line SL and the data line DL2. The fifth switching element T5 is electrically connected to the scan line SL and the data line DL2. The sixth switching element T6 is electrically connected to the scanning line SL and the signal line CL2. Furthermore, the detailed structure of the fourth switching element T4, the fifth switching element T5, or the sixth switching element T6 is similar to the aforementioned first switching element T1, second switching element T2, or third switching element T3, and is not repeated here. Repeat. In this embodiment, the scan line SL extends along the first direction D1; the data lines DL1, DL2 extend along the second direction D2; and the signal lines CL1, CL2 extend along the second direction D2. The scan line SL and the data lines DL1, DL2 are interleaved with each other; the scan line SL and the signal lines CL1, CL2 are interleaved with each other.

在本實施例中,第一畫素電極PE1透過接觸窗V1與第一開關元件T1的第一汲極DE1電性連接。第二畫素電極PE2透過接觸窗V2與第二開關元件T2的第二汲極DE2電性連接。第三畫素電極PE3透過接觸窗V3與第三開關元件T3電性連接。第四畫素電極PE4透過接觸窗V4與第四開關元件T4電性連接。In this embodiment, the first pixel electrode PE1 is electrically connected to the first drain electrode DE1 of the first switching element T1 through the contact window V1. The second pixel electrode PE2 is electrically connected to the second drain electrode DE2 of the second switching element T2 through the contact window V2. The third pixel electrode PE3 is electrically connected to the third switching element T3 through the contact window V3. The fourth pixel electrode PE4 is electrically connected to the fourth switching element T4 through the contact window V4.

請再參照第1圖,第一畫素P1更包括第一共通電極CE1。第二畫素P2更包括第二共通電極CE2。第一共通電極CE1沿第二方向D2延伸,第二共通電極CE2沿第二方向D2延伸。第一共通電極CE1與第二共通電極CE2電性連接於共通電極線CES,其中共通電極線CES沿第一方向D1延伸。在本實施例中,第一共通電極CE1、第二共通電極CE2與共通電極線CES電性連接到第一電壓,訊號線CL1、CL2電性連接到第二電壓。在一實施例中,第一電壓可不同於第二電壓,藉此畫素結構的穿透率可以大幅提升。Please refer to FIG. 1 again, the first pixel P1 further includes a first common electrode CE1. The second pixel P2 further includes a second common electrode CE2. The first common electrode CE1 extends in the second direction D2, and the second common electrode CE2 extends in the second direction D2. The first common electrode CE1 and the second common electrode CE2 are electrically connected to the common electrode line CES, wherein the common electrode line CES extends along the first direction D1. In this embodiment, the first common electrode CE1, the second common electrode CE2 and the common electrode line CES are electrically connected to the first voltage, and the signal lines CL1 and CL2 are electrically connected to the second voltage. In one embodiment, the first voltage may be different from the second voltage, whereby the transmittance of the pixel structure can be greatly improved.

在本實施例中,第一共通電極CE1與第一畫素電極PE1在垂直投影方向D3(例如Z方向)上部分重疊;第一共通電極CE1並未延伸至第二子畫素SP2,第一共通電極CE1在垂直投影方向D3上並未與第二畫素電極PE2重疊,亦即第二子畫素SP2並不具有共通電極。第二共通電極CE2與第三畫素電極PE3在垂直投影方向D3(例如Z方向)上部分重疊;第二共通電極CE2並未延伸至第四子畫素SP4,第二共通電極CE2在垂直投影方向D3上並未與第四畫素電極PE4重疊,亦即第四子畫素SP4並不具有共通電極。In this embodiment, the first common electrode CE1 and the first pixel electrode PE1 partially overlap in the vertical projection direction D3 (for example, the Z direction); the first common electrode CE1 does not extend to the second sub-pixel SP2, the first The common electrode CE1 does not overlap with the second pixel electrode PE2 in the vertical projection direction D3, that is, the second sub-pixel SP2 does not have a common electrode. The second common electrode CE2 and the third pixel electrode PE3 partially overlap in the vertical projection direction D3 (for example, the Z direction); the second common electrode CE2 does not extend to the fourth sub-pixel SP4, and the second common electrode CE2 is vertically projected The direction D3 does not overlap with the fourth pixel electrode PE4, that is, the fourth sub-pixel SP4 does not have a common electrode.

資料線DL1包括延伸在第二方向D2上的第一線段DLP1與第二線段DLP2。第一線段DLP1在第一畫素電極PE1及第三畫素電極PE3之間。第二線段DLP2在第二畫素電極PE2及第四畫素電極PE4之間。第一共通電極CE1與第二共通電極CE2分別設置於第一線段DLP1之相對的第一側邊DLS1與第二側邊DLS2。The data line DL1 includes a first line segment DLP1 and a second line segment DLP2 extending in the second direction D2. The first line segment DLP1 is between the first pixel electrode PE1 and the third pixel electrode PE3. The second line segment DLP2 is between the second pixel electrode PE2 and the fourth pixel electrode PE4. The first common electrode CE1 and the second common electrode CE2 are respectively disposed on the first side DLS1 and the second side DLS2 opposite to the first line segment DLP1.

請參照第2圖,在一實施例中,彩色濾光基板106可包括黑矩陣層BM及色阻。色阻例如第一畫素P1的第一色阻CF1、第二畫素P2的第二色阻CF2、第三畫素P3的第三色阻CF3、第四畫素P4的第四色阻CF4等。第一色阻CF1與第二色阻CF2排列在第一方向D1上。黑矩陣層BM包括遮光幹部BMK以及第一黑部件BM1。遮光幹部BMK延伸在第一方向D1上。遮光幹部BMK包括相對的第一側邊BMKS1與第二側邊BMKS2。第一黑部件BM1從遮光幹部BMK的第一側邊BMKS1延伸在第二方向D2上。第一黑部件BM1包括第一側邊BM1S1、第二側邊BM1S2與第三側邊BM1S3,第三側邊BM1S3在相對的第一側邊BM1S1與第二側邊BM1S2之間。第一色阻CF1在第一黑部件BM1的第一側邊BM1S1。第二色阻CF2在第一黑部件BM1的第二側邊BM1S2。第一色阻CF1與第二色阻CF2在垂直投影方向D3上與第一黑部件BM1重疊的部分係以一間距Q彼此隔開。在本實施例中,第一色阻CF1與第二色阻CF2係在遮光幹部BMK的第二側邊BMKS2側彼此堆疊以形成交疊區域OV,但不以此為限,第一色阻CF1與第二色阻CF2係在遮光幹部BMK的第二側邊BMKS2側彼此也可以彼此不堆疊。第一色阻CF1、第二色阻CF2、第三色阻CF3與第四色阻CF4可包括不同顏色的色阻。在一實施例中,第一色阻CF1與第三色阻CF3為相同顏色的色阻,第二色阻CF2與第四色阻CF4為相同顏色的色阻。例如但不限於,第一色阻CF1與第三色阻CF3為綠色色阻,第二色阻CF2與第四色阻CF4為藍色色阻。Please refer to FIG. 2. In an embodiment, the color filter substrate 106 may include a black matrix layer BM and color resist. For example, the first color resist CF1 of the first pixel P1, the second color resist CF2 of the second pixel P2, the third color resist CF3 of the third pixel P3, and the fourth color resist CF4 of the fourth pixel P4 Wait. The first color resist CF1 and the second color resist CF2 are arranged in the first direction D1. The black matrix layer BM includes a light-shielding stem BMK and a first black member BM1. The light-shielding stem BMK extends in the first direction D1. The light-shielding stem BMK includes a first side BMKS1 and a second side BMKS2 facing each other. The first black member BM1 extends from the first side BMKS1 of the light-shielding stem BMK in the second direction D2. The first black part BM1 includes a first side BM1S1, a second side BM1S2, and a third side BM1S3, and the third side BM1S3 is between the opposing first side BM1S1 and second side BM1S2. The first color resist CF1 is on the first side BM1S1 of the first black part BM1. The second color resistive CF2 is on the second side BM1S2 of the first black member BM1. The portions where the first color resist CF1 and the second color resist CF2 overlap the first black member BM1 in the vertical projection direction D3 are separated from each other by a pitch Q. In this embodiment, the first color resist CF1 and the second color resist CF2 are stacked on the second side BMKS2 side of the light-shielding stem BMK to form an overlapping area OV, but not limited to this, the first color resist CF1 The second color resister CF2 may not be stacked on the second BMKS2 side of the light-shielding stem BMK. The first color resist CF1, the second color resist CF2, the third color resist CF3, and the fourth color resist CF4 may include color resists of different colors. In an embodiment, the first color resist CF1 and the third color resist CF3 are color resists of the same color, and the second color resist CF2 and the fourth color resist CF4 are color resists of the same color. For example, but not limited to, the first color resist CF1 and the third color resist CF3 are green color resists, and the second color resist CF2 and the fourth color resist CF4 are blue color resists.

請參照第3圖。主動元件陣列基板104包括第一基板112。第一基板112包括但不限於玻璃基板。第一共通電極元件CEE1(包括共通電極線CES、第一共通電極CE1及第二共通電極CE2)、掃描線SL、第二共通電極元件CEE2設置在第一基板112上。一實施例中,第一共通電極元件CEE1、掃描線SL、第二共通電極元件CEE2可包括相同的導電材料,或可利用相同製程同時形成,例如為第一金屬層。第一絕緣層114設置在第一共通電極元件CEE1、掃描線SL、第二共通電極元件CEE2上。通道層,例如第二通道層CH2,可設置在第一絕緣層114上。第二源極SE2與第二汲極DE2可設置在第二通道層CH2上。資料線DL(例如包含資料線DL1、DL2)可設置在第一絕緣層114上。在一實施例中,資料線DL、第二源極SE2與第二汲極DE2可包括相同的導電材料,或可利用相同製程同時形成,例如為第二金屬層。第二絕緣層116可設置在第一絕緣層114、資料線DL、第二源極SE2與第二汲極DE2上。畫素電極可設置在第二絕緣層116上。例如第一畫素P1的第一畫素電極PE1和第二畫素電極PE2以及第二畫素P2的第三畫素電極PE3和第四畫素電極PE4等設置在第二絕緣層116上。Please refer to Figure 3. The active device array substrate 104 includes a first substrate 112. The first substrate 112 includes but is not limited to a glass substrate. The first common electrode element CEE1 (including the common electrode line CES, the first common electrode CE1 and the second common electrode CE2), the scan line SL, and the second common electrode element CEE2 are provided on the first substrate 112. In one embodiment, the first common electrode element CEE1, the scanning line SL, and the second common electrode element CEE2 may include the same conductive material, or may be formed simultaneously using the same process, such as the first metal layer. The first insulating layer 114 is provided on the first common electrode element CEE1, the scanning line SL, and the second common electrode element CEE2. A channel layer, for example, the second channel layer CH2, may be disposed on the first insulating layer 114. The second source electrode SE2 and the second drain electrode DE2 may be disposed on the second channel layer CH2. The data line DL (for example, including the data lines DL1 and DL2) may be disposed on the first insulating layer 114. In an embodiment, the data line DL, the second source electrode SE2, and the second drain electrode DE2 may include the same conductive material, or may be formed simultaneously using the same process, such as a second metal layer. The second insulating layer 116 may be disposed on the first insulating layer 114, the data line DL, the second source electrode SE2, and the second drain electrode DE2. The pixel electrode may be disposed on the second insulating layer 116. For example, the first pixel electrode PE1 and the second pixel electrode PE2 of the first pixel P1, and the third pixel electrode PE3 and the fourth pixel electrode PE4 of the second pixel P2 are provided on the second insulating layer 116.

請參照第3圖,彩色濾光基板106包括第二基板118。第二基板118包括但不限於玻璃基板。黑矩陣層BM與色阻(第一色阻CF1和第二色阻CF2)設置在第二基板118上。例如黑矩陣層BM的遮光幹部BMK與第一黑部件BM1設置在第二基板118上。第一黑部件BM1可包括上表面BM1TS1。上表面BM1TS1在第一側邊BM1S1與第二側邊BM1S2之間。上表面BM1TS1可為平坦表面。第一色阻CF1堆疊在第一黑部件BM1的第一側邊BM1S1與上表面BM1TS1。第二色阻CF2堆疊在第一黑部件BM1的第二側邊BM1S2與上表面BM1TS1。堆疊在第一黑部件BM1的上表面BM1TS1的第一色阻CF1與第二色阻CF2係彼此不交疊,並以間距Q彼此隔開。電極層120可設置在黑矩陣層BM與色阻上。電極層120可為透明電極層(例如氧化铟锡等)。Referring to FIG. 3, the color filter substrate 106 includes a second substrate 118. The second substrate 118 includes but is not limited to a glass substrate. The black matrix layer BM and the color resist (the first color resist CF1 and the second color resist CF2) are provided on the second substrate 118. For example, the light-shielding stem BMK of the black matrix layer BM and the first black member BM1 are provided on the second substrate 118. The first black part BM1 may include an upper surface BM1TS1. The upper surface BM1TS1 is between the first side BM1S1 and the second side BM1S2. The upper surface BM1TS1 may be a flat surface. The first color resist CF1 is stacked on the first side BM1S1 and the upper surface BM1TS1 of the first black member BM1. The second color resist CF2 is stacked on the second side BM1S2 and the upper surface BM1TS1 of the first black member BM1. The first color resist CF1 and the second color resist CF2 stacked on the upper surface BM1TS1 of the first black member BM1 are not overlapped with each other, and are separated from each other by a pitch Q. The electrode layer 120 may be disposed on the black matrix layer BM and the color resist. The electrode layer 120 may be a transparent electrode layer (for example, indium tin oxide, etc.).

請參照第3圖,主動元件陣列基板104與彩色濾光基板106係相對設置,且顯示介質LC設置在主動元件陣列基板104與彩色濾光基板106之間。顯示介質LC包括液晶層。間隔元件PS可設置在主動元件陣列基板104與彩色濾光基板106之間,用以隔開主動元件陣列基板104與彩色濾光基板106。於此,垂直投影方向D3可為垂直於第一基板112或第二基板118之表面的方向。Please refer to FIG. 3, the active device array substrate 104 and the color filter substrate 106 are oppositely disposed, and the display medium LC is provided between the active device array substrate 104 and the color filter substrate 106. The display medium LC includes a liquid crystal layer. The spacer element PS may be disposed between the active device array substrate 104 and the color filter substrate 106 to separate the active device array substrate 104 and the color filter substrate 106. Here, the vertical projection direction D3 may be a direction perpendicular to the surface of the first substrate 112 or the second substrate 118.

請參照第3圖,第一共通電極CE1與第二共通電極CE2係在垂直投影方向D3上與第一黑部件BM1重疊。第一黑部件BM1與第一共通電極CE1可在垂直投影方向D3上部分重疊第一畫素電極PE1。第一黑部件BM1與第二共通電極CE2可在垂直投影方向D3上部分重疊第三畫素電極PE3。第一黑部件BM1的第一側邊BM1S1可對準第一共通電極CE1之遠離第一線段DLP1的側邊CE1S1。第一黑部件BM1的第二側邊BM1S2可對準第二共通電極CE2之遠離第一線段DLP1的側邊CE2S2。遮光幹部BMK可遮蔽薄膜電晶體,例如包括第一開關元件T1(第1圖)、第二開關元件T2、與第三開關元件T3(第1圖)。Referring to FIG. 3, the first common electrode CE1 and the second common electrode CE2 overlap the first black member BM1 in the vertical projection direction D3. The first black member BM1 and the first common electrode CE1 may partially overlap the first pixel electrode PE1 in the vertical projection direction D3. The first black member BM1 and the second common electrode CE2 may partially overlap the third pixel electrode PE3 in the vertical projection direction D3. The first side BM1S1 of the first black part BM1 may be aligned with the side CE1S1 of the first common electrode CE1 away from the first line segment DLP1. The second side BM1S2 of the first black part BM1 may be aligned with the side CE2S2 of the second common electrode CE2 away from the first line segment DLP1. The light-shielding stem BMK can shield the thin film transistor, for example, including a first switching element T1 (Figure 1), a second switching element T2, and a third switching element T3 (Figure 1).

請參照第3圖,第一黑部件BM1在第一方向D1上的尺寸BMW1(例如寬度)係大於第一線段DLP1在第一方向D1上的尺寸DLW1(例如寬度)。在一實施例中,第一線段DLP1在第一方向D1上的尺寸DLW1(例如寬度)與第二線段DLP2在第一方向D1上的尺寸DLW2(例如寬度)可實質上相同。亦即第一黑部件BM1在第一方向D1上的尺寸BMW1(例如寬度)係大於第二線段DLP2在第一方向D1上的尺寸DLW2(例如寬度)。Referring to FIG. 3, the dimension BMW1 (eg width) of the first black part BM1 in the first direction D1 is larger than the dimension DLW1 (eg width) of the first line segment DLP1 in the first direction D1. In an embodiment, the dimension DLW1 (eg width) of the first line segment DLP1 in the first direction D1 and the dimension DLW2 (eg width) of the second line segment DLP2 in the first direction D1 may be substantially the same. That is, the dimension BMW1 (eg width) of the first black part BM1 in the first direction D1 is larger than the dimension DLW2 (eg width) of the second line segment DLP2 in the first direction D1.

請參照第3圖與第4圖,第一黑部件BM1與資料線DL1的第一線段DLP1在垂直投影方向D3上重疊,且未與資料線DL1的第二線段DLP2重疊。第一黑部件BM1的第一側邊BM1S1與第二側邊BM1S2分別在第一線段DLP1的第一側邊DLS1與第二側邊DLS2的外側。此實施例中,資料線DL1的第二線段DLP2在垂直投影方向D3上並未與黑矩陣層BM重疊。第一色阻CF1與第二色阻CF2之交疊區域OV與資料線DL1的第二線段DLP2在垂直投影方向D3上係至少部分重疊。Referring to FIGS. 3 and 4, the first black part BM1 overlaps the first line segment DLP1 of the data line DL1 in the vertical projection direction D3, and does not overlap the second line segment DLP2 of the data line DL1. The first side BM1S1 and the second side BM1S2 of the first black member BM1 are respectively outside the first side DLS1 and the second side DLS2 of the first line segment DLP1. In this embodiment, the second line segment DLP2 of the data line DL1 does not overlap the black matrix layer BM in the vertical projection direction D3. The overlapping area OV of the first color resist CF1 and the second color resist CF2 at least partially overlaps the second line segment DLP2 of the data line DL1 in the vertical projection direction D3.

在實施例之畫素結構102中,第二子畫素SP2的第二畫素電極PE2及第四子畫素SP4的第四畫素電極PE4之間並未配置黑矩陣層。一比較例中,黑矩陣層(未顯示)包括設置在第二子畫素SP2的第二畫素電極PE2及第四子畫素SP4的第四畫素電極PE4之間的一黑矩陣部分,且此黑矩陣部分與第一黑部件BM1皆等寬,造成大面積的遮蔽範圍。因此跟比較例的畫素結構相比,本發明之實施例的畫素結構102可具有較高的開口率。In the pixel structure 102 of the embodiment, no black matrix layer is disposed between the second pixel electrode PE2 of the second sub-pixel SP2 and the fourth pixel electrode PE4 of the fourth sub-pixel SP4. In a comparative example, the black matrix layer (not shown) includes a black matrix portion disposed between the second pixel electrode PE2 of the second sub-pixel SP2 and the fourth pixel electrode PE4 of the fourth sub-pixel SP4, Moreover, the black matrix portion and the first black component BM1 have the same width, resulting in a large area of shielding range. Therefore, compared to the pixel structure of the comparative example, the pixel structure 102 of the embodiment of the present invention can have a higher aperture ratio.

請參照第5圖至第7圖。第5圖為根據另一實施例之畫素結構之彩色濾光基板的示意圖。第6圖繪示畫素結構之色阻、黑矩陣層與資料線的配置示意圖。第7圖為畫素結構的剖面圖,其可沿第5圖、第6圖中的CD線繪製。畫素結構202的主動元件陣列基板104可類似第1圖所示的主動元件陣列基板104。畫素結構202與第3圖所示之畫素結構102類似,差異在於畫素結構202的彩色濾光基板206的黑矩陣層BM'更包括第二黑部件BM2。Please refer to Figure 5 to Figure 7. FIG. 5 is a schematic diagram of a color filter substrate with a pixel structure according to another embodiment. Fig. 6 is a schematic diagram showing the arrangement of color resist, black matrix layer and data lines of the pixel structure. Figure 7 is a cross-sectional view of the pixel structure, which can be drawn along the CD line in Figures 5 and 6. The active device array substrate 104 of the pixel structure 202 may be similar to the active device array substrate 104 shown in FIG. 1. The pixel structure 202 is similar to the pixel structure 102 shown in FIG. 3, the difference is that the black matrix layer BM' of the color filter substrate 206 of the pixel structure 202 further includes a second black part BM2.

請參照第5圖與第6圖,遮光幹部BMK可連接在第二黑部件BM2與第一黑部件BM1之間。第二黑部件BM2可從遮光幹部BMK的第二側邊BMKS2沿第二方向D2延伸。第二黑部件BM2包括相對的第一側邊BM2S1與第二側邊BM2S2。Referring to FIGS. 5 and 6, the light-shielding stem BMK can be connected between the second black member BM2 and the first black member BM1. The second black member BM2 may extend from the second side BMKS2 of the light-shielding stem BMK in the second direction D2. The second black member BM2 includes opposing first side BM2S1 and second side BM2S2.

請參照第7圖,第二黑部件BM2設置在第二基板118上。第二黑部件BM2可包括上表面BM2TS2。上表面BM2TS2在第一側邊BM2S1與第二側邊BM2S2之間。上表面BM2TS2可為平坦表面。第一色阻CF1堆疊在第二黑部件BM2的第一側邊BM2S1與上表面BM2TS2。第二色阻CF2堆疊在第二黑部件BM2的第二側邊BM2S2與上表面BM2TS2。第一色阻CF1與第二色阻CF2係在第二黑部件BM2的上表面BM2TS2上彼此堆疊以形成交疊區域OV。第二黑部件BM2在垂直投影方向D3上不重疊第一共通電極CE1及第二共通電極CE2。第一黑部件BM1在第一方向D1上的尺寸BMW1(例如寬度)係大於第二黑部件BM2在第一方向D1上的尺寸BMW2(例如寬度)。第二黑部件BM2在第一方向D1上的尺寸BMW2(例如寬度)係等於或小於第二線段DLP2在第一方向D1上的尺寸DLW2(例如寬度)。Referring to FIG. 7, the second black component BM2 is provided on the second substrate 118. The second black part BM2 may include an upper surface BM2TS2. The upper surface BM2TS2 is between the first side BM2S1 and the second side BM2S2. The upper surface BM2TS2 may be a flat surface. The first color resist CF1 is stacked on the first side BM2S1 and the upper surface BM2TS2 of the second black member BM2. The second color resistive CF2 is stacked on the second side BM2S2 and the upper surface BM2TS2 of the second black member BM2. The first color resist CF1 and the second color resist CF2 are stacked on each other on the upper surface BM2TS2 of the second black member BM2 to form an overlap region OV. The second black member BM2 does not overlap the first common electrode CE1 and the second common electrode CE2 in the vertical projection direction D3. The dimension BMW1 (eg width) of the first black part BM1 in the first direction D1 is larger than the dimension BMW2 (eg width) of the second black part BM2 in the first direction D1. The dimension BMW2 (eg width) of the second black part BM2 in the first direction D1 is equal to or smaller than the dimension DLW2 (eg width) of the second line segment DLP2 in the first direction D1.

請參照第6圖與第7圖,第二黑部件BM2與資料線DL1的第二線段DLP2在垂直投影方向D3上重疊,且第二黑部件BM2與第一色阻CF1及第二色阻CF2的交疊區域OV重疊。第二線段DLP2具有相對的第一側邊DLS3與第二側邊DLS4。在一實施例中,第二線段DLP2的第一側邊DLS3係對準第二黑部件BM2的第一側邊BM2S1。或者,第二線段DLP2的第一側邊DLS3在第二黑部件BM2的第一側邊BM2S1外側,亦即第二線段DLP2的第一側邊DLS3在垂直投影方向D3上未重疊第二黑部件BM2。第二線段DLP2的第二側邊DLS4係對準第二黑部件BM2的第二側邊BM2S2。或者,第二線段DLP2的第二側邊DLS4在第二黑部件BM2的第二側邊BM2S2外側,亦即第二線段DLP2的第二側邊DLS4在垂直投影方向D3上並未重疊第二黑部件BM2。第一色阻CF1與第二色阻CF2之交疊區域OV與資料線DL1的第二線段DLP2在垂直投影方向D3上係至少部分重疊。在本實施例中,第二黑部件BM2在垂直投影方向D3上與第二子畫素SP2的第二畫素電極PE2以及第四子畫素SP4的第四畫素電極PE4部分重疊。Please refer to FIG. 6 and FIG. 7, the second black component BM2 overlaps the second line segment DLP2 of the data line DL1 in the vertical projection direction D3, and the second black component BM2 and the first color resistive CF1 and the second color resistive CF2 The overlapping areas OV overlap. The second line segment DLP2 has opposing first side DLS3 and second side DLS4. In an embodiment, the first side DLS3 of the second line segment DLP2 is aligned with the first side BM2S1 of the second black part BM2. Alternatively, the first side DLS3 of the second line segment DLP2 is outside the first side BM2S1 of the second black component BM2, that is, the first side DLS3 of the second line segment DLP2 does not overlap the second black component in the vertical projection direction D3 BM2. The second side DLS4 of the second line segment DLP2 is aligned with the second side BM2S2 of the second black part BM2. Or, the second side DLS4 of the second line segment DLP2 is outside the second side BM2S2 of the second black component BM2, that is, the second side DLS4 of the second line segment DLP2 does not overlap the second black in the vertical projection direction D3 Component BM2. The overlapping area OV of the first color resist CF1 and the second color resist CF2 at least partially overlaps the second line segment DLP2 of the data line DL1 in the vertical projection direction D3. In this embodiment, the second black member BM2 partially overlaps the second pixel electrode PE2 of the second sub-pixel SP2 and the fourth pixel electrode PE4 of the fourth sub-pixel SP4 in the vertical projection direction D3.

在實施例之畫素結構202中,黑矩陣層BM'其設置在第二子畫素SP2的第二畫素電極PE2及第四子畫素SP4的第四畫素電極PE4之間的第二黑部件BM2的寬度較第一黑部件BM1窄。一比較例中,黑矩陣層(未顯示)其設置在兩相鄰的子畫素之間的黑矩陣部分皆等寬,造成大面積的遮蔽範圍。因此跟比較例的畫素結構相比,本發明之實施例的畫素結構202可具有較高的開口率,例如至少提高開口率5%以上。In the pixel structure 202 of the embodiment, the black matrix layer BM' is disposed between the second pixel electrode PE2 of the second sub-pixel SP2 and the fourth pixel electrode PE4 of the fourth sub-pixel SP4. The width of the black member BM2 is narrower than that of the first black member BM1. In a comparative example, the black matrix layer (not shown) has a black matrix portion between two adjacent sub-pixels of equal width, resulting in a large-scale shielding range. Therefore, compared to the pixel structure of the comparative example, the pixel structure 202 of the embodiment of the present invention may have a higher aperture ratio, for example, the aperture ratio is increased by at least 5% or more.

請參照第8圖。第8圖為畫素結構302的剖面圖。畫素結構302可類似第7圖所示的畫素結構202,差異在於畫素結構302的主動元件陣列基板304包括黑色材料層BL。黑色材料層BL可設置在第一絕緣層114之上,覆蓋於第二開關元件T2上。第二絕緣層116可設置在黑色材料層BL上。在一實施例中,黑色材料層BL之概念亦可應用至例如第3圖所示的畫素結構102中。Please refer to Figure 8. FIG. 8 is a cross-sectional view of the pixel structure 302. The pixel structure 302 may be similar to the pixel structure 202 shown in FIG. 7 except that the active element array substrate 304 of the pixel structure 302 includes a black material layer BL. The black material layer BL may be disposed on the first insulating layer 114 to cover the second switching element T2. The second insulating layer 116 may be disposed on the black material layer BL. In one embodiment, the concept of the black material layer BL can also be applied to the pixel structure 102 shown in FIG. 3, for example.

請參照第9圖。第9圖為畫素結構402的剖面圖。畫素結構402可類似第8圖所示的畫素結構302,差異在於畫素結構402之主動元件陣列基板404的黑色材料層BL'包含第8圖中黑色材料層BL的遮光作用以及第8圖中間隔元件PS的作用。一實施例中,黑色材料層BL'之概念亦可應用至例如第3圖所示的畫素結構中。Please refer to Figure 9. FIG. 9 is a cross-sectional view of the pixel structure 402. The pixel structure 402 may be similar to the pixel structure 302 shown in FIG. 8, the difference is that the black material layer BL′ of the active element array substrate 404 of the pixel structure 402 includes the shading effect of the black material layer BL in FIG. 8 and the 8th The role of the spacer element PS in the figure. In one embodiment, the concept of the black material layer BL' can also be applied to the pixel structure shown in FIG. 3, for example.

請參照第10圖。第10圖為畫素結構502的剖面圖。畫素結構502可類似第7圖所示的畫素結構202,差異在於畫素結構502之主動元件陣列基板504中,黑矩陣層BM''的第二黑部件BM2a在垂直投影方向D3上未與第二子畫素SP2的第二畫素電極PE2以及第四子畫素SP4的第四畫素電極PE4重疊。更詳而言之,第二黑部件BM2a及/或資料線DL1的第二線段DLP2在垂直投影方向D3上未與第二畫素電極PE2以及第四畫素電極PE4重疊。此概念亦可例如應用至類似第7圖、第8圖、第9圖的畫素結構。Please refer to Figure 10. FIG. 10 is a cross-sectional view of the pixel structure 502. The pixel structure 502 may be similar to the pixel structure 202 shown in FIG. 7, the difference is that in the active element array substrate 504 of the pixel structure 502, the second black part BM2a of the black matrix layer BM'' is not in the vertical projection direction D3 It overlaps with the second pixel electrode PE2 of the second sub-pixel SP2 and the fourth pixel electrode PE4 of the fourth sub-pixel SP4. More specifically, the second black part BM2a and/or the second line segment DLP2 of the data line DL1 do not overlap the second pixel electrode PE2 and the fourth pixel electrode PE4 in the vertical projection direction D3. This concept can also be applied to the pixel structure similar to FIG. 7, FIG. 8, and FIG. 9, for example.

請參照第11圖。第11圖顯示一實施例中彩色濾光基板在第一黑部件BM1’附近的剖面圖。第一黑部件BM1’的第一側邊BM1S1與第二側邊BM1S2可為傾斜的側壁,且第一黑部件BM1’具有往遠離第二基板118的方向逐漸變窄的梯形形狀。第一黑部件BM1’的相對邊緣可分別為第一側邊BM1S1與第二側邊BM1S2鄰接第二基板118的邊緣。在一實施例中,第一黑部件BM1’的相對邊緣對於其它元件的配置關係可類似如第3圖、第7圖、第10圖中所述第一黑部件BM1之第一側邊BM1S1與第二側邊BM1S2對於其它元件的配置關係。Please refer to Figure 11. Fig. 11 shows a cross-sectional view of the color filter substrate near the first black member BM1' in an embodiment. The first side BM1S1 and the second side BM1S2 of the first black part BM1' may be inclined side walls, and the first black part BM1' has a trapezoidal shape gradually narrowing away from the second substrate 118. The opposite edges of the first black part BM1' may be the edges of the first side BM1S1 and the second side BM1S2 adjacent to the second substrate 118, respectively. In an embodiment, the arrangement relationship of the opposite edges of the first black part BM1' to other elements may be similar to the first side BM1S1 of the first black part BM1 described in FIGS. 3, 7 and 10, and The arrangement relationship of the second side BM1S2 to other components.

請參照第12圖。第12圖顯示一實施例中彩色濾光基板在第二黑部件BM2'附近的剖面圖。第二黑部件BM2'的第一側邊BM2S1與第二側邊BM2S2可為傾斜的側壁,且第二黑部件BM2'具有往遠離第二基板118的方向逐漸變窄的梯形形狀。第二黑部件BM2'的相對邊緣可分別為第一側邊BM2S1與第二側邊BM2S2鄰接第二基板118。在一實施例中,第二黑部件BM2'的相對邊緣對於其它元件的配置關係可類似如第7圖中所述第二黑部件BM2之第一側邊BM2S1與第二側邊BM2S2對於其它元件的配置關係。例如當以第二黑部件BM2'取代第二黑部件BM2時,第二黑部件BM2'的相對兩邊緣係實質上分別對準第二線段DLP2的第一側邊DLS3與第二側邊DLS4。Please refer to Figure 12. FIG. 12 shows a cross-sectional view of the color filter substrate in the vicinity of the second black member BM2′ in an embodiment. The first side BM2S1 and the second side BM2S2 of the second black part BM2' may be inclined side walls, and the second black part BM2' has a trapezoidal shape gradually narrowing away from the second substrate 118. The opposite edges of the second black part BM2' may be that the first side BM2S1 and the second side BM2S2 are adjacent to the second substrate 118, respectively. In an embodiment, the arrangement relationship of the opposite edges of the second black part BM2' for other elements may be similar to the first side BM2S1 and the second side BM2S2 of the second black part BM2 as described in FIG. 7 for other elements Configuration relationship. For example, when the second black part BM2' is substituted for the second black part BM2, the two opposite edges of the second black part BM2' are substantially aligned with the first side DLS3 and the second side DLS4 of the second line segment DLP2, respectively.

綜上所述,本發明的實施例的畫素結構中,第二子畫素的第二畫素電極及第四子畫素的第四畫素電極之間並未配置黑矩陣層;或者,黑矩陣層具有第二黑部件設置於第二子畫素的第二畫素電極及第四子畫素的第四畫素電極之間,且第二黑部件的寬度比設置在第一子畫素的第一畫素電極及第三子畫素的第三畫素電極之間的第一黑部件窄。因此,本發明的實施例的畫素結構可具有較高的開口率。In summary, in the pixel structure of the embodiment of the present invention, no black matrix layer is arranged between the second pixel electrode of the second sub-pixel and the fourth pixel electrode of the fourth sub-pixel; or, The black matrix layer has a second black member disposed between the second pixel electrode of the second sub-pixel and a fourth pixel electrode of the fourth sub-pixel, and the width ratio of the second black member is disposed on the first sub-pixel The first black member between the first pixel electrode of the pixel and the third pixel electrode of the third sub-pixel is narrow. Therefore, the pixel structure of the embodiment of the present invention may have a higher aperture ratio.

綜上所述,雖然本發明已以實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。In summary, although the present invention has been disclosed as above with examples, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs can make various modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be deemed as defined by the scope of the attached patent application.

102、202、302、402、502‧‧‧畫素結構102, 202, 302, 402, 502‧‧‧ pixel structure

104、304、404、504‧‧‧主動元件陣列基板 104, 304, 404, 504‧‧‧ active element array substrate

106、206‧‧‧彩色濾光基板 106, 206‧‧‧ color filter substrate

CL1、CL2‧‧‧訊號線 CL1, CL2 ‧‧‧ signal line

112‧‧‧第一基板 112‧‧‧The first substrate

114‧‧‧第一絕緣層 114‧‧‧First insulation layer

116‧‧‧第二絕緣層 116‧‧‧Second insulation layer

118‧‧‧第二基板 118‧‧‧Second substrate

120‧‧‧電極層 120‧‧‧electrode layer

BL、BL'‧‧‧黑色材料層 BL, BL'‧‧‧Black material layer

BM、BM'、BM''‧‧‧黑矩陣層 BM, BM', BM''‧‧‧Black matrix layer

BM1、BM1’‧‧‧第一黑部件 BM1, BM1’‧‧‧The first black part

BM2、BM2'、BM2a‧‧‧第二黑部件 BM2, BM2', BM2a ‧‧‧ second black component

BMK‧‧‧遮光幹部 BMK

BM1TS1、BM2TS2‧‧‧上表面 BM1TS1, BM2TS2 ‧‧‧ upper surface

BMW1、BMW2‧‧‧尺寸 BMW1, BMW2‧‧‧Dimensions

CE1‧‧‧第一共通電極 CE1‧‧‧The first common electrode

CE2‧‧‧第二共通電極 CE2‧‧‧Second common electrode

CEE1‧‧‧第一共通電極元件 CEE1‧‧‧The first common electrode element

CEE2‧‧‧第二共通電極元件 CEE2‧‧‧Second common electrode element

CE1S1、CE2S2‧‧‧側邊 CE1S1, CE2S2 ‧‧‧ side

CES‧‧‧共通電極線 CES‧‧‧Common electrode wire

CF1‧‧‧第一色阻 CF1‧‧‧ First color resist

CF2‧‧‧第二色阻 CF2‧‧‧Second color resist

CF3‧‧‧第三色阻 CF3‧‧‧third color resist

CF4‧‧‧第四色阻 CF4‧‧‧ Fourth color resist

CH1‧‧‧第一通道層 CH1‧‧‧ First channel layer

CH2‧‧‧第二通道層 CH2‧‧‧Second channel layer

CH3‧‧‧第三通道層 CH3‧‧‧ Third channel layer

D1‧‧‧第一方向 D1‧‧‧First direction

D2‧‧‧第二方向 D2‧‧‧Second direction

D3‧‧‧垂直投影方向 D3‧‧‧Vertical projection direction

DE1‧‧‧第一汲極 DE1‧‧‧First Drain

DE2‧‧‧第二汲極 DE2‧‧‧Second Drain

DE3‧‧‧第三汲極 DE3‧‧‧third drain

DL、DL1、DL2‧‧‧資料線 DL, DL1, DL2 ‧‧‧ data cable

DLP1‧‧‧第一線段 DLP1‧‧‧The first line

DLP2‧‧‧第二線段 DLP2‧‧‧Second line

DLS1、DLS3、BM1S1、BM2S1、BMKS1‧‧‧第一側邊 DLS1, DLS3, BM1S1, BM2S1, BMKS1‧‧‧First side

DLS2、DLS4、BM1S2、BM2S2、BMKS2‧‧‧第二側邊 DLS2, DLS4, BM1S2, BM2S2, BMKS2‧‧‧Second side

BM1S3‧‧‧第三側邊 BM1S3‧‧‧third side

BMW1、BMW2、DLW1、DLW2‧‧‧尺寸 BMW1, BMW2, DLW1, DLW2 ‧‧‧ size

LC‧‧‧顯示介質 LC‧‧‧Display medium

G1‧‧‧第一閘極 G1‧‧‧First gate

G2‧‧‧第二閘極 G2‧‧‧second gate

G3‧‧‧第三閘極 G3‧‧‧third gate

P1‧‧‧第一畫素 P1‧‧‧ First pixel

P2‧‧‧第二畫素 P2‧‧‧ Second pixel

P3‧‧‧第三畫素 P3‧‧‧ third pixel

P4‧‧‧第四畫素 P4‧‧‧ fourth pixel

OV‧‧‧交疊區域 OV‧‧‧ overlapping area

Q‧‧‧間距 Q‧‧‧spacing

PE1‧‧‧第一畫素電極 PE1‧‧‧The first pixel electrode

PE2‧‧‧第二畫素電極 PE2‧‧‧Second pixel electrode

PE3‧‧‧第三畫素電極 PE3‧‧‧third pixel electrode

PE4‧‧‧第四畫素電極 PE4‧‧‧The fourth pixel electrode

PS‧‧‧間隔元件 PS‧‧‧Spacer

SE1‧‧‧第一源極 SE1‧‧‧First source

SE2‧‧‧ SE2‧‧‧

SE3‧‧‧第三源極 SE3‧‧‧third source

SL‧‧‧掃描線 SL‧‧‧scan line

SP1、SP1'‧‧‧第一子畫素 SP1, SP1'‧‧‧The first sub-pixel

SP2、SP2'‧‧‧第二子畫素 SP2, SP2'‧‧‧Second sub-pixel

SP3、SP3'‧‧‧第三子畫素 SP3, SP3'‧‧‧third sub-pixel

SP4、SP4'‧‧‧第四子畫素 SP4, SP4'‧‧‧fourth sub-pixel

T1‧‧‧第一開關元件 T1‧‧‧ First switching element

T2‧‧‧第二開關元件 T2‧‧‧Second switching element

T3‧‧‧第三開關元件 T3‧‧‧ third switching element

T4‧‧‧第四開關元件 T4‧‧‧ fourth switching element

T5‧‧‧第五開關元件 T5‧‧‧ fifth switching element

T6‧‧‧第六開關元件 T6‧‧‧Sixth switching element

V1、V2、V3、V4‧‧‧接觸窗 V1, V2, V3, V4 ‧‧‧ contact window

第1圖是依照本發明的一實施例的畫素結構之主動元件陣列基板的示意圖。 第2圖是依照本發明的一實施例的畫素結構之彩色濾光基板的示意圖。 第3圖是依照本發明的一實施例的畫素結構的剖面圖。 第4圖繪示依照本發明的一實施例的畫素結構之色阻、黑矩陣層與資料線的配置示意圖。 第5圖是依照本發明的另一實施例的畫素結構之彩色濾光基板的示意圖。 第6圖繪示依照本發明的另一實施例的畫素結構之色阻、黑矩陣層與資料線的配置示意圖。 第7圖是依照本發明的另一實施例的畫素結構的剖面圖。 第8圖繪示依照本發明的再一實施例的畫素結構的剖面圖。 第9圖繪示依照本發明的再一實施例的畫素結構的剖面圖。 第10圖繪示依照本發明的再一實施例的畫素結構的剖面圖。 第11圖顯示一實施例中彩色濾光基板在第一黑部件附近的剖面圖。 第12圖顯示一實施例中彩色濾光基板在第二黑部件附近的剖面圖。FIG. 1 is a schematic diagram of a pixel structure active device array substrate according to an embodiment of the invention. FIG. 2 is a schematic diagram of a color filter substrate with a pixel structure according to an embodiment of the invention. FIG. 3 is a cross-sectional view of a pixel structure according to an embodiment of the invention. FIG. 4 is a schematic diagram of color resist, black matrix layer and data lines of a pixel structure according to an embodiment of the invention. FIG. 5 is a schematic diagram of a color filter substrate with a pixel structure according to another embodiment of the invention. FIG. 6 is a schematic diagram showing the arrangement of the color resist, the black matrix layer and the data line of the pixel structure according to another embodiment of the invention. FIG. 7 is a cross-sectional view of a pixel structure according to another embodiment of the invention. 8 is a cross-sectional view of a pixel structure according to yet another embodiment of the invention. FIG. 9 is a cross-sectional view of a pixel structure according to yet another embodiment of the invention. FIG. 10 is a cross-sectional view of a pixel structure according to yet another embodiment of the invention. FIG. 11 shows a cross-sectional view of the color filter substrate in the vicinity of the first black member in an embodiment. FIG. 12 shows a cross-sectional view of the color filter substrate in the vicinity of the second black member in an embodiment.

Claims (11)

一種畫素結構,包括: 一第一畫素,包括一第一色阻; 一第二畫素,包括一第二色阻,該第一色阻與該第二色阻排列在一第一方向上; 一資料線,包括延伸在一第二方向上的一第一線段與一第二線段,該第一方向與該第二方向彼此交錯;及 一黑矩陣層,包括一第一黑部件,其中該第一黑部件與該第一線段重疊,且未與該第二線段重疊;其中 該第一色阻與該第二色阻彼此堆疊以形成一交疊區域,該交疊區域重疊於該第二線段上,而設置於該第一黑部件上的該第一色阻與該第二色阻彼此不交疊。A pixel structure, including: a first pixel, including a first color resist; a second pixel, including a second color resist, the first color resist and the second color resist are arranged on a first side Upward; a data line, including a first line segment and a second line segment extending in a second direction, the first direction and the second direction are interlaced with each other; and a black matrix layer, including a first black component , Wherein the first black component overlaps with the first line segment and does not overlap with the second line segment; wherein the first color resist and the second color resist are stacked on each other to form an overlapping region, the overlapping region overlaps On the second line segment, the first color resist and the second color resist provided on the first black component do not overlap each other. 如申請專利範圍第1項所述之畫素結構,其中該第一黑部件具有相對的一第一側邊與一第二側邊,該第一色阻堆疊於該第一側邊上,以及該第二色阻堆疊於該第二側邊上。The pixel structure as described in item 1 of the patent application scope, wherein the first black component has a first side and a second side opposite to each other, the first color resist is stacked on the first side, and The second color resist is stacked on the second side. 如申請專利範圍第1項所述之畫素結構,其中該第一黑部件在該第一方向上的尺寸係大於該第二線段在該第一方向上的尺寸。The pixel structure as described in item 1 of the patent application scope, wherein the size of the first black component in the first direction is larger than the size of the second line segment in the first direction. 如申請專利範圍第1項所述之畫素結構,其中該第二線段未與該黑矩陣層重疊。The pixel structure as described in item 1 of the patent application scope, wherein the second line segment does not overlap with the black matrix layer. 如申請專利範圍第1項所述之畫素結構,其中該黑矩陣層更包括一第二黑部件,該第二黑部件與該第二線段重疊,且該第二黑部件與該交疊區域重疊。The pixel structure as described in item 1 of the patent application, wherein the black matrix layer further includes a second black component, the second black component overlaps the second line segment, and the second black component overlaps the overlapping area overlapping. 如申請專利範圍第5項所述之畫素結構,其中該第一黑部件在該第一方向上的尺寸係大於該第二黑部件在該第一方向上的尺寸。The pixel structure as described in item 5 of the patent application scope, wherein the size of the first black component in the first direction is larger than the size of the second black component in the first direction. 如申請專利範圍第5項所述之畫素結構,其中該第二黑部件在該第一方向上的尺寸係等於或小於該第二線段在該第一方向上的尺寸。The pixel structure as described in item 5 of the patent application scope, wherein the size of the second black component in the first direction is equal to or smaller than the size of the second line segment in the first direction. 如申請專利範圍第1項所述之畫素結構,更包括相對設置的一第一基板與一第二基板,其中該資料線設置在該第一基板上,且該黑矩陣層、該第一色阻與該第二色阻設置在該第二基板上。The pixel structure as described in item 1 of the patent application scope further includes a first substrate and a second substrate disposed oppositely, wherein the data line is disposed on the first substrate, and the black matrix layer, the first The color resist and the second color resist are disposed on the second substrate. 如申請專利範圍第1項所述之畫素結構,其中該第一畫素包括排列在該第二方向上的一第一子畫素與一第二子畫素,以及一第一共通電極,而該第一共通電極與該第一黑部件重疊。The pixel structure as described in item 1 of the patent application scope, wherein the first pixel includes a first sub-pixel and a second sub-pixel arranged in the second direction, and a first common electrode, The first common electrode overlaps the first black part. 如申請專利範圍第9項所述之畫素結構,其中該第二畫素包括排列在該第二方向上的一第三子畫素與一第四子畫素,以及一第二共通電極,而該第二共通電極與該第一黑部件重疊。The pixel structure as described in item 9 of the patent application scope, wherein the second pixel includes a third sub-pixel and a fourth sub-pixel arranged in the second direction, and a second common electrode, The second common electrode overlaps the first black part. 如申請專利範圍第1項所述之畫素結構,其中該第一線段與該第二線段在該第一方向上的尺寸係實質上相同。The pixel structure as described in item 1 of the patent application scope, wherein the dimensions of the first line segment and the second line segment in the first direction are substantially the same.
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