TWI664885B - Fabricating method of double-sided circuit board and double-sided circuit board - Google Patents

Abstract

A manufacturing method of a double-sided circuit substrate and a double-sided circuit substrate. The manufacturing method includes: providing a substrate, wherein the substrate includes a first surface and a second surface, and the first surface and the second surface are opposite to each other; forming a first alignment mark and The first patterned line is on the first surface; the position of the first alignment mark is sensed by the optical positioning device; the second alignment mark is formed on the second surface according to the position of the first alignment mark; Measuring the position of the second alignment mark; and forming a second patterned line on the second surface according to the position of the second alignment mark, wherein the second patterned line is aligned with the first patterned line in a normal direction of the substrate.

Description

Manufacturing method of double-sided circuit substrate and double-sided circuit substrate

The present invention relates to a method for manufacturing a circuit substrate, and more particularly, to a method for manufacturing a double-sided circuit substrate and a double-sided circuit substrate.

The existing display device includes a display panel. The display panel includes a substrate, a plurality of pixel units, and a plurality of edge elements. The substrate includes a display area and an edge area surrounding the display area. The pixel unit is disposed in the display area, and the edge elements are Set in the edge area, the edge element will be further connected to the corresponding pixel unit. The edge element can be used to drive the pixel unit or can also be used as the ground line of the pixel unit. The display area of the display panel can present an image, while the edge area is a dark area and cannot present an image. Therefore, the display device may have a frame to cover the edge region, and only the display region is exposed. In addition, there is also a spliced display device. This spliced display device has multiple display panels. These display panels are arranged and spliced together in a matrix manner to present a large-sized image.

Judging from the surface area of the substrate, if the proportion of the edge area is larger, the frame of the display device will be thicker, or the dark area between two adjacent display panels of the spliced display device will be more obvious. In order to reduce the proportion of the edge area, there is a conventional double-sided substrate. The pixel unit is disposed on the upper surface of the double-sided substrate, and at least part of the edge elements are disposed on the lower surface of the double-sided substrate. In this way, fewer components need to be provided in the edge area, and the proportion of the edge area can be reduced.

In the existing double-sided substrate, the pixel unit and some edge elements can be respectively disposed on the upper surface and the lower surface of the substrate, thereby reducing the proportion of the edge region of the substrate. However, since the pixel unit and the corresponding edge element need to be electrically connected, the pixel unit and the corresponding edge element located on the upper and lower surfaces, respectively, must be accurately aligned with each other. In the prior art, there are only alignment marks on one of the upper and lower surfaces for alignment, so that it is difficult to accurately align the components on the upper and lower surfaces, which may cause electrical connection failure. In addition, the components on the upper and lower surfaces that can block light cannot be accurately overlapped, resulting in an increase in light-shielding areas and affecting the image presentation effect of the final product.

At least one embodiment of the present invention provides a method for manufacturing a double-sided circuit substrate and a double-sided circuit substrate, so that components on two opposite surfaces of the double-sided circuit substrate can be accurately positioned.

At least one embodiment of the present invention provides a method for manufacturing a double-sided circuit substrate and a double-sided circuit substrate, so as to avoid electrical connection failure of components on opposite two surfaces, and avoid an increase in a light-shielding area.

At least one embodiment of the present invention provides a method for manufacturing a double-sided circuit substrate, which includes: providing a substrate, wherein the substrate includes a first surface and a second surface, and the first surface and the second surface are opposite to each other; forming a first alignment The mark and the first patterned line are on the first surface; the position of the first registration mark is sensed by an optical positioning device; a second registration mark is formed on the second surface according to the position of the first registration mark; The device senses the position of the second alignment mark; and forms a second patterned line on the second surface according to the position of the second alignment mark, wherein the second patterned line is aligned with the first patterned line in a normal direction of the substrate. line.

At least one embodiment of the present invention provides a double-sided circuit substrate, which includes a substrate, a first alignment mark, a first patterned circuit, a second alignment mark, and a second patterned circuit. The substrate includes a first surface and a second surface, and the first surface and the second surface are opposed to each other. The first alignment mark is located on the first surface, and the first patterned line is located on the first surface. The second registration mark is located on the second surface, wherein the projection of the second registration mark in the normal direction of the substrate is related to the first registration mark. The second patterned line is located on the second surface, wherein the second patterned line is aligned with the first patterned line in a normal direction.

In summary, according to the present invention, a method for manufacturing a double-sided circuit substrate and various embodiments of the double-sided circuit substrate enable precise positioning of components on opposite two surfaces during the manufacturing process of the double-sided circuit substrate, so that The corresponding components on the opposite two surfaces can be accurately aligned with each other, thereby avoiding the possibility of failure of the electrical connection of the corresponding components on the opposite two surfaces, and also preventing the increase of the light-shielding area.

The detailed features and advantages of the present invention are described in detail in the following embodiments. The content is sufficient for anyone familiar with the relevant technology to understand and implement the technical content of the present invention, and according to the content disclosed in this specification, the scope of patent applications and the drawings. Anyone skilled in the relevant art can easily understand the related objects and advantages of the present invention.

Please refer to FIGS. 1 and 2. FIG. 1 is a schematic top view of a double-sided circuit substrate 20 according to an embodiment of the present invention, and FIG. 2 is a schematic bottom view of the double-sided circuit substrate 20 of FIG. 1. In this embodiment, the double-sided circuit substrate 20 is used to make a display panel, but is not limited thereto. The double-sided circuit substrate 20 includes a substrate 100, a first alignment mark 210 and a second alignment mark 220. The substrate 100 includes a first surface 110 and a second surface 120, and the first surface 110 and the second surface 120 are opposed to each other. The first registration mark 210 is located on the first surface 110, and the second registration mark 220 is located on the second surface 120. In this embodiment, the substrate 100 can be divided into a wiring region 130 and an edge region 140. The wiring area 130 can be used to set an electronic circuit module that can be used for displaying images, such as a pixel unit of a display panel and an active component included in the pixel unit. The edge region 140 surrounds the wiring region 130, and the edge region 140 is provided with a first alignment mark 210 and a second alignment mark 220.

As shown in FIG. 1 and FIG. 2, in this embodiment, the wiring area 130 can be divided into four panel areas 150, and these panel areas 150 can be respectively cut into independent panels, and these independent panels can be used as display devices respectively. The single display panel can also be used as multiple display panels that are spliced in a matrix in a spliced display device. Moreover, in the process of further cutting the double-sided circuit substrate 20 to form a display panel, the edge region 140 will be cut away, and only the panel region 150 will be left as a display panel. The registration mark 210 and the second registration mark 220 will also be removed without being part of the display panel. In some embodiments, the wiring area 130 may also be divided into various numbers of panel areas 150 such as two, three, five, or more than six, and each panel area 150 may be individually cut into independent panels to serve as individual panels. A display panel of a single display device; or, the wiring area 130 may be divided into only a single panel area 150.

Please refer to FIG. 3 again, which is a schematic cross-sectional view at line 3-3 in FIG. 1. The double-sided circuit substrate 20 further includes a first patterned circuit 300 and a second patterned circuit 400. The first patterned circuit 300 is located on the first surface 110 and the second patterned circuit 400 is located on the second surface 120. As shown in FIG. 1 to FIG. 3, in this embodiment, the first patterned wiring 300 is located on the first surface 110 of the wiring area 130, and the second patterned wiring 400 is located on the second surface 120 of the wiring area 130. And the second patterned line 400 is aligned with the first patterned line 300 in the normal direction ND of the substrate 100. In addition, the first alignment mark 210 is disposed on the first surface 110 of the edge region 140, and the second alignment mark 220 is disposed on the second surface 120 of the edge region 140.

As shown in FIGS. 1 to 3, in this embodiment, the projection of the second registration mark 220 toward the normal direction ND of the substrate 100 is related to the first registration mark 210. The projection of the first registration mark 210 and the second registration mark 220 on the first surface 110 along the normal direction ND can refer to the view on the XY plane shown in FIG. 1, and the first registration mark 210 and the first registration mark 210 For the projection of the two registration marks 220 on the second surface 120 along the normal direction ND, refer to the view on the XY plane shown in FIG. 2. For example, the projections of the first registration mark 210 and the second registration mark 220 on the XY plane are adjacent to each other, and the first registration mark 210 and the second registration mark 220 are located on the substrate 100 on the XY plane. Specific location. In this embodiment, there are four first alignment marks 210 and two second alignment marks 220, and four first alignment marks 210 and four second alignment marks 220 are respectively located on the XY plane of the substrate 100. Four corners, and each first alignment mark 210 is adjacent to the corresponding second alignment mark 220 on the XY plane.

In some embodiments, there are at least two first alignment marks 210, and the two first alignment marks 210 are respectively located at two corners on the diagonal of the substrate 100; and the second alignment marks 220 also have at least two And two second alignment marks 220 are respectively located at two corners on the diagonal line of the substrate 100. For example, two first alignment marks 210 and two second alignment marks 220 may be respectively disposed at the upper left corner and the lower right corner of the substrate 100 shown in FIG. 1. The first alignment mark 210 and the second alignment mark 220 are each provided with at least two settings, which can ensure that the positioning and alignment accuracy can meet the basic requirements required for the manufacturing process of the double-sided circuit substrate 20. In some embodiments, at each specific position on the XY plane, the first alignment mark 210 and the second alignment mark 220 may have one, three, or more than five, respectively.

As shown in FIG. 3, in this embodiment, the projections of the first registration mark 210 and the second registration mark 220 toward the normal direction ND of the substrate 100 do not overlap, so it is advantageous to use the first registration mark in the manufacturing process. 210 is aligned with the second alignment mark 220, and the related description is detailed later.

As shown in FIG. 1 to FIG. 3, in this embodiment, the first alignment mark 210 includes a plurality of squares 211 arranged at an interval, a plurality of squares 211 of the first alignment mark 210 are arranged at an equal interval from each other, and the first pair The square 211 of the bit mark 210 is provided with two or more in each of the X direction and the Y direction. For example, the first alignment mark 210 includes four squares 211, of which three squares 211 are arranged at regular intervals in the Y direction, and two squares 211 are arranged at regular intervals in the X direction. In the manufacturing process of the first patterned circuit 300, the production equipment needs to be positioned through the first alignment mark 210 first, so as to align the first patterned circuit 300 and form the precise position on the first surface 110. In addition, in the manufacturing process of the second registration mark 220, the production equipment also needs to first locate through the first registration mark 210, so as to align the second registration mark 220 and form the precise position on the second surface 120.

For example, the production equipment may have an optical positioning device 500 (refer to FIG. 6). Such an optical positioning device 500 is, for example but not limited to, a laser ranging device, which can scan a substrate on the XY plane. 100 的 第一 表面 110。 100 of the first surface 110. When the laser ranging device scans on the first surface 110, the waveform will not fluctuate. When the laser ranging device scans any square 211 of the first registration mark 210, a sine wave is generated, that is, That is, when the laser ranging device passes the first alignment mark 210 along the X direction, it will continuously scan the two squares 211 of the first alignment mark 210 in a short time to generate two sine waves, thereby producing equipment. It can be determined that a registration mark exists here, and then the position of the first registration mark 210 in the X direction is automatically determined according to the two sine waves; and when the laser ranging device passes the first registration mark 210 in the Y direction When the three squares 211 of the first alignment mark 210 are continuously scanned in a short time, three sine waves are generated, so that the production equipment can determine that there are alignment marks here, and then automatically based on these three sine waves The position of the first registration mark 210 in the Y direction is determined. Thereby, the production equipment can confirm and position the coordinates of the first registration mark 210 in the XY plane.

In this embodiment, the square 211 of the first alignment mark 210 has two or more settings in each of the X direction and the Y direction, which can avoid the situation of misjudgment of the production equipment. For example, if the laser ranging device scans in the X or Y direction and generates only one sine wave within a certain time (or within a certain distance moved by the laser ranging device), this means that the laser ranging device What is sensed is not the first alignment mark 210, but may be caused by other protrusions or other factors that cause this sine wave reaction, so the production equipment can filter out such situations according to an internal judgment mechanism to avoid misjudgment.

As shown in FIG. 1 to FIG. 3, in this embodiment, the second alignment mark 220 also includes a plurality of squares 221 arranged at an interval, a plurality of squares 221 of the second alignment mark 220 are arranged at equal intervals from each other, and the second Two or more squares 221 of the alignment mark 220 are provided in the X direction and the Y direction, respectively. For example, the second alignment mark 220 includes three squares 221, of which two squares 221 are arranged at regular intervals in the Y direction, and two squares 221 are arranged at regular intervals in the X direction. In the manufacturing process of the second patterned circuit 400, the production equipment needs to be positioned through the second alignment mark 220 first, so as to align the second patterned circuit 400 and form the precise position on the second surface 120. The description of the positioning of the production equipment through the second alignment mark 220 can refer to the foregoing, and in the same way, in this embodiment, the square 221 of the second alignment mark 220 has two or more settings in the X direction and the Y direction In this way, the situation of misjudgment of production equipment can be avoided.

In this embodiment, the first alignment mark 210 and the second alignment mark 220 use squares 211 and 221 as markers, and the square 211 of the first alignment mark 210 and the square 221 of the second alignment mark 220 are A square with a length of 20 micrometers in both the XY plane. In some embodiments, the markers of the first alignment mark 210 and the second alignment mark 220 can also adopt other shapes other than squares. In this embodiment, the number of the markers of the first registration mark 210 and the number of the markers of the second registration mark 220 are different. For example, there are four squares 211 of the first alignment mark 210 and three squares 221 of the second alignment mark 220. In some embodiments, the number of the markers of the first alignment mark 210 and the number of the markers of the second alignment mark 220 may be the same.

As shown in FIG. 3, in this embodiment, the first patterned circuit 300 includes a first circuit layer 310, a first insulation layer 320, a semiconductor layer 330, and a second circuit layer 340. The first circuit layer 310 includes a gate G, and the gate G is adjacent to the first surface 110. The first insulating layer 320 is adjacent to the first surface 110 and covers the gate electrode G in a normal direction ND of the substrate 100. The semiconductor layer 330 covers the first insulating layer 320 and overlaps the gate electrode G in the normal direction ND of the substrate 100. The second circuit layer 340 includes a source S and a drain D, the source S and the drain D are covered on the semiconductor layer 330, and the source S and the drain D are not in direct contact with each other. The source S and the drain D overlap the gate G in the normal direction ND of the substrate 100, and the source S and the drain D are connected to each other through the semiconductor layer 330. In this embodiment, the first patterned circuit 300 may be used as an active element on a display panel for driving a pixel unit (not shown), but is not limited thereto.

As shown in FIG. 3, in this embodiment, the second patterned circuit 400 includes a third circuit layer 410, a second insulation layer 420, and a fourth circuit layer 430. The third circuit layer 410 is adjacent to the second surface 120. The second insulating layer 420 is adjacent to the second surface 120 and covers a portion of the third circuit layer 410 in the normal direction ND of the substrate 100. The fourth wiring layer 430 covers the second insulating layer 420, and the fourth wiring layer 430 contacts the third wiring layer 410 in the normal direction ND of the substrate 100. In this embodiment, the second patterned circuit 400 can be used as a driving element for driving the first patterned circuit 300, such as a driving element that can transmit a signal or power to the gate G, but is not limited thereto.

In this embodiment, the first patterned circuit 300 is a second patterned circuit 400 that is electrically connected. For example, the gate G and the first gate of the first circuit of the first patterned circuit 300 shown in FIG. 3 The third circuit layers 410 of the two patterned circuits 400 are electrically connected to each other. In some embodiments, the gate electrode G and the third circuit layer 410 may be electrically connected to each other through a via hole (not shown) passing through the corresponding position of the substrate 100. The via hole is, for example, a glass via hole (Through Glass Via, TGV), but not limited to this.

As shown in FIG. 3, in this embodiment, the first patterned circuit 300 further includes an ohmic contact layer 350. The ohmic contact layer 350 covers a part of the semiconductor layer 330, and the ohmic contact layer 350 is located between the source S and the semiconductor layer 330 and between the drain D and the semiconductor layer 330. The ohmic contact layer 350 helps reduce the resistance between the source S and the semiconductor layer 330 and the resistance between the drain D and the semiconductor layer 330. In this embodiment, the first circuit layer 310 further includes a ground line COM, the second circuit layer 340 further includes a transmission line M, and the first patterned line 300 further includes a transparent conductive layer 360. The ground line COM is adjacent to the first surface 110, and the first insulation layer 320 covers the ground line COM in the normal direction ND of the substrate 100. The first patterned line 300 can be grounded through the ground line COM. The transmission line M is adjacent to the first insulating layer 320 and overlaps the ground line COM in the normal direction ND of the substrate 100. The transparent conductive layer 360 is adjacent to the first insulating layer 320 and covers the transmission line M and part of the drain electrode D in the normal direction ND of the substrate 100. The transmission line M and the drain electrode D can be electrically connected to each other through the transparent conductive layer 360. The transmission line A signal or power can be transmitted between M and the drain electrode D through the transparent conductive layer 360.

Regarding the aforementioned second patterned circuit 400 and the first patterned circuit 300 are disposed in alignment with each other in the normal direction ND of the substrate 100, for example, the third circuit layer 410 and the first pattern of the second patterned circuit 400 The gates G of the first circuit layer 310 of the semiconductor circuit 300 are aligned with each other in the normal direction ND of the substrate 100, and the third circuit layer 410 and the gate G completely overlap in the normal direction ND of the substrate 100. That is, the contours of the third circuit layer 410 and the gate G projected on the XY plane are equal in shape and size and completely overlap, or the smaller contour completely overlaps the larger contour. When the materials of the gate electrode G and the third circuit layer 410 are opaque metal, the gate electrode G and the third circuit layer 410 are completely overlapped with each other in the normal direction ND of the substrate 100, so that the gate electrode G and the third circuit layer 410 can be overlapped. The area (hereinafter referred to as a light-shielding area) that will block light in the light emitting direction (corresponding to the normal direction ND of the substrate 100) with the third circuit layer 410 is minimized. Conversely, if the gate G and the third circuit layer 410 do not overlap at all in the normal direction ND of the substrate 100, the light shielding area thereof is maximized. If the gate electrode G and the third circuit layer 410 partially overlap in the normal direction ND of the substrate 100, the light-shielding area of the gate electrode G and the third circuit layer 410 will still be larger than the light-shielding area when they are completely overlapped. Generally, in order to make the image clearer and brighter, it is desirable to minimize the light-shielding area caused by the components on the substrate 100 as much as possible. In addition, in order for the third circuit layer 410 and the gate G to be electrically connected to each other through the vias on the substrate 100, the third circuit layer 410 and the gate G also need to be on the substrate 100 in the manufacturing process. The line directions ND are precisely aligned with each other.

It can be known from the above that, in the manufacturing process of the double-sided circuit substrate 20, the production equipment needs to realize accurate positioning and alignment through the first alignment mark 210 and the second alignment mark 220, so that the first patterned line 300 and the first The two patterned lines 400 can be accurately aligned with each other.

Please refer to FIG. 4 and FIGS. 5 to 14. FIG. 4 shows a flowchart of a method for manufacturing a double-sided circuit board 20 according to an embodiment of the present invention. The manufacturing process schematic diagram of the surface circuit substrate 20 is one to ten. Each step in FIG. 4 may correspond to FIGS. 5 to 14, and the double-sided circuit substrate 20 manufactured in FIGS. 4 and 5 to 14 is, for example, but not limited to, the double-sided circuit substrate 20 shown in FIGS. 1 to 3. Therefore, for the structure and connection relationship of related elements, reference may be made to FIG. 1 to FIG. 3 and the foregoing related description, and details are not described herein again. The manufacturing process of the double-sided circuit board 20 will be described below.

As shown in FIG. 5, in this embodiment, a substrate 100 is first provided, for example, a pre-processed glass substrate 100, and the substrate 100 is fixed on a specific platform (not shown) of the production equipment. Tools for subsequent processes. Next, as shown in FIGS. 4 and 5, step S101 is to form a metal layer MT1 on the first surface 110 of the substrate 100.

As shown in FIGS. 4 and 6, step S103 is to form a first alignment mark 210 and a first circuit layer 310 on the first surface 110. In this step, the metal layer MT1 may be patterned into a first alignment mark 210 and a first circuit layer 310 through a patterning process such as exposure, development, and etching. That is, the first alignment layer 310 and the first alignment mark 210 are formed together by the same metal layer MT1 and the same process, and the materials of the first alignment mark 210 and the first alignment layer 310 are the same. As mentioned above, the optical positioning device 500 can be used to sense the first alignment mark 210 completed in this step to meet the positioning and alignment requirements of subsequent processes. In this embodiment, the optical positioning device 500 may include a laser ranging device, but is not limited thereto.

As shown in FIG. 4 and FIG. 7, step S105 is to form a first patterned circuit 300 on the first surface 110 according to the position of the first alignment mark 210. In this step, the production equipment can position the first registration mark 210 through the optical positioning device 500, and form a first patterned circuit 300 according to the position of the first registration mark 210. For example, after the first circuit layer 310 and the first alignment mark 210 are formed together, the production equipment can further perform a patterning process such as exposure, development, and etching according to the position of the first alignment mark 210 to further convert the first The other elements of a patterned circuit 300 are aligned at predetermined positions, such as the aforementioned first insulating layer 320, semiconductor layer 330, ohmic contact layer 350, second circuit layer 340, and transparent conductive layer 360.

In some embodiments, the first alignment mark 210 may also be formed on the first surface 110, and then the first circuit layer 310 and other elements of the first patterned circuit 300 are formed according to the position of the first alignment mark 210. Or, the first alignment mark 210 may be formed with any of the other elements of the first patterned circuit 300. In this case, the formation of the first patterned circuit 300 may also be aligned by other positioning tools.

As shown in FIGS. 4 and 8, step S107 is forming a transparent film layer TF and a photoresist layer PR1 on the second surface 120. In this step, the first patterned circuit 300 on the first surface 110 of the substrate 100 has been completed, so the substrate 100 on a specific platform can be turned 180 degrees with the second surface 120 facing upward for subsequent second Fabrication of patterned circuit 400. Next, a transparent film layer TF is first formed on the second surface 120, and then a photoresist layer PR1 is formed on the transparent film layer TF. Since the substrate 100 itself and the transparent film layer TF on the second surface 120 are transparent, the optical positioning device 500 can penetrate the transparent film layer TF of the second surface 120 and the substrate 100 to sense the first film located on the first surface 110. A pair of bit marks 210. For example, after the substrate 100 is turned over and the second surface 120 forms a transparent film layer TF, the optical positioning device 500 first penetrates the transparent film layer TF of the second surface 120 to sense and position the first alignment mark 210. Then, a photoresist layer PR1 is formed, and subsequent processes are performed.

As shown in FIG. 4 and FIGS. 9 to 11, step S109 is to group the photoresist layer PR1 and the transparent film layer TF to form a second alignment mark 220 on the second surface 120 according to the position of the first alignment mark 210. on. In this step, the production equipment can position the first registration mark 210 through the optical positioning device 500 and form a second registration mark 220 according to the position of the first registration mark 210. Moreover, as shown in FIG. 9, the production equipment patterns the photoresist layer PR1 according to the position of the first alignment mark 210. Next, as shown in FIG. 10, the production equipment performs processes such as etching according to the patterned photoresist layer PR1, and accordingly pattern the transparent film layer TF. Finally, as shown in FIG. 11, the production equipment removes the patterned photoresist layer PR1, and the remaining transparent film layer TF is the second alignment mark 220. In other words, the second alignment mark 220 is formed by patterning the transparent film layer TF according to the position of the first alignment mark 210. In this embodiment, in the process of forming the second registration mark 220, since the production equipment needs to sense the position of the first registration mark 210 through the optical positioning device 500 to form the second registration mark 220, the first pair The alignment mark 210 and the second alignment mark 220 do not overlap each other in the normal direction ND, so as to prevent the second alignment mark 220 from blocking the first alignment mark 210 and affecting the sensing of the optical positioning device 500.

As shown in FIGS. 4 and 12, step S111 is forming a metal layer MT2 and a photoresist layer PR2 on the second surface 120. In this step, a metal layer MT2 is first formed on the second surface 120, and then a photoresist layer PR2 is formed on the metal layer MT2. Moreover, the production equipment can sense the position of the second alignment mark 220 through the optical positioning device 500. For example, the metal layer MT2 will cover the second alignment mark 220 in the normal direction ND of the substrate 100 and bulge. Accordingly, the photoresist layer PR2 will also correspond to the second alignment mark in the normal direction ND. Uplift at 220. The optical positioning device 500 can sense the position of the second registration mark 220 through the bulge.

As shown in FIGS. 4 and 13, step S113 is to group the photoresist layer PR2 and the metal layer MT2 to form a third circuit layer 410 on the second surface 120 according to the position of the second alignment mark 220. In this step, the production equipment can position the second alignment mark 220 through the optical positioning device 500, and form a third circuit layer 410 of the second patterned line 400 according to the position of the second alignment mark 220. . For example, the production equipment is to pattern the photoresist layer PR2 and the metal layer MT2 through a patterning process such as exposure, development, and etching according to the position of the second alignment mark 220, and remove the patterned photoresist layer PR2. The last remaining metal layer MT2 forms a third circuit layer 410.

As shown in FIG. 4 and FIG. 14, step S115 is to form a second patterned circuit 400 on the second surface 120 according to the position of the second alignment mark 220. In this step, the production equipment can position the second alignment mark 220 through the optical positioning device 500 and form a second patterned circuit 400 according to the position of the second alignment mark 220. For example, after the third circuit layer 410 is formed, the production equipment can continue to form other elements of the second patterned circuit 400 through a patterning process such as exposure, development, and etching according to the position of the second alignment mark 220. For example, the second insulating layer 420 and the fourth circuit layer 430. After the fabrication of the second patterned circuit 400 is completed, the double-sided circuit substrate 20 is also completed accordingly.

According to the foregoing process description, since the position of the second patterned circuit 400 is exactly corresponding to the position of the second registration mark 220, and the position of the second registration mark 220 is exactly corresponding to the first registration mark 210, and the first The position of the pair of bit marks 210 is exactly corresponding to the first patterned line 300. Therefore, the position of the second patterned line 400 may be exactly corresponding to the position of the first patterned line 300, and the second patterned line 400 is on the substrate. In the normal direction ND of 100, the first patterned line 300 is precisely aligned. For example, the third circuit layer 410 of the second patterned circuit 400 is precisely aligned with the gate G of the first circuit layer 310 of the first patterned circuit 300 in the normal direction ND of the substrate 100 to facilitate the third circuit. The electrical connection between the layer 410 and the gate G through the aforementioned vias of the substrate 100 is also beneficial to minimize the aforementioned light-shielding area caused by the third circuit layer 410 and the gate G.

In summary, according to the present invention, a method for manufacturing a double-sided circuit substrate and various embodiments of the double-sided circuit substrate enable the precision of the double-sided circuit substrate manufacturing process through the alignment marks on the opposite two surfaces. Position and make the corresponding components on the opposite two surfaces accurately align with each other according to the alignment marks when making them. In this way, the corresponding components on the opposite two surfaces can be accurately connected to avoid the corresponding components on the opposite two surfaces. The electrical connection fails, and the light-shielding area can be minimized to avoid increasing the light-shielding area.

Although the technical content of the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art who makes some changes and retouches without departing from the spirit of the present invention should be covered by the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the appended patent application.

20‧‧‧ double-sided circuit board

100‧‧‧ substrate

110‧‧‧first surface

120‧‧‧Second surface

130‧‧‧Wiring area

140‧‧‧ Fringe

150‧‧‧ panel area

210‧‧‧ First registration mark

211‧‧‧box

220‧‧‧Second registration mark

221‧‧‧box

300‧‧‧The first patterned circuit

310‧‧‧First circuit layer

320‧‧‧The first insulation layer

330‧‧‧Semiconductor layer

340‧‧‧Second circuit layer

350‧‧‧ohm contact layer

360‧‧‧ transparent conductive layer

400‧‧‧ The second patterned line

410‧‧‧Third circuit layer

420‧‧‧Second insulation layer

430‧‧‧Fourth circuit layer

500‧‧‧ optical positioning device

COM‧‧‧ ground wire

D‧‧‧ Drain

G‧‧‧Gate

M‧‧‧ Transmission line

MT1, MT2‧‧‧ metal layer

ND‧‧‧normal direction

PR1, PR2‧‧‧Photoresistive layer

S‧‧‧Source

TF‧‧‧ transparent film

S101‧‧‧ forming a metal layer on the first surface

S103‧‧‧ forming a first alignment mark and a first circuit layer on the first surface

S105‧‧‧ forming a first patterned line on the first surface according to the position of the first alignment mark

S107‧‧‧ forming a transparent film layer and a photoresist layer on the second surface

S109‧‧‧ According to the position of the first alignment mark, the photoresist layer and the transparent film layer are formed to form a second alignment mark on the second surface.

S111‧‧‧ forming a metal layer and a photoresist layer on the second surface

S113‧‧‧ According to the position of the second alignment mark, the photoresist layer and the metal layer are grouped to form a third circuit layer on the second surface.

S115‧‧‧ forming a second patterned line on the second surface according to the position of the second registration mark

FIG. 1 is a schematic top view of a double-sided circuit substrate according to an embodiment of the present invention; FIG. 2 is a schematic bottom view of the double-sided circuit substrate of FIG. 1; FIG. 4 is a flowchart of a method for manufacturing a double-sided circuit substrate according to an embodiment of the present invention; FIG. 5 is a schematic diagram of a manufacturing process of a double-sided circuit substrate according to an embodiment of the present invention; FIG. 6 is shown in FIG. FIG. 7 is a process schematic diagram 2 of a double-sided circuit substrate according to an embodiment of the present invention; FIG. 7 is a process schematic diagram 3 of a double-sided circuit substrate according to an embodiment of the present invention; FIG. 8 is a double-sided circuit substrate according to an embodiment of the present invention Schematic diagram 4 of the manufacturing process of the substrate; FIG. 9 shows a schematic diagram of the manufacturing process of the double-sided circuit substrate according to an embodiment of the present invention; FIG. 10 shows a schematic diagram of the manufacturing process of the double-sided circuit substrate according to an embodiment of the present invention; FIG. 12 is a schematic diagram of a manufacturing process of a double-sided circuit substrate according to an embodiment of the present invention; FIG. 12 is a schematic diagram of a manufacturing process of a double-sided circuit substrate according to an embodiment of the present invention; Schematic diagram 9 of the manufacturing process of the substrate; And FIG. 14 is a schematic diagram 10 of a manufacturing process of a double-sided circuit substrate according to an embodiment of the present invention.

Claims (10)

A method for manufacturing a double-sided circuit substrate includes: providing a substrate, wherein the substrate includes a first surface and a second surface, and the first surface and the second surface are opposite to each other; forming a first alignment mark and A first patterned line on the first surface; the position of the first alignment mark is sensed by an optical positioning device; a second alignment mark is formed on the second surface according to the position of the first alignment mark Above, wherein the substrate is located between the first alignment mark and the second alignment mark; the position of the second alignment mark is sensed by the optical positioning device; and a first alignment mark is formed according to the position of the second alignment mark. A second patterned line is on the second surface, wherein the second patterned line is aligned with the first patterned line in a normal direction of the substrate, and the substrate is located on the first patterned line and the second pattern Between the lines. The method for manufacturing a double-sided circuit substrate according to claim 1, wherein the step of forming the second alignment mark on the second surface according to the position of the first alignment mark further comprises: coating a transparent film layer on the A second surface; and patterning the transparent film layer according to the position of the first registration mark to form the second registration mark. The method for manufacturing a double-sided circuit substrate according to claim 1, wherein the step of forming the first alignment mark and the first patterned circuit on the first surface further comprises: forming a metal layer on the first surface Patterning the metal layer to form a first circuit layer of the first alignment mark and the first patterned line; and forming an insulation of the first patterned line according to the position of the first alignment mark Layer, a semiconductor layer, and a second circuit layer, wherein the insulating layer, the semiconductor layer, and the second circuit layer overlap the first circuit layer in a normal direction of the substrate. The method for manufacturing a double-sided circuit board according to claim 1, wherein the optical positioning device comprises a laser ranging device. A double-sided circuit substrate includes: a substrate including a first surface and a second surface, the first surface and the second surface being opposite to each other; a first alignment mark on the first surface; a first A patterned line on the first surface; a second alignment mark on the second surface, wherein a projection of the second alignment mark in a direction normal to the substrate is related to the first pair A bit mark, and the substrate is located between the first registration mark and the second registration mark; and a second patterned line is located on the second surface, wherein the second patterned line is in the normal direction The first patterned circuit is aligned upward, and the substrate is located between the first patterned circuit and the second patterned circuit. The double-sided circuit substrate according to claim 5, wherein the projections of the first alignment mark and the second alignment mark in a normal direction of the substrate do not overlap. The double-sided circuit board according to claim 5, wherein the first alignment mark includes a plurality of squares arranged at intervals. The double-sided circuit board according to claim 5 or 7, wherein the second alignment mark includes a plurality of squares arranged at intervals. The double-sided circuit substrate according to claim 5, wherein the first alignment mark has at least two, and the two first alignment marks are respectively located at two corners of a diagonal line of the substrate; and the second pair There are at least two bit marks, and the two second alignment marks are respectively located at two corners of a diagonal line of the substrate. The double-sided circuit substrate according to claim 5, wherein the first patterned circuit is electrically connected to the corresponding second patterned circuit.