TWI663781B - Multi-frequency antenna packaging structure - Google Patents

Abstract

The present invention provides a multi-frequency antenna packaging structure. The structure includes a first redistribution layer, an integrated circuit layer, a second redistribution layer, and an antenna unit layer. The circuit layer, the second redistribution layer and an antenna unit layer are provided with a plurality of openings that can communicate with each other, and each of the openings is filled with a conductive material to achieve electrical interconnection between the layers and reduce the multi-frequency antenna packaging structure Purpose.

Description

Multi-frequency antenna packaging structure

The present invention relates to an antenna packaging structure, and more particularly to a multi-frequency antenna packaging structure.

Antennas are an important part of communication equipment and can radiate radio frequency signals. One existing connection method for electrically connecting an antenna system to a chip system is wire bonding, where the antenna includes an antenna provided on a substrate and another antenna provided on a wafer. However, wire bonding not only causes significant power consumption of radio frequency signals, but also takes up a large space due to electrode pads used to obtain high-quality input / output.

In order to reduce the use of wire bonding, the design of an integrated antenna in a package structure has been disclosed by a public paper. However, the packaging structure is not a laminated packaging structure that electrically connects the multi-frequency antenna to the system. Compared with the existing advanced manufacturing process, the manufacturing process of the packaging structure is not stable, the mold compound vias are inconsistent, and due to the effect of warping Non-contact bonding occurred.

In view of the shortcomings of the conventional techniques, the main object of the present invention is to provide a multi-frequency antenna package structure with a reduced structure.

Another object of the present invention is to provide a method that can simultaneously use different Multi-frequency antenna package structure.

Another object of the present invention is to provide a manufacturing method for manufacturing a multi-frequency antenna.

Another object of the present invention is to provide a communication device using a multi-frequency antenna.

To achieve the above object, the present invention provides a multi-frequency antenna packaging structure, which includes a first redistribution layer, an integrated circuit layer, a second redistribution layer, and an antenna unit layer, the first redistribution layer The system includes a first dielectric material layer having a plurality of openings, and a plurality of metal layers disposed in the plurality of openings of the first dielectric material layer. The integrated circuit layer is disposed on the first redistribution layer and has At least one metal via, at least one metal pillar, an integrated circuit wafer, and a molding layer. The second redistribution layer is disposed on the integrated circuit layer and includes a first Two dielectric material layers and a plurality of second metal layers formed in the openings of the second dielectric material layer. The first antenna unit layer is disposed on the second redistribution layer and includes a first A dielectric layer and a plurality of third metal layers formed in the plurality of openings of the first dielectric layer, wherein the metal pillars and the integrated circuit wafer are disposed on the first redistribution layer, and the metal pillars are electrically connected to the One of the integrated circuit wafer and the first metal layer, the At least one of the third metal layers is electrically connected to one of the second metal layers, and the third metal layers form a first antenna unit, wherein the first antenna unit is a multiple input multiple Output phase antenna, and the height of the integrated circuit chip layer is the same as or less than the height of the metal through hole, so as to reduce the multi-frequency days Purpose of wire packaging structure.

100‧‧‧Integrated Circuit Chip

101‧‧‧ Bump Ball

102‧‧‧first protective layer

103‧‧‧First rewiring layer

104‧‧‧Integrated Circuit Layer

105‧‧‧ Second wiring layer

106‧‧‧First shielding layer

107‧‧‧First antenna layer

108‧‧‧Second protective layer

109‧‧‧first dielectric material layer

110‧‧‧first metal layer

111‧‧‧ metal pillar

112‧‧‧Second antenna unit

113‧‧‧Conductive pad

114‧‧‧Integrated Circuit

115‧‧‧Semiconductor materials

116‧‧‧moulding layer

117‧‧‧metal through hole

118‧‧‧second dielectric material layer

119‧‧‧Second metal layer

120‧‧‧Second dielectric layer

121‧‧‧ fourth metal layer

122‧‧‧ Third metal layer

123‧‧‧first dielectric layer

FIG. 1 is a schematic diagram of a multi-frequency antenna packaging structure of the present invention.

The following is a description of specific embodiments of the present invention. Those skilled in the art can understand other advantages and effects of the present invention from the content disclosed in this specification.

Please refer to FIG. 1, which is a schematic diagram of a multi-frequency antenna package structure of the present invention. As shown in the figure, the structure includes a first redistribution layer 103, an integrated circuit layer 104, and a second redistribution layer. 105. A first shielding layer 106, a first antenna layer 107, a first protective layer 102, a second protective layer 108, and a plurality of bump balls 101. The first redistribution layer 103 includes A first dielectric material layer 109 and a plurality of first metal layers 110 formed in a plurality of openings of the first dielectric material layer 109. The integrated circuit layer 104 is formed on the first redistribution layer 103. The integrated circuit layer 104 includes at least one metal via 117, at least one metal pillar 111, an integrated circuit wafer 100, and a molding layer 116, wherein the molding layer 116 is used to fill the A plurality of openings formed by metal vias 117, the metal pillars 111 and the integrated circuit wafer 100 are disposed on the first redistribution layer 103, the metal vias 117 are electrically connected to the first metal layers 110, and the metal pillars 111 Electrically connect the integrated circuit chip 100 and the plurality of first metal layers 110, The integrated circuit chip 100 includes a second antenna unit 112 and a plurality of conductive pads 113 on the integrated circuit 114 of the integrated circuit chip 100.

The second redistribution layer 105 is formed on the integrated circuit layer 104. The second redistribution layer 105 includes a second dielectric material layer 118 and is formed in each of the openings of the second dielectric material layer 118. The second metal layer 119 is electrically connected to the second metal layer 119. The first shielding layer 106 is disposed on the first antenna unit layer 107 and the second redistribution layer 105. Meanwhile, the first shielding layer 106 includes a first dielectric layer 120 and a plurality of fourth metal layers 121 formed in a plurality of openings of the second dielectric layer 120, wherein each of the fourth metal layers 121 is electrically connected to the The plurality of third metal layers 122 of the first antenna element layer 107 and a portion of the second metal layer 119.

The above-mentioned embodiments are merely illustrative for describing the features and effects of the present invention, and are not intended to limit the scope of the essential technical content of the present invention. Anyone skilled in the art can modify and change the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application described later.

Claims (15)

A multi-frequency antenna package structure includes a first redistribution layer including a first dielectric material layer having a plurality of openings, and a plurality of first dielectric layers disposed in the plurality of openings of the first dielectric material layer. A metal layer; an integrated circuit layer disposed on the first redistribution layer, the integrated circuit layer including at least one metal via, at least one metal pillar, an integrated circuit wafer, and A molding layer, wherein the molding layer is used to fill a plurality of openings formed by the metal vias, the metal pillars and the integrated circuit wafer are disposed on the first redistribution layer, and the metal vias One of the first metal layers is electrically connected, the metal pillar is electrically connected to one of the integrated circuit wafer and one of the first metal layers; a second redistribution layer is formed on the integrated circuit layer The second redistribution layer includes a second dielectric material layer and a plurality of second metal layers formed in the openings of the second dielectric material layer. The metal vias are electrically connected to the second metals. One of the layers; and a first antenna element layer, the package Including a first dielectric layer and a plurality of third metal layers formed in the plurality of openings of the first dielectric layer, wherein at least one of the third metal layers is electrically connected to one of the second metal layers Moreover, the third metal layers form a first antenna unit, wherein the first antenna unit is a multiple-input multiple-output phase antenna, and the height of the integrated circuit chip is the same as or smaller than that of the metal through-hole. height. The multi-frequency antenna package structure described in item 1 of the patent application scope, wherein the integrated circuit chip includes a second antenna unit located on an integrated circuit of the integrated circuit chip. The multi-frequency antenna package structure described in item 1 of the patent application scope further includes a first shielding layer formed between the first antenna unit layer and the second redistribution layer. The first shielding layer includes A first dielectric layer and a plurality of fourth metal layers formed in the openings of the second dielectric layer, wherein the fourth metal layers are electrically connected to the third metal layer and a part of the second metal layer; Metal layer. The multi-frequency antenna package structure described in item 3 of the patent application scope further includes: a first protective layer, wherein the first redistribution layer is disposed on the first protective layer; and a second protective layer is formed on the first protective layer. The first antenna unit layer; and a plurality of bump balls, wherein the multi-frequency antenna package structure is mounted on a substrate through the bump balls. The multi-frequency antenna package structure described in item 1 of the patent application scope further includes a second antenna unit layer including a second dielectric layer and a plurality of openings formed in the plurality of openings of the second dielectric layer. A fourth metal layer, wherein at least one of the fourth metal layers is electrically connected to one of the first metal layers, the fourth metal layer forms the second antenna unit, and the first A double wiring layer is formed on the second antenna element layer. The multi-frequency antenna package structure described in item 5 of the patent application scope further includes: a first shielding layer formed between the first antenna unit layer and the second redistribution layer, the first shielding layer including A third dielectric layer and a plurality of fifth metal layers formed in the openings of the third dielectric layer, wherein the fifth metal layer is electrically connected to the third metal layer and a part of the second metal layer. A metal layer; and a second shielding layer formed between the second antenna unit layer and the first redistribution layer, the second shielding layer including a fourth dielectric layer and a fourth dielectric layer The sixth metal layers in the openings are electrically connected to the fourth metal layer and a part of the first metal layer. The multi-frequency antenna package structure described in item 6 of the patent application scope further includes: a first protective layer, wherein the first redistribution layer is located on the first protective layer; and a second protective layer is formed on the first protective layer. An antenna unit layer; and a plurality of bump balls, wherein the multi-frequency antenna package structure is mounted on a substrate through the bump balls. The multi-frequency antenna package structure described in item 5 of the patent application scope, wherein the second antenna unit is a multiple-input multiple-output phase antenna. A method for manufacturing a multi-frequency antenna package structure includes: providing a first temporary substrate having a first adhesive layer; forming a first dielectric material layer on the first adhesive layer; and forming a first dielectric layer on the first dielectric layer. A plurality of first metal patterns are formed in the plurality of openings of the material layer; at least one metal through-hole is formed on one of the first metal patterns; at least one metal pillar is formed on part of the first metal patterns. And forming an integrated circuit wafer on the metal pillar; forming a molding layer to cover the metal pillar, the metal through-hole and the integrated circuit wafer; thinning the molding layer to expose the metal A through hole to form an integrated circuit wafer layer including the molding layer, the metal through hole, the metal pillar, and the integrated circuit wafer; and forming a first redistribution wiring layer on the integrated circuit wafer layer, wherein The first redistribution layer includes a second dielectric material layer and a plurality of second metal patterns, wherein the second patterns are formed in the openings of the second dielectric material layer; in the first redistribution layer A first antenna element layer is formed thereon, wherein The first antenna unit layer includes a first dielectric layer and a plurality of third metal patterns formed in the openings of the first dielectric layer, wherein at least one of the third metal patterns is electrically connected to the Waiting for one of the second metal patterns, and the third metal patterns forming a first antenna unit; forming a first protective layer on the first antenna unit layer to form a first stacked structure; Remove the first temporary substrate with the first adhesive layer, and flip the first stacked structure to adhere the first stacked structure to a second temporary substrate with a second adhesive layer; by processing the first A dielectric material layer and the first metal patterns to form a second redistribution layer, wherein the second redistribution layer includes the processed first dielectric material layer and the processed first metal patterns; Forming a second protective layer on the second redistribution layer; forming a plurality of bump balls on the second protective layer to form a second stacked structure; and removing the second temporary layer having the second adhesive layer Substrate, flip the second stacked structure to pass The ball block of the second stack structure is mounted on a substrate; wherein the first antenna unit is a multiple input multiple output phase of the antenna, and a height of the integrated circuit chip is the same as or less than the height of the metal via. The method of manufacturing a multi-frequency antenna package structure according to claim 9, wherein the integrated circuit chip includes a second antenna unit located on an integrated circuit of the integrated circuit chip. The method for manufacturing a multi-frequency antenna package structure according to claim 10, further comprising: before forming the first antenna element layer, forming a first shielding layer on the first redistribution layer, the first shielding layer The shielding layer includes a second dielectric layer and a plurality of fourth metal patterns formed in the openings of the second dielectric layer. The fourth metal patterns are electrically connected to the third metal pattern and a portion of the first metal pattern. Two metal patterns. The method for manufacturing a multi-frequency antenna package structure according to claim 9, further comprising: before forming the second protective layer, forming a second antenna unit layer on the second redistribution layer, wherein the first The two antenna unit layers include a second dielectric layer and a plurality of fourth metal patterns formed in the openings of the second dielectric layer, wherein the fourth metal patterns are electrically connected to one of the first metal patterns. Or, the fourth metal patterns form a second antenna unit. The method for manufacturing a multi-frequency antenna package structure according to claim 12, further comprising: before forming the first antenna element layer, forming a first shielding layer on the first redistribution layer, the first shielding layer The shielding layer includes a third dielectric layer and a plurality of fifth metal patterns formed in the plurality of openings of the third dielectric layer. The fifth metal patterns are electrically connected to the third metal patterns and portions of the first metal patterns. Two metal patterns; and before the second antenna unit layer is formed, a second shielding layer is formed on the second redistribution layer, the second shielding layer includes a fourth dielectric layer and is formed on the fourth dielectric The sixth metal patterns in the openings of the layer are electrically connected to the fourth metal pattern and a part of the first metal pattern. A communication device includes a multi-frequency antenna package structure including a first redistribution layer including a first dielectric material layer and a plurality of first ones formed in a plurality of openings of the first dielectric material layer. A metal pattern; an integrated circuit layer formed on the first redistribution layer, the integrated circuit layer including at least one metal via, at least one metal pillar, an integrated circuit wafer, and a molding layer, wherein the mold A layer is formed to fill the openings formed by the metal vias. The metal pillars and the integrated circuit wafer are disposed on the first redistribution layer. The metal vias are electrically connected to one of the first metal patterns. The metal pillar is electrically connected to the integrated circuit chip and one of the first metal patterns; a second redistribution layer is formed on the integrated circuit layer, and the second redistribution layer includes a second dielectric An electrical material layer and a plurality of second metal patterns formed in the openings of the second dielectric material layer, wherein the metal vias are electrically connected to one of the second metal patterns; and a first day A line unit layer including a first dielectric layer and a A plurality of third metal patterns in the openings of the first dielectric layer, wherein at least one of the third metal patterns is electrically connected to one of the second metal patterns, and the third The metal pattern forms a first antenna unit; wherein the integrated circuit chip has an integrated circuit as a processing circuit, and the integrated circuit chip has a second antenna unit located on the integrated circuit, or The integrated circuit chip does not include the second antenna unit, but the multi-frequency antenna package structure further includes a second antenna unit layer including a second dielectric layer and a second dielectric layer formed on the second dielectric layer. A plurality of fourth metal patterns in the plurality of openings, wherein at least one of the fourth metal patterns is electrically connected to one of the first metal patterns, and the fourth metal patterns form the second day Line unit, and the first rewiring layer is formed on the second antenna unit layer; wherein the first antenna unit is a multiple-input multiple-output phase antenna, and the height of the integrated circuit chip is the same as or less than the height of the integrated circuit chip The height of the metal via. The communication device according to claim 14, wherein the communication device is an encrypted communication device or a frequency conversion device.