TWI647802B - Heat dissipation package structure - Google Patents
Heat dissipation package structure Download PDFInfo
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- TWI647802B TWI647802B TW105121353A TW105121353A TWI647802B TW I647802 B TWI647802 B TW I647802B TW 105121353 A TW105121353 A TW 105121353A TW 105121353 A TW105121353 A TW 105121353A TW I647802 B TWI647802 B TW I647802B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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Abstract
一種散熱型封裝結構,係包括:承載件、設於該承載件上之電子元件、設於該承載件上之柱體、以及設於該電子元件與該柱體上之散熱件,以藉由該柱體提供支撐力而避免封裝結構發生過大之翹曲。 A heat dissipation type package structure includes: a carrier member, an electronic component disposed on the carrier member, a pillar body disposed on the carrier member, and a heat dissipation member disposed on the electronic component and the pillar body The cylinder provides support to avoid excessive warpage of the package structure.
Description
本發明係有關一種封裝結構,尤指一種散熱型封裝結構。 The invention relates to a package structure, in particular to a heat dissipation type package structure.
隨著電子產品在功能及處理速度之需求的提升,作為電子產品之核心組件的半導體晶片需具有更高密度之電子元件(Electronic Components)及電子電路(Electronic Circuits),故半導體晶片在運作時將隨之產生更大量的熱能,且包覆該半導體晶片之封裝膠體係為一種導熱係數僅0.8Wm-1k-1之不良傳熱材質(即熱量之逸散效率不佳),因而若不能有效逸散所產生之熱量,則會造成半導體晶片之損害或造成產品信賴性問題。 As the demand for functions and processing speed of electronic products increases, semiconductor wafers, which are the core components of electronic products, require higher density electronic components and electronic circuits, so semiconductor wafers will operate. A larger amount of thermal energy is generated, and the encapsulant system covering the semiconductor wafer is a poor heat transfer material having a thermal conductivity of only 0.8 Wm -1 k -1 (that is, the heat dissipation efficiency is not good), and thus cannot be effective. The heat generated by the dissipation can cause damage to the semiconductor wafer or cause product reliability problems.
因此,為了迅速將熱能散逸至大氣中,通常在半導體封裝結構中配置散熱片(Heat Sink或Heat Spreader),且傳統散熱片係藉由散熱膠結合至晶片背面,以藉散熱膠與散熱片逸散出半導體晶片所產生之熱量,再者,通常令散熱片之頂面外露出封裝膠體或直接外露於大氣中為佳,俾取得較佳之散熱效果。 Therefore, in order to quickly dissipate thermal energy into the atmosphere, a heat sink (Heat Sink or Heat Spreader) is usually disposed in the semiconductor package structure, and the conventional heat sink is bonded to the back surface of the wafer by a heat sink adhesive to utilize the heat sink and the heat sink. The heat generated by the semiconductor wafer is dissipated. Further, it is generally preferred that the top surface of the heat sink is exposed to the encapsulant or directly exposed to the atmosphere, so that a better heat dissipation effect is obtained.
然而,散熱膠已不符合製程需求,故遂發展出導熱介 面材(Thermal Interface Material,簡稱TIM)製程。 However, the thermal adhesive has not met the process requirements, so the development of thermal conduction The process of Thermal Interface Material (TIM).
習知TIM層係為低溫熔融之熱傳導材料(如銲錫材料),其設於半導體晶片背面與散熱片之間,而為了提升TIM層與晶片背面之間的接著強度,需於晶片背面上覆金(即所謂之Coating Gold On Chip Back),且需使用助焊劑(flux),以利於該TIM層接著於該金層上。 The conventional TIM layer is a low-temperature melting heat conductive material (such as a solder material) disposed between the back surface of the semiconductor wafer and the heat sink, and in order to improve the bonding strength between the TIM layer and the back surface of the wafer, it is necessary to apply gold on the back surface of the wafer. (The so-called Coating Gold On Chip Back), and a flux is needed to facilitate the TIM layer to follow the gold layer.
如第1A圖所示,習知散熱型之半導體封裝結構1之製法係先將一半導體晶片11以其作用面11a利用覆晶接合方式(即透過導電凸塊110與底膠111)設於一封裝基板10上,且將一金層(圖略)形成於該半導體晶片11之非作用面11b上,再將一散熱件13以其頂片130藉由TIM層12(其包含銲錫層與助焊劑)回銲結合於該金層上,且該散熱件13之支撐腳131藉由黏著層14架設於該封裝基板10上。接著,進行封裝壓模作業,以供封裝膠體(圖略)包覆該半導體晶片11及散熱件13,並使該散熱件13之頂片130外露出封裝膠體而直接與大氣接觸。 As shown in FIG. 1A, the conventional heat dissipation type semiconductor package structure 1 is formed by first mounting a semiconductor wafer 11 on its active surface 11a by flip chip bonding (that is, through the conductive bump 110 and the underfill 111). On the package substrate 10, a gold layer (not shown) is formed on the non-active surface 11b of the semiconductor wafer 11, and a heat sink 13 is used as the top sheet 130 by the TIM layer 12 (which includes the solder layer and the help The flux is rebonded to the gold layer, and the support leg 131 of the heat sink 13 is mounted on the package substrate 10 by the adhesive layer 14. Next, a package stamping operation is performed to encapsulate the semiconductor wafer 11 and the heat sink 13 with a package colloid (not shown), and the top sheet 130 of the heat sink 13 is exposed to the encapsulant and directly in contact with the atmosphere.
於運作時,該半導體晶片11所產生之熱能係經由該非作用面11b、金層、TIM層12而傳導至該散熱件13以散熱至該半導體封裝結構1之外部。 During operation, the thermal energy generated by the semiconductor wafer 11 is conducted to the heat sink 13 via the non-active surface 11b, the gold layer, and the TIM layer 12 to dissipate heat to the outside of the semiconductor package structure 1.
惟,當習知半導體封裝結構1之厚度薄化,且其面積越來越大時,使該散熱件13與TIM層12之間的熱膨脹係數差異(CTE Mismatch)而導致變形的情況(即翹曲程度)更明顯,故當變形量過大時,該散熱件13之頂片130與TIM層12’之間容易發生脫層(如第1B圖所示之間隙d), 不僅造成導熱效果下降,且會造成半導體封裝結構1外觀上的不良,因而嚴重影響產品之信賴性。 However, when the thickness of the conventional semiconductor package structure 1 is thinned and its area is larger and larger, the coefficient of thermal expansion between the heat sink 13 and the TIM layer 12 is changed (CTE Mismatch) to cause deformation (ie, warping). The degree of curvature is more obvious, so when the amount of deformation is too large, delamination between the top sheet 130 of the heat sink 13 and the TIM layer 12' is liable to occur (such as the gap d shown in FIG. 1B). Not only the thermal conductivity is reduced, but also the appearance of the semiconductor package structure 1 is poor, thus seriously affecting the reliability of the product.
因此,如何克服上述習知技術之問題,實已成為目前業界亟待克服之難題。 Therefore, how to overcome the above problems of the prior art has become a difficult problem to be overcome in the industry.
鑑於上述習知技術之種種缺失,本發明提供一種散熱型封裝結構,係包括:承載件;電子元件,係設於該承載件上;柱體,係設於該承載件上;以及散熱件,係設於該電子元件與該柱體上。 In view of the above-mentioned various deficiencies of the prior art, the present invention provides a heat-dissipating package structure, comprising: a carrier; an electronic component is disposed on the carrier; a cylinder is disposed on the carrier; and a heat sink, The system is disposed on the electronic component and the cylinder.
前述之散熱型封裝結構中,該散熱件具有散熱體與設於該散熱體上之支撐腳,該散熱體係結合該柱體,且該支撐腳係結合於該承載件上,使該柱體位於該電子元件與該支撐腳之間。 In the above heat dissipation type package structure, the heat dissipating member has a heat dissipating body and a supporting leg disposed on the heat dissipating body, the heat dissipating system is coupled to the column body, and the supporting leg is coupled to the carrier member, so that the column body is located The electronic component is between the support leg.
該承載件上形成有用以結合該散熱件之第一膠體。該柱體之高度大於該第一膠體之高度。復包括形成於該承載件上之第二膠體。例如,該柱體之高度大於該第二膠體之高度:該第一膠體與該第二膠體係相鄰間隔設於該承載件上且位於該承載件之周緣;或者,該第二膠體之材質不同於該第一膠體之材質。 A first colloid is formed on the carrier to bond the heat sink. The height of the cylinder is greater than the height of the first colloid. A second colloid formed on the carrier is included. For example, the height of the pillar is greater than the height of the second gel: the first colloid is adjacent to the second gel system and is disposed on the carrier and located at a periphery of the carrier; or the material of the second gel Different from the material of the first colloid.
本發明復提供一種散熱型封裝結構,係包括:承載件;電子元件,係設於該承載件上;第一膠體,係設於該承載件上;第二膠體,係設於該承載件上;以及散熱件,係設於該電子元件上並結合該第一膠體及/或該第二膠體。 The invention provides a heat-dissipating package structure, comprising: a carrier; an electronic component is disposed on the carrier; a first colloid is disposed on the carrier; and a second colloid is disposed on the carrier And a heat dissipating component disposed on the electronic component and combining the first colloid and/or the second colloid.
前述之散熱型封裝結構中,該第一膠體與該第二膠體 係相鄰間隔設於該承載件上且位於該承載件之周緣。 In the foregoing heat dissipation package structure, the first colloid and the second colloid The adjacent spacing is disposed on the carrier and at a periphery of the carrier.
前述之散熱型封裝結構中,該第二膠體之材質不同於該第一膠體之材質。 In the above heat dissipation type package structure, the material of the second gel is different from the material of the first gel.
前述之散熱型封裝結構中,該散熱件具有散熱體與設於該散熱體上之支撐腳,該散熱體係結合該電子元件,且該支撐腳係結合該第一膠體及/或該第二膠體。 In the above heat dissipation type package structure, the heat dissipating member has a heat dissipating body and a supporting leg disposed on the heat dissipating body, the heat dissipating system is combined with the electronic component, and the supporting leg is coupled to the first colloid and/or the second colloid .
前述之兩種散熱型封裝結構中,該承載件係為封裝基板或導線架。 In the above two heat dissipation type package structures, the carrier is a package substrate or a lead frame.
前述之兩種散熱型封裝結構中,該電子元件係藉由結合層結合該散熱件。 In the above two heat dissipation type package structures, the electronic component is coupled to the heat sink by a bonding layer.
由上可知,本發明之散熱型封裝結構,主要藉由柱體或第一膠體與第二膠體搭配之設計,以當薄化該散熱型封裝結構之厚度,且該散熱型封裝結構之面積越來越大時,該柱體或第一膠體與第二膠體搭配來分散應力,因而能避免發生過大之翹曲程度,故相較於習知技術,本發明能避免該散熱體與結合層之間發生脫層,進而提升導熱效果,且能提升產品之信賴性。 As can be seen from the above, the heat-dissipating package structure of the present invention is mainly designed by using a column or a first colloid and a second colloid to thin the thickness of the heat-dissipating package structure, and the area of the heat-dissipating package structure is increased. When the height is increased, the column or the first colloid is combined with the second colloid to disperse the stress, so that excessive warpage can be avoided, so that the present invention can avoid the heat sink and the bonding layer compared with the prior art. The delamination occurs to enhance the thermal conductivity and enhance the reliability of the product.
1,2‧‧‧封裝結構 1,2‧‧‧Package structure
10‧‧‧封裝基板 10‧‧‧Package substrate
11‧‧‧半導體晶片 11‧‧‧Semiconductor wafer
11a,21a‧‧‧作用面 11a, 21a‧‧‧ action surface
11b,21b‧‧‧非作用面 11b, 21b‧‧‧ non-active surface
110,210‧‧‧導電凸塊 110,210‧‧‧Electrical bumps
111,211‧‧‧底膠 111,211‧‧‧ 底胶
12,12’‧‧‧TIM層 12,12’‧‧‧TIM layer
13,23‧‧‧散熱件 13,23‧‧‧Solder parts
130‧‧‧頂片 130‧‧‧Top film
131,231‧‧‧支撐腳 131,231‧‧‧Support feet
14‧‧‧黏著層 14‧‧‧Adhesive layer
20‧‧‧承載件 20‧‧‧Carrier
21‧‧‧電子元件 21‧‧‧Electronic components
22‧‧‧結合層 22‧‧‧Combination layer
230‧‧‧散熱體 230‧‧‧ Heat sink
24a‧‧‧第一膠體 24a‧‧‧First colloid
24b‧‧‧第二膠體 24b‧‧‧Second colloid
25‧‧‧柱體 25‧‧‧Cylinder
d‧‧‧間隙 D‧‧‧ gap
h,t‧‧‧高度 h, t‧‧‧ height
第1A圖係為習知半導體封裝結構之剖視示意圖;第1B圖係為第1A圖之半導體封裝結構產生脫層情況之示意圖;第2圖係為本發明之散熱型封裝結構之剖視示意圖;第3A至3H圖係為第2圖之散熱型封裝結構省略散熱件與結合層之各種態樣的上視圖;以及 第4圖係為形成第一膠體或第二膠體之材質之圖表。 1A is a schematic cross-sectional view of a conventional semiconductor package structure; FIG. 1B is a schematic view showing a delamination of the semiconductor package structure of FIG. 1A; and FIG. 2 is a cross-sectional view of the heat dissipation package structure of the present invention. 3A to 3H are top views of the heat dissipation type package structure of FIG. 2 omitting various aspects of the heat sink and the bonding layer; Figure 4 is a graph showing the material of the first colloid or the second colloid.
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如“上”、“下”、“第一”、‘“第二”及“一”等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "lower", "first", "second" and "one" are used in this specification for convenience of description and are not intended to limit the present invention. The scope of the invention, the change or adjustment of the relative relationship, is also considered to be within the scope of the invention.
第2圖係為本發明之散熱型封裝結構2,其包括:一承載件20、一電子元件21、一結合層22、複數柱體25以及一散熱件23。 2 is a heat dissipation package structure 2 of the present invention, comprising: a carrier member 20, an electronic component 21, a bonding layer 22, a plurality of pillars 25, and a heat sink 23.
所述之承載件20係例如為封裝基板,且有關封裝基板之種類繁多,並無特別限制;於其它實施例中,該承載件20亦可為導線架。 The carrier 20 is, for example, a package substrate, and the type of the package substrate is not particularly limited. In other embodiments, the carrier 20 can also be a lead frame.
所述之電子元件21係設於該承載件20上,且該電子元件21係為主動元件、被動元件、封裝元件或其三者之組 合。 The electronic component 21 is disposed on the carrier 20, and the electronic component 21 is an active component, a passive component, a package component, or a group of the three. Hehe.
於本實施例中,該主動元件係例如半導體晶片,該被動元件係例如電阻、電容及電感,且該封裝元件係包含基板、設於該基板上之晶片及包覆該晶片之封裝層。例如,該電子元件21具有相對之作用面21a及非作用面21b,且該作用面21a設有複數導電凸塊210,使該電子元件21藉該些導電凸塊210以覆晶方式結合並電性連接該承載件20,並以底膠211包覆該些導電凸塊210。於其它實施例中,該電子元件21亦可藉由打線封裝方式電性連接該承載件20。 In this embodiment, the active component is, for example, a semiconductor chip, such as a resistor, a capacitor, and an inductor, and the package component includes a substrate, a wafer disposed on the substrate, and an encapsulation layer covering the wafer. For example, the electronic component 21 has an opposite active surface 21a and a non-active surface 21b, and the active surface 21a is provided with a plurality of conductive bumps 210, so that the electronic component 21 is combined and electrically connected by the conductive bumps 210. The carrier 20 is connected to the conductive member 210 and covered with a primer 211. In other embodiments, the electronic component 21 can be electrically connected to the carrier 20 by wire bonding.
所述之結合層22係為導熱介面材或導熱膠,其設於該電子元件21之非作用面21b上。 The bonding layer 22 is a heat conducting interface material or a thermal conductive adhesive disposed on the non-active surface 21b of the electronic component 21.
所述之柱體25係設於該承載件20上並位於該電子元件21之外圍,例如位於電子元件21角落處或側邊處,且該柱體25係為各式形狀之柱體,如第3A至3H圖所示之L形、圓形或矩形等形狀之組合,且可緊臨或遠離該電子元件21之周圍設置,但不限於上述。 The cylinder 25 is disposed on the carrier 20 and located at the periphery of the electronic component 21, for example, at a corner or a side of the electronic component 21, and the cylinder 25 is a cylinder of various shapes, such as A combination of L-shaped, circular or rectangular shapes as shown in FIGS. 3A to 3H, and may be disposed close to or away from the periphery of the electronic component 21, but is not limited thereto.
再者,該柱體25之高度h大於該第一膠體24a之高度t。 Furthermore, the height h of the cylinder 25 is greater than the height t of the first colloid 24a.
所述之散熱件23係設於該結合層22上且具有一散熱體230與複數設於該散熱體230下側之支撐腳231,該散熱體230係為散熱片並以下側接觸該結合層22,且該支撐腳231係以第一膠體24a結合於該承載件20上,且相對位於該承載件20之上側表面,再者,該柱體25係位於該電 子元件21與該支撐腳231之間。 The heat dissipating member 23 is disposed on the bonding layer 22 and has a heat dissipating body 230 and a plurality of supporting legs 231 disposed on the lower side of the heat dissipating body 230. The heat dissipating body 230 is a heat sink and the lower side contacts the bonding layer. 22, and the support leg 231 is coupled to the carrier 20 by the first colloid 24a, and is located opposite to the upper surface of the carrier 20. Further, the post 25 is located at the electric The sub-element 21 is between the support leg 231.
於本實施例中,於製作過程中,可先以導熱或不導熱膠材,或亦或金屬或絕緣材料製成該柱體25,再將該柱體25黏貼於該散熱體230下側或該承載件20上側。 In the embodiment, the pillar 25 may be made of a heat conductive or non-thermal conductive material, or a metal or an insulating material, and then the pillar 25 is adhered to the lower side of the heat sink 230 or The carrier 20 is on the upper side.
再者,該柱體25之材質可相同或不同於該散熱體230之材質。 Furthermore, the material of the cylinder 25 may be the same or different from the material of the heat sink 230.
又,該第一膠體24a之佈設面積係可對應該支撐腳231之壓印形狀,如第3A至3H圖所示。於製程中,可先將該第一膠體24a形成於該支撐腳231之腳底上,再以該支撐腳231壓合該第一膠體24a於該承載件20上。 Further, the layout area of the first colloid 24a corresponds to the embossed shape of the support leg 231, as shown in Figs. 3A to 3H. In the process, the first colloid 24a is formed on the sole of the support leg 231, and the first colloid 24a is pressed onto the carrier 20 by the support leg 231.
本發明之散熱型封裝結構2係藉由該柱體25較該支撐腳231更靠近該電子元件21周圍,故當薄化該散熱型封裝結構2之厚度,且該散熱型封裝結構2之面積越來越大時,透過該柱體25之設置可使該散熱型封裝結構2之翹曲(warpage)程度相較於習知封裝結構減少,且降低該電子元件21之表面分離應力(surface peeling stress)。 The heat-dissipating package structure 2 of the present invention is closer to the periphery of the electronic component 21 than the support leg 231, so that the thickness of the heat-dissipating package structure 2 is thinned, and the area of the heat-dissipation package structure 2 is When the size is larger, the degree of warpage of the heat dissipation package structure 2 can be reduced compared with the conventional package structure, and the surface peeling stress of the electronic component 21 can be reduced. Stress).
因此,該柱體25能提供結合力以維持該散熱體230中央與該承載件20之間的距離,故能避免該散熱體230與結合層22之間發生脫層,因而不僅能提升導熱效果,且能提升產品之信賴性。 Therefore, the column 25 can provide a bonding force to maintain the distance between the center of the heat sink 230 and the carrier 20, so that delamination between the heat sink 230 and the bonding layer 22 can be avoided, thereby not only improving the heat conduction effect. And can enhance the reliability of the product.
於另一實施例中,如第3A至3H圖所示,該散熱型封裝結構2復包括形成於該承載件20上之第二膠體24b,其與該第一膠體24a係位於該承載件20之邊緣,以環繞該電子元件21與該柱體25之周圍,以加強散熱件23與承載件 20之結合。具體地,該第二膠體24b之材質與該第一膠體24a之材質可相同或不相同,且該第一膠體24a之材質與第二膠體24b之材質可參考第4圖之圖表,其中,該第二膠體24b可配合設於支撐腳231處,使該支撐腳231同時結合該第一膠體24a與該第二膠體24b而設於該承載件20上,亦或該第二膠體24b可無需結合支撐腳231,而使該第二膠體24b之材質可採用複數種類,不限於單一種類。另外,該柱體25之高度可大於該第二膠體24b之高度。 In another embodiment, as shown in FIGS. 3A to 3H, the heat dissipation package structure 2 further includes a second colloid 24b formed on the carrier 20, and the first colloid 24a is located on the carrier 20 An edge to surround the electronic component 21 and the periphery of the pillar 25 to reinforce the heat sink 23 and the carrier 20 combination. Specifically, the material of the second colloid 24b and the material of the first colloid 24a may be the same or different, and the material of the first colloid 24a and the material of the second colloid 24b may refer to the graph of FIG. 4, wherein The second colloid 24b can be disposed on the supporting leg 231 so that the supporting leg 231 can be combined with the first colloid 24a and the second colloid 24b on the carrier 20, or the second colloid 24b can be combined. The support leg 231 is supported, and the material of the second colloid 24b can be of a plurality of types, and is not limited to a single type. In addition, the height of the cylinder 25 may be greater than the height of the second colloid 24b.
於其它實施例中,本發明亦可提供一種如上所述之散熱型封裝結構,但省略該柱體25,使該第二膠體24b與該第一膠體24a相鄰間隔設置於該承載件20之周緣且環繞該電子元件21,而使散熱件23設於該電子元件21上並結合該第一膠體24a及/或該第二膠體24b。藉此,當薄化該散熱型封裝結構之厚度,且該散熱型封裝結構之面積越來越大時,該散熱型封裝結構之翹曲程度仍會減少,且該電子元件21之表面分離應力會減少。因此,該第二膠體24b與該第一膠體24a能分散應力(較佳地,該第一膠體24a之材質與第二膠體24b之材質為不同),以維持該散熱體230中央與該承載件20之間的距離,故能避免該散熱體230與結合層22之間發生脫層,因而不僅能提升導熱效果,且能提升產品之信賴性。 In other embodiments, the present invention may also provide a heat dissipation type package structure as described above, but the column body 25 is omitted, and the second glue body 24b is disposed adjacent to the first glue body 24a at the carrier member 20. The heat sink 23 is disposed on the electronic component 21 and is coupled to the first colloid 24a and/or the second colloid 24b. Therefore, when the thickness of the heat dissipation package structure is thinned and the area of the heat dissipation package structure is larger, the degree of warpage of the heat dissipation package structure is still reduced, and the surface separation stress of the electronic component 21 is reduced. Will decrease. Therefore, the second colloid 24b and the first colloid 24a can disperse stress (preferably, the material of the first colloid 24a is different from the material of the second colloid 24b) to maintain the center of the heat sink 230 and the carrier. The distance between the two 20s can avoid delamination between the heat sink 230 and the bonding layer 22, thereby not only improving the heat conduction effect, but also improving the reliability of the product.
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修 改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。 The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Anyone skilled in the art can modify the above embodiments without departing from the spirit and scope of the present invention. change. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.
Claims (14)
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TWI246174B (en) * | 2004-09-22 | 2005-12-21 | Taiwan Semiconductor Mfg | Heat spreader, package and package method thereof |
TW200623368A (en) * | 2004-12-31 | 2006-07-01 | Chipmos Technologies Inc | Thermally enhanced flip chip package |
TWI265608B (en) * | 2003-11-05 | 2006-11-01 | Siliconware Precision Industries Co Ltd | Semiconductor package with heat sink |
US20070278665A1 (en) * | 2005-03-29 | 2007-12-06 | Ming-Hsiang Cheng | Thermally Enhanced Three-Dimensional Package and Method for Manufacturing the Same |
US20090230543A1 (en) * | 2008-03-11 | 2009-09-17 | Ping Hsun Yu | Semiconductor package structure with heat sink |
TWI339428B (en) * | 2006-03-24 | 2011-03-21 | Advanced Semiconductor Eng | Package structure with heat sink |
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US9041192B2 (en) * | 2012-08-29 | 2015-05-26 | Broadcom Corporation | Hybrid thermal interface material for IC packages with integrated heat spreader |
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TWI265608B (en) * | 2003-11-05 | 2006-11-01 | Siliconware Precision Industries Co Ltd | Semiconductor package with heat sink |
TWI246174B (en) * | 2004-09-22 | 2005-12-21 | Taiwan Semiconductor Mfg | Heat spreader, package and package method thereof |
TW200623368A (en) * | 2004-12-31 | 2006-07-01 | Chipmos Technologies Inc | Thermally enhanced flip chip package |
US20070278665A1 (en) * | 2005-03-29 | 2007-12-06 | Ming-Hsiang Cheng | Thermally Enhanced Three-Dimensional Package and Method for Manufacturing the Same |
TWI339428B (en) * | 2006-03-24 | 2011-03-21 | Advanced Semiconductor Eng | Package structure with heat sink |
US20090230543A1 (en) * | 2008-03-11 | 2009-09-17 | Ping Hsun Yu | Semiconductor package structure with heat sink |
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