TWI624787B - 用於包括記憶體節點之分散式記憶體系統之裝置及方法 - Google Patents

用於包括記憶體節點之分散式記憶體系統之裝置及方法 Download PDF

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Publication number
TWI624787B
TWI624787B TW103106541A TW103106541A TWI624787B TW I624787 B TWI624787 B TW I624787B TW 103106541 A TW103106541 A TW 103106541A TW 103106541 A TW103106541 A TW 103106541A TW I624787 B TWI624787 B TW I624787B
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Taiwan
Prior art keywords
memory
node
nodes
message
information
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TW103106541A
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English (en)
Chinese (zh)
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TW201447744A (zh
Inventor
肯尼斯Ｍ 柯維茲
西恩Ｓ 艾樂
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美光科技公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/067—Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0635—Configuration or reconfiguration of storage systems by changing the path, e.g. traffic rerouting, path reconfiguration

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Multi Processors (AREA)
  • Signal Processing (AREA)
  • Advance Control (AREA)
TW103106541A 2013-03-15 2014-02-26 用於包括記憶體節點之分散式記憶體系統之裝置及方法 TWI624787B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/842,984 2013-03-15
US13/842,984 US10089043B2 (en) 2013-03-15 2013-03-15 Apparatus and methods for a distributed memory system including memory nodes

Publications (2)

Publication Number Publication Date
TW201447744A TW201447744A (zh) 2014-12-16
TWI624787B true TWI624787B (zh) 2018-05-21

Family

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Family Applications (1)

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TW103106541A TWI624787B (zh) 2013-03-15 2014-02-26 用於包括記憶體節點之分散式記憶體系統之裝置及方法

Country Status (7)

Country Link
US (2) US10089043B2 (ja)
EP (1) EP2972911B1 (ja)
JP (1) JP6333353B2 (ja)
KR (1) KR20150129808A (ja)
CN (2) CN110244909A (ja)
TW (1) TWI624787B (ja)
WO (1) WO2014149278A1 (ja)

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US9779057B2 (en) 2009-09-11 2017-10-03 Micron Technology, Inc. Autonomous memory architecture
US10089043B2 (en) 2013-03-15 2018-10-02 Micron Technology, Inc. Apparatus and methods for a distributed memory system including memory nodes
US9779138B2 (en) 2013-08-13 2017-10-03 Micron Technology, Inc. Methods and systems for autonomous memory searching
US10003675B2 (en) 2013-12-02 2018-06-19 Micron Technology, Inc. Packet processor receiving packets containing instructions, data, and starting location and generating packets containing instructions and data
CN104765587B (zh) * 2014-01-08 2018-12-14 雅特生嵌入式计算有限公司 用于使处理器同步到相同的计算点的系统和方法
CN114625084B (zh) * 2022-03-02 2024-01-19 杭州康吉森自动化科技有限公司 基于控制系统的节点信息的获取方法及装置
CN114647380B (zh) * 2022-03-23 2023-11-07 苏州科美信息技术有限公司 一种数据存算一体固态硬盘模组及系统

Citations (2)

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US20110067039A1 (en) * 2009-09-11 2011-03-17 Sean Eilert Autonomous memory architecture
US20130054727A1 (en) * 2011-08-26 2013-02-28 Fujitsu Limited Storage control method and information processing apparatus

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US5134711A (en) 1988-05-13 1992-07-28 At&T Bell Laboratories Computer with intelligent memory system
CA2145106C (en) 1994-04-22 1999-08-24 Abhaya Asthana Intelligent memory-based input/output system
US6799217B2 (en) 2001-06-04 2004-09-28 Fujitsu Limited Shared memory multiprocessor expansion port for multi-node systems
US7581080B2 (en) 2003-04-23 2009-08-25 Micron Technology, Inc. Method for manipulating data in a group of processing elements according to locally maintained counts
US20050108203A1 (en) 2003-11-13 2005-05-19 Chunqiang Tang Sample-directed searching in a peer-to-peer system
US7242216B1 (en) 2004-11-08 2007-07-10 Herman Schmit Embedding memory between tile arrangement of a configurable IC
DE102006009027A1 (de) 2006-02-27 2007-08-30 Infineon Technologies Ag Speicheranordnung
US7987205B1 (en) 2006-11-27 2011-07-26 Netlogic Microsystems, Inc. Integrated search engine devices having pipelined node maintenance sub-engines therein that support database flush operations
US7623365B2 (en) 2007-08-29 2009-11-24 Micron Technology, Inc. Memory device interface methods, apparatus, and systems
US7913033B2 (en) 2007-10-09 2011-03-22 Micron Technology, Inc. Non-volatile memory device having assignable network identification
US20100161914A1 (en) 2008-12-23 2010-06-24 Eilert Sean S Autonomous memory subsystems in computing platforms
US8549092B2 (en) 2009-02-19 2013-10-01 Micron Technology, Inc. Memory network methods, apparatus, and systems
US20100241783A1 (en) 2009-03-23 2010-09-23 Honeywell International Inc. Memory node for use within a data storage system having a plurality of interconnected memory nodes
FR2948206B1 (fr) 2009-07-15 2011-08-05 Commissariat Energie Atomique Dispositif et procede pour l'execution distribuee de traitements de donnees numeriques
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Patent Citations (2)

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US20110067039A1 (en) * 2009-09-11 2011-03-17 Sean Eilert Autonomous memory architecture
US20130054727A1 (en) * 2011-08-26 2013-02-28 Fujitsu Limited Storage control method and information processing apparatus

Also Published As

Publication number Publication date
CN105051708B (zh) 2019-05-28
US10089043B2 (en) 2018-10-02
CN105051708A (zh) 2015-11-11
CN110244909A (zh) 2019-09-17
US20140281278A1 (en) 2014-09-18
EP2972911B1 (en) 2020-12-23
JP2016515256A (ja) 2016-05-26
EP2972911A1 (en) 2016-01-20
JP6333353B2 (ja) 2018-05-30
US20190042100A1 (en) 2019-02-07
KR20150129808A (ko) 2015-11-20
TW201447744A (zh) 2014-12-16
US10761781B2 (en) 2020-09-01
WO2014149278A1 (en) 2014-09-25
EP2972911A4 (en) 2016-10-26

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