WO2022226998A1 - 执行原子操作的装置和方法 - Google Patents

执行原子操作的装置和方法 Download PDF

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Publication number
WO2022226998A1
WO2022226998A1 PCT/CN2021/091481 CN2021091481W WO2022226998A1 WO 2022226998 A1 WO2022226998 A1 WO 2022226998A1 CN 2021091481 W CN2021091481 W CN 2021091481W WO 2022226998 A1 WO2022226998 A1 WO 2022226998A1
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target storage
iommu
storage space
memory
rnic
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PCT/CN2021/091481
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English (en)
French (fr)
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李冰
程传宁
夏晶
杨伟
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华为技术有限公司
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Priority to PCT/CN2021/091481 priority Critical patent/WO2022226998A1/zh
Priority to CN202180097466.6A priority patent/CN117280326A/zh
Priority to EP21938472.4A priority patent/EP4318237A4/en
Publication of WO2022226998A1 publication Critical patent/WO2022226998A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17306Intercommunication techniques
    • G06F15/17331Distributed shared memory [DSM], e.g. remote direct memory access [RDMA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication

Definitions

  • the present application relates to the field of computer technology, and in particular, to an apparatus and method for performing atomic operations.
  • RDMA remote direct memory access
  • the present application provides an apparatus and method for performing atomic operations, which provides a basic guarantee for data storage consistency in memory and avoids the problem of data inconsistency.
  • the present application provides an apparatus for performing atomic operations, including: a remote direct memory access network card RNIC and an input-output memory management unit IOMMU; wherein, the RNIC is used to send an instruction to read memory to the IOMMU, so The instruction of reading the memory includes a target storage address; the IOMMU is used to read the operation data from the target storage space corresponding to the target storage address in an exclusive manner, and send the operation data to the RNIC, the The target storage space is provided by the memory; the RNIC is further configured to perform an operation on the operation data to obtain an operation result, and write the operation result into the target storage space through the IOMMU.
  • a remote direct memory access network card RNIC and an input-output memory management unit IOMMU wherein, the RNIC is used to send an instruction to read memory to the IOMMU, so The instruction of reading the memory includes a target storage address; the IOMMU is used to read the operation data from the target storage space corresponding to the target storage address in an exclusive manner, and send the operation data to the RNIC,
  • the IOMMU in the service node can exclusively access the target storage space stored in the memory of one of the data to be performed the atomic operation, that is, the IOMMU locks the target storage space, which can only be accessed by You can read/write data from it yourself, and other IOMMUs in the service node or remote service node cannot access the target storage space at the same time, which provides a basic guarantee for the consistency of data storage in the memory, and prevents other IOMMUs from reading data.
  • the IOMMU modifies the data in the storage space, resulting in data inconsistency.
  • the IOMMU is specifically configured to: after marking the target storage space as an exclusive state, read the operation data from the target storage space.
  • the IOMMU in the service node marks the target storage space as an exclusive state, and then reads the operation data from it, so that the IOMMU can lock the target storage space, and can only read/write data from it by itself, while others in the service node or the remote service node None of the IOMMUs can access the target storage space at the same time, preventing other IOMMUs from modifying the data in the storage space, and ensuring data storage consistency in the memory.
  • the IOMMU is specifically configured to mark the target storage space as the exclusive state row by row according to cache lines.
  • the target storage space is greater than 8 bytes.
  • the IOMMU reads or writes the memory, and can set the read/write data length to a cacheline.
  • the cacheline can usually be 1 byte (byte, B) to 256B, for example, 64B, 128B or 256B, etc. , so the IOMMU can exclusively lock the cacheline as a unit, that is, when the IOMMU reads the memory, it can monopolize the storage space of the cacheline length (greater than 8 bytes), which can solve the problem that only 8 bytes of storage can be locked at a time in the prior art. Therefore, the data consistency requirements of accessing larger storage space at the same time cannot be met.
  • the IOMMU is further configured to: after writing the operation result into the target storage space, mark the target storage space as a shared state.
  • the IOMMU can release the exclusive use of the target storage space, that is, mark the target storage space as a shared state, so that other IOMMUs can read/write to the target storage space.
  • the IOMMU is specifically configured to mark the target storage space as the shared state line by line according to cache lines.
  • the IOMMU is further configured to: after writing the operation result into the target storage space, send response information to the RNIC, where the response information is used to indicate the IOMMU End the access to the target storage space.
  • the IOMMU can send a response message to the RNIC to inform the RNIC that it has finished accessing the target storage space, so that the RNIC can process other atomic operation requests corresponding to the target storage space.
  • the RNIC is further configured to send a remote direct memory access RDMA packet including the operation data to a remote service node, so that the remote server node can respond to the received operation data to perform the arithmetic operation.
  • the RNIC sends an RDMA message to the remote service node, and sends the operation data before the operation operation to the remote service node for use by the remote service node.
  • the remote service node can perform the same operation on the operation data to obtain the operation result, which can realize the access of the remote service node to the memory corresponding to the local service node, and ensure the data storage in the memory at the same time. consistency.
  • the present application provides a method for performing an atomic operation, including: an RNIC sends an instruction to read memory to an IOMMU, where the instruction to read memory includes a target storage address; The corresponding target storage space reads the operation data, and sends the operation data to the RNIC; the RNIC performs an operation operation on the operation data to obtain the operation result, and writes the operation result through the IOMMU the target storage space.
  • the IOMMU reads the operation data from the target storage space corresponding to the target storage address in an exclusive manner, including: after the IOMMU marks the target storage space as an exclusive state, The operation data is read from the target storage space.
  • the IOMMU marking the target storage space as the exclusive state includes: the IOMMU marking the target storage space as the exclusive state row by row according to cache lines.
  • the target storage space is greater than 8 bytes.
  • the method further includes: marking the target storage space as a shared state by the IOMMU.
  • the IOMMU marking the target storage space as the shared state includes: the IOMMU marking the target storage space as the shared state row by row according to cache lines.
  • the method further includes: the IOMMU sends response information to the RNIC, where the response information is used to indicate The IOMMU ends the access to the target storage space.
  • the method further includes: the RNIC sends an RDMA packet including the operation data to a remote service node, so that The remote server node performs the computing operation on the received computing data.
  • FIG. 1 is an exemplary structural diagram of a multi-node cluster
  • FIG. 2 is an exemplary structural diagram of a multi-node cluster
  • FIG. 3 is an exemplary structural diagram of an apparatus for performing atomic operations in the present application.
  • FIG. 4 is an exemplary flowchart of a method for performing an atomic operation in the present application.
  • At least one (item) refers to one or more, and "a plurality” refers to two or more.
  • “And/or” is used to describe the relationship between related objects, indicating that there can be three kinds of relationships, for example, “A and/or B” can mean: only A, only B, and both A and B exist , where A and B can be singular or plural.
  • the character “/” generally indicates that the associated objects are an “or” relationship.
  • At least one item(s) below” or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural items(s).
  • At least one (a) of a, b or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c" ", where a, b, c can be single or multiple.
  • Figure 1 is an exemplary structural diagram of a multi-node cluster.
  • a multi-node cluster can be formed for computing.
  • This example includes three service nodes (host1, host2, and host3), and each service node contains a network interface card (NIC).
  • NIC network interface card
  • RDMA technology came into being. RDMA is to quickly move data from one service node to the memory of another service node through the network, which will not cause any impact on the operating system and greatly reduce the central processing unit (CPU) resource consumption. RDMA can be simply understood as a hardware unit that specializes in data movement in memory. The source and destination of the movement are both CPU memory, so the latency is low.
  • a network interface card in a service node that supports the RDMA technology may be referred to as an RDMA network interface card (RDMA network interface card, RNIC).
  • FIG. 2 is an exemplary structural diagram of a multi-node cluster.
  • FIG. 2 takes two service nodes (host1 and host2) included in the cluster of FIG. 1 as an example. Both host1 and host2 support RDMA. Both host1 and host2 can adopt the structure shown in Figure 3 below, and host1 and host2 are connected through their respective RNICs, that is, RNIC1 in host1 and RNIC2 in host2 are connected to each other through cables or wireless.
  • RNIC1 in host1 and RNIC2 in host2 are connected to each other through cables or wireless.
  • FIG. 2 only exemplarily shows a structure of a multi-node cluster, but does not limit the structure of the multi-node cluster, that is, the multi-node cluster may also include more service nodes, and the The structures may be the same or different, which are not specifically limited in this application.
  • Fig. 3 is an exemplary structural diagram of an apparatus for performing atomic operations in the present application. As shown in Fig. 3, the apparatus can be applied to the above-mentioned service node (or called host) including a memory, a bus, and a memory management unit. MMU), input output memory management unit (IOMMU), and RNIC.
  • MMU memory management unit
  • IOMMU input output memory management unit
  • RNIC resource management unit
  • MMU is a kind of computer hardware responsible for processing memory access requests of processors, and its functions include translation of virtual addresses to physical addresses (ie, virtual memory management), memory protection, and control of processor caches.
  • the IOMMU is a memory management unit that connects an I/O bus with direct memory access (DMA) capability to memory.
  • DMA direct memory access
  • an IOMMU can map device-visible virtual addresses (also referred to herein as device addresses or I/O addresses) to physical addresses.
  • the IOMMU can also be called a system memory management unit (SMMU), and ARM defines its IOMMU version as SMMU.
  • SMMU system memory management unit
  • Memory also known as internal memory and main memory, is used to temporarily store operational data in the processor and data exchanged with external memory such as hard disks.
  • the memory is the bridge between the external memory and the processor, and all programs in the service node run in the memory. As long as the service node starts running, the operating system will transfer the data that needs to be calculated from the memory to the processor for operation. When the operation is completed, the processor will transmit the result.
  • RDMA allows other service nodes to directly access data in memory through RNIC without going through the processor.
  • RNICs are computer hardware designed to allow service nodes to communicate in a network, so that multiple service nodes can be connected to each other by cables or wirelessly. RNICs of multiple service nodes can communicate by transmitting RDMA packets.
  • the MMU and the IOMMU are interconnected through the bus and the memory.
  • the bus is an internal structure, and various components of the service node are connected through the bus.
  • the processor is the final execution unit for information processing and program operation.
  • the device for performing atomic operations of the present application may perform the atomic operations by using the following steps, as shown in FIG. 4 :
  • the remote server node sends an RDMA packet to the RNIC, where the RDMA packet includes information indicating an atomic operation.
  • Atomic operation refers to one or a series of operations that cannot be interrupted. It is a minimal unit of execution, so the atomic operation will not be interrupted by the operations of other threads during the running process.
  • Atomic operations generally include three steps of reading memory, operating operations and writing memory. These three steps can also be called three steps of reading, modifying and overwriting in turn.
  • reading memory refers to the target storage address in the memory corresponding to The data stored in the target storage space is read out;
  • the operation operation refers to adding (subtracting) the data obtained in the preceding step of reading the memory and the data contained in the information indicating the atomic operation to obtain the operation result, or, the aforementioned
  • the data obtained in the step of reading the memory is compared with the data contained in the information indicating the atomic operation to obtain the operation result;
  • the writing to the memory refers to writing the operation result obtained in the preceding operation step into the target storage space corresponding to the target storage address .
  • the above three steps of reading memory, computing operation and writing memory need to be performed at one time.
  • the RNIC of the service node can receive a remote direct memory access (remote direct memory access, RDMA) message sent by the remote service node (which may be the RNIC of the remote service node), where the RDMA message includes information indicating an atomic operation.
  • the remote service node needs to perform operations on the data stored in the memory corresponding to the service node, so the remote service node can send an RDMA message to the service node, and carry the atomic operation-related data in the RDMA message.
  • the atomic operation may include read memory, operation operation and write memory.
  • the information related to the atomic operation may include the target storage address of the data stored in the memory corresponding to the service node, and another data to be subjected to the operation operation. and the type of arithmetic operation (eg addition).
  • the RNIC sends a memory read instruction to the IOMMU, where the memory read instruction includes a target storage address.
  • the RNIC of the service node After the RNIC of the service node receives the RDMA message, it parses the RDMA message to obtain the information related to the atomic operation carried in the RDMA message, and then sends the instruction to read the memory to the IOMMU, instructing the IOMMU from the memory corresponding to the target storage address
  • the data is read in the target storage space, and the target storage address can be a virtual address.
  • the IOMMU reads the operation data from the target storage space corresponding to the target storage address in an exclusive manner, and the target storage space is provided by the memory.
  • the IOMMU is a computer hardware responsible for processing memory access requests. After receiving a memory read instruction from the RNIC, it initiates a read operation to the memory according to the target storage address in the memory read instruction.
  • the IOMMU accesses the target storage space corresponding to the target storage address in an exclusive manner to read data from it, that is, the IOMMU locks the target storage space and can only read/write data from it, while the service node or remote service node in the No other IOMMU can access the target storage space at the same time, which provides a basic guarantee for the consistency of data storage in memory, and prevents other IOMMUs from modifying the data in the target storage space after the IOMMU reads the data, resulting in inconsistent data. question.
  • the IOMMU sends a read-only instruction (ReadUnique) for the target storage space to the memory, and marks the exclusive (E) state in the read-only instruction, and the bus between the IOMMU and the memory recognizes that the read-only instruction marks the E state , so that other bus operations, including the processor accessing the target storage space through the MMU, and other RNICs accessing the target storage space through the IOMMU, are inaccessible to the target storage space.
  • ReadUnique a read-only instruction
  • E exclusive
  • the IOMMU may mark the target storage space as an exclusive state (E state) line by line according to the cache line.
  • E state exclusive state
  • the IOMMU performs a read operation or a write operation on the memory, and the read/write data length can be set to a cacheline, and the cacheline can usually be 1 byte (byte, B) ⁇ 256B, for example, 64B, 128B or 256B, etc., so the IOMMU can perform E-state locking in the unit of cacheline in the above read-only instructions, that is, when the IOMMU reads the memory, it can exclusively occupy the storage space of the cacheline length.
  • the IOMMU sends the operation data to the RNIC.
  • the IOMMU reads the operation data from the target storage space, and then sends the operation data to the RNIC.
  • the RNIC performs an operation on the operation data to obtain an operation result.
  • the RNIC receives the operation data from the IOMMU, and performs the operation in the atomic operation on the operation data to obtain the operation result. For example, the data contained in the information related to the atomic operation and the operation data are added (subtracted) to obtain the sum (difference). As a result, alternatively, a comparison result is obtained by comparing the data contained in the information related to the atomic operation with the operation data.
  • the RNIC sends a memory write instruction to the IOMMU, where the memory write instruction includes an operation result.
  • the RNIC transmits the operation result to the IOMMU through a write memory instruction, marked as WriteBack, and saves the operation data before the operation operation at the RNIC.
  • the IOMMU writes the operation result into the target storage space.
  • the IOMMU after the IOMMU receives the memory write instruction, the operation result matched to the memory write instruction corresponds to the atomic operation in the above steps, and then the target storage address corresponding to the atomic operation is determined, and the The operation result is stored in the target storage space corresponding to the target storage address.
  • the IOMMU can first match the operation results from the RNIC with the atomic operations to be processed, and then compare the operation results. Stored in the target storage space corresponding to the atomic operation on the matching, the matching of the IOMMU can be based on the operation result and the identification information in the atomic operation, which is not specifically limited.
  • the operation result obtained by performing the operation on the operation data is written in the storage space of the operation data, which is consistent with the operation result obtained by the remote service node performing the same operation operation on the operation data below, so as to realize the in-memory storage space. Data storage consistency.
  • S7 and IOMMU mark the target storage space as a shared state.
  • the IOMMU can release the exclusive use of the target storage space, that is, mark the target storage space as a shared state, so that other IOMMUs can read/write to the target storage space.
  • the IOMMU sends response information to the RNIC, where the response information is used to instruct the IOMMU to end the access to the target storage space.
  • the IOMMU can send a response message to the RNIC to inform the RNIC that it has finished accessing the target storage space, so that the RNIC can process other atomic operation requests corresponding to the target storage space.
  • the RNIC sends an RDMA message to the remote service node, where the RDMA message includes operation data.
  • the RNIC sends a response (RDMA message) to the remote service node, and sends the operation data before the operation operation to the remote service node for use by the remote service node.
  • RDMA message a response
  • the remote service node can perform the same operation on the operation data to obtain the operation result, which can realize the access of the remote service node to the memory corresponding to the local service node, and ensure the data storage in the memory at the same time.
  • the above atomic operation may be a masked atomic operation.
  • the IOMMU in the service node can exclusively access the target storage space stored in the memory of one of the data to be performed the atomic operation, that is, the IOMMU locks the target storage space, which can only be accessed by You can read/write data from it yourself, and other IOMMUs in the service node or remote service node cannot access the target storage space at the same time, which provides a basic guarantee for the consistency of data storage in the memory, and prevents other IOMMUs from reading data.
  • the IOMMU modifies the data in the target storage space, resulting in data inconsistency.
  • each step of the above method embodiments may be completed by a hardware integrated logic circuit in a processor or an instruction in the form of software.
  • the processor may be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other Programming logic devices, discrete gate or transistor logic devices, discrete hardware components.
  • DSP digital signal processor
  • ASIC application-specific integrated circuit
  • FPGA field programmable gate array
  • a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • the steps of the methods disclosed in the embodiments of the present application may be directly embodied as executed by a hardware coding processor, or executed by a combination of hardware and software modules in the coding processor.
  • the software modules may be located in random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers and other storage media mature in the art.
  • the storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware.
  • the memory mentioned in the above embodiments may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically programmable Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • Volatile memory may be random access memory (RAM), which acts as an external cache.
  • RAM random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous DRAM
  • SDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • direct rambus RAM direct rambus RAM
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the functions, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer-readable storage medium.
  • the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk and other media that can store program codes .

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Abstract

一种执行原子操作的装置和方法。一种执行原子操作的装置,包括:远程直接内存访问网卡RNIC和输入输出内存管理单元IOMMU,该RNIC用于向该IOMMU发送读内存的指令,该读内存的指令包括目标存储地址;该IOMMU用于以独占的方式从该目标存储地址对应的目标存储空间读取运算数据,并将该运算数据发送给该RNIC,该目标存储空间由内存提供;该RNIC还用于对该运算数据进行运算操作以获取运算结果,并且通过该IOMMU将该运算结果写入该目标存储空间。该装置为内存中的数据存储一致性提供了基础保证,避免数据不一致的问题。

Description

执行原子操作的装置和方法 技术领域
本申请涉及计算机技术领域,特别涉及一种执行原子操作的装置和方法。
背景技术
在人工智能(artificial intelligence,AI)和高性能计算(high performance computing,HPC)领域中,单节点计算性能已远远无法满足需求,通常需要多节点组建为集群进行计算。随着节点间通信量的增长,通信导致的内存拷贝和通信协议处理开销,占用了越来越多的中央处理器(central processing unit,CPU)资源。因此,提出了远程直接内存访问(remote direct memory access,RDMA)技术,使得一个节点可以通过网络把数据直接传入另一节点的内存,而不对操作系统造成任何影响,从而降低CPU的资源消耗。
但是,当多个节点(如多个RDMA网卡或者多个进程)同时访问同一个内存地址时,如何保证该内存地址中数据存储一致性是一个亟待解决的问题。
发明内容
本申请提供一种执行原子操作的装置和方法,为内存中的数据存储一致性提供了基础保证,避免数据不一致的问题。
第一方面,本申请提供一种执行原子操作的装置,包括:远程直接内存访问网卡RNIC和输入输出内存管理单元IOMMU;其中,所述RNIC,用于向所述IOMMU发送读内存的指令,所述读内存的指令包括目标存储地址;所述IOMMU,用于以独占的方式从所述目标存储地址对应的目标存储空间读取运算数据,并将所述运算数据发送给所述RNIC,所述目标存储空间由内存提供;所述RNIC,还用于对所述运算数据进行运算操作以获取运算结果,并且通过所述IOMMU将所述运算结果写入所述目标存储空间。
本申请在执行原子操作的过程中,服务节点中的IOMMU可以以独占的方式访问要进行原子操作的其中一个数据在内存中所存储的目标存储空间,即IOMMU将目标存储空间锁定,只能由自己从中读/写数据,而服务节点或远程服务节点中的其它IOMMU均不能同时对该目标存储空间进行访问,为内存中的数据存储一致性提供了基础保证,避免IOMMU读出数据后,其它IOMMU对该存储空间中的数据进行修改,从而导致数据不一致的问题。
在一种可能的实现方式中,所述IOMMU,具体用于:在将所述目标存储空间标记为独占态后,从所述目标存储空间内读取所述运算数据。
服务节点中的IOMMU将目标存储空间标记为独占态,然后从中读取运算数据,这样IOMMU可以将目标存储空间锁定,只能由自己从中读/写数据,而服务节点或远程服务节点中的其它IOMMU均不能同时对该目标存储空间进行访问,避免其它IOMMU对该存储空间中的数据进行修改,确保了内存中的数据存储一致性。
在一种可能的实现方式中,所述IOMMU,具体用于将所述目标存储空间按照缓存行逐行标记为所述独占态。
在一种可能的实现方式中,所述目标存储空间大于8字节。
IOMMU对内存进行读操作或写操作,可以将读/写的数据长度设置为一个缓存线(cacheline),cacheline通常可以是1字节(byte,B)~256B,例如,64B、128B或者256B等,因此IOMMU可以以cacheline为单位进行独占态锁定,即IOMMU在读内存时,可以将cacheline长度(大于8字节)的存储空间独占,这样可以解决现有技术中一次只能锁定8字节的存储空间,从而无法满足同时访问更大存储空间的数据一致性需求。
在一种可能的实现方式中,所述IOMMU,还用于:在将所述运算结果写入所述目标存储空间之后,将所述目标存储空间标记为共享态。
IOMMU在原子操作执行完毕后,可以释放对目标存储空间的独占,即将目标存储空间标记为共享态,这样其他的IOMMU就可以对该目标存储空间进行读/写。
在一种可能的实现方式中,所述IOMMU,具体用于将所述目标存储空间按照缓存行逐行标记为所述共享态。
在一种可能的实现方式中,所述IOMMU,还用于:在将所述运算结果写入所述目标存储空间之后,向所述RNIC发送响应信息,所述响应信息用于指示所述IOMMU结束对所述目标存储空间的访问。
IOMMU可以向RNIC发送响应信息以告知RNIC自己已经结束对目标存储空间的访问,这样RNIC可以处理其它对应于目标存储空间的原子操作请求。
在一种可能的实现方式中,所述RNIC,还用于向远端服务节点发送包含所述运算数据的远程直接内存访问RDMA报文,以使得所述远端服务器节点对接收的所述运算数据进行所述运算操作。
RNIC向远端服务节点发送RDMA报文,将运算操作之前的运算数据发送给远端服务节点,以供远端服务节点使用。这样远端服务节点在接收到运算数据后,可以对该运算数据进行相同的运算操作得到运算结果,可以实现远端服务节点对本地服务节点对应的内存的访问,同时保证了内存中的数据存储一致性。
第二方面,本申请提供一种执行原子操作的方法,包括:RNIC向IOMMU发送读内存的指令,所述读内存的指令包括目标存储地址;所述IOMMU以独占的方式从所述目标存储地址对应的目标存储空间读取运算数据,并将所述运算数据发送给所述RNIC;所述RNIC对所述运算数据进行运算操作以获取运算结果,并且通过所述IOMMU将所述运算结果写入所述目标存储空间。
在一种可能的实现方式中,所述IOMMU以独占的方式从所述目标存储地址对应的目标存储空间读取运算数据,包括:所述IOMMU在将所述目标存储空间标记为独占态后,从所述目标存储空间内读取所述运算数据。
在一种可能的实现方式中,所述IOMMU将所述目标存储空间标记为独占态,包括:所述IOMMU将所述目标存储空间按照缓存行逐行标记为所述独占态。
在一种可能的实现方式中,所述目标存储空间大于8字节。
在一种可能的实现方式中,所述通过所述IOMMU将所述运算结果写入所述目标存储空间之后,还包括:所述IOMMU将所述目标存储空间标记为共享态。
在一种可能的实现方式中,所述IOMMU将所述目标存储空间标记为共享态,包括:所述IOMMU将所述目标存储空间按照缓存行逐行标记为所述共享态。
在一种可能的实现方式中,所述通过所述IOMMU将所述运算结果写入所述目标存储 空间之后,还包括:所述IOMMU向所述RNIC发送响应信息,所述响应信息用于指示所述IOMMU结束对所述目标存储空间的访问。
在一种可能的实现方式中,所述RNIC对所述运算数据进行运算操作以获取运算结果之后,还包括:所述RNIC向远端服务节点发送包含所述运算数据的RDMA报文,以使得所述远端服务器节点对接收的所述运算数据进行所述运算操作。
附图说明
图1为多节点集群的一个示例性的结构图;
图2为多节点集群的一个示例性的结构图;
图3为本申请执行原子操作的装置的一个示例性的结构图;
图4为本申请执行原子操作的方法的一个示例性的流程图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚,下面将结合本申请中的附图,对本申请中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
本申请的说明书实施例和权利要求书及附图中的术语“第一”、“第二”等仅用于区分描述的目的,而不能理解为指示或暗示相对重要性,也不能理解为指示或暗示顺序。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元。方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
应当理解,在本申请中,“至少一个(项)”是指一个或者多个,“多个”是指两个或两个以上。“和/或”,用于描述关联对象的关联关系,表示可以存在三种关系,例如,“A和/或B”可以表示:只存在A,只存在B以及同时存在A和B三种情况,其中A,B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达,是指这些项中的任意组合,包括单项(个)或复数项(个)的任意组合。例如,a,b或c中的至少一项(个),可以表示:a,b,c,“a和b”,“a和c”,“b和c”,或“a和b和c”,其中a,b,c可以是单个,也可以是多个。
图1为多节点集群的一个示例性的结构图,如图1所示,由于在AI和HPC领域中,单节点计算性能已远远无法满足需求,因此可以由多节点组建集群进行计算。该示例中包括三个服务节点(host1、host2和host3),每个服务节点中包含一个网络接口卡(network interface card,NIC)。随着服务节点的增加,服务节点之间的通信越发频繁,而服务节点之间的数据同步通信成为集群继续扩大的瓶颈。
RDMA技术应运而生,RDMA是通过网络将数据从一个服务节点快速移动到另一个服务节点的内存中,这样不会对操作系统造成任何影响,大大降低了中央处理器(central processing unit,CPU)的资源消耗。可以简单的将RDMA理解为一个专门处理内存中的数据搬移的硬件单元,搬移的源端和目的端都是CPU的内存,因此延时低。支持RDMA技术的服务节点中的网络接口卡可以被称作RDMA网卡(RDMA network interface card, RNIC)。
图2为多节点集群的一个示例性的结构图,图2以图1集群中包括的两个服务节点(host1和host2)为例,host1和host2均支持RDMA。host1和host2均可以采用下文图3所示的结构,host1和host2之间通过各自的RNIC连接,即host1中的RNIC1和host2中的RNIC2通过电缆或无线相互连接。
需要说明的是,图2仅示例性的示出了多节点集群的一个结构,但并不对多节点集群的结构构成限定,即多节点集群中还可以包括更多的服务节点,各服务节点的结构可以相同或不相同,对此本申请均不作具体限定。
图3为本申请执行原子操作的装置的一个示例性的结构图,如图3所示,该装置可以应用于上述服务节点(或者称host)包括内存、总线、内存管理单元(memory management unit,MMU)、输入输出内存管理单元(input output memory management unit,IOMMU)和RNIC。
MMU是一种负责处理处理器的内存访问请求的计算机硬件,其功能包括虚拟地址到物理地址的转换(即虚拟内存管理)、内存保护、处理器高速缓存的控制等。IOMMU是一种内存管理单元,可以将具有直接存储器访问(direct memory access,DMA)能力的I/O总线连接至内存。例如,与传统的MMU(将处理器可见的虚拟地址转换为物理地址)一样,IOMMU可以将设备可见的虚拟地址(本文中也称设备地址或I/O地址)映射到物理地址。
需要说明的是,IOMMU又可以称为系统内存管理单元(system memory management unit,SMMU),ARM将其IOMMU版本定义为SMMU。
内存,也称内存储器和主存储器,用于暂时存放处理器中的运算数据,以及与硬盘等外部存储器交换的数据。内存是外部存储器与处理器进行沟通的桥梁,服务节点中所有程序的运行都在内存中进行。只要服务节点开始运行,操作系统就会把需要运算的数据从内存调到处理器中进行运算,当运算完成,处理器将结果传送出来。而RDMA可以让其他服务节点通过RNIC直接访问内存中的数据,而无需经过处理器。
RNIC是被设计用来允许服务节点在网络中进行通信的计算机硬件,使得多个服务节点可以通过电缆或无线相互连接。多个服务节点的RNIC之间可以通过传输RDMA报文进行通信。
进一步,MMU和IOMMU通过总线和内存进行互联,总线是一种内部结构,服务节点的各个部件通过总线相连接。
处理器作为服务节点的运算和控制核心,是信息处理、程序运行的最终执行单元。
为了保证该内存地址中数据存储一致性,本申请的执行原子操作的装置可以采用以下步骤进行原子操作,如图4所示:
S0、远端服务器节点向RNIC发送RDMA报文,该RDMA报文包括指示原子操作的信息。
原子操作(atomic operation)是指不可被中断的一个或一系列操作,是一种最小单位的执行过程,因此原子操作在运行过程中不会被其它线程的操作所打断。
原子操作一般包括读内存、运算操作和写内存三个步骤,这三个步骤也可以依次称为读取、修改和覆写三个步骤,其中,读内存是指将内存中的目标存储地址对应的目标存储 空间中存储的数据读取出来;运算操作是指将前述读内存步骤中获取到的数据与指示原子操作的信息中包含的数据相加(减)以得到运算结果,或者,将前述读内存步骤中获取到的数据与指示原子操作的信息中包含的数据作比较以得到运算结果;写内存是指将前述运算操作步骤中得到的运算结果写入目标存储地址对应的目标存储空间内。基于原子操作的需求,上述读内存、运算操作和写内存三个步骤需要一次性执行完。
服务节点的RNIC可以接收远端服务节点(可以是远端服务节点的RNIC)发送的远程直接内存访问(remote direct memory access,RDMA)报文,该RDMA报文包括指示原子操作的信息。例如,远端服务节点要对存储于服务节点对应的内存中的数据进行运算操作,因此远端服务节点可以向服务节点发送RDMA报文,并在该RDMA报文中携带上与原子操作相关的信息。例如,原子操作可以包括读内存、运算操作和写内存,相应的,与原子操作相关的信息可以包括存储于服务节点对应的内存中的数据的目标存储地址、要进行运算操作的另一个数据,以及运算操作的类型(例如相加)。
S1、RNIC向IOMMU发送读内存的指令,该读内存的指令包括目标存储地址。
服务节点的RNIC收到RDMA报文后,解析该RDMA报文,得到RDMA报文中携带的与原子操作相关的信息,然后向IOMMU发送读内存的指令,指示IOMMU从内存中的目标存储地址对应的目标存储空间中读取数据,该目标存储地址可以是虚拟地址。
S2、IOMMU以独占的方式从目标存储地址对应的目标存储空间读取运算数据,目标存储空间由内存提供。
IOMMU是一种负责处理内存访问请求的计算机硬件,收到来自RNIC的读内存的指令后,根据读内存的指令中的目标存储地址,向内存发起读操作。
本申请中,IOMMU以独占的方式访问目标存储地址对应的目标存储空间从中读取数据,即IOMMU将目标存储空间锁定,只能由自己从中读/写数据,而服务节点或远程服务节点中的其它IOMMU均不能同时对该目标存储空间进行访问,为内存中的数据存储一致性提供了基础保证,避免IOMMU读出数据后,其他IOMMU对目标存储空间中的数据进行修改,从而导致数据不一致的问题。例如,IOMMU向内存发送针对目标存储空间的只读指令(ReadUnique),并在只读指令中标记独占(Exclusive,E)态,IOMMU和内存之间的总线识别到只读指令中标记了E态,这样其他的总线操作,包括处理器通过MMU访问目标存储空间、其他RNIC通过IOMMU访问目标存储空间等,就对该目标存储空间不可访问。
可选的,IOMMU可以将目标存储空间按照缓存行逐行标记为独占态(E态)。
本申请中,IOMMU对内存进行读操作或写操作,可以将读/写的数据长度设置为一个缓存线(cacheline),cacheline通常可以是1字节(byte,B)~256B,例如,64B、128B或者256B等,因此IOMMU在上述只读指令中可以以cacheline为单位进行E态锁定,即IOMMU在读内存时,可以将cacheline长度的存储空间独占。
S3、IOMMU将运算数据发送给RNIC。
IOMMU从目标存储空间中读取运算数据,然后将运算数据发送给RNIC。
S4、RNIC对运算数据进行运算操作获取运算结果。
RNIC接收来自IOMMU的运算数据,对运算数据进行原子操作中的运算操作得到运算结果,例如,将与原子操作相关的信息中包含的数据和运算数据进行相加(减)得到求 和(差)结果,或者,将与原子操作相关的信息中包含的数据和运算数据进行比较得到比较结果。
S5、RNIC向IOMMU发送写内存的指令,该写内存的指令包括运算结果。
RNIC将运算结果通过写内存的指令,标记为WriteBack传递到IOMMU,在RNIC处将进行运算操作之前的运算数据保存起来。
S6、IOMMU将运算结果写入目标存储空间。
在一种可能的实现方式中,IOMMU收到写内存的指令后,匹配到写内存的指令中的运算结果是对应于上述步骤中的原子操作,进而确定该原子操作对应的目标存储地址,将运算结果存入目标存储地址对应的目标存储空间。这样如果RNIC收到多个原子操作的请求时,为避免各个原子操作的运算结果存入错误的存储空间,IOMMU可以先对来自RNIC的运算结果和待处理的原子操作进行匹配,然后将运算结果存入匹配上的原子操作对应的目标存储空间,IOMMU的匹配可以基于运算结果和原子操作中的标识信息,对此不做具体限定。
运算数据的存储空间内被写入了对运算数据进行运算操作后得到的运算结果,以和下文中远端服务节点对运算数据进行相同的运算操作得到的运算结果保持一致,从而实现内存中的数据存储一致性。
S7、IOMMU将目标存储空间标记为共享态。
IOMMU在原子操作执行完毕后,可以释放对目标存储空间的独占,即将目标存储空间标记为共享态,这样其他的IOMMU就可以对该目标存储空间进行读/写。
S8、IOMMU向RNIC发送响应信息,该响应信息用于指示IOMMU结束对目标存储空间的访问。
IOMMU可以向RNIC发送响应信息以告知RNIC自己已经结束对目标存储空间的访问,这样RNIC可以处理其它对应于目标存储空间的原子操作请求。
S9、RNIC向远端服务节点发送RDMA报文,该RDMA报文包括运算数据。
RNIC向远端服务节点发送响应(RDMA报文),将运算操作之前的运算数据发送给远端服务节点,以供远端服务节点使用。这样远端服务节点在接收到运算数据后,可以对该运算数据进行相同的运算操作得到运算结果,可以实现远端服务节点对本地服务节点对应的内存的访问,同时保证了内存中的数据存储一致性。
可选的,上述原子操作可以是带掩码的原子操作。
需要说明的是,上述原子操作的过程描述为一系列的步骤或操作,应当理解的是,上述过程可以以各种顺序执行和/或同时发生,不限于上述执行顺序。
本申请在执行原子操作的过程中,服务节点中的IOMMU可以以独占的方式访问要进行原子操作的其中一个数据在内存中所存储的目标存储空间,即IOMMU将目标存储空间锁定,只能由自己从中读/写数据,而服务节点或远程服务节点中的其它IOMMU均不能同时对该目标存储空间进行访问,为内存中的数据存储一致性提供了基础保证,避免IOMMU读出数据后,其它IOMMU对该目标存储空间中的数据进行修改,从而导致数据不一致的问题。
在实现过程中,上述方法实施例的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。处理器可以是通用处理器、数字信号处理器(digital signal  processor,DSP)、特定应用集成电路(application-specific integrated circuit,ASIC)、现场可编程门阵列(field programmable gate array,FPGA)或其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。本申请实施例公开的方法的步骤可以直接体现为硬件编码处理器执行完成,或者用编码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器,闪存、只读存储器,可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器,处理器读取存储器中的信息,结合其硬件完成上述方法的步骤。
上述各实施例中提及的存储器可以是易失性存储器或非易失性存储器,或可包括易失性和非易失性存储器两者。其中,非易失性存储器可以是只读存储器(read-only memory,ROM)、可编程只读存储器(programmable ROM,PROM)、可擦除可编程只读存储器(erasable PROM,EPROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory,RAM),其用作外部高速缓存。通过示例性但不是限制性说明,许多形式的RAM可用,例如静态随机存取存储器(static RAM,SRAM)、动态随机存取存储器(dynamic RAM,DRAM)、同步动态随机存取存储器(synchronous DRAM,SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM,DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM,ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM,SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM,DR RAM)。应注意,本文描述的系统和方法的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,上述描述的系统、装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
在本申请所提供的几个实施例中,应该理解到,所揭露的系统、装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储 在一个计算机可读取存储介质中。基于这样的理解,本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(个人计算机,服务器,或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器(read-only memory,ROM)、随机存取存储器(random access memory,RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种执行原子操作的装置,其特征在于,包括:远程直接内存访问网卡RNIC和输入输出内存管理单元IOMMU;其中,
    所述RNIC,用于向所述IOMMU发送读内存的指令,所述读内存的指令包括目标存储地址;
    所述IOMMU,用于以独占的方式从所述目标存储地址对应的目标存储空间读取运算数据,并将所述运算数据发送给所述RNIC,所述目标存储空间由内存提供;
    所述RNIC,还用于对所述运算数据进行运算操作以获取运算结果,并且通过所述IOMMU将所述运算结果写入所述目标存储空间。
  2. 根据权利要求1所述的装置,其特征在于,所述IOMMU,具体用于:
    在将所述目标存储空间标记为独占态后,从所述目标存储空间内读取所述运算数据。
  3. 根据权利要求2所述的装置,其特征在于,所述IOMMU,具体用于将所述目标存储空间按照缓存行逐行标记为所述独占态。
  4. 根据权利要求1-3中任一项所述的装置,其特征在于,所述IOMMU,还用于:
    在将所述运算结果写入所述目标存储空间之后,将所述目标存储空间标记为共享态。
  5. 根据权利要求4所述的装置,其特征在于,所述IOMMU,具体用于将所述目标存储空间按照缓存行逐行标记为所述共享态。
  6. 根据权利要求1-5中任一项所述的装置,其特征在于,所述IOMMU,还用于:
    在将所述运算结果写入所述目标存储空间之后,向所述RNIC发送响应信息,所述响应信息用于指示所述IOMMU结束对所述目标存储空间的访问。
  7. 根据权利要求1-6中任一项所述的装置,其特征在于,所述RNIC,还用于向远端服务节点发送包含所述运算数据的远程直接内存访问RDMA报文,以使得所述远端服务器节点对接收的所述运算数据进行所述运算操作。
  8. 一种执行原子操作的方法,其特征在于,包括:
    远程直接内存访问网卡RNIC向输入输出内存管理单元IOMMU发送读内存的指令,所述读内存的指令包括目标存储地址;
    所述IOMMU以独占的方式从所述目标存储地址对应的目标存储空间读取运算数据,并将所述运算数据发送给所述RNIC;
    所述RNIC对所述运算数据进行运算操作以获取运算结果,并且通过所述IOMMU将所述运算结果写入所述目标存储空间。
  9. 根据权利要求8所述的方法,其特征在于,所述IOMMU以独占的方式从所述目标存储地址对应的目标存储空间读取运算数据,包括:
    所述IOMMU在将所述目标存储空间标记为独占态后,从所述目标存储空间内读取所述运算数据。
  10. 根据权利要求9所述的方法,其特征在于,所述IOMMU将所述目标存储空间标记为独占态,包括:
    所述IOMMU将所述目标存储空间按照缓存行逐行标记为所述独占态。
  11. 根据权利要求8-10中任一项所述的方法,其特征在于,所述通过所述IOMMU将 所述运算结果写入所述目标存储空间之后,还包括:
    所述IOMMU将所述目标存储空间标记为共享态。
  12. 根据权利要求11所述的方法,其特征在于,所述IOMMU将所述目标存储空间标记为共享态,包括:
    所述IOMMU将所述目标存储空间按照缓存行逐行标记为所述共享态。
  13. 根据权利要求8-12中任一项所述的方法,其特征在于,所述通过所述IOMMU将所述运算结果写入所述目标存储空间之后,还包括:
    所述IOMMU向所述RNIC发送响应信息,所述响应信息用于指示所述IOMMU结束对所述目标存储空间的访问。
  14. 根据权利要求8-13中任一项所述的方法,其特征在于,所述RNIC对所述运算数据进行运算操作以获取运算结果之后,还包括:
    所述RNIC向远端服务节点发送包含所述运算数据的远程直接内存访问RDMA报文,以使得所述远端服务器节点对接收的所述运算数据进行所述运算操作。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105955801A (zh) * 2015-12-21 2016-09-21 上海交通大学 一种基于rdma和htm的分布式乐观并发控制方法
US20190102309A1 (en) * 2017-09-29 2019-04-04 Oracle International Corporation Nv cache
CN110471779A (zh) * 2019-07-22 2019-11-19 阿里巴巴集团控股有限公司 用于实现锁资源处理的方法和装置
CN111104459A (zh) * 2019-08-22 2020-05-05 华为技术有限公司 存储设备、分布式存储系统以及数据处理方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6721806B2 (en) * 2002-09-05 2004-04-13 International Business Machines Corporation Remote direct memory access enabled network interface controller switchover and switchback support

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105955801A (zh) * 2015-12-21 2016-09-21 上海交通大学 一种基于rdma和htm的分布式乐观并发控制方法
US20190102309A1 (en) * 2017-09-29 2019-04-04 Oracle International Corporation Nv cache
CN110471779A (zh) * 2019-07-22 2019-11-19 阿里巴巴集团控股有限公司 用于实现锁资源处理的方法和装置
CN111104459A (zh) * 2019-08-22 2020-05-05 华为技术有限公司 存储设备、分布式存储系统以及数据处理方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4318237A4 *

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