TWI573293B - Semiconductor light emitting device with thick metal layers - Google Patents

Description

Semiconductor light emitting device with thick metal layer

This invention relates to a semiconductor light emitting device having a thick metal layer.

Semiconductor light-emitting devices including light-emitting diodes (LEDs), resonant cavity light-emitting diodes (RCLEDs), vertical-cavity laser diodes (VCSELs) such as surface-emitting lasers, and edge-emitting lasers are currently available. One of the most effective light sources. The material systems currently of interest in the fabrication of high-intensity illumination devices capable of operating across the visible spectrum comprise III-V semiconductors, in particular binary, ternary, gallium, aluminum, indium and nitrogen, also known as III-nitride materials. And quaternary alloys. A group III nitride light-emitting device is usually produced by the following steps: metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques for sapphire, tantalum carbide, group III nitride, or A stack of semiconductor layers having different compositions and doping concentrations is epitaxially grown on other suitable substrates. The stack generally includes one or more n-type layers formed over the substrate, such as doped with yttrium, one or more luminescent layers formed over the or n-type layers in an active region, and formed thereon Above the active region, for example, one or more p-type layers doped with Mg. Electrical contacts are formed on the n-type and p-type regions.

Figure 1 illustrates an LED comprising a large area metal to metal interconnect as described in more detail in U.S. Patent 7,348,212. The structure illustrated in FIG. 1 includes a flip-chip light emitting device attached to a susceptor 70. The flip chip device includes a substrate 73 attached to a semiconductor device layer 74, the semiconductor device layer 74 including at least one light emitting layer disposed between an n-type region and a p-type region Use layers. The n-type contact 71 and the p-type contact 72 are electrically connected to the n-type and p-type regions of the semiconductor structure 74. Thin metal layers 76a and 77a are formed on contacts 71 and 72, and thin metal layers 76b and 77b are formed on susceptor 70. The thick ductile metal layers 78 and 79 are plated on either of the pedestal 70 or the contacts 71 and 72 and are therefore plated on either of the regions 76a and 77a, or the regions 76b and 77b. Metal layers 78 and 79 are selected to be ductile, have high thermal conductivity and electrical conductivity, and are moderately resistant to oxidation. For example, metal layers 78 and 79 may be Au, which has good thermal conductivity; may be Cu, which has even better thermal conductivity than Au; may be Ni; or may be Al, which is less expensive than Au or Cu. Metal layers 78 and 79 may have a thickness between 1 and 50 microns and a thickness typically between 5 and 20 microns.

It is an object of the present invention to provide a semiconductor device comprising a thick metal layer that mechanically supports the semiconductor device such that a pedestal is not required to support the semiconductor device.

An apparatus according to an embodiment of the present invention includes a semiconductor structure including a light emitting layer sandwiched between an n-type region and a p-type region, and first and second metal contacts, wherein the first A metal contact is in direct contact with the n-type region and the second metal contact is in direct contact with the p-type region. First and second metal layers are respectively disposed on the first and second metal contacts. The first and second metal layers are thick enough to mechanically support the semiconductor structure. The device is reflective adjacent a portion of one of the sidewalls of one of the first and second metal layers.

A method according to an embodiment of the invention comprises providing one of semiconductor devices a wafer comprising a semiconductor structure comprising a light-emitting layer sandwiched between an n-type region and a p-type region; and first and second metal contacts of each semiconductor device, wherein Each of the first metal contacts is in direct contact with the n-type region, and each of the second metal contacts is in direct contact with the p-type region. First and second metal layers are respectively formed on the first and second metal contacts of each semiconductor device on the wafer. The first and second metal layers are thick enough to support the semiconductor structure during later processing. After forming the first and second metal layers, an electrically insulating layer filling a space between the first and second metal layers is formed. The method further includes forming a reflective region disposed adjacent a sidewall of one of the first and second metal layers.

Figure 2 illustrates one semiconductor light emitting device suitable for use in embodiments of the present invention. Although the semiconductor light emitting device emits one of the Group III nitride LEDs of blue or UV light in the discussion below, semiconductor light emitting devices other than LEDs, such as laser diodes, and other III-V families may also be used. A semiconductor light-emitting device made of a material, a Group III phosphide, a Group III arsenide, a Group II-VI material, ZnO, or other material system based on a material of germanium.

The apparatus illustrated in Figure 2 can be formed by first growing a semiconductor structure on a growth substrate 10 as is known in the art. The growth substrate 10 can be, for example, any suitable substrate such as sapphire, SiC, Si, GaN, or a composite substrate. An n-type region 14 may be grown first and the n-type region 14 may comprise multiple layers having different compositions and doping concentrations, for example, The layers comprise a preparation layer such as a buffer layer or a nucleation layer; and/or a layer designed to facilitate removal of the growth substrate, which may be an n-type or unintentionally doped layer, and effective for the illumination region An n-type or even p-type device layer designed to emit specific optical, material, or electrical properties. A light emitting region or active region 16 is grown over the n-type region. Examples of suitable illuminating regions include a single thick or thin luminescent layer, or a multi-quantum well illuminating region comprising a plurality of thin or thick luminescent layers separated by a barrier layer. A p-type region 18 can then be grown over the luminescent region. Like the n-type region, the p-type region can comprise a plurality of layers having different compositions, thicknesses, and doping concentrations, such as unintentionally doped layers or n-type layers. The total thickness of all semiconductor materials in the device is less than 10 μm in some embodiments, and less than 6 μm in some embodiments.

A p-contact metal 20 is formed on the p-type region. The p-contact metal 20 can be reflective and can be a multi-layer stack. For example, the p-contact metal can include a layer for ohmic contact with the p-type semiconductor material, a reflective metal layer, and a protective metal layer that prevents or reduces migration of the reflective metal. The semiconductor structure is then patterned by standard photolithography operations and etched to remove a portion of the entire thickness of the p-contact metal, a portion of the entire thickness of the p-type region, and a portion of the entire thickness of the light-emitting region to form at least one surface. The mesa reveals a surface of the n-type region 14 on which a metal n-contact 22 is formed.

A plan view of one of the devices illustrated in Figure 2 will appear similar to the plan view illustrated in Figure 5. The n-contact 22 can have the same shape as the thick metal layer 26 as described below. The p-contact 20 can have the following description with thick gold The genus layer 28 has the same shape. The n-contact and the p-contact are electrically isolated by a gap 24 filled with a solid, a dielectric, an electrically insulating material, air, ambient gas, or any other suitable material. The p and n contacts can be of any suitable shape and can be configured in any suitable manner. Those skilled in the art are familiar with patterning a semiconductor structure and forming n and p contacts. Therefore, the shapes and configurations of the n and p contacts are not limited to the embodiments illustrated in FIGS. 2 and 5.

Again, while a single illumination device is illustrated in Figure 2, it should be understood that the device illustrated in Figure 2 is formed on a wafer containing a plurality of such devices. In a region 13 between individual devices on a device wafer, the semiconductor structure can be etched down to an insulating layer that can be insulated as part of the semiconductor structure or growth substrate as illustrated in FIG. Semiconductor layer.

The LED structure illustrated in FIG. 2, which includes a semiconductor structure including n-type regions, p-type regions, and light-emitting regions, and the n- and p-contacts, is represented in simplified form by structure 12 in the following figures.

In an embodiment of the invention, a thick metal layer is formed on the n and p contacts of the LED. The thick metal layers can be formed on a wafer level prior to cutting a device wafer into individual groups or smaller groups of devices. The thick metal layers can support the device structure of FIG. 2 after cutting the device wafer, and in some embodiments can support the device structure of FIG. 2 during removal of the growth substrate.

FIG. 3 illustrates a thick metal layer formed on the n and p contacts of the LED 12. In some embodiments, one of the base layers not shown in FIG. 3 is first formed. The base layer is one or more metal layers on which the thick metal layers are deposited. For example, the base layer can comprise: an adhesive layer selected to bond well to the n and p contacts; and a seed layer selected to bond well to the thick metal layers. Examples of suitable materials for the adhesive layer include, but are not limited to, Ti, W, and alloys such as TiW. Examples of suitable materials for the seed layer include, but are not limited to, Cu. The base layer or the base layers can be formed by any suitable technique including, for example, sputtering or evaporation.

The base layer or the base layers may be patterned by standard lithography techniques such that the base layer only appears where the thick metal layers are to be formed. Alternatively, a photoresist layer can be formed over the base layer and patterned by standard lithography techniques to form openings that are to be formed at the openings.

Thick metal layers 26 and 28 are simultaneously formed over the n and p contacts of LED 12. The thick metal layers 26 and 28 can be, for example, any suitable metal such as copper, nickel, gold, palladium, nickel copper alloy, or other alloy. Thick metal layers 26 and 28 can be formed by any suitable technique including, for example, electroplating. Thick metal layers 26 and 28 may be between 20 μιη and 500 μιη in some embodiments, between 30 μιη and 200 μιη in some embodiments, and between 50 μιη and 100 μιη in some embodiments. The thick metal layers 26 and 28 support the semiconductor structure during a later processing step, particularly removal of the growth substrate, and provide a thermal path to conduct heat away from the semiconductor structure, which can improve the efficiency of the device.

After forming thick metal layers 26 and 28, an electrically insulating material 32 is formed over the wafer. The electrically insulating material 32 fills the gap 30 between the thick metal layers 26 and 28 and also fills the gap 34 between the LEDs 12. Electrical insulation material 32 is optionally placed over the top of the thick metal layers 26 and 28. Electrically insulating material 32 is selected to electrically isolate metal layers 26 and 28 and has a coefficient of thermal expansion that matches or is relatively close to the coefficient of thermal expansion of the (or other) metal of thick metal layers 26 and 28. For example, the electrically insulating material 32 may be epoxy or polyoxyxene in some embodiments. Electrically insulating material 32 can be formed by any suitable technique, including, for example, overmolding, injection molding, spin coating, and spray coating. Overmolding is performed as follows: A mold of a suitable size and shape is provided. The mold is filled with a liquid material, such as polyoxymethylene or epoxy, which forms a hardened electrically insulating material upon curing. The mold and LED wafers are placed together. The mold is then heated to cure (harden) the electrically insulating material. The mold and the LED wafer are then separated such that electrically insulating material 32 remains on the LEDs, between the LEDs, and fills any gaps on each of the LEDs. In some embodiments, one or more fillers are added to the molding compound to form a composite having optimized physical and material properties.

4 illustrates an optional processing step in which the device is planarized, for example, by removing any electrically insulating material overlying the thick metal layers 26 and 28. Electrically insulating material 32 can be removed by any suitable technique, including, for example, bead blasting, fly cutting, blade cutting, grinding, polishing, or chemical mechanical polishing. The electrically insulating material 30 between the thick metal layers 26 and 28 is not removed and the electrically insulating material 34 between adjacent LEDs is not removed.

Figure 5 is a plan view showing the structure shown in cross section in Figure 4. The cross section shown in Figure 4 is taken at the axis shown in Figure 5. Although the thick metal layer 26 formed on the n-junction illustrated in FIG. 2 is circular, it may have any shape. The thick metal layer 26 is formed by the p illustrated in FIG. The thick metal layer 28 on the joint is surrounded. The thick metal layers 26 and 28 are electrically isolated by an electrically insulating material 30 that surrounds the thick metal layer 26. Electrically insulating material 34 surrounds the device.

The shape and placement of the metal layers electrically connected to the n-type and p-type regions can be altered by forming additional layers of insulating material and metal (ie, redistributable thick metal layers 26 and 28), as shown in FIG. 6 and Diagramd in 7. In FIG. 6, an electrically insulating layer 36 is formed and then patterned by standard lithography techniques to form an opening 38 aligned with the thick metal layer 26 and an opening 40 aligned with the thick metal layer 28. Electrically insulating layer 36 can be any suitable material including, but not limited to, a dielectric layer, a polymer, benzocyclobutene, cerium oxide, cerium nitride, polyoxyn oxide, and epoxy. Electrically insulating layer 36 can be formed by any suitable technique including, but not limited to, plasma enhanced CVD, spin coating, spray coating, and molding.

In FIG. 7, metal bond pads 42 and 44 are formed on thick metal layers 26 and 28, respectively, formed in openings 38 and 40, respectively. In some embodiments, metal bond pads 42 and 44 are suitable for connection to a structure such as a PC board, such as by reflow soldering. Bonding pads 42 and 44 can be, for example, nickel, gold, aluminum, alloys, metal stacks, or solder. Bonding pads 42 and 44 can be formed by any suitable technique, including, for example, electroplating, sputtering, evaporation, or screen printing. Bonding pad 42 is electrically coupled to n-type region 14 of FIG. Bonding pad 44 is electrically coupled to p-type region 18 of FIG.

An alternative procedure for forming a device having a thick metal layer and a bond pad is illustrated in Figure 8. In FIG. 8, thick metal layers 26 and 28 are formed as described above with reference to FIG. Redistribution layers 46 and 48 are then separately shaped Formed on thick metal layers 26 and 28. Redistribution layers 46 and 48 are smaller than thick metal layers 26 and 28. For example, the redistribution layers 46 and 48 can be formed by first forming a photoresist layer over the thick metal layers 26 and 28, and then patterning the photoresist layer such that the opening in the photoresist layer is to be formed. Redistribute layers 46 and 48. Redistribution layers 46 and 48 are then formed by any suitable technique. For example, redistribution layers 46 and 48 may be copper formed by electroplating.

Figure 9 is an example of a plan view showing the structure of the cross-sectional view of Figure 8. The redistribution layer 46 is formed on a thick metal layer 26 that is surrounded by a thick metal layer 28. Gap 24 electrically isolates thick metal layers 26 and 28. The redistribution layer 48 is formed on the thick metal layer 28 but has a smaller lateral extent of the thicker metal layer 28.

In FIG. 10, an electrically insulating material 50 is formed over the structure illustrated in FIG. 8 as described above with reference to FIG. The electrically insulating material is then planarized as described above with reference to FIG. Electrically insulating material 50 fills gap 51 between thick metal layers 26 and 28, gap 52 between redistribution layers 46 and 48, and gap 54 between adjacent LEDs.

In Fig. 11, bond pads 56 and 58 are formed on redistribution layers 46 and 48, respectively. Bonding pads 56 and 58 can be the same as the bonding pads described above with reference to FIG. 12A and 12B show an example of a plan view of the structure shown in the cross-sectional view of Fig. 11. In the embodiment illustrated in FIG. 12A, the bond pads 56 electrically connected to the redistribution layer 46 have a much larger lateral extent than the redistribution layer 46 and the thick metal layer 26. Bonding pads 58 electrically connected to redistribution layer 48 have a lateral extent similar to redistribution layer 48. In the embodiment illustrated in Figure 12B, the bond pad 56 is substantially The pads 58 are joined in the same size and shape. A gap 57 electrically isolates bond pads 56 and 58.

In some embodiments, the growth substrate 10 is removed from the structure illustrated in FIG. 7 or the structure illustrated in FIG. The growth substrate can be removed by any suitable technique, including a combination of, for example, laser lift-off, etching, mechanical techniques such as grinding, or techniques. In some embodiments, the growth substrate is sapphire and is removed by wafer level laser lift-off. Since the sapphire substrate does not need to be thinned before removal and has not been cut, it can be reused as a growth substrate. The surface of the semiconductor structure exposed by the removal of the growth substrate (typically one surface of the n-type region 14) may optionally be thinned and roughened, for example by photoelectrochemical etching. In some embodiments, all or part of the growth substrate remains part of the final device structure.

The device wafer is then diced into individual LEDs or groups of LEDs. Individual LEDs or groups of LEDs may be separated by sawing, scribing, breaking, cutting or otherwise separating the electrically insulating material 34 or 54 between adjacent LEDs.

As illustrated in Figures 7 and 11, the electrically insulating material 34, 54 between adjacent LEDs can be narrow relative to its height, which can cause the electrically insulating material to pull away from the LED 12 and the thick metal layer 26 or 28 during cutting. Side. If the electrically insulating material 34, 54 is pulled away from the LED 12, the absence of support can cause the LED 12 to crack, which can result in poor device performance or even device failure.

In some embodiments, a three-dimensional anchoring feature is formed on the side of the thick metal layer that is in contact with the electrically insulating material 34, 54 at the edge of the LED 12 to anchor the electrically insulating material 34, 54 in place. These three-dimensional anchoring features interrupt the smooth, flat sidewalls of the thick metal layer. Examples of anchoring features are shown in Figures 13 and 14. And illustrated in Figure 15. Although FIGS. 13, 14, and 15 illustrate anchoring features formed on sidewalls of the thick metal layer 28 that are electrically connected to the p-type region 18, the anchoring features can be formed on the thick metal layer 26 or the thick metal layer 28 or both. . Moreover, alternatively or in addition to forming an anchoring feature on a sidewall facing the edge of a device, the anchoring feature can be formed on a sidewall of one of the thick metal layers in the interior of the LED (eg, in contact with the electrically insulating material 51) On the sidewalls of the thick metal layer 26 or 28, as illustrated in FIG.

In the structure illustrated in FIG. 13, the anchoring feature is formed in a recess 60 in the other flat sidewall of the thick metal layer 28. The recess 60 is filled with electrically insulating materials 34, 54 to anchor the electrically insulating material.

In the configuration illustrated in FIG. 14, the anchoring feature is a protrusion 62 that protrudes from the other flat side wall of the thick metal layer 28.

In the configuration illustrated in Figure 15, the anchoring features are a series of depressions and/or protrusions 64.

The recess 60 or protrusion 62 can be formed by a series of steps as illustrated in Figures 16, 17, 18, 19, 20, and 21: metal formation, electrically insulating material formation, planarization, and patterning. Only one portion of a thick metal layer 28 is illustrated. A thick metal layer 26 having anchoring features can also be formed as illustrated. The procedures described in Figures 16, 17, 18, 19, 20, and 21 can be illustrated in the procedures illustrated in Figures 3, 4, 6, and 7 or in Figures 8, 10, and 11 The instructions are used together. Although in the following description, the metal layer portion is formed by electroplating and the electrically insulating material portion is formed by molding, any suitable metal deposition or insulating material deposition technique may be used.

In Figure 16, a first portion 28A of a thick metal layer is electroplated over the LED 12 as described above. In Figure 17, a first portion 34A of electrically insulating material 34 or 54 is molded over the first metal portion 28A as described above, followed by planarization. A photoresist layer is then formed and patterned to form openings, and a second portion 28B of the thick metal layer 28 is to be formed at the openings. In Fig. 18, the second metal portion 28B is plated on the first metal portion 28A. As shown in Figure 18, the second metal portion 28B has a larger lateral extent than the first metal portion 28A. In Figure 19, a second portion 34B of one of electrically insulating material 34 or 54 is molded over second metal portion 28B and then planarized. A photoresist layer is then formed and patterned to form openings, and a third portion 28C of the thick metal layer 28 is to be formed at the openings. In Fig. 20, the third metal portion 28C is plated on the second metal portion 28B. As shown in Figure 20, the third metal portion 28C has a smaller lateral extent than the second metal portion 28B. The portion extending beyond the second metal portion 28A of the first metal portion 28A and the third metal portion 28C forms a protrusion 62 that anchors the electrically insulating materials 34A, 34B, and 34C. Those skilled in the art will appreciate that the processing steps illustrated in Figures 16, 17, 18, 19, 20, and 21 can be modified and/or repeated to form the illustrations in Figures 13, 14, and 15. Any of the structures.

In the configuration described above, the side of the device, i.e., the electrically insulating material 34 of Figure 7, and the side of the electrically insulating material 54 of Figure 11 can absorb light. Especially in applications where a mixing chamber is used, it is important that all surfaces are as reflective as possible. In some embodiments, a reflective material is added to the insulating material 34, 54 such that the sides of the electrically insulating material 34, 54 are reflective after cutting. For example, the highly reflective TiO ₂ and/or calcium silicate particles can be mixed with an electrically insulating material, such as epoxy or polyoxyl, which is molded or otherwise disposed over the wafer, as described above, for example. Description is made with reference to FIG. 3.

In some embodiments, a thermally conductive material may be added to the insulating materials 34, 54 in addition to or instead of the reflective material. For example, particles of aluminum nitride, SiO ₂ , graphite, BN, or any other suitable material may be added to the insulating materials 34, 54 to improve the thermal conductivity of the structure, and/or to design a thermal expansion coefficient (CTE) of the insulating material. The CTE of the semiconductor structure, the thick metal layers, or both are closely matched.

In some embodiments, as illustrated in FIG. 22, the device is cut such that the edges of the device are thicker than the sidewalls of the metal layer 28, rather than the sidewalls of the electrically insulating material 34,54. In some embodiments, after dicing, the sidewalls of the thick metal layer 28 are treated, for example, by wet chemical etching to reduce surface roughness. Reducing the surface roughness increases the reflectivity of the sidewalls. In some embodiments, after cutting, when the device is still attached to the disposal foil for cutting, one of the Al, Ni, Cr, Pd, or Ag coatings reflects the metal coating 66, a reflective alloy, or A reflective coating stack is formed on the side of the thick metal layer 28, for example by solid evaporation deposition or electroless plating.

In some embodiments, the side coating 66 is an insulating reflective material placed after the cutting device over the sidewall of the device while the device is still attached to the disposal foil for cutting. For example, individual devices can be separated and the separation channels can be filled with a highly reflective material when the individual devices are on the disposal foil. The highly reflective material can then be separated again. The device wafer can be formed into a separation track that is wide enough to accommodate two separation steps, or the treatment foil can be stretched twice to accommodate two separation steps. Examples of suitable reflective materials include polyfluorene oxide, or a transparent material such as polyfluorene oxide or epoxy resin filled with reflective particles such as TiO ₂ particles.

One or more optional structures, such as filters, lenses, dichroic materials, or wavelength converting materials, may be formed over the LEDs before or after the dicing. A wavelength converting material can be formed such that all or only a portion of the light emitted by the light emitting device and incident on the wavelength converting material can be converted by the wavelength converting material. The unconverted light emitted by the illumination device can be part of the final spectrum, but need not be. Examples of common combinations include LEDs that emit blue light in combination with a yellow light-emitting wavelength converting material, LEDs that emit blue light in combination with a wavelength converting material that emits green and red light, and one of wavelength conversion materials that emit blue and yellow light. An LED that emits UV light and an LED that emits UV light in combination with a wavelength converting material that emits blue, green, and red light. A wavelength converting material that emits light of other colors may be added to adjust the spectrum of light emitted from the device. The wavelength converting material may be a conventional phosphide microparticle, a quantum dot, an organic semiconductor, a II-VI or III-V semiconductor, a II-VI or III-V semiconductor quantum dot or a nanocrystal, a dye, a polymer. Or a material such as luminescent GaN. Any suitable phosphor may be used, including but not limited to, such as Y ₃ Al ₅ O ₁₂ :Ce(YAG), Lu ₃ Al ₅ O ₁₂ :Ce(LuAG), Y ₃ Al _5-x Ga _x O ₁₂ :Ce( YAlGaG), (Ba _1-x Sr _x )SiO ₃ :Eu(BOSE) garnet-based phosphor; and such as (Ca, Sr)AlSiN ₃ :Eu and (Ca,Sr,Ba) ₂ Si ₅ N ₈ : Ni-based nitride-based phosphors.

The thick metal layers 26 and 28 and the thick metal layers are filled and adjacent The electrically insulating material of the gap between the LEDs provides mechanical support to the semiconductor structure such that an additional pedestal such as a crucible or ceramic pedestal is not required. Removing the pedestal reduces the cost of the device and simplifies the processing required to form the device.

The present invention has been described in detail, and it will be apparent to those skilled in the art that the present invention can be modified without departing from the spirit of the invention. Therefore, the scope of the invention is not intended to be limited to the specific embodiments illustrated and described.

10‧‧‧ Growth substrate

12‧‧‧Structure/LED

13‧‧‧A region between devices

14‧‧‧n type area

16‧‧‧Lighting area/action area

18‧‧‧p-type area

20‧‧‧p junction/p junction metal

22‧‧‧n contacts

24‧‧‧ gap

26‧‧‧Thick metal layer

28‧‧‧Thick metal layer

28A‧‧‧The first part of the thick metal layer

28B‧‧‧The second part of the thick metal layer

28C‧‧‧The third part of the thick metal layer

30‧‧‧Gap/electrical insulation

32‧‧‧Electrical insulation materials

34‧‧‧Gap/electric insulation

34A‧‧‧The first part of electrical insulation

34B‧‧‧Part 2 of Electrical Insulation

34C‧‧‧Electrical insulation materials

36‧‧‧Electrical insulation

38‧‧‧ openings

40‧‧‧ openings

42‧‧‧Metal joint gasket

44‧‧‧Metal joint gasket

46‧‧‧ redistribution layer

48‧‧‧ redistribution layer

50‧‧‧Electrical insulation materials

51‧‧‧Gap/electrical insulation

52‧‧‧ gap

54‧‧‧Gap/electrical insulation

56‧‧‧bonding pad

57‧‧‧ gap

58‧‧‧Combination pad

60‧‧‧ dent

62‧‧‧Protruding

64‧‧‧Protruding

66‧‧‧Reflective metal coating

70‧‧‧Base

71‧‧‧n type contacts

72‧‧‧p-type contacts

73‧‧‧Substrate

74‧‧‧Semiconductor device layer/semiconductor structure

76a‧‧‧Thin metal layer/area

76b‧‧‧Thin metal layer/area

77a‧‧‧Thin metal layer/area

77b‧‧‧Thin metal layer/area

78‧‧‧metal layer

79‧‧‧metal layer

Figure 1 illustrates a prior art LED having one of a thick ductile metal interconnect.

Figure 2 illustrates a semiconductor LED suitable for use in embodiments of the present invention.

Figure 3 illustrates a thick metal layer formed on a metal contact of a semiconductor LED.

Figure 4 illustrates the structure of Figure 3 after planarizing the electrically insulating layer.

Figure 5 is a plan view of the structure illustrated in the cross-sectional view of Figure 4.

Figure 6 illustrates the structure of Figure 4 after patterning an electrically insulating layer formed over the thick metal layers.

Figure 7 illustrates the structure of Figure 6 after forming a bond pad.

Figure 8 illustrates a thick metal layer and a plated redistribution layer formed on the contacts of a semiconductor LED.

Figure 9 is a plan view showing the structure illustrated in the cross-sectional view of Figure 8.

Figure 10 illustrates Figure 8 after forming and planarizing an electrically insulating layer. Structure.

Figure 11 illustrates the structure of Figure 10 after forming a bond pad.

12A and 12B are plan views of different embodiments of the structure illustrated in the cross-sectional view of Fig. 11.

Figure 13 illustrates a portion of a thick metal layer having a recess to anchor the electrically insulating material.

Figure 14 illustrates a portion of a thick metal layer having a protrusion to anchor the electrically insulating material.

Figure 15 illustrates a portion of a thick metal layer having a plurality of features to anchor the electrically insulating material.

16, 17, 18, 19, 20, and 21 illustrate the formation of the protrusion anchoring features illustrated in FIG.

Figure 22 illustrates one device having a reflective sidewall.

10‧‧‧ Growth substrate

12‧‧‧Structure/LED

13‧‧‧A region between devices

14‧‧‧n type area

16‧‧‧Lighting area/action area

18‧‧‧p-type area

20‧‧‧p junction/p junction metal

22‧‧‧n contacts

24‧‧‧ gap

Claims (12)

A light emitting device includes: a semiconductor structure including a light emitting layer sandwiched between an n-type region and a p-type region; first and second metal contacts, wherein the first metal contact and the The n-type region is in direct contact, and the second metal contact is in direct contact with the p-type region; and the first and second metal layers are integrated with the light-emitting device and are respectively disposed in the first and the second a second metal contact, wherein the first and second metal layers are thick enough to mechanically support the semiconductor structure, and wherein the device is reflective adjacent to a portion of one of the first and second metal layers Sex. The device of claim 1, wherein the reflective sidewall is a reflective metal disposed on a sidewall of one of the first and second metal layers. The device of claim 1, wherein the reflective sidewall is a reflective electrically insulating material disposed adjacent one of the sidewalls of one of the first and second metal layers. The device of claim 3, wherein the reflective electrically insulating material comprises TiO ₂ disposed in one of polyoxymethylene and epoxy. The device of claim 1, wherein the first and second metal layers are thicker than 50 μm. A method of fabricating a light emitting device, the method comprising: providing a wafer of a semiconductor device, the wafer comprising: a semiconductor structure comprising a light emitting layer sandwiched between an n-type region and a p-type region; and a first and a second metal contact of each semiconductor device, wherein each first metal contact is in direct contact with the n-type region, and each second metal contact is in direct contact with the p-type region; Forming first and second metal layers on the first and second metal contacts of each of the semiconductor devices, wherein the first and second metal layers are thick enough to support the semiconductor structure during later processing After forming the first and second metal layers, forming an electrically insulating layer filling a space between the first and second metal layers; and forming one of the first and second metal layers adjacent to the first and second metal layers A reflective area disposed on one of the side walls. The method of claim 6, wherein forming the first and second metal layers comprises: plating the first and second metal layers on the wafer. The method of claim 6, wherein forming a reflective region comprises forming the electrically insulating layer with a reflective material. The method of claim 8, wherein the reflective material comprises TiO ₂ mixed with one of polyoxyn oxide and an epoxy resin. The method of claim 6, wherein forming a reflective region comprises forming a reflective metal on a sidewall of one of the first and second metal layers. The method of claim 10, further comprising: attaching the wafer to a disposal foil; and cutting the wafer into individual semiconductor devices or groups of semiconductor devices when attached to the handle foil; Forming a reflective metal on a sidewall of one of the first and second metal layers includes: after the wafer is diced, the wafer is still attached The reflective metal is deposited as the foil is disposed of. The method of claim 6, further comprising: attaching the wafer to a handle foil; and cutting the wafer into individual semiconductor devices or groups of semiconductor devices when attached to the handle foil; wherein forming adjacent ones a reflective region disposed on a sidewall of one of the first and second metal layers includes: adjacent to the sidewall deposition in a region formed by cutting the wafer while the wafer is still attached to the handle foil An electrically insulating reflective layer.