TWI569381B - 半導體裝置 - Google Patents

半導體裝置 Download PDF

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Publication number
TWI569381B
TWI569381B TW101118325A TW101118325A TWI569381B TW I569381 B TWI569381 B TW I569381B TW 101118325 A TW101118325 A TW 101118325A TW 101118325 A TW101118325 A TW 101118325A TW I569381 B TWI569381 B TW I569381B
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Taiwan
Prior art keywords
meth
layer
acrylate
silver
resin
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TW101118325A
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English (en)
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TW201248795A (en
Inventor
下邊安雄
村山龍一
三戶手啟二
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住友電木股份有限公司
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Publication of TW201248795A publication Critical patent/TW201248795A/zh
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Publication of TWI569381B publication Critical patent/TWI569381B/zh

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    • C—CHEMISTRY; METALLURGY
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    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00—Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
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    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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Description

半導體裝置
本發明係關於一種半導體裝置。
本申請案係基於2011年5月27日於日本提出申請之日本專利特願2011-119606號且主張其優先權，並將其內容引用於本文中。
作為將半導體元件接合於引線框架(lead frame)上之技術，已知有利用接著膜之技術。此種技術例如記載於專利文獻1中。專利文獻1中記載之接著膜係使用在熱硬化性樹脂中含有銀填料者。
[先前技術文獻] [專利文獻]
[專利文獻1]日本專利特開2002-118081號公報
[專利文獻2]日本專利特開2003-82034號公報
但是，本發明者等人研究之結果顯示，先前之接著膜在半導體元件與其他構件間之應力緩和能力方面尚有改善之餘地。
專利文獻2中記載，銀糊接著劑(silver paste adhesive)中，由於銀填料沈降，存在於上部之銀填料移動至下部，故而具有不均勻之銀填料分布。根據專利文獻2，包含糊之接著層中，銀填料之濃度自上表面朝向下表面增高，故而於其下表面接著力大幅下降。
因此，於本發明之技術領域中，一直謀求減低接著層之下表面的接著力下降。為了滿足如此之要求，一般認為較佳為使壓接於半導體元件與引線框架之間的接著層薄膜在其層厚方向上具有完全均勻之銀填料分布。
但是，本發明者等人研究之結果顯示，在銀填料完全均勻地分布之情形時，於接著層薄膜之界面無法充分獲得應力緩和能力。
本發明者等人進一步研究之結果發現，包含晶粒黏著糊(die attach paste)之接著層(以下，亦稱為DA層)於層厚方向上產生銀填料之不均勻分布。其機制尚不明確，本發明者等人推測當自兩側壓接晶粒黏著糊時，於糊之內部與外部，樹脂之流動不同。因此，DA層之內部的銀填料濃度提高，另一方面，DA層之兩界面的樹脂濃度提高。藉此，DA層之兩界面的應力緩和能力提高。
本發明者等人研究之結果發現以下之構成者較為適宜。
亦即，根據本發明，係提供：
[1]一種半導體裝置，其具備：基材、半導體元件、及存在於上述基材與上述半導體元件之間以接著兩者之接著層；且上述接著層中分散有導熱性填料，當將上述接著層整體中之上述導熱性填料之含有率設為C，將自上述接著層之上述半導體元件側之界面起至深度 2μm為止所含蓋之第1區域中的上述導熱性填料之含有率設為C1，將自上述接著層之上述基材側之界面起至深度2μm為止所含蓋之第2區域中的上述導熱性填料之含有率設為C2時，其滿足C1<C，且C2<C。
另外，本發明包含以下者。
[2]如[1]之半導體裝置，其中0.75<C1/C<0.97，且0.75<C2/C<0.97。
[3]如[1]或[2]之半導體裝置，其中上述導熱性填料含有選自以銀、銅、金、鋁、鎳、氧化鋁、二氧化矽所組成之群中的至少一種以上之粒子。
[4]如[1]至[3]中任一項之半導體裝置，其中上述基材為引線框架、散熱片或BGA基板。
[5]如[1]至[4]中任一項之半導體裝置，其中上述半導體元件為消耗電力1.7W以上之功率元件。
根據本發明，可提供一種產率優異之半導體裝置。
以下，使用圖式對本發明之實施形態進行說明。再者，所有圖式中，對相同之構成要素標附相同符號，且適宜省略說明。
圖1係表示本實施形態之半導體裝置10之構成的剖面圖。另外，圖2係將圖1所示之半導體裝置10之一部分擴大所得的圖。
本實施形態之半導體裝置10具備：基材(晶粒座(die pad)2)、半導體元件3、及存在於基材與半導體元件3之間以接著兩者之接著層1。接著層1含有導熱性填料8。半導體裝置10中，於接著層1中分散有導熱性填料8，且規定為當將接著層1整體中之導熱性填料8之含有率設為C，將自接著層1之半導體元件3側之界面起至深度2μm為止所含蓋之第1區域中的導熱性填料8之含有率設為C1，將自接著層1之基材(晶粒座2)側之界面起至深度2μm為止所含蓋之第2區域中的導熱性填料8之含有率設為C2時，其滿足C1<C，且C2<C。以下進行詳細說明。
接著層1係藉由以半導體元件3與晶粒座2壓接後述糊狀之樹脂組成物(晶粒黏著糊)而形成。本發明者等人發現，於自相對方向壓接晶粒黏著糊而獲得之接著層(以下，亦簡稱為接著層1)的壓接方向(即層厚方向)上，產生銀填料等導熱性填料8之不均勻分布。導熱性填料8形成不均勻分布之機制尚不明確，但可作如下推測。亦即，本發明者等人認為，當自兩側壓接晶粒黏著糊時，於糊之內部與外部，樹脂之流動不同。因此，接著層1之內部的導熱性填料8之濃度與界面相比提高。另一方面，接著層1之兩界面的樹脂濃度與內部相比提高。如此之接著層1可規定為C1<C，且C2<C。研究結果發現，滿足此種特性之接著層1之兩界面之應力緩和能力優異。因此，藉由硬化時具有應力緩和能力之接著層1，可保護半導體元件3，因此半導體裝置10之產率提高。
先前，接著層之銀填料之分布為如下2種。亦即，第1種係自接著層之上表面至下表面銀填料之濃度增高之分 布。第2種係自接著層之上表面至下表面銀填料之濃度完全均勻之分布。於第1種分布中，接著層之下表面的銀填料濃度變得非常高，故而接著層之下表面的接著力降低。另一方面，於第2種分布中，銀填料係含蓋接著層整體而均勻地分布，因此於接著層薄膜之界面無法獲得充分之應力緩和能力。
相對於此，根據本實施形態，接著層1係構成為上層及下層之導熱性填料8之濃度均低於內部。因此，接著層1可於上下之界面發揮應力緩和能力，並且可發揮優異之接著特性。
於本實施形態中，接著層1較佳為滿足0.75<C1/C<0.97，且0.75<C2/C<0.97。藉由使C1/C及C2/C為上限值以下，則熱收縮減小，可充分地發揮應力緩和能力。並且，可充分地發揮接著能力。另一方面，藉由使C1/C及C2/C為下限值以上，則線膨脹係數減小，可抑制產生龜裂。另外，由於可抑制線膨脹增大，故而亦可抑制接著層1產生翹曲。亦即，可獲得應力緩和能力與耐龜裂特性之平衡優異的接著層1。於本實施形態中，可藉由適當選擇接著層1之材料以及適當控制半導體裝置10之製造方法，而調整C1及C2之數值。
如圖2所示，接著層1之上表面與半導體元件3之下表面接合。接著層1之下表面與晶粒座2接合。於在半導體元件3相對於晶粒座2之載置方向上觀察時之剖面圖中，L1表示自接著層1之半導體元件3側之界面起之深度。另外，於該剖面圖中，L2表示自接著層1之基材(晶粒座2)側之界面起之深度。此外，於該剖面圖中，L表示接著 層1整體之膜厚。再者，接著層1亦可形成為將半導體元件3之下表面與側壁之一部分一起覆蓋。此時，L1、L2及L亦如上所述般，由配置於半導體元件3之下表面與晶粒座2之上表面之間的接著層1的部分而規定。L1、L2及L可由接著層1之SEM(scanning electron microscope，掃描式電子顯微鏡)剖面影像而計算出。
另外，於本實施形態中，L1/L及L2/L並無特別限定，例如較佳為1/10以上1/5以下，更佳為1/8以上1/6以下。藉由使L1/L及L2/L為下限值以上，可發揮充分之應力緩和能力。另一方面，藉由使L1/L及L2/L為上限值以下，可抑制產生龜裂。
另外，於本實施形態中，接著層1之總厚度L並無特別限定，例如較佳為6μm以上200μm以下，更佳為8μm以上100μm以下。藉由使接著層1之總厚度L為下限值以上，可發揮充分之應力緩和能力。另一方面，藉由使接著層1之總厚度L為上限值以下，可抑制產生龜裂。
作為導熱性填料8之含有率之計算方法，例如可採用下述方法。亦即，首先，對厚度方向上之接著層1之SEM剖面圖進行二值化處理。於二值化處理中，將閾值設定為由糊之硬化物藉由灰分測定所得的硬化物中之導熱性填料之體積分率X。繼而，將藉由二值化處理所得的二值化影像沿厚度方向以0.2μm之間隔進行切割，計算出各層中之導熱性填料8之含量。於本實施形態中，作為導熱性填料8係對銀之情形進行說明，但其他填料亦可以同樣之方式而計算出。於此，含量之計算方法係如下所述。首先，自上側向下側定義為1層、2層......N層。另一方面，自下側向 上側定義為1'層、2'層......N'層。繼而，(1)計算出自上側向下側直至N層為止之含量。然後，以下述方式而求出銀比率：第1層之銀比率=(1層之銀量/X)×100，至第2層為止之銀比率=((1+2)層之銀量/X)×100，......，至第N層為止之銀比率=((1+2+......+N)層之銀量/X)×100=(X/X)×100=100。同樣地，(2)計算出自下側至上側為止之含量。然後，以下述方式求出銀比率：第1'層之銀比率=(1'層之銀量/X)×100，至第2'層為止之銀比率=((1'+2')層之銀量/X)×100，......，至第N'層為止之銀比率=((1+2+......+N')層之銀量/X)×100=(X/X)×100=100。由該等數值，計算出自上側及下側距離變動時相對於銀總量的各層之銀比率。然後，自接著層1之半導體元件3側之界面起至深度2μm為止所含蓋之第1區域中的C1/C採用(1)自上側朝向下側而計算出的至第10層為止之銀比率。另一方面，自接著層1之基材(晶粒座2)側之界面起至深度2μm為止所含蓋之第2區域中的C2/C採用(2)自下側朝向上側而計算出的至第10'層為止之銀比率。
導熱性填料8係含於接著層1中。導熱性填料8並無特別限定，除銀、銅、金、鋁、鎳、氧化鋁、二氧化矽之粒子以外，亦可使用以銀作為主成分，於例如銅、金、鎳、鈀、錫等金屬粒子或該等之合金粒子，氧化鋁、二氧化矽等氧化物粒子之表面鍍敷有銀等的粒子等。關於導熱性填料8之大小，例如為球形狀之情形時，平均粒徑D50雖並無特別限定，但較佳為0.05μm以上20μm以下，更佳為0.1μm以上10μm以下。藉此，填料之分散特性提高。平均粒 徑之測定方法並無特別限定。再者，平均粒徑可使用例如流場式顆粒影像分析裝置(flow particle image analyzer)、利用雷射繞射-散射法之粒度分布測定裝置等進行測定。
於本實施形態中，基材(晶粒座2)並無特別限定，可使用引線框架、其他半導體元件、包括電路基板在內之封裝基板、半導體晶圓等各種基材。其中，引線框架、散熱片或BGA基板由於接著層1可發揮散熱功能因而較佳。另外，其中其他半導體元件由於接著層1可發揮優異之應力緩和能力因而亦較佳。其中，半導體晶圓由於接著層1可用作切晶(dicing)用膜因而亦較佳。
另外，半導體元件3並無特別限定，例如較佳為消耗電力1.7W以上之功率元件。半導體元件3經由焊墊7及接合線6而與引線4電性連接。另外，半導體元件3之周圍由密封材料層5密封。
以下，就接著層1中使用之糊狀之樹脂組成物進行說明。
於本實施形態中，接著層1例如係藉由使熱硬化性接著劑組成物硬化而獲得。作為熱硬化性接著劑組成物，較佳為包含藉由加熱而形成立體網狀結構的普通熱硬化性樹脂。熱硬化性樹脂並無特別限定，較佳為形成液狀樹脂組成物之材料，較理想為於室溫(25℃)下為液狀。例如可列舉：氰酸酯樹脂、環氧樹脂、自由基聚合性之丙烯酸系樹脂、順丁烯二醯亞胺樹脂等。熱硬化性接著組成物亦可根據目的而含有硬化劑、硬化促進劑、聚合起始劑等各種添加劑。
氰酸酯樹脂係分子內具有-NCO基之化合物，且係藉由 加熱而-NCO基進行反應從而形成立體網狀結構並硬化之樹脂。具體例示則可列舉1,3-二氰氧基苯(1,3-dicyanatobenzene)、1,4-二氰氧基苯、1,3,5-三氰氧基苯、1,3-二氰氧基萘、1,4-二氰氧基萘、1,6-二氰氧基萘、1,8-二氰氧基萘、2,6-二氰氧基萘、2,7-二氰氧基萘、1,3,6-三氰氧基萘、4,4'-二氰氧基聯苯、雙(4-氰氧基苯基)甲烷、雙(3,5-二甲基-4-氰氧基苯基)甲烷、2,2-雙(4-氰氧基苯基)丙烷、2,2-雙(3,5-二溴-4-氰氧基苯基)丙烷、雙(4-氰氧基苯基)醚、雙(4-氰氧基苯基)硫醚、雙(4-氰氧基苯基)碸、亞磷酸三(4-氰氧基苯基)酯、磷酸三(4-氰氧基苯基)酯、以及藉由酚醛清漆樹脂與鹵化氰之反應而獲得的氰酸酯類等，亦可使用具有藉由將該等多官能氰酸酯樹脂之氰酸酯基三聚合而形成之三嗪環的預聚物。該預聚物可藉由以例如無機酸、路易斯酸等酸，醇鈉、三級胺類等鹼，碳酸鈉等鹽類作為觸媒使上述多官能氰酸酯樹脂單體聚合而獲得。
作為氰酸酯樹脂之硬化促進劑，可使用通常公知者。例如可列舉辛酸鋅、辛酸錫、環烷酸鈷、環烷酸鋅，乙醯丙酮鐵等有機金屬錯合物，氯化鋁、氯化錫、氯化鋅等金屬鹽，三乙胺、二甲基苄胺等胺類，但並不限定於該等。該等硬化促進劑可單獨使用或混合2種以上而使用。
另外，氰酸酯樹脂亦可與環氧樹脂、氧雜環丁烷樹脂、丙烯酸系樹脂、順丁烯二醯亞胺樹脂等其他樹脂併用。
環氧樹脂係分子內具有1個以上縮水甘油基之化合物，且係藉由加熱而縮水甘油基進行反應從而形成立體網狀結構並硬化之樹脂。較佳為1分子內含有2個以上縮水甘油基，其係由於僅使縮水甘油基為1個之化合物反應無 法顯示出充分之硬化物特性。作為1分子內含有2個以上縮水甘油基之化合物，可列舉：將雙酚A、雙酚F、聯苯酚等雙酚化合物或該等之衍生物，氫化雙酚A、氫化雙酚F、氫化聯苯酚、環己二醇、環己二甲醇、環己二乙醇等具有脂環結構之二醇或該等之衍生物，丁二醇、己二醇、辛二醇、壬二醇、癸二醇等脂肪族二醇或該等之衍生物等環氧化而成之雙官能者；具有三羥苯基甲烷骨架、具有胺基苯酚骨架之三官能者；將苯酚酚醛清漆樹脂、甲酚酚醛清漆樹脂、具有伸苯基骨架之苯酚芳烷基樹脂、具有伸聯苯基骨架之苯酚芳烷基樹脂、具有伸苯基骨架之萘酚芳烷基樹脂等環氧化而成之多官能者等，但並不限定於該等。另外，由於樹脂組成物必須於室溫下為液狀，故而較佳為單獨或作為混合物於室溫下為液狀者。亦可如通常所採取之方式般使用反應性之稀釋劑。作為反應性稀釋劑，可列舉：苯基縮水甘油醚、甲苯基縮水甘油醚等單官能之芳香族縮水甘油醚類，脂肪族縮水甘油醚類等。為使環氧樹脂硬化，使用硬化劑。
作為環氧樹脂之硬化劑，例如可列舉：脂肪族胺、芳香族胺、二氰二胺、二醯肼化合物、酸酐、酚樹脂等。
作為二醯肼化合物，可列舉己二酸二醯肼、十二烷酸二醯肼、間苯二甲酸二醯肼、對羥基苯甲酸二醯肼等羧酸二醯肼等，作為酸酐，可列舉鄰苯二甲酸酐、四氫鄰苯二甲酸酐、六氫鄰苯二甲酸酐、內亞甲基四氫鄰苯二甲酸酐、十二烯基琥珀酸酐、順丁烯二酸酐與聚丁二烯之反應物、順丁烯二酸酐與苯乙烯之共聚物等。
作為環氧樹脂之硬化劑使用的酚樹脂係1分子內具有2 個以上酚性羥基之化合物，於1分子內具有1個酚性羥基之化合物之情形時，無法獲得交聯結構，故而硬化物特性惡化而無法使用。另外，只要1分子內之酚性羥基數為2個以上即可使用，較佳之酚性羥基之數為2~5。多於該數之情形時，分子量變得過大，故而導電糊之黏度變得過高因而不佳。更佳之1分子內之酚性羥基數為2個或3個。作為此種化合物，可列舉：雙酚F、雙酚A、雙酚S、四甲基雙酚A、四甲基雙酚F、四甲基雙酚S、二羥基二苯基醚、二羥基二苯基酮、四甲基聯苯酚、亞乙基雙酚、甲基亞乙基雙(甲基苯酚)、亞環己基雙酚、聯苯酚等雙酚類及其衍生物；三(羥基苯基)甲烷、三(羥基苯基)乙烷等三官能之酚類及其衍生物；苯酚酚醛清漆、甲酚酚醛清漆等藉由使酚類與甲醛反應而獲得的以2核體或3核體為主之化合物及其衍生物等。
作為環氧樹脂之硬化促進劑，可列舉咪唑類、三苯基膦或四苯基鏻之鹽類、二氮雜雙環十一烯等胺系化合物及其鹽類等，可較佳地使用2-甲基咪唑、2-乙基咪唑-2-苯基咪唑、2-苯基-4-甲基咪唑、2-苯基-4-甲基-5-羥基甲基咪唑、2-苯基-4,5-二羥基甲基咪唑、2-C11H23-咪唑、2-甲基咪唑與2,4-二胺基-6-乙烯基三嗪之加成物等咪唑化合物。其中，特佳者為熔點180℃以上之咪唑化合物。另外，將環氧樹脂與氰酸酯樹脂、丙烯酸系樹脂、順丁烯二醯亞胺樹脂併用亦較佳。
所謂自由基聚合性之丙烯酸系樹脂，係分子內具有(甲基)丙烯醯基之化合物，且係藉由(甲基)丙烯醯基進行反應而形成立體網狀結構並硬化之樹脂。(甲基)丙烯醯基必須1 分子內具有1個以上，較佳為含有2個以上。特佳之丙烯酸系樹脂為於分子量500~10000之聚醚、聚酯、聚碳酸酯、聚(甲基)丙烯酸酯中具有(甲基)丙烯醯基之化合物。作為聚醚，較佳為碳數為3~6之有機基經由醚鍵而重複者，且較佳為不含芳香族環者。上述於聚醚中具有(甲基)丙烯醯基之化合物可藉由使聚醚多元醇與(甲基)丙烯酸或其衍生物進行反應而獲得。作為聚酯，較佳為碳數3~6之有機基經由酯鍵而重複者，且較佳為不含芳香族環者。上述於聚酯中具有(甲基)丙烯醯基之化合物可藉由使聚酯多元醇與(甲基)丙烯酸或其衍生物進行反應而獲得。作為聚碳酸酯，較佳為碳數3~6之有機基經由碳酸酯鍵而重複者，且較佳為不含芳香族環者。上述於聚碳酸酯中具有(甲基)丙烯醯基之化合物可藉由使聚碳酸酯多元醇與(甲基)丙烯酸或其衍生物進行反應而獲得。
作為聚(甲基)丙烯酸酯，較佳為(甲基)丙烯酸與(甲基)丙烯酸酯的共聚物、或具有極性基之(甲基)丙烯酸酯與不具有極性基之(甲基)丙烯酸酯的共聚物等。該等共聚物與羧基進行反應之情形時，可藉由使具有羥基之丙烯酸酯反應而獲得，與羥基進行反應之情形時，可藉由使(甲基)丙烯酸或其衍生物反應而獲得。
視需要亦可併用以下所示之化合物。例如可列舉：(甲基)丙烯酸-2-羥基乙酯、(甲基)丙烯酸-2-羥基丙酯、(甲基)丙烯酸-3-羥基丙酯、(甲基)丙烯酸-2-羥基丁酯、(甲基)丙烯酸-3-羥基丁酯、(甲基)丙烯酸-4-羥基丁酯、1,2-環己二醇單(甲基)丙烯酸酯、1,3-環己二醇單(甲基)丙烯酸酯、1,4-環己二醇單(甲基)丙烯酸酯、1,2-環己二甲醇單(甲基)丙烯酸 酯、1,3-環己二甲醇單(甲基)丙烯酸酯、1,4-環己二甲醇單(甲基)丙烯酸酯、1,2-環己二乙醇單(甲基)丙烯酸酯、1,3-環己二乙醇單(甲基)丙烯酸酯、1,4-環己二乙醇單(甲基)丙烯酸酯、丙三醇單(甲基)丙烯酸酯、丙三醇二(甲基)丙烯酸酯、三羥甲基丙烷單(甲基)丙烯酸酯、三羥甲基丙烷二(甲基)丙烯酸酯、季戊四醇單(甲基)丙烯酸酯、季戊四醇二(甲基)丙烯酸酯、季戊四醇三(甲基)丙烯酸酯、新戊二醇單(甲基)丙烯酸酯等具有羥基之(甲基)丙烯酸酯或使該等具有羥基之(甲基)丙烯酸酯與二羧酸或其衍生物反應而獲得的具有羧基之(甲基)丙烯酸酯等。作為此處可使用之二羧酸，例如可列舉：草酸、丙二酸、琥珀酸、戊二酸、己二酸、庚二酸、辛二酸、壬二酸、癸二酸、順丁烯二酸、反丁烯二酸、鄰苯二甲酸、四氫鄰苯二甲酸、六氫鄰苯二甲酸以及該等之衍生物。
除上述以外，亦可使用：(甲基)丙烯酸甲酯、(甲基)丙烯酸乙酯、(甲基)丙烯酸正丁酯、(甲基)丙烯酸異丁酯、(甲基)丙烯酸第三丁酯、(甲基)丙烯酸異癸酯、(甲基)丙烯酸月桂酯、(甲基)丙烯酸十三烷基酯、(甲基)丙烯酸鯨蠟基酯、(甲基)丙烯酸硬脂基酯、(甲基)丙烯酸異戊酯、(甲基)丙烯酸異硬脂基酯、(甲基)丙烯酸二十二烷基酯、(甲基)丙烯酸-2-乙基己酯、其他(甲基)丙烯酸烷基酯、(甲基)丙烯酸環己酯、(甲基)丙烯酸第三丁基環己酯、(甲基)丙烯酸四氫糠酯、(甲基)丙烯酸苄酯、(甲基)丙烯酸苯氧基乙酯、(甲基)丙烯酸異莰酯、(甲基)丙烯酸縮水甘油酯、三羥甲基丙烷三(甲基)丙烯酸酯、單(甲基)丙烯酸鋅、二(甲基)丙烯酸鋅、(甲基)丙烯酸二甲基胺基乙酯、(甲基)丙烯酸二乙基胺基乙酯、新戊二 醇(甲基)丙烯酸酯、(甲基)丙烯酸三氟乙酯、(甲基)丙烯酸-2,2,3,3-四氟丙酯、(甲基)丙烯酸-2,2,3,3,4,4-六氟丁酯、(甲基)丙烯酸全氟辛酯、(甲基)丙烯酸全氟辛基乙酯、乙二醇二(甲基)丙烯酸酯、丙二醇二(甲基)丙烯酸酯、1,4-丁二醇二(甲基)丙烯酸酯、1,6-己二醇二(甲基)丙烯酸酯、1,9-壬二醇二(甲基)丙烯酸酯、1,3-丁二醇二(甲基)丙烯酸酯、1,10-癸二醇二(甲基)丙烯酸酯、丁二醇二(甲基)丙烯酸酯、(甲基)丙烯酸甲氧基乙酯、(甲基)丙烯酸丁氧基乙酯、乙氧基二乙二醇(甲基)丙烯酸酯、甲氧基聚烷二醇單(甲基)丙烯酸酯、辛氧基聚烷二醇單(甲基)丙烯酸酯、月桂氧基聚烷二醇單(甲基)丙烯酸酯、硬脂氧基聚烷二醇單(甲基)丙烯酸酯、烯丙氧基聚烷二醇單(甲基)丙烯酸酯、壬基苯氧基聚烷二醇單(甲基)丙烯酸酯、N,N'-亞甲基雙(甲基)丙烯醯胺、N,N'-伸乙基雙(甲基)丙烯醯胺、1,2-二(甲基)丙烯醯胺乙二醇、二(甲基)丙烯醯氧基甲基三環癸烷、N-(甲基)丙烯醯氧基乙基順丁烯二醯亞胺、N-(甲基)丙烯醯氧基乙基六氫鄰苯二甲醯亞胺、N-(甲基)丙烯醯氧基乙基鄰苯二甲醯亞胺、N-乙烯基-2-吡咯啶酮、苯乙烯衍生物、α-甲基苯乙烯衍生物等。
進而，作為聚合起始劑，較佳為使用熱自由基聚合起始劑。只要是通常用作熱自由基聚合起始劑者則並無特別限定，作為較理想者，較佳為在快速加熱試驗(將試樣1g置於電熱板上，以4℃/min進行升溫時之分解起始溫度)中之分解溫度為40~140℃者。若分解溫度未達40℃，則導電糊於常溫下之保存性變差，若超過140℃，則硬化時間變得極長，故而不佳。作為滿足上述條件之熱自由基聚合起始劑之具體例，可列舉：過氧化丁酮、過氧化甲基環己酮、 過氧化乙醯乙酸甲酯、過氧化乙醯丙酮、1,1-雙(第三丁基過氧基)-3,3,5-三甲基環己烷、1,1-雙(第三己基過氧基)環己烷、1,1-雙(第三己基過氧基)-3,3,5-三甲基環己烷、1,1-雙(第三丁基過氧基)環己烷、2,2-雙(4,4-二-第三丁基過氧化環己基)丙烷、1,1-雙(第三丁基過氧基)環十二烷、4,4-雙(第三丁基過氧基)戊酸正丁酯、2,2-雙(第三丁基過氧基)丁烷、1,1-雙(第三丁基過氧基)-2-甲基環己烷、第三丁基過氧化氫、過氧化氫對薄荷烷、1,1,3,3-四甲基丁基過氧化氫、第三己基過氧化氫、過氧化二異丙苯、2,5-二甲基-2,5-雙(第三丁基過氧基)己烷、α,α'-雙(第三丁基過氧基)二異丙基苯、過氧化第三丁基異丙苯、過氧化二-第三丁基、2,5-二甲基-2,5-雙(第三丁基過氧基)-3-己炔、過氧化異丁醯基、過氧化3,5,5-三甲基己醯、過氧化辛醯基、過氧化月桂醯基、過氧化肉桂酸、過氧化間甲苯甲醯(m-toluoyl peroxide)、過氧化苯甲醯、過氧化二碳酸二異丙酯、過氧化二碳酸雙(4-第三丁基環己基)酯、過氧化二碳酸-二-3-甲氧基丁酯、過氧化二碳酸-二-2-乙基己酯、過氧化二碳酸-二-第二丁酯、過氧化二碳酸-二(3-甲基-3-甲氧基丁基)酯、過氧化二碳酸-二(4-第三丁基環己基)酯、α,α'-雙(新癸醯基過氧基)二異丙基苯、過氧化新癸酸異丙苯酯、過氧化新癸酸-1,1,3,3,-四甲基丁酯、過氧化新癸酸-1-環己基-1-甲基乙酯、過氧化新癸酸第三己酯、過氧化新癸酸第三丁酯、過氧化三甲基乙酸第三己酯、過氧化三甲基乙酸第三丁酯、2,5-二甲基-2,5-雙(2-乙基己醯基過氧基)己烷、過氧化2-乙基己酸-1,1,3,3-四甲基丁酯、過氧化2-乙基己酸-1-環己基-1-甲基乙酯、過氧化2-乙基己酸第三己酯、過氧化2-乙基己酸第三丁酯、過氧化異丁酸第 三丁酯、過氧化順丁烯二酸第三丁酯、過氧化月桂酸第三丁酯、過氧化3,5,5-三甲基己酸第三丁酯、過氧化異丙基單碳酸第三丁酯、過氧化2-乙基己基單碳酸第三丁酯、2,5-二甲基-2,5-雙(苯甲醯基過氧基)己烷、過氧化乙酸第三丁酯、過氧化苯甲酸第三己酯、過氧化間甲苯甲醯基苯甲酸第三丁酯、過氧化苯甲酸第三丁酯、間苯二甲酸雙(第三丁基過氧基)酯、過氧化烯丙基單碳酸第三丁酯、3,3',4,4'-四(第三丁基過氧化羰基)二苯基酮等，該等可單獨使用，或者為控制硬化性亦可將2種以上混合使用。另外，上述自由基聚合性之丙烯酸系樹脂亦可與氰酸酯樹脂、環氧樹脂、順丁烯二醯亞胺樹脂併用。
順丁烯二醯亞胺樹脂係1分子內含有1個以上順丁烯二醯亞胺基之化合物，且係藉由加熱使順丁烯二醯亞胺基進行反應從而形成立體網狀結構並硬化之樹脂。例如可列舉：N,N'-(4,4'-二苯基甲烷)雙順丁烯二醯亞胺、雙(3-乙基-5-甲基-4-順丁烯二醯亞胺苯基)甲烷、2,2-雙[4-(4-順丁烯二醯亞胺苯氧基)苯基]丙烷等雙順丁烯二醯亞胺樹脂。更佳之順丁烯二醯亞胺樹脂為藉由二聚酸二胺與順丁烯二酸酐之反應所得的化合物，藉由順丁烯二醯亞胺基乙酸、順丁烯二醯亞胺基己酸等順丁烯二醯亞胺化胺基酸與多元醇之反應所獲得的化合物。順丁烯二醯亞胺化胺基酸係藉由使順丁烯二酸酐與胺基乙酸或胺基己酸進行反應而獲得，作為多元醇，較佳為聚醚多元醇、聚酯多元醇、聚碳酸酯多元醇、聚(甲基)丙烯酸酯多元醇，特佳為不含芳香族環者。由於順丁烯二醯亞胺基可與烯丙基產生反應，故而與烯丙酯樹脂併用亦較佳。作為烯丙酯樹脂，較佳為脂肪族之烯丙酯樹 脂，其中，特佳為藉由環己烷二烯丙酯與脂肪族多元醇之酯交換所得的化合物。烯丙酯系化合物之數量平均分子量並無特別限定，較佳為500~10,000，特佳為500~8,000。若數量平均分子量在上述範圍內，則可使硬化收縮特別小，可防止密接性降低。另外，將順丁烯二醯亞胺樹脂與氰酸酯樹脂、環氧樹脂、丙烯酸系樹脂併用亦較佳。
熱硬化性接著劑組成物中，亦可視需要使用其他添加劑。作為其他添加劑，有環氧基矽烷、巰基矽烷、胺基矽烷、烷基矽烷、脲基矽烷、乙烯基矽烷、硫醚矽烷(sulfide silane)等矽烷偶合劑、或鈦酸酯偶合劑、鋁偶合劑、鋁/鋯偶合劑等偶合劑，碳黑等著色劑，聚矽氧油、聚矽氧橡膠等固體低應力化成分，水滑石等無機離子交換體，消泡劑、界面活性劑、各種聚合抑制劑、抗氧化劑等，可適宜調配各種添加劑。該等化合物可單獨使用1種，亦可併用2種以上。
對本實施形態之半導體裝置之製造方法中所使用的熱硬化性接著劑組成物之使用方法，使用具體例加以說明。
實施形態中，於半導體裝置之製造方法中所使用的熱硬化性接著劑組成物為液狀接著劑之情形時，可藉由將如上所述之各種成分預混合後，使用三輥研磨機進行混練，然後進行真空消泡而獲得液狀接著劑。使用市售之黏晶機(die bonder)將所獲得之液狀接著劑點膠塗布於例如支持體(特別是引線框架)之特定部位後，安裝半導體元件且加熱硬化。然後，進行打線接合(wire bonding)，使用以環氧樹脂等作為主成分之密封樹脂進行轉注成形，藉此可獲得半導體裝置。
再者，膜狀接著劑亦可與上述同樣地使用。此時，例如可於將膜狀接著劑層壓於支持體上後，藉由相同之步驟而獲得半導體裝置。
[實施例]
以下，使用實施例具體地說明本發明，但本發明並不限定於該等實施例。調配比例係以重量份表示。
於實施例及比較例中均係藉由以表1所示之重量份調配下述原材料，然後使用三輥研磨機進行混練且消泡而獲得樹脂組成物。
(評價試驗)
對由上述而獲得之實施例及比較例之樹脂組成物進行以下之評價試驗。評價結果示於表1。
(沈降試驗)
將填充有實施例之各樹脂組成物30g的注射器(10cc)，於調整為0℃之恆溫槽內以注射器之前端朝下之方式保管30日。目視確認保管後之外觀，若無變化則評價為○，若確認到少量之銀粉與樹脂成分之分離則評價為△，若觀察到顯著之分離則評價為×。
(耐回流焊性)
使用實施例及比較例之各樹脂組成物，於175℃下進行60分鐘硬化而將下述引線框架與矽晶片接著。進而，使用密封材料(Sumikon EME-G700，Sumitomo Bakelite股份有限公司製造)進行密封，藉此製作半導體裝置。使用該半導體裝置，於30℃、相對濕度60%下進行168小時吸濕處理後，進行IR(infrared radiation，紅外線輻射)回流焊處理(260℃，10秒，3次回流焊)。對處理後之半導體裝置 使用超音波探傷裝置(穿透型)測定剝離之程度。將剝離面積相對於晶片之面積之比例未達10%之情形評價為合格。
半導體裝置：QFP(Quad Flat Package，四面扁平封裝)(14×20×2.0mm)
引線框架：經點鍍銀之銅引線框架
晶片尺寸：5×5mm
樹脂組成物之硬化條件：烘箱中、175℃、60分鐘
○：剝離面積相對於矽晶片之面積未達5%。
△：剝離面積相對於矽晶片之面積為5%以上且未達10%。
×：剝離面積相對於矽晶片之面積為10%以上。
(C、C1、C2之計算方法)
使用實施例及比較例之各樹脂組成物，於175℃下進行60分鐘硬化而將下述引線框架與矽晶片接著。自該狀態切割出接著層1之剖面，獲得厚度方向上之接著層1之SEM剖面圖。對所得之SEM剖面圖進行二值化處理。於二值化處理中，將閾值設定為由糊之硬化物藉由灰分測定所得的導熱性填料之體積分率X。繼而，將藉由二值化處理所得的二值化影像沿厚度方向以2μm之間隔進行切割，計算出各層中之導熱性填料8含量。首先，(1)計算出自上側向下側直至N層為止之含量。亦即，以下述方式而求出銀比率：第1層之銀比率=(1層之銀量/X)×100，至第2層為止之銀比率=((1+2)層之銀量/X)×100，......，至第N層為止之銀比率=((1+2+......+N)層之銀量/X)×100=(X/X)×100=100。同樣地，(2)計算出自下側至上側 為止之含量。亦即，以下述方式而求出銀比率：第1'層之銀比率=(1'層之銀量/X)×100，至第2'層為止之銀比率=((1'+2')層之銀量/X)×100，......，至第N'層為止之銀比率=((1+2+......+N')層之銀量/X)×100=(X/X)×100=100。自接著層1之半導體元件3側之界面起至深度2μm為止所含蓋之第1區域中的C1/C採用(1)自上側朝向下側而計算出的第1層之銀比率。另一方面，自接著層1之基材(晶粒座2)側之界面起至深度2μm為止所含蓋之第2區域中的C2/C採用(2)自下側朝向上側而計算出的第1'層之銀比率。
(熱循環(密接性))
使用實施例及比較例之各樹脂組成物，於175℃下進行60分鐘硬化而將下述引線框架與矽晶片接著。進行熱循環處理(將25℃/160℃下各30分鐘作為1次循環)。每將該熱循環處理實施10次循環，即確認晶片與接著層之間是否產生剝離部分，另外，確認引線框架與接著層之間是否產生剝離。
將晶片與接著層之間無剝離，且引線框架與接著層之間無剝離之情形表示為○/○。
將晶片與接著層之間有剝離，且引線框架與接著層之間無剝離之情形表示為×/○。
將晶片與接著層之間無剝離，且引線框架與接著層之間有剝離之情形表示為○/×。
將晶片與接著層之間有剝離，且引線框架與接著層之間有剝離之情形表示為×/×。
於實施例中，確認於接著層1之兩面側形成有導熱性填料8之含有率較低之區域。因此，可知實施例中耐回流焊性及熱循環特性優異。另一方面，可知比較例中耐回流焊性及熱循環特性較差。
另外，代替實施例1中之銀粉而使用粒度分布之最高點粒徑為10μm的單分散之球狀氧化鋁，獲得與實施例1相同之結果。
再者，上述實施形態及複數個變形例當然可於其內容並不相反之範圍內進行組合。另外，上述實施形態及變形例中對各部之結構等進行了具體說明，但其結構等可於滿足本案發明之範圍內進行各種變更。
[產業上之可利用性]
根據本發明，可提供一種產率優異之半導體裝置，故而本發明於產業上極為有用。
1‧‧‧接著層
2‧‧‧晶粒座
3‧‧‧半導體元件
4‧‧‧引線
5‧‧‧密封材料層
6‧‧‧接合線
7‧‧‧焊墊
8‧‧‧導熱性填料
10‧‧‧半導體裝置
L1‧‧‧深度
L2‧‧‧深度
圖1係表示本實施形態之半導體裝置之構成的剖面圖。
圖2係圖1所示之半導體裝置之擴大圖。
1‧‧‧接著層
2‧‧‧晶粒座
3‧‧‧半導體元件
4‧‧‧引線
5‧‧‧密封材料層
6‧‧‧接合線
7‧‧‧焊墊
10‧‧‧半導體裝置

Claims (4)

  1. 一種半導體裝置，其包含：基材；半導體元件；及接著層，存在於上述基材與上述半導體元件之間以接著兩者；且上述接著層中分散有導熱性填料；當將上述接著層整體中之上述導熱性填料之含有率設為C，將自上述接著層之上述半導體元件側之界面起至深度2μm為止所含蓋之第1區域中的上述導熱性填料之含有率設為C1，將自上述接著層之上述基材側之界面起至深度2μm為止所含蓋之第2區域中的上述導熱性填料之含有率設為C2時，其滿足：0.75<C1/C<0.97，且0.75<C2/C<0.97。
  2. 如申請專利範圍第1項之半導體裝置，其中上述導熱性填料含有選自以銀、銅、金、鋁、鎳、氧化鋁、二氧化矽所組成之群中的至少一種以上。
  3. 如申請專利範圍第1項之半導體裝置，其中上述基材為引線框架、散熱片或BGA基板。
  4. 如申請專利範圍第1項之半導體裝置，其中上述半導體元件為消耗電力1.7W以上之功率元件。
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JP6119832B2 (ja) * 2015-12-04 2017-04-26 住友ベークライト株式会社 半導体装置
JP2019149472A (ja) * 2018-02-27 2019-09-05 株式会社東芝 半導体装置及びダイシング方法
WO2024057792A1 (ja) * 2022-09-14 2024-03-21 株式会社レゾナック フィルム状接着剤、接着フィルム、ダイシング・ダイボンディング一体型フィルム及び半導体装置の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4803543A (en) * 1980-12-10 1989-02-07 Hitachi, Ltd. Semiconductor device and process for producing the same
TW478078B (en) * 1999-01-29 2002-03-01 Matsushita Electric Ind Co Ltd Method and apparatus for mounting electronic component
WO2006039294A1 (en) * 2004-09-30 2006-04-13 Honeywell International, Inc. Thermally conductive composite and uses for microelectronic packaging
TW200737373A (en) * 2006-01-20 2007-10-01 Freescale Semiconductor Inc Method of packaging a semiconductor die and package thereof

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5990516A (en) * 1994-09-13 1999-11-23 Kabushiki Kaisha Toshiba MOSFET with a thin gate insulating film
US6177722B1 (en) * 1998-04-21 2001-01-23 Atmel Corporation Leadless array package
JP4097378B2 (ja) * 1999-01-29 2008-06-11 松下電器産業株式会社 電子部品の実装方法及びその装置
JP4097379B2 (ja) * 1999-01-29 2008-06-11 松下電器産業株式会社 電子部品の実装方法及びその装置
JP4109823B2 (ja) 2000-10-10 2008-07-02 株式会社東芝 半導体装置の製造方法
JP2003082034A (ja) 2001-09-13 2003-03-19 Hitachi Chem Co Ltd アクリル樹脂、これを用いた接着剤及び接着フィルム
JP4507488B2 (ja) * 2001-11-12 2010-07-21 日立化成工業株式会社 接合材料
JP4046120B2 (ja) * 2005-01-27 2008-02-13 三菱電機株式会社 絶縁シートの製造方法およびパワーモジュールの製造方法
JP5085306B2 (ja) * 2007-12-21 2012-11-28 株式会社東芝 アンダーフィル用樹脂組成物、プリント回路板、及び電子機器
JP6119094B2 (ja) * 2011-12-27 2017-04-26 住友ベークライト株式会社 半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4803543A (en) * 1980-12-10 1989-02-07 Hitachi, Ltd. Semiconductor device and process for producing the same
TW478078B (en) * 1999-01-29 2002-03-01 Matsushita Electric Ind Co Ltd Method and apparatus for mounting electronic component
WO2006039294A1 (en) * 2004-09-30 2006-04-13 Honeywell International, Inc. Thermally conductive composite and uses for microelectronic packaging
TW200737373A (en) * 2006-01-20 2007-10-01 Freescale Semiconductor Inc Method of packaging a semiconductor die and package thereof

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US20150194376A1 (en) 2015-07-09
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US9379051B2 (en) 2016-06-28
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EP2717302A4 (en) 2015-03-11
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WO2012165273A1 (ja) 2012-12-06
SG195124A1 (en) 2013-12-30
TWI569385B (zh) 2017-02-01

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