TWI562293B - Manufacturing method of chip packaging structure - Google Patents

Manufacturing method of chip packaging structure

Info

Publication number
TWI562293B
TWI562293B TW104113605A TW104113605A TWI562293B TW I562293 B TWI562293 B TW I562293B TW 104113605 A TW104113605 A TW 104113605A TW 104113605 A TW104113605 A TW 104113605A TW I562293 B TWI562293 B TW I562293B
Authority
TW
Taiwan
Prior art keywords
manufacturing
packaging structure
chip packaging
chip
packaging
Prior art date
Application number
TW104113605A
Other languages
English (en)
Other versions
TW201639089A (zh
Inventor
Yu-Cheng Huang
Yong Ha Woo
Original Assignee
Qi Ding Technology Qinhuangdao Co Ltd
Zhen Ding Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qi Ding Technology Qinhuangdao Co Ltd, Zhen Ding Technology Co Ltd filed Critical Qi Ding Technology Qinhuangdao Co Ltd
Publication of TW201639089A publication Critical patent/TW201639089A/zh
Application granted granted Critical
Publication of TWI562293B publication Critical patent/TWI562293B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
TW104113605A 2015-04-24 2015-04-28 Manufacturing method of chip packaging structure TWI562293B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510200591.1A CN106298692B (zh) 2015-04-24 2015-04-24 芯片封装结构的制作方法

Publications (2)

Publication Number Publication Date
TW201639089A TW201639089A (zh) 2016-11-01
TWI562293B true TWI562293B (en) 2016-12-11

Family

ID=57630681

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104113605A TWI562293B (en) 2015-04-24 2015-04-28 Manufacturing method of chip packaging structure

Country Status (2)

Country Link
CN (1) CN106298692B (zh)
TW (1) TWI562293B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108461405B (zh) * 2017-02-21 2020-04-10 碁鼎科技秦皇岛有限公司 线路载板及其制造方法
CN107863325A (zh) * 2017-02-27 2018-03-30 西安华羿微电子股份有限公司 大功率mosfet的扇出形封装结构及其制造工艺
CN109935521B (zh) * 2019-01-30 2022-03-04 深圳市志金电子有限公司 封装基板制造工艺、封装基板以及芯片封装结构

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100301474A1 (en) * 2008-09-25 2010-12-02 Wen-Kun Yang Semiconductor Device Package Structure and Method for the Same
TW201318118A (zh) * 2011-10-17 2013-05-01 矽品精密工業股份有限公司 半導體封裝件及其製法
TW201407695A (zh) * 2012-08-08 2014-02-16 Subtron Technology Co Ltd 封裝載板及其製作方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW412851B (en) * 1999-05-31 2000-11-21 Siliconware Precision Industries Co Ltd Method for manufacturing BGA package having encapsulation for encapsulating a die
CN102136459B (zh) * 2010-01-25 2014-02-26 矽品精密工业股份有限公司 封装结构及其制法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100301474A1 (en) * 2008-09-25 2010-12-02 Wen-Kun Yang Semiconductor Device Package Structure and Method for the Same
TW201318118A (zh) * 2011-10-17 2013-05-01 矽品精密工業股份有限公司 半導體封裝件及其製法
TW201407695A (zh) * 2012-08-08 2014-02-16 Subtron Technology Co Ltd 封裝載板及其製作方法

Also Published As

Publication number Publication date
CN106298692A (zh) 2017-01-04
TW201639089A (zh) 2016-11-01
CN106298692B (zh) 2019-02-01

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