TWI555233B - Built-in regulator chip of the flip-chip LED components - Google Patents
Built-in regulator chip of the flip-chip LED components Download PDFInfo
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- TWI555233B TWI555233B TW103111640A TW103111640A TWI555233B TW I555233 B TWI555233 B TW I555233B TW 103111640 A TW103111640 A TW 103111640A TW 103111640 A TW103111640 A TW 103111640A TW I555233 B TWI555233 B TW I555233B
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- 238000005476 soldering Methods 0.000 claims description 3
- 230000033228 biological regulation Effects 0.000 claims description 2
- 238000005452 bending Methods 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 17
- 238000000034 method Methods 0.000 description 16
- 238000004519 manufacturing process Methods 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
- H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- Engineering & Computer Science (AREA)
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Description
本發明為一種與LED結構及製程相關的技術,尤指一種利用覆晶技術(Flip-Chip technology)製成,並且內建有穩壓晶片保護的覆晶式LED元件。
傳統LED元件的製程,是利用一金屬片先沖壓成為具有許多組電極的支架後(即支架沖壓成型製程),在支架上的每一組電極上先以射出成型方式製作出碗狀基座(基座成型製程),之後再將此具有碗狀基座的支架上依序進行:固晶製程,打線(wire bonding)製程,以及封裝製程,以形成一完整的LED元件。
而由於高功率LED元件(Hi-Power LED Components)在使用時會產生靜電放電(ESD)造成破壞,而各種半導體、二極體元件中,穩壓二極體(Zener Diode)具有穩定電壓的特性,因此常見業者在LED的相關電路設計上,並聯一個穩壓二極體來抗靜電放電(ESD),或串聯一個穩壓二極體來幫助穩定電壓,避免LED元件被電流破壞。
配合上述穩壓二極體的運用,遂有業者在傳統LED元件製程中的固晶階段裡,除了LED晶片以外,另外植入了穩壓晶片(ZENER Chip),之後再進行LED晶片以及穩壓晶片的打線製程,使LED元件本身即具備抗靜電以及穩定電壓的保護,藉此來延長LED元件的使用壽命,例如:US 8,536,593 B2、CN 103000782 A等專利案,即為類似技術。
此外,覆晶技術(Flip-Chip technology),也稱「倒晶封裝」或「倒晶封裝法」,為另一種與LED元件製程相關的先進技術,主要是將覆
晶式LED晶片(Flip-Chip LED)位於同一平面上的的正負極連接點分別長凸塊(bumps),然後將晶片翻轉過來使二凸塊與正負極電極接腳(基板)分別直接電連接(焊接)而得其名。
由於上述覆晶技術使晶片可以直接與正負極電極接腳電連接,具有導熱及散熱速度快的優點,因此非常適合使用在高功率LED元件上,再加上無需在覆晶式LED晶片上打線即可以完成電連接,因此可以大幅節省製造工時,對於元件體積的縮小也大有助益,儼然已成為相關製造業者競相研究的目標,例如:US 2012/0241801 A1、CN 203456494 U等,即為與覆晶技術相關之先前技術。
上述兩種先前技術:穩壓晶片及覆晶技術的運用,固然能分別在其各自的技術領域上增進LED元件的實用性以及功效,然而根據本發明人多年從事相關產業的設計及製造經驗來看,若能將這兩種不同的技術整合在同一個LED元件上,如此將可以讓LED元件不但具備有抗靜電及穩壓功能,在製程上也可以兼具有覆晶技術的優點。
本發明之目的在於提供一種內建穩壓晶片之覆晶式LED元件(Flip-Chip Type LED Components),其整體結構採用覆晶技術製成,並內建有穩壓晶片,因此不但在使用上可以有效保護LED元件,在製造上還可以大幅簡化製程並節省成本。
為達成上述目的,本發明內建穩壓晶片之覆晶式LED元件,包括有:二左右排置的電極接腳,該二電極接腳的相對內側端之間彼此間隔,該二電極接腳的相對外側端則可分別供外部電路電連接;一覆晶式LED晶片(Flip-Chip LED),該覆晶式LED晶片底面兩側的正/負極分別與所述二電極接腳相對內側端的正面電連接,使該覆晶式LED晶片跨接於二電極接腳的內側端正面上方;一覆晶式穩壓晶片(Flip-Chip ZENER),該覆晶式穩壓晶片頂面兩側P/N極分別與所述二電極接腳相對內側端的背面電連接,使該覆晶式穩壓晶片
晶片跨接於二電極接腳的內側端背面下方;一基座,該基座是以絕緣材料製成,包覆於覆晶式穩壓晶片以及二電極接腳的背面外部,且前述二電極接腳的相對外側端分別露出該基座外;以及一透明封裝體,該透明封裝體包覆於覆晶式LED晶片以及二電極接腳之正面外部,當二電極接腳的外側端連接電源,即可使覆晶式LED晶片發光並且讓光線透出透明封裝體,同時通過覆晶式穩壓晶片的抗靜電以及穩壓作用對覆晶式LED晶片起保護作用。
以下進一步說明各元件之實施方式:實施時,所述覆晶式LED晶片底面兩側的正/負極與二電極接腳相對內側端的正面之間,以及覆晶式穩壓晶片頂面兩側的P/N極與所述二電極接腳相對內側端的背面之間,分別設有供該些部位焊接及電連接的焊墊。
實施時,所述二電極接腳的內側端正面排置於同一平面上,且二內側端的相對外側分別向下彎折延伸後銜接外側端,進而使二外側端底面分別顯露於基座的底部。
實施時,所述基座之絕緣材料填充於二電極接腳的相對內側端之間,並且在二電極接腳內側端的正面周圍向上延伸有碗狀台階;所述覆晶式LED晶片位於該碗狀台階內圍,且所述透明封裝體填充於該碗狀台階內圍,進而包覆覆晶式LED晶片以及二電極接腳之正面外部。
相較於先前技術,本發明在二電極接腳的相對內側端正面及反面分別設置覆晶式LED晶片及覆晶式穩壓晶片,使整體LED元件得以全部採用覆晶技術製成,不但在製造時不需要打線而可以大幅簡化製程並節省成本,還可以在使用上有效保護LED元件,並且讓LED元件的厚度可以縮減,使LED元件在運用上可以符合各種電子產品輕薄化設計的趨勢。
以下依據本發明之技術手段,列舉出適於本發明之實施方式,並配合圖式說明如後:
10‧‧‧電極接腳
11‧‧‧內側端
12‧‧‧外側端
20‧‧‧覆晶式LED晶片
21‧‧‧正/負極
30‧‧‧覆晶式穩壓晶片
31‧‧‧P/N極
40‧‧‧基座
41‧‧‧碗狀台階
50‧‧‧透明封裝體
60‧‧‧焊墊
第一圖:本發明第一實施例之結構示意圖。
第二圖:本發明第二實施例之結構示意圖。
如第一圖所示,本發明內建穩壓晶片之覆晶式LED元件,包括有二電極接腳10、一覆晶式LED晶片20、一覆晶式穩壓晶片30、一絕緣材料製成的基座40,以及一透明封裝體50,其中:
所述二電極接腳10呈左、右排置,該二電極接腳10的相對內側端11彼此之間具有間隙而相互隔離,該二電極接腳10的相對外側端12則可分別供外部電路電連接;圖示中,所述二電極接腳10的內側端11正面排置於同一平面上,且二內側端11的相對外側分別向下彎折延伸後銜接前述的外側端12。
所述覆晶式LED晶片20在其底面的左右兩側為正/負極21,該正/負極21分別與前述二電極接腳10相對內側端11的正面電連接,使該覆晶式LED晶片20跨接於該二電極接腳10的內側端11正面上方。
所述覆晶式穩壓晶片30頂面的左右兩側分別為P/N極31,該P/N極31分別與所述二電極接腳10相對內側端11的背面電連接,使該覆晶式穩壓晶片30跨接於二電極接腳10的內側端11背面下方。
圖示中,上述覆晶式LED晶片20底面兩側的正/負極21與二電極接腳10相對內側端11的正面之間,以及覆晶式穩壓晶片30頂面兩側P/N極與所述二電極接腳10相對內側端11的背面之間,分別設有供該些部位焊接及電連接的焊墊60,使覆晶式LED晶片20以及覆晶式穩壓晶片30得以分別利用覆晶技術(Flip-Chip technology)而直接與二電極接腳10電連接。
前述之基座40是以絕緣材料製成,即利用塑料模內射出成型包覆於覆晶式穩壓晶片30以及二電極接腳10的背面外部,並且使前述二電極接腳10的相對外側端12底面分別露出該基座40外,使該二電極接腳10的外側端12得以供外部電路(圖略)電連接;此外,圖示中所述基座40
於成型時,其絕緣材料填充於二電極接腳10的相對內側端11之間,藉此以確保二內側端11之間為相互絕緣狀態。
前述之透明封裝體50為一般使用在LED封裝上的材料,例如:為環氧樹脂(epoxy)或矽膠(silicone)等,該透明封裝體50包覆於覆晶式LED晶片20以及二電極接腳10之正面外部,如此當前述二電極接腳10的外側端12連接電源時,即可使覆晶式LED晶片20發光,並且讓光線透出該透明封裝體50,同時通過前述覆晶式穩壓晶片30的抗靜電以及穩壓作用,可以對覆晶式LED晶片20起保護作用,藉此以延長覆晶式LED晶片20的使用壽命。
由於上述整體LED元件的結構是採用覆晶技術製成,並內建有覆晶式穩壓晶片,因此不但在使用上可以有效保護LED元件,在製造時不需要打線,還可以大幅簡化製程並節省成本;特別是採用覆晶技術製成的LED元件相較於傳統製程,還可以讓LED元件的厚度可以縮減,使LED元件在運用上可以符合各種電子產品輕薄化設計的趨勢。
如第二圖所示本發明的第二實施例,其構造與前述實施例不同處在於:所述基座40在二電極接腳10內側端11的正面周圍,向上延伸有內圍呈碗狀的台階41;而前述覆晶式LED晶片20位於該碗狀台階41內圍,且所述透明封裝體50填充於該碗狀台階41內圍,進而包覆覆晶式LED晶片20以及二電極接腳10之正面外部;此實施方式在基座40的部分類似已知技術中供封裝體填充的碗狀基座,外觀雖然與先前技術相似,但差別在於本發明基座40還包覆了覆晶式穩壓晶片30,而且碗狀台階41內的覆晶式LED晶片20以及二電極接腳10也不需要打線。
相較於先前技術,本發明在二電極接腳10的相對內側端11正面及反面分別設置覆晶式LED晶片20及覆晶式穩壓晶片30,使整體LED元件得以全部採用覆晶技術製成,不但在製造時不需要打線而可以大幅簡化製程並節省成本,還可以在使用上有效保護LED元件,並且讓LED元件的厚度可以縮減,使LED元件在運用上可以符合各種電子產品輕薄化設計的趨勢。
惟以上實施說明及圖式所示,係舉例說明本發明之較佳實施
例,並非以此侷限本發明;舉凡與本發明之構造、裝置、特徵等近似或相雷同者,均應屬本發明之創設目的及申請專利範圍之內,謹此聲明。
10‧‧‧電極接腳
11‧‧‧內側端
12‧‧‧外側端
20‧‧‧覆晶式LED晶片
21‧‧‧正/負極
30‧‧‧覆晶式穩壓晶片
31‧‧‧P/N極
40‧‧‧基座
50‧‧‧透明封裝體
60‧‧‧焊墊
Claims (4)
- 一種內建穩壓晶片之覆晶式LED元件,包括有:二左右排置的電極接腳,該二電極接腳的相對內側端之間彼此間隔,該二電極接腳的相對外側端則可分別供外部電路電連接;一覆晶式LED晶片,該覆晶式LED晶片底面兩側的正/負極分別與所述二電極接腳相對內側端的正面電連接,使該覆晶式LED晶片跨接於二電極接腳的內側端正面上方;一覆晶式穩壓晶片,該覆晶式穩壓晶片頂面兩側P/N極分別與所述二電極接腳相對內側端的背面電連接,使該覆晶式穩壓晶片晶片跨接於二電極接腳的內側端背面下方;一以絕緣材料製成之基座,該基座包覆於覆晶式穩壓晶片以及二電極接腳的背面外部,且前述二電極接腳的相對外側端分別露出該基座外;以及一透明封裝體,該透明封裝體包覆於覆晶式LED晶片以及二電極接腳之正面外部,當二電極接腳的外側端連接電源,即可使覆晶式LED晶片發光並且讓光線透出透明封裝體,同時通過覆晶式穩壓晶片的抗靜電以及穩壓作用來對覆晶式LED晶片起保護作用。
- 如申請專利範圍第1項所述內建穩壓晶片之覆晶式LED元件,其中,所述覆晶式LED晶片底面兩側的正/負極與二電極接腳相對內側端的正面之間,以及覆晶式穩壓晶片頂面兩側的P/N極與所述二電極接腳相對內側端的背面之間,分別設有供該些部位焊接及電連接的焊墊。
- 如申請專利範圍第1項所述內建穩壓晶片之覆晶式LED元件,其中,所述二電極接腳的相對內側端正面排置於同一平面上,且二內側端的相對外側分別向下彎折延伸後銜接外側端,進而使二外側端底面分別顯露於基座的底部。
- 如申請專利範圍第1項所述內建穩壓晶片之覆晶式LED元件,其中,所述基座之絕緣材料填充於二電極接腳的相對內側端之間,並且在二 電極接腳內側端的正面周圍向上延伸有碗狀台階;所述覆晶式LED晶片位於該碗狀台階內圍,且所述透明封裝體填充於該碗狀台階內圍,進而包覆覆晶式LED晶片以及二電極接腳之正面外部。
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TW103111640A TWI555233B (zh) | 2014-03-28 | 2014-03-28 | Built-in regulator chip of the flip-chip LED components |
US14/273,798 US9064856B1 (en) | 2014-03-28 | 2014-05-09 | Flip-chip LED component built therein with a zener chip |
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TW103111640A TWI555233B (zh) | 2014-03-28 | 2014-03-28 | Built-in regulator chip of the flip-chip LED components |
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TW201526315A (zh) * | 2015-02-17 | 2015-07-01 | Xiu-Zhang Huang | 覆晶式發光二極體及其製造方法 |
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