TWI550813B - Semiconductor structure - Google Patents

Description

Semiconductor structure

The present invention relates to a semiconductor structure, and more particularly to a semiconductor capacitor structure that improves capacitance mismatch.

In modern integrated circuits, capacitors are one of the main circuit components. For example, capacitors used in the industry for logic analog components include metal-oxide-metal (MOM) capacitors and metal-insulator-metal (MIM) capacitors. Capacitance values of capacitors are quite sensitive to process and structure design, so the capacitance of each capacitor is often due to the problem of capacitor mismatch, which affects the accuracy of subsequent digital signals.

Therefore, the industry still needs a capacitor structure that can effectively improve the problem of capacitance mismatch.

The present invention provides a semiconductor structure including a first capacitor disposed in a first film layer, the first capacitor including a plurality of first cells, each of the first cells further comprising a plurality of first fingers electrode. The semiconductor structure further includes a second capacitor disposed on the first film layer, the second capacitor includes a plurality of second cells, and the second cells and the first cell Arbitrarily arranged to form an array, and each of the second units further comprises a plurality of second finger electrodes. The semiconductor structure further includes a plurality of first connecting lines and second connecting lines disposed on the first film layer, and the first connecting lines and the second connecting lines are parallel to each other. The first connecting wires are electrically connected to the first finger electrodes, and the first finger electrodes and the adjacent first connecting wires form a straight line; and the second connecting wires are electrically connected The second finger electrodes are connected to each other, and the second finger electrodes and their adjacent second connecting lines form a straight line.

The present invention further provides a semiconductor structure including a plurality of first finger electrodes disposed on a first film layer and a second film layer, and a plurality of first electrode layers and the second film layer disposed on the first film layer and the second film layer a second finger electrode, a plurality of common finger electrodes disposed on the first film layer and the second film layer, a plurality of first connecting lines disposed in the first film layer, and a plurality of a second connecting line in the second film layer. The common finger electrodes are interdigitated with the first finger electrodes to form a plurality of first cells in the first film layer and the second film layer, and the common finger electrodes and the like The second finger electrodes are arranged in a staggered arrangement to form a plurality of second units in the first film layer and the second film layer. The first connecting wires are electrically connected to the two closest first finger electrodes in the first cells; and the second connecting wires are electrically connected to the closest ones in the second cells. Two second finger electrodes, and the first connecting lines and the second connecting lines are parallel to each other.

According to the semiconductor structure provided by the present invention, the connection lines for connecting the finger electrodes are arranged in parallel with each other, so that the reliability of the capacitor is further improved without affecting the capacitance mismatch.

Please refer to FIG. 1 to FIG. 3 . FIG. 1 to FIG. 3 are schematic diagrams showing a first preferred embodiment of the semiconductor structure provided by the present invention. As shown in FIG. 1 , the first preferred embodiment provides a first capacitor C ₁ and a second capacitor C ₂ . The first capacitor C ₁ includes a plurality of first units 100 and a second capacitor C. ₂ includes a plurality of second units 200. In the preferred embodiment, the number of the first unit 100 and the second unit 200 is the same, that is, the ratio of the number of the first unit 100 to the second unit 200 is 1. As shown in FIG. 1 , each of the first cells 100 includes a plurality of first finger electrodes 110 and a plurality of third finger electrodes 120 , and the first finger electrodes 110 and the third finger electrodes 120 are interdigitated. The first unit 100 is configured to be arranged. Similarly, each of the second units 200 includes a plurality of second finger electrodes 210 and a plurality of fourth finger electrodes 220, and the second finger electrodes 210 and the fourth finger electrodes 220 are alternately arranged to form the same. The second unit 200. In addition, the first finger electrodes 110 are electrically connected to each other to form a comb shape, and the third finger electrodes 120 are electrically connected to each other by a third electrode 122 to form a comb shape. The second finger electrodes 210 are electrically connected to each other by a second electrode 212 to form a comb shape, and the fourth finger electrodes 220 are electrically connected to each other by a fourth electrode 222 to form a comb shape. The first unit 100 and the second unit 200 are disposed in the first film layer 10 and the second film layer 20, in other words, the first finger electrode 110 and the third finger electrode 120 are disposed on the first film layer 10 Similarly, the second finger electrode 210 and the fourth finger electrode 220 are also disposed in the first film layer 10 and the second film layer 20, and the first film layer 10 and the second film layer are disposed. 20 may be, for example, the first film layer (M1) and the second film layer (M2) located in the metal wiring layer of the rear stage, but is not limited thereto.

Please continue to see Figure 1. The first unit 100 and the second unit 200 in the first film layer 10 and the second film layer 20 have the same arrangement position. It should be noted that the first unit 100 and the second unit 200 of the first film layer 10 and the second film layer 20 are alternately arranged to form an array. As shown in FIG. 1, the array of the first unit 100 and the second unit 200 has a plurality of columns and a plurality of rows, and the center point and the second unit of the first unit 100 disposed in the same column. The center point of 200 forms a broken line as shown in Fig. 1. Moreover, the center point of the first unit 100 disposed in the same row and the center point of the second unit 200 also form a broken line as shown in FIG. In addition, the first finger electrodes 110 of the first unit 100 in the adjacent columns and the third finger electrodes 120 are arranged in the reverse order. For example, in the first unit 100 of the singular column, the first finger electrode 110 and the third finger electrode 120 are arranged in the order of the third finger electrode 120, and the first finger electrode 110 is behind; However, in the first cell 100 of the even column, the first finger electrode 110 and the third finger electrode 120 are arranged in the order of the first finger electrode 110 and the third finger electrode 120 is behind. Similarly, the second finger electrode 210 and the fourth finger of the second unit 200 in the adjacent column The order in which the electrodes 220 are arranged is also reversed. For example, in the second unit 200 of the singular column, the second finger electrode 210 and the fourth finger electrode 220 are arranged in the order of the second finger electrode 210 and the fourth finger electrode 220 is behind; However, in the second unit 200 of the even columns, the arrangement order of the second finger electrodes 210 and the fourth finger electrodes 220 is the fourth finger electrode 220 first, and the second finger electrode 210 is rear.

Please refer to Figure 2. The semiconductor structure provided by the preferred embodiment further includes a plurality of first connecting lines 130 disposed on the first film layer 10, and the first connecting lines 130 are electrically connected to the first finger electrodes 110, that is, the first The first finger electrode 110 in the film layer 10 is electrically connected to the first connecting line 130 by the first electrode 112. The first finger electrode 110 and its adjacent first connecting line 130 are parallel, and a straight line is formed as shown in FIG. It should be noted that the first connecting line 130 electrically connects the first unit 100 of the adjacent column by connecting the first finger electrodes 110, and the first units 100 of the adjacent columns are alternately arranged like each other. On both sides of the first connecting line 130. In addition, the semiconductor structure provided by the preferred embodiment further includes a plurality of second connecting lines 230 disposed on the first film layer 10, and the second connecting lines 230 are electrically connected to the second finger electrodes 210, that is, the first The second finger electrode 210 in the film layer 10 is electrically connected to the second connecting line 230 by the second electrode 212. The second finger electrode 210 and its adjacent second connecting line 230 are parallel, and form a straight line as shown in FIG. The second connecting line 230 electrically connects the second unit 200 of the adjacent column by connecting the second finger electrodes 210, and the second of the adjacent columns The units 200 are alternately arranged on both sides of the second connecting line 230 as if they were leaflets. More importantly, the first connecting line 130 and the second connecting line 230 are parallel to each other as shown in FIG.

Please refer to Figure 3. In addition, the semiconductor structure provided by the preferred embodiment further includes a plurality of third connecting lines 132 disposed on the second film layer 20, and the third connecting line 132 is perpendicular to the third finger electrodes 120 and is connected to the third electrode. The first finger 100 of the adjacent row is electrically connected to the third finger electrode 120 of the adjacent row, and the first cells 100 of the adjacent row are alternately arranged on both sides of the third connecting line 132 as if they are alternate leaves. The third finger electrode 120 in the second film layer 20 is electrically connected to the third connecting line 132 by the third electrode 122. In addition, the semiconductor structure provided by the preferred embodiment further includes a plurality of fourth connecting lines 232 disposed on the second film layer 20, and the fourth connecting line 232 is also perpendicular to the fourth finger electrodes 220 and is provided by the fourth electrode. 222 is electrically connected to the fourth finger electrodes 220 of the adjacent rows, and the second cells 200 of the adjacent rows are alternately arranged on both sides of the fourth connecting line 232 as if they are alternate leaves. The fourth finger electrode 220 in the second film layer 20 is electrically connected to the fourth connection line 232 by the fourth electrode 222. As shown in FIG. 3, the third connecting line 132 and the fourth connecting line 232 are parallel to each other.

According to the semiconductor structure provided by the first preferred embodiment, the connecting lines for electrically connecting the same capacitor unit are parallel or perpendicular to the finger electrodes, and unlike the prior art, the connecting lines are not parallel to the finger electrodes. Or not perpendicular, or even have an arrangement of about 45 degrees (°). Therefore, in the prior art, The absence of parallel or non-perpendicular arrangement of the wiring and the finger electrodes results in a lack of capacitance layout pattern that can be improved by the semiconductor structure provided by the preferred embodiment.

In addition, the semiconductor structure provided by the first preferred embodiment has four terminal terminals (not shown), for example, the first capacitor positive terminal C ₁ + and the second capacitor in the first film layer 10 are positive. End point C ₂ +, with the first electrode negative terminal C ₁ - located at the second film layer 20 and the second capacitance negative terminal C ₂ -. As described above, the first finger electrodes 110 are all electrically connected together and electrically connected to the first capacitor positive terminal C ₁ + . Similarly, the second finger electrodes 210 are all electrically connected together, and are electrically connected to the second capacitor positive terminal C ₂ + ; the third finger electrodes 120 are all electrically connected together and electrically connected to The first electrode negative terminal C ₁ -; the fourth finger electrode 220 is electrically connected together and electrically connected to the second capacitor negative terminal C ₂ -.

Please refer to FIG. 4, which is a schematic diagram of a second preferred embodiment of a semiconductor structure provided by the present invention. It is to be noted that the same components in the second preferred embodiment as the first preferred embodiment are denoted by the same reference numerals, and the second preferred embodiment is the same as the first preferred embodiment. . In addition, FIG. 4 simultaneously illustrates the first capacitor C ₁ and the second capacitor C ₂ disposed on the first film layer 10 and the second film layer 20 . In the first preferred embodiment, the distance d ₁ between the first unit 100 and the second connecting line 230 and the fourth connecting line 232 is less than or equal to 0.6 micrometer (μm); and the second unit 200 and the first connecting line The pitch d _{2 of the} 130 and the third connecting line 132 is also less than or equal to 0.6 μm. As shown in FIG. 4, the semiconductor structure provided by the second preferred embodiment is different in that the distance d ₁ between the first unit 100 and the second connecting line 230 and the fourth connecting line 232 is between 0.6 μm and 0.8. The micrometer μm; similarly, the distance d ₂ between the second unit 200 and the first connecting line 130 and the third connecting line 132 is also between 0.6 μm and 0.8 μm. In other words, the pitch of the connecting lines of the respective capacitive units 100/200 to the dissimilar capacitive units 200/100 can be amplified.

According to the semiconductor structure provided by the second preferred embodiment, the capacitance units 100/200 are reduced by increasing the pitch d ₁ , d ₂ of the connecting lines of the capacitor unit 100/200 to the dissimilar capacitor unit 200/100. Coupling capacitance between them to reduce capacitive crosstalk.

Please refer to FIG. 5 to FIG. 7 . FIG. 5 to FIG. 7 are schematic diagrams showing a third preferred embodiment of a semiconductor component provided by the present invention. It is to be noted that the same components of the third preferred embodiment as those of the foregoing preferred embodiment are denoted by the same reference numerals, and the third preferred embodiment is the same as the foregoing preferred embodiment. In addition, it should be noted that the pitch of the connecting lines of each of the capacitor units 100/200 to the dissimilar capacitor unit 200/100 in the third preferred embodiment can be enlarged to 0.6 μm to 0.8 as described in the second preferred embodiment. Mm. The third preferred embodiment is different from the second preferred embodiment in that, in the first film layer 10, the preferred embodiment is further adjacent to each of the columns as shown in FIG. A plurality of guarding rings 30 are disposed between the unit 100 and the second unit 200. Further, in the second film layer 20, optionally, as shown in FIG. 6, the first one adjacent to each row is further selected. A plurality of guard rings 32 are disposed between the unit 100 and the second unit 200. And as shown in FIGS. 5 and 6, the extending direction of the guard ring 30 in the first film layer 10 is the same as the extending direction of the first connecting line 130 and the second connecting line 230; and the second film layer 20 is protected. The extending direction of the ring 32 is the same as the extending direction of the third connecting line 132 and the fourth connecting line 232. In addition, the guard rings 30/32 in the different film layers 10/20 can be electrically connected by the plugs 34 and grounded by the plugs 34 as shown in FIG. Therefore, different capacitor units 100/200 are shielded by the guard ring 30/32, and the coupling capacitance can be further reduced.

The semiconductor structure provided by the third preferred embodiment is provided by increasing the pitch d ₁ /d ₂ of the connection line of the capacitor unit 100/200 to the dissimilar capacitance unit 200/100, and by protecting the ring 30/32 The setting reduces the coupling capacitance between different capacitor units 100/200 and reduces capacitive crosstalk.

Please refer to FIG. 8. FIG. 8 is a schematic view showing a fourth preferred embodiment of a semiconductor structure according to the present invention. It is to be noted that the same components of the fourth preferred embodiment as those of the foregoing preferred embodiment are denoted by the same reference numerals. Further, the semiconductor structure shown in FIG. 8 is a schematic view obtained by laminating the first film layer 10 and the second film layer 20. As shown in FIG. 8, the preferred embodiment also provides a first capacitor C ₁ and a second capacitor C ₂ . The first capacitor C ₁ includes a plurality of first units 100 , and the second capacitor C ₂ includes a plurality of The second unit 200.

As shown in FIG. 8 , each of the first cells 100 includes a plurality of first finger electrodes 110 and a plurality of third finger electrodes 120 , and the first finger electrodes 110 and the third finger electrodes 120 are interdigitated. The first unit 100 is configured to be arranged. Similarly, each of the second units 200 includes a plurality of second finger electrodes 210 and a plurality of fourth finger electrodes 220, and the second finger electrodes 210 and the fourth finger electrodes 220 are alternately arranged to form the same. The second unit 200. In addition, the first finger electrodes 110 are electrically connected to each other to form a comb shape, and the third finger electrodes 120 are electrically connected to each other by a third electrode 122 to form a comb shape. The second finger electrodes 210 are electrically connected to each other by a second electrode 212 to form a comb shape, and the fourth finger electrodes 220 are electrically connected to each other by a fourth electrode 222 to form a comb shape.

Please continue to see Figure 8. The semiconductor structure provided by the preferred embodiment further includes a plurality of first connecting lines 130 disposed on the first film layer 10, the first connecting lines 130 electrically connecting the first finger electrodes 110, and the first finger electrodes 110 and its adjacent first connecting line 130 are parallel and form a straight line as shown in FIG. In addition, the semiconductor structure provided by the preferred embodiment further includes a plurality of second connecting lines 230 disposed on the first film layer 10, the second connecting lines 230 are electrically connected to the second finger electrodes 210, and the second fingers are The electrode 210 and its adjacent second connecting line 230 are parallel and also form a straight line as shown in FIG. more important The first connecting line 130 and the second connecting line 230 are parallel to each other as shown in FIG. 8.

Please still refer to Figure 8. In addition, the semiconductor structure provided by the preferred embodiment further includes a plurality of third connecting lines 132 disposed on the second film layer 20 , and the third connecting lines 132 are electrically connected to the third finger electrodes 120 by the third electrodes 122 . . In the preferred embodiment, the third connecting line 132 is perpendicular to the third finger electrode 120. In addition, the semiconductor structure provided by the preferred embodiment further includes a plurality of fourth connecting lines 232 disposed on the second film layer 20 , and the fourth connecting lines 232 are electrically connected to the fourth finger electrodes 220 by the fourth electrodes 222 . And the fourth connection line 232 is also perpendicular to the fourth finger electrode 220. And as shown in FIG. 8, the third connecting line 132 and the fourth connecting line 232 are parallel to each other.

It should be noted that, in the preferred embodiment, the number of the first unit 100 and the second unit 200 is different, that is, the ratio of the number of the first unit 100 to the second unit 200 has a ratio, and the ratio is greater than 1. . As shown in FIG. 8, the ratio of the first unit 100 to the second unit 200 in the preferred embodiment is 3, but the ratio of the first unit 100 to the second unit 200 is 5 or 7. Without being limited to this.

In addition, the preferred embodiment can further increase the spacing d ₁ , d ₂ (not shown) of the connecting lines of the capacitor unit 100/200 to the dissimilar capacitor unit 200/100, and the setting of the guard ring 30/32, and further reduce Coupling capacitance between different capacitor units 100/200 and thereby reducing capacitive crosstalk.

According to the semiconductor structure provided in the fourth preferred embodiment, the first capacitor C ₁ and the second capacitor C ₂ have different capacitance values by adjusting the number of the first unit 100 and the second unit 200. In other words, the present invention can obtain a flexible capacitance ratio by different winding designs, and is more beneficial to different capacitance requirements of the integrated circuit.

Please refer to FIG. 9. FIG. 9 is a schematic view showing a fifth preferred embodiment of the semiconductor structure provided by the present invention. As shown in Figure 9. The fifth preferred embodiment provides a first capacitor C ₁ and a second capacitor C ₂ . The first capacitor C ₁ includes a plurality of first units 300 , and the second capacitor C ₂ includes a plurality of second units 400 . In the preferred embodiment, the number of the first unit 300 and the second unit 400 is the same, that is, the ratio of the number of the first unit 300 to the second unit 400 is 1. As shown in FIG. 9, each of the first cells 300 includes a plurality of first finger electrodes 310, and each of the second cells 400 includes a plurality of second finger electrodes 410. In addition, the first finger electrodes 310 are electrically connected to each other to form a comb shape, and the second finger electrodes 410 are electrically connected to each other by a second electrode 412 to form a comb shape. The first unit 300 and the second unit 400 are disposed in a first film layer 12. In other words, the first finger electrodes 310 and the second finger electrodes 410 are disposed in the first film layer 12. It should be noted that the preferred embodiment further includes a plurality of common finger electrodes 500 disposed in the first film layer 12, and the common finger electrodes 500 have a fishbone shape. As shown in FIG. 9, the common finger electrodes 500 are interdigitated with the first finger electrodes 310 to form the first cells 300. Similarly, the common finger electrodes 500 are also interdigitated with the second finger electrodes 410. The arrays are arranged to form the second units 400. Please continue to see Figure 9. The first unit 300 and the second unit 400 in the first film layer 12 are staggered to form an array. As shown in FIG. 9, the array of the first unit 300 and the second unit 400 has a plurality of rows and a plurality of columns, and the center point of the first unit 300 disposed in the same column and the center point of the second unit 400 are formed. A fold line.

Please still refer to Figure 9. The semiconductor structure provided by the preferred embodiment further includes a plurality of first connecting lines 330 disposed on the first film layer 12, and the first connecting lines 330 are electrically connected to the first finger electrodes 310, that is, the first The one-finger electrode 310 is electrically connected to the first connecting line 330 by the first electrode 312. The first finger electrode 310 and its adjacent first connecting line 330 are parallel, and a straight line is formed as shown in FIG. It should be noted that the first connection line 330 electrically connects the first unit 300 of the same column by connecting the first finger electrodes 310. In addition, the semiconductor structure provided by the preferred embodiment further includes a plurality of second connecting lines 430 disposed on the first film layer 12, and the second connecting lines 430 are electrically connected to the second finger electrodes 410, that is, The second finger electrode 410 is electrically connected to the second connection line 430 by the second electrode 412. The second finger electrode 410 and its adjacent second connecting line 430 are parallel, and form a straight line as shown in FIG. The second connection line 430 electrically connects the second unit 400 of the same column by connecting the second finger electrodes 410 connection. More importantly, the first connecting line 330 and the second connecting line 430 are parallel to each other as shown in FIG.

According to the semiconductor structure provided by the preferred embodiment, the electrode which originally requires two layers can be simplified into the single film layer 12 by the arrangement of the common finger electrodes, so that the process can be simplified. However, those skilled in the art should understand that the semiconductor components provided in the preferred embodiment can be separately fabricated in two layers according to product requirements, and by the first electrode 412 and the second electrode 512 and the fish bone. A dielectric plug (not shown) is disposed in the central axis of the common finger electrode 500 for electrically connecting the first unit 300 and the second unit 400 of different film layers, thereby completing the first capacitor C ₁ and the second capacitor Production of C ₂ .

In addition, the semiconductor structure provided by the fifth preferred embodiment has three connection terminals (not shown), such as a first capacitor positive terminal C ₁ + located in the film layer 12, and a second capacitor positive terminal C _{2 .} +, and share the negative endpoint C-. As described above, the first finger electrodes 310 are all electrically connected together and electrically connected to the first capacitor positive terminal C ₁ + . Similarly, the second finger electrodes 410 are all electrically connected together, and are electrically connected to the second capacitor positive terminal C ₂ +; the common finger electrodes 500 are all electrically connected together and electrically connected to the common Extremely negative endpoint C-.

Please refer to FIG. 10 and FIG. 11 , FIG. 10 is a schematic diagram of a sixth preferred embodiment of the semiconductor component provided by the present invention, and FIG. 11 is a seventh of the semiconductor component provided by the present invention. Illustration of a preferred embodiment Figure. In addition, the sixth preferred embodiment and the seventh preferred embodiment can be referred to at the same time to better understand the differences between the sixth preferred embodiment and the seventh preferred embodiment. It should be noted that the same components as the fifth preferred embodiment in the sixth and seventh preferred embodiments are denoted by the same reference numerals, and the sixth and seventh preferred embodiments and the fifth preferred embodiment are described. The similarities in the examples are not repeated here.

The sixth preferred embodiment is different from the fifth preferred embodiment in that the first finger electrode 310 and the second finger electrode 410 in the fifth preferred embodiment are respectively provided by the first electrode 312 and the second electrode The electrode 412 is electrically connected to form a comb shape. However, the first finger electrode 310 and the second finger electrode 410 of the sixth preferred embodiment are electrically connected to the second electrode 412 by the first electrode 312 and the second electrode 412, respectively. It is a fish bone. The first electrode 312 is electrically connected to the central axis of each of the first finger electrodes 310; the second electrode 412 is connected to the central axis of each of the second finger electrodes 410. Between the first finger electrode 310 and the second finger electrode 410, a plurality of fishbone-shaped common finger electrodes 500 are provided. In the preferred embodiment, the number of the first finger electrodes 310 and the second finger electrodes 410 is the same, that is, the capacitance ratio of the first capacitor C ₁ to the second capacitor C ₂ is 1.

Please refer to Figure 11. The seventh preferred embodiment disclosed in FIG. 11 is different from the sixth preferred embodiment in that the number of the first finger electrodes 310 is different from the number of the second finger electrodes 410 in the seventh preferred embodiment. . As shown in FIG. 11, in the same row, the ratio of the number of the first finger electrodes 310 to the second finger electrodes 410 is 3:2; in other words, the first finger electrodes 310 and the second fingers The ratio of the number of electrodes 410 is greater than one.

According to the semiconductor structure provided by the sixth and seventh preferred embodiments, the electrode which originally requires two layers can be simplified into the single film layer 12 by the arrangement of the common finger electrodes 500, so that it can be simplified. Process. In addition, the first capacitor C ₁ and the second capacitor C ₂ have different capacitance values by adjusting the number of the first finger electrodes 310 and the second finger electrodes 410. In other words, the present invention can obtain a flexible capacitance ratio by different winding designs, and is more beneficial to different capacitance requirements of the integrated circuit.

Please refer to FIG. 12 and FIG. 13 . FIG. 12 and FIG. 13 are schematic diagrams showing an eighth preferred embodiment of a semiconductor structure provided by the present invention. As shown in FIG. 12 and FIG. 13 , the semiconductor structure provided by the preferred embodiment includes a plurality of first finger electrodes 710, a plurality of second finger electrodes 810, and a plurality of common finger electrodes 900, respectively. The first film layer 14 and the second film layer 24 are disposed. In addition, the first finger electrodes 710 are electrically connected to each other by a first electrode 712 to form a comb shape; and the second finger electrodes 810 are electrically connected to each other by a second electrode 812 to form a comb shape. As shown in FIG. 12 and FIG. 13 , the common finger electrodes 900 are arranged in a staggered manner with the first finger electrodes 710 , and a plurality of first cells 700 are formed in the first film layer 14 and the second film layer 24 . . Similarly, the common finger electrode 900 and the second finger electrode 810 are alternately arranged, and a plurality of second cells 800 are formed in the first film layer 14 and the second film layer 24. The first single in the first film layer 14 and the second film layer 24 The element 700 and the second unit 800 have the same arrangement position. It should be noted that the first unit 700 and the second unit 800 of the first film layer 14 and the second film layer 24 are staggered to form an array. For example, in the preferred embodiment, the first unit 700 is adjacent to the second unit 800 regardless of the first film layer 14 or the second film layer 24. Therefore, the first unit 700 can be arranged in an oblique arrangement. Similarly, the second unit 800 is adjacent to the first unit 700, so the second unit 800 can be regarded as an oblique arrangement.

In addition, the preferred embodiment further includes a plurality of first via plugs 714, a plurality of second via plugs 814, and a plurality of third via plugs 914 (both shown only in FIG. 13). The first via plug 714 is electrically connected to the first finger electrode 710 in the first film layer 14 and the second film layer 24, and the second via plug 814 is electrically connected to the first film. The second finger electrode 810 in the layer 14 and the second film layer 24, and the third layer plug 914 is used to electrically connect the common fingers in the first film layer 14 and the second film layer 24. Electrode 900. The first capacitor 700 in the first film layer 14 and the second film layer 24 are electrically connected to each other to form a first capacitor C ₁ ; and the first film layer 14 and the second film layer 24 The two units 800 are electrically connected to each other to form a second capacitor C ₂ .

Please continue to see Figures 12 and 13. The semiconductor structure provided by the preferred embodiment further includes a plurality of first connecting lines 730 disposed in the first film layer 14 for electrically connecting the two closest first finger electrodes 710 in the first unit 700. . The semiconductor structure provided by the preferred embodiment further includes a plurality of The second connecting line 830 is disposed in the second film layer 24 for electrically connecting the two closest second finger electrodes 810 in the second unit 800. It should be noted that the first connection line 730 is perpendicular to each of the first finger electrodes 710; and the second connection line 830 is perpendicular to each of the second finger electrodes 810. More importantly, the first connection line 730 disposed in the first film layer 14 and the second connection line 830 disposed in the second film layer 24 are parallel to each other.

According to the semiconductor structure provided by the preferred embodiment, the connection line for connecting the same capacitor unit is perpendicular to the finger electrode, and unlike the prior art, the connection line is not parallel or perpendicular to the finger electrode, or even has a The arrangement of the angle of 45 degrees (°). Therefore, in the prior art, the defect in the capacitance layout pattern due to the non-parallel or non-perpendicular arrangement of the connection lines and the finger electrodes can be improved by the semiconductor structure provided by the preferred embodiment.

According to the semiconductor structure provided by the present invention, the connection lines for connecting the finger electrodes are arranged in parallel and parallel or perpendicular to the finger electrodes, so that the reliability of the capacitor can be further improved without affecting the capacitance mismatch.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

10, 14‧‧‧ first film

20, 24‧‧‧ second film

12‧‧‧ film layer

30, 32‧‧‧ protection ring

34‧‧‧ Plug

100, 300, 700‧‧‧ first unit

110, 310, 710‧‧‧ first finger electrodes

112, 312, 712‧‧‧ first electrode

120‧‧‧ third finger electrode

122‧‧‧ third electrode

130, 330, 730‧‧‧ first cable

132‧‧‧ third cable

200, 400, 800‧‧‧ second unit

210, 410, 810‧‧‧ second finger electrode

212, 412, 812‧‧‧ second electrode

220‧‧‧fourth finger electrode

222‧‧‧fourth electrode

230, 430, 830‧‧‧ second cable

232‧‧‧fourth cable

500, 900‧‧‧ Common finger electrodes

714‧‧‧first interlayer plug

814‧‧‧Second layer plug

914‧‧‧ third layer plug

d ₁ , d ₂ ‧‧‧ spacing

Figures 1 to 3 show the first comparison of the semiconductor structure provided by the present invention. A schematic of a preferred embodiment.

Figure 4 is a schematic view showing a second preferred embodiment of a semiconductor structure provided by the present invention.

5 to 7 are schematic views showing a third preferred embodiment of a semiconductor component provided by the present invention.

Figure 8 is a schematic view showing a fourth preferred embodiment of a semiconductor device provided by the present invention.

Figure 9 is a schematic view showing a fifth preferred embodiment of the semiconductor structure provided by the present invention.

Figure 10 is a schematic view showing a sixth preferred embodiment of a semiconductor component provided by the present invention.

Figure 11 is a schematic view showing a seventh preferred embodiment of a semiconductor component provided by the present invention.

12 and 13 are schematic views showing an eighth preferred embodiment of one of the semiconductor elements provided by the present invention.

10‧‧‧First film

100‧‧‧ first unit

110‧‧‧First finger electrode

112‧‧‧First electrode

120‧‧‧ third finger electrode

122‧‧‧ third electrode

130‧‧‧First cable

200‧‧‧Second unit

210‧‧‧Second finger electrode

212‧‧‧second electrode

220‧‧‧fourth finger electrode

222‧‧‧fourth electrode

230‧‧‧second cable

C ₁ ‧‧‧first capacitor

C ₂ ‧‧‧second capacitor

d ₁ , d ₂ ‧‧‧ spacing

Claims (20)

A semiconductor structure includes: a first capacitor disposed in a first film layer, the first capacitor includes a plurality of first cells, each of the first cells further comprising a plurality of first finger electrodes; a capacitor is disposed on the first film layer, the second capacitor includes a plurality of second cells, and the second cells are staggered with the first cells to form an array, and each of the second cells further includes a plurality of a second finger electrode; a plurality of first connecting lines are disposed on the first film layer, the first connecting wires are electrically connected to the first finger electrodes, and the first finger electrodes and Adjacent first connecting lines form a straight line; and a plurality of second connecting lines are disposed on the first film layer and parallel to the first connecting lines, and the second connecting lines are electrically connected a second finger electrode, and the second finger electrodes and their adjacent second connecting lines form a straight line. The semiconductor structure of claim 1, wherein the array comprises a plurality of rows and a plurality of columns. The semiconductor structure of claim 2, wherein a center point of the first units disposed in the same column forms a broken line with a center point of the second units. a semiconductor structure as described in claim 2, wherein The center points of the first units of the same row form a fold line with the center points of the second units. The semiconductor structure of claim 1, wherein each of the first units further comprises a plurality of third finger electrodes disposed on the first film layer, and the third finger electrodes and the first The finger electrodes are staggered to form the first unit. The semiconductor structure of claim 5, wherein each of the second units further comprises a plurality of fourth finger electrodes disposed on the first film layer, and the fourth finger electrodes and the second The finger electrodes are staggered to form the second unit. The semiconductor structure of claim 6, wherein the first finger electrodes and the third finger electrodes are formed on a second film layer, and the second finger electrodes and the first A four-finger electrode is further formed on the second film layer. The semiconductor structure of claim 7, further comprising a plurality of third connecting lines and a plurality of fourth connecting lines disposed on the second film layer, wherein the third connecting lines are electrically connected to the first A three-finger electrode, and the fourth connecting wires are electrically connected to the fourth finger electrodes. Such as the semiconductor structure described in claim 8 of the patent scope, wherein the The three connecting lines and the fourth connecting lines are parallel to each other. The semiconductor structure of claim 1, wherein a distance between the first unit and the second connecting line, and a distance between the second unit and the first connecting line are between 0.6 micrometers and 0.8 micrometers. The semiconductor structure of claim 1, further comprising a plurality of guard rings disposed between the first unit and the second unit. The semiconductor structure of claim 1, wherein the first unit and the second unit further comprise a quantity ratio, and the ratio is greater than or equal to 1. The semiconductor structure of claim 1, further comprising a plurality of common finger electrodes disposed in the first film layer. The semiconductor structure of claim 13, wherein the common finger electrodes are interdigitated with the first finger electrodes to form the first cells, and the common finger electrodes are The second finger electrodes are alternately arranged to form the second unit. The semiconductor structure of claim 13, wherein the number of the first finger electrodes is the same as the number of the second finger electrodes. The semiconductor structure of claim 13, wherein the number of the first finger electrodes is different from the number of the second finger electrodes. A semiconductor structure comprising: a plurality of first finger electrodes disposed on a first film layer and a second film layer; and a plurality of second finger electrodes disposed on the first film layer and the second film layer a plurality of common finger electrodes disposed on the first film layer and the second film layer, wherein the common finger electrodes are interdigitated with the first finger electrodes to form the first film layer and the first film layer Forming a plurality of first cells in the second film layer, and the common finger electrodes are interdigitated with the second finger electrodes to form a plurality of first layers in the first film layer and the second film layer a plurality of first connecting lines disposed in the first film layer for electrically connecting the two closest first finger electrodes in the first cells; and a plurality of second connecting lines The second film layer is electrically connected to the two closest second finger electrodes in the second unit, and the first connecting lines and the second connecting lines are parallel to each other. The semiconductor structure of claim 17, wherein the first unit and the second unit are staggered to form an array. The semiconductor structure of claim 17, wherein the first unit layer of the first film layer and the second film layer are electrically connected to form a first capacitor disposed on the first film. The layer and the second layer of the second layer The two cells are electrically connected to form a second capacitor. The semiconductor structure of claim 17, further comprising: a plurality of first via plugs for electrically connecting the first finger in the first film layer and the second film layer An electrode; a plurality of second interlayer plugs for electrically connecting the second finger electrodes in the first film layer and the second film layer; and a plurality of third interlayer plugs for Electrically connecting the common finger electrodes in the first film layer and the second film layer.