TWI580057B - Semiconductor capacitor - Google Patents

Description

Semiconductor capacitor

The present invention relates to a semiconductor structure, and more particularly to a semiconductor capacitor structure.

Semiconductor capacitors are commonly used in modern integrated circuits (ICs) to achieve different functions such as dynamic random access memory, bypassing, and filtering. In a typical analog IC process, the capacitor is composed of two layers of conductive material and a dielectric material sandwiched therein. For example, conventional capacitors include metal-insulator-metal (MIM) capacitors and metal-oxide-metal (MOM) capacitors.

Those skilled in the art should be aware that the capacitance value of the capacitor structure is very sensitive to the manufacturing process and structural design, and the variation caused by the misalignment in the process is an unavoidable problem. Therefore, there is still a need for a semiconductor capacitor that reduces the variation in structure and the value of the capacitor due to the process.

According to the scope of the invention, there is provided a semiconductor capacitor comprising a substrate, a plurality of odd-numbered layers disposed on the substrate, and a plurality of even-numbered layers disposed on the substrate. The substrate defines a capacitor region, an end region and a peripheral region. Each of the odd layers includes a plurality of the plurality of layers disposed in the capacitor region An odd-numbered first odd finger, a plurality of second odd-numbered fingers disposed in the capacitance region, and a first odd-numbered layer end disposed in the end region ( First odd terminal), and a second odd terminal disposed in the end region. The first odd-numbered finger electrodes and the second odd-numbered finger electrodes are interdigitated in the capacitive region, and are physically and electrically separated from each other. The first odd-numbered finger electrodes are electrically connected to the first odd-numbered layer end, and the second odd-numbered finger electrodes are electrically connected to the second odd-numbered layer end. Each of the even layers includes a plurality of first even fingers disposed in the capacitor region, and a plurality of second even fingers disposed in the capacitor region, a first even terminal disposed in the end region, and a second even terminal disposed in the end region. The first even-numbered finger electrodes and the second even-numbered finger electrodes are interdigitated with each other in the capacitance region, and are physically and electrically separated from each other. The first even layer finger electrodes are electrically connected to the first even layer end, and the second even layer finger electrodes are electrically connected to the second even layer end. The semiconductor capacitor further includes at least one first odd connecting structure, at least one second odd connecting structure, and at least one first even connecting layer (first even connecting) And a second even connecting structure. The first odd-numbered layer conductive connection structure, the second odd-numbered layer conductive connection structure, the first even-numbered layer conductive connection structure, and the second even-numbered layer conductive connection structure are disposed in the end region. The first odd-numbered conductive connection structure is electrically connected to the first odd-numbered layer end points in the odd-numbered layers, and the second odd-numbered conductive connection structure is electrically connected to the second odd-numbered end in the odd-numbered layers The first even-layer conductive connection structure is electrically connected to the first even-numbered layer end points in the even-numbered layers, and the second even-numbered conductive connection structure is electrically connected to the first-numbered layers Two even layer endpoints.

According to the patent application of the present invention, there is further provided a semiconductor capacitor, the semiconductor capacitor comprising a substrate, a first layer disposed on the substrate, a second layer disposed on the first layer, and a The third layer on the second layer. The substrate defines a capacitor region, an end region and a peripheral region. The first layer includes a plurality of first finger electrodes and a plurality of second finger electrodes. The first finger electrodes and the second finger electrodes are disposed in the capacitor region, and the capacitor region is disposed in the capacitor region. They are interdigitated with each other and are physically and electrically separated from each other. The second layer includes a plurality of third finger electrodes and a plurality of fourth finger electrodes. The third finger electrodes and the fourth finger electrodes are disposed in the capacitor region, and the capacitor region is disposed in the capacitor region. They are interdigitated with each other and are physically and electrically separated from each other. The third layer includes a plurality of fifth finger electrodes and a plurality of sixth finger electrodes, wherein the fifth finger electrodes and the sixth finger electrodes are disposed in the capacitor region, and in the capacitor region They are interdigitated with each other and are physically and electrically separated from each other. More importantly, the first finger electrodes and the fifth finger electrodes are electrically connected to each other in the end region, and the second finger electrodes and the sixth finger electrodes are connected to the The third finger electrodes and the fourth finger electrodes are connected to the first finger electrodes, the second finger electrodes, the second finger electrodes, and the fifth finger electrodes are electrically connected to each other. The sixth finger electrodes are electrically isolated.

According to the semiconductor capacitor provided by the present invention, the finger electrodes in the adjacent layers in the capacitor region are electrically separated from each other. Therefore, in the direction of the vertical substrate, the respective finger electrodes can avoid electromagnetic interaction between each other, and the inductive effect can also be avoided. More importantly, the endpoints in the adjacent layers in the endpoint region are physically and electrically separated from each other, so that electrical interactions in the endpoint regions are avoided.

10‧‧‧Semiconductor capacitance

100‧‧‧Base

102‧‧‧Capacitor zone

104‧‧‧End zone

106‧‧‧The surrounding area

110‧‧‧ first floor

112‧‧‧First finger electrode

114‧‧‧First endpoint

116‧‧‧second finger electrode

118‧‧‧second endpoint

120‧‧‧ second floor

122‧‧‧ third finger electrode

124‧‧‧ third endpoint

126‧‧‧ fourth finger electrode

128‧‧‧ fourth endpoint

130‧‧‧ third floor

132‧‧‧ fifth finger electrode

134‧‧‧ fifth endpoint

136‧‧‧ sixth finger electrode

138‧‧‧ sixth endpoint

140‧‧‧ fourth floor

142‧‧‧ seventh finger electrode

144‧‧‧ seventh endpoint

146‧‧‧ eighth finger electrode

148‧‧‧ eighth endpoint

150‧‧‧First conductive connection structure

152‧‧‧Second conductive connection structure

154‧‧‧ Third conductive connection structure

156‧‧‧fourth conductive connection structure

A‧‧‧first electrode

B‧‧‧second electrode

D1‧‧‧ first direction

D2‧‧‧ second direction

1 to 3 are schematic views showing a first preferred embodiment of a semiconductor capacitor provided by the present invention.

1 to 5 are schematic views showing a second preferred embodiment of a semiconductor capacitor provided by the present invention.

Please refer to FIG. 1 to FIG. 3 . FIG. 1 to FIG. 3 are schematic diagrams showing a first preferred embodiment of a semiconductor capacitor provided by the present invention. As shown in FIG. 1, the semiconductor capacitor 10 provided by the present invention includes a substrate 100 having a capacitor region 102, an end region 104, and a peripheral region 106 defined thereon. The peripheral zone 106 surrounds the end zone 104 and the end zone 104 encloses the capacitive zone 102. The semiconductor capacitor 10 provided in the preferred embodiment further includes a first layer 110 disposed on the substrate 100. Basically, the first layer 110 comprises an insulating material to provide electrical isolation. In addition, as shown in FIG. 1, the first layer 110 includes a capacitor region 102, an end region 104, and a peripheral region 106 as defined by regions on the substrate 100. The first layer 110 further includes a plurality of first finger electrodes 112 and a plurality of second finger electrodes 116, and the first finger electrodes 112 and the second finger electrodes 116 are disposed in the capacitor region 102. It is to be understood by those skilled in the art that the number of first finger electrodes 112 and second finger electrodes 116 in the preferred embodiment is merely exemplary, so the number of first finger electrodes 112 and second finger electrodes 116 is Can be adjusted according to different product needs. As shown in FIG. 1 , the first finger electrode 112 and the second finger electrode 116 extend along a first direction D1 , and the first finger electrode 112 and the second finger electrode 116 are horizontal to the substrate 100 . The directions are parallel to each other. The first finger electrodes 112 and the second finger electrodes 116 are alternately arranged, so that they are arranged to each other. More importantly, the first finger electricity The poles 112 and the second finger electrodes 116 are physically and electrically separated from each other within the capacitor region 102.

Please continue to see Figure 1. The first layer 110 further includes a first endpoint 114 and a second endpoint 118. It should be noted that the first end point 114 and the second end point 118 are disposed in the end point area 104, and as shown in FIG. 1, are respectively disposed in the end point areas 104 on opposite sides of the capacitor area 102. Therefore, the first endpoint 114 and the second endpoint 118 are physically and electrically separated from each other. The first end point 114 and the second end point 118 both extend in a second direction D2, and the second direction D2 is perpendicular to the first direction D1. In other words, the first end point 114 and the second end point 118 are in the same direction as the base 100. The horizontal directions are parallel to each other. The first end point 114 is perpendicular to the first finger electrode 112, and the first finger electrode 112 is physically and electrically connected to the first end point 114. Similarly, the second end point 118 is perpendicular to the second finger electrode 116, and the second finger electrode 116 is physically and electrically connected to the second end point 118.

Please refer to Figure 2. The semiconductor capacitor 10 provided in the preferred embodiment further includes a second layer 120 disposed on the first layer 110. Basically, the second layer 120 comprises an insulating material to provide electrical isolation. In addition, as shown in FIG. 2, the second layer 120 includes a capacitor region 102, an end region 104, and a peripheral region 106 as defined by regions on the substrate 100. The second layer 120 includes a plurality of third finger electrodes 122 and a plurality of fourth finger electrodes 126 , and the third finger electrodes 122 and the fourth finger electrodes 126 are disposed in the capacitor region 102 . It should be understood by those skilled in the art that the number of the third finger electrodes 122 and the fourth finger electrodes 126 in the preferred embodiment is merely an example, so the number of the third finger electrodes 122 and the fourth finger electrodes 126 Can be adjusted according to different product needs. As shown in FIG. 2, the third finger electrode 122 and the fourth finger electrode 126 are in the second direction. The D2 extension is such that the third finger electrode 122 and the fourth finger electrode 126 are parallel to each other in a direction horizontal to the substrate 100. In addition, the third finger electrodes 122 and the fourth finger electrodes 126 are perpendicular to the first finger electrodes 112 and the second finger electrodes 116 in a direction horizontal to the substrate 100 . The third finger electrodes 122 and the fourth finger electrodes 126 are alternately arranged, so that they are arranged to be mutually aligned. More importantly, the third finger electrode 122 and the fourth finger electrode 126 are physically and electrically separated from each other in the capacitor region 102.

Please continue to see Figure 2. The second layer 120 further includes a third endpoint 124 and a fourth endpoint 128. It should be noted that the third end point 124 and the fourth end point 128 are disposed in the end point area 104, and as shown in FIG. 2, are respectively disposed in the end regions 104 of the opposite sides of the capacitor area 102. Therefore, the third endpoint 124 and the fourth endpoint 128 are physically and electrically separated from each other. The third end point 124 and the fourth end point 128 both extend in the first direction D1, in other words the third end point 124 and the fourth end point 128 are parallel to each other in a direction horizontal to the substrate 100. The third end point 124 is perpendicular to the third finger electrode 122, and the third finger electrode 122 is physically and electrically connected to the third end point 124. Similarly, the fourth end point 128 is perpendicular to the fourth finger electrode 126, and the fourth finger electrode 126 is physically and electrically connected to the fourth end point 128.

Please refer to Figure 3. The semiconductor capacitor 10 provided in the preferred embodiment further includes a third layer 130 disposed on the second layer 120. Basically, the third layer 130 also includes an insulating material to provide electrical isolation. In addition, as shown in FIG. 3, the third layer 130 includes a capacitor region 102, an end region 104, and a peripheral region 106 as defined by regions on the substrate 100. The third layer 130 includes a plurality of fifth finger electrodes 132 and a plurality of sixth finger electrodes 136 , and the fifth finger electrodes 132 and the sixth finger electrodes 136 are both disposed in the capacitor region 102 . It should be understood by those skilled in the art that the number of the fifth finger electrodes 132 and the sixth finger electrodes 136 in the preferred embodiment is also merely an example, so the fifth finger shape The number of electrodes 132 and sixth finger electrodes 136 can be adjusted according to different product requirements. As shown in FIG. 3, the fifth finger electrode 132 and the sixth finger electrode 136 extend in the first direction D1, and the fifth finger electrode 132 and the sixth finger electrode 136 are horizontal to the substrate 100. Parallel to each other. The fifth finger electrode 132 and the sixth finger electrode 136 are alternately arranged, so that they are arranged to be aligned with each other. More importantly, the fifth finger electrode 132 and the sixth finger electrode 136 are physically and electrically separated from each other in the capacitor region 102.

Please continue to see Figure 3. The third layer 130 further includes a fifth endpoint 134 and a sixth endpoint 138. It should be noted that the fifth end point 134 and the sixth end point 138 are disposed in the end point area 104, and as shown in FIG. 3, are respectively disposed in the end point areas 104 on opposite sides of the capacitor area 102. The first and third figures can be compared at the same time. As can be seen from FIGS. 1 and 3, the fifth end point 134 and the first end point 114 are disposed on the same side, and the sixth end point 138 and the second end point 118 are provided. Set on the same side. In other words, the first layer 110 and the third layer 130 provided by the preferred embodiment have the same layout pattern, but are not limited thereto. Therefore, the fifth endpoint 134 and the sixth endpoint 138 are physically and electrically separated from each other. Both the fifth end point 134 and the sixth end point 138 extend in the second direction D2, in other words the fifth end point 134 and the sixth end point 138 are parallel to each other in a direction horizontal to the substrate 100. The fifth end point 134 is perpendicular to the fifth finger electrode 132, and the fifth finger electrode 132 is physically and electrically connected to the fifth end point 134. Similarly, the sixth end point 138 is perpendicular to the sixth finger electrode 136, and the sixth finger electrode 136 is physically and electrically connected to the sixth end point 138.

Please refer to Figures 1 to 3 again. According to the semiconductor capacitor 10 provided in the preferred embodiment, the first finger electrode 112, the second finger electrode 116, the fifth finger electrode 132 and the sixth finger electrode 136 are parallel to each other in a horizontal direction with the substrate 100. And the third finger electrode 122 and the fourth finger electrode 126 are perpendicular to the first finger electrode 112, second finger electrode 116, fifth finger electrode 132 and sixth finger electrode 136.

It should be noted that, according to the first preferred embodiment, the semiconductor capacitor 10 further includes at least one first conductive connection structure 150 disposed in the end region 104 for electrically connecting the first end in the first layer 110. The point 114 and the fifth end point 134 in the third layer 130 are electrically connected to the first finger electrode 112 and the fifth finger electrode 132 in the end point region 104. Similarly, the semiconductor capacitor 10 further includes at least one second conductive connection structure 152 disposed in the end region 104 for electrically connecting the second end point 118 in the first layer 110 and the sixth end in the third layer 130. The terminal 138 is electrically connected to the second finger electrode 136 and the sixth finger electrode 136 in the end point region 104. However, the first endpoint 114 and the fifth endpoint 134 in the endpoint region 104 are physically separated from the third endpoint 124 in the second layer 120; similarly, the second endpoint 118 and the endpoint in the endpoint region 104 The six endpoints 138 are also physically separated from the fourth endpoints 128 in the second layer 120. In addition, the semiconductor capacitor 10 further includes a third conductive connection structure 154 disposed in the end region 104 and electrically connected to the third terminal 124 for providing an electrical connection between the external power source and the semiconductor capacitor 10. The semiconductor capacitor 10 further includes a fourth conductive connection 156 disposed in the end region 104 and electrically connected to the fourth terminal 128 for providing an electrical connection between the external power source and the semiconductor capacitor 10.

It is to be understood by those skilled in the art that the number of the first conductive connection structure 150, the second conductive connection structure 152, the third conductive connection structure 154 and the fourth conductive connection structure 156 in the preferred embodiment is merely an example, The number of the conductive connecting structures 150/152/154/156 can be adjusted according to different product requirements. For example, the first conductive connecting structure 150 can be a plurality of embodiments distributed along the first end point 114 and the fifth end point 134. The second conductive connection structure 152 may be a plurality of embodiments distributed along the second end point 118 and the sixth end point 138, and the third conductive connection structure 154 may be multiple The embodiment of the fourth conductive connection structure 156 may be a plurality of embodiments distributed along the fourth end point 128.

More importantly, the first finger electrode 112 and the fifth finger electrode 132 are electrically connected to a first electrode A disposed in the peripheral region 106 (shown in FIG. 5), and the third finger electrode 122 is also Electrically connected to the first electrode A. In other words, the first end point 114 and the fifth end point 134 are electrically connected to the first electrode A disposed in the peripheral region 106 by another wire, and the third end point 124 is also electrically connected by another wire. The first electrode A is disposed in the peripheral region 106. The second finger electrode 116 and the sixth finger electrode 136 are electrically connected to a second electrode B disposed in the peripheral region 106 (also shown in FIG. 5), and the fourth finger electrode 126 is also electrically connected. So far the second electrode B. In other words, the second end point 118 and the sixth end point 138 are electrically connected to the second electrode B disposed in the peripheral region 106 by another wire, and the fourth end point 128 is also electrically connected by another wire. The second electrode B is disposed in the peripheral region 106. Accordingly, the semiconductor capacitor 10 is composed of two conductive layers and an insulating material interposed therebetween.

In addition, in a variation of the preferred embodiment, the first finger electrode 112 to the sixth finger electrode 136 in the adjacent layer 110/120/130 are electrically isolated from each other in the capacitor region 102, and The different wires in the peripheral zone are electrically connected by additional wires, depending on the needs of the product.

The first finger electrode 112 and the second finger electrode 116 comprise a first material, and the third finger electrode 122, the fourth finger electrode 126, the fifth finger electrode 132 and the sixth finger electrode 136 comprise Second material. In the preferred embodiment, the first material and the second material are the same material. For example, when the first finger electrode 112 to the sixth finger electrode 136, the first end point 114 to the sixth end point 138, and the first conductive connection When the connection structure 150 to the fourth conductive connection structure 156 are both completed by an interconnect process, the first material and the second material may comprise the same metal material such as copper or tungsten, but are not limited thereto. Further in a variation of the preferred embodiment, the first material and the second material may be different materials. For example, when the first layer 110 includes other IC building elements, the first material may comprise polysilicon and the second material may comprise a metal material.

The semiconductor capacitor 10 according to the first preferred embodiment has a braided structure, which is woven by staggered metal wires in both the horizontal direction (i.e., in the same layer) and the vertical direction (i.e., in different layers). Made. Therefore, the woven structure forms an electric field line in both the horizontal direction and the vertical direction, and thus a higher capacitance value can be obtained.

Please refer to FIG. 1 to FIG. 5 . FIG. 1 to FIG. 5 are schematic diagrams showing a second preferred embodiment of the semiconductor capacitor provided by the present invention. It is to be noted that the same constituent elements of the first preferred embodiment and the second preferred embodiment are denoted by the same reference numerals, and the details of the same constituent elements can be referred to the first preferred embodiment described above. Do not repeat them. In the second preferred embodiment, the semiconductor capacitor 10 includes a first layer 110, a second layer 120, and a third layer 130, and the components of the first layer 110, the second layer 120, and the third layer 130 are The same as the first preferred embodiment. The second preferred embodiment is the same as the first preferred embodiment in that the semiconductor capacitor 10 provided in the preferred embodiment further includes a fourth layer 140.

Please refer to Figure 4. The fourth layer 140 is formed on the third layer 130 and also substantially includes an insulating material to provide electrical isolation. In addition, as shown in FIG. 4, the fourth layer 140 includes a capacitor region 102, an end region 104, and a peripheral region 106 as defined by regions on the substrate 100. The fourth layer 140 further includes a plurality of seventh finger electrodes 142 And a plurality of eighth finger electrodes 146, and the seventh finger electrodes 142 and the eighth finger electrodes 146 are disposed in the capacitor region 102. It should be understood by those skilled in the art that the number of the seventh finger electrodes 142 and the eighth finger electrodes 146 in the preferred embodiment is merely an example, so the number of the seventh finger electrodes 142 and the eighth finger electrodes 146 is exemplified. Can be adjusted according to different product needs. As shown in FIG. 4, the seventh finger electrode 142 and the eighth finger electrode 146 extend in the second direction D2, and the seventh finger electrode 142 and the eighth finger electrode 146 are horizontal to the substrate 100. Parallel to each other. The seventh finger electrode 142 and the eighth finger electrode 146 are alternately arranged, so that they are arranged to each other. More importantly, the seventh finger electrode 142 and the eighth finger electrode 146 are physically and electrically separated from each other in the capacitor region 102.

Please continue to see Figure 4. The fourth layer 140 further includes a seventh endpoint 144 and an eighth endpoint 148. It should be noted that the seventh end point 144 and the eighth end point 148 are disposed in the end point area 104, and as shown in FIG. 2, are respectively disposed in the end regions 104 of the opposite sides of the capacitor area 102. The second and fourth figures can be compared at the same time. As can be seen from the second and fourth figures, the seventh end point 144 and the third end point 124 are disposed on the same side, and the eighth end point 148 and the fourth end point 128 are provided. Set on the same side. Therefore, the seventh endpoint 144 and the eighth endpoint 148 are physically and electrically separated from each other. Both the seventh end point 144 and the eighth end point 148 extend in the first direction D1, in other words the seventh end point 144 and the eighth end point 148 are parallel to each other in a direction horizontal to the substrate 100. The seventh end point 144 is perpendicular to the seventh finger electrode 142, and the seventh finger electrode 142 is physically and electrically connected to the seventh end point 144. Similarly, the eighth end point 148 is perpendicular to the eighth finger electrode 146, and the eighth finger electrode 146 is physically and electrically connected to the eighth end point 148. It can be seen that the second layer 120 and the fourth layer 140 provided by the preferred embodiment have the same layout pattern, but are not limited thereto.

Please also refer to Figures 2 and 4. According to the preferred embodiment, the semiconductor capacitor 10 further includes at least one third conductive connection structure 154 disposed in the end region 104 for electrically connecting the third end point 124 and the fourth layer 140 in the second layer 120. The seventh end point 144 is electrically connected to the third finger electrode 122 and the seventh finger electrode 142 in the end point region 104. Similarly, the semiconductor capacitor 10 further includes at least one fourth conductive connection structure 156 disposed in the end point region 104 for electrically connecting the fourth end point 128 in the second layer 120 and the eighth end in the fourth layer 140. The end point 148 is such that the fourth finger electrode 126 and the eighth finger electrode 146 are electrically connected in the end point region 104. As described above, the number and arrangement of the above-mentioned conductive connecting structures 150/152/154/156 can be adjusted according to different product requirements, and thus are not limited thereto.

Please refer to Figure 5. It should be noted that in order to clearly show the spatial relationship between the finger electrodes, the end points and the conductive connection structure, the insulating material and the substrate 100 in FIG. 5 are omitted and not shown. According to the preferred embodiment, the first finger electrode 112, the third finger electrode 122, the fifth finger electrode 132 and the seventh finger electrode 142 are electrically connected to a first electrode disposed in the peripheral region 106. A; the second finger electrode 116, the fourth finger electrode 126, the sixth finger electrode 136 and the eighth finger electrode 146 are electrically connected to a second electrode B disposed in the peripheral region 106. In other words, the first end point 114, the third end point 124, the fifth end point 134, and the seventh end point 144 are electrically connected to the first electrode A disposed in the peripheral area 106 by another wire; The second end point 118, the fourth end point 128, the sixth end point 138, and the eighth end point 148 are electrically coupled to the second electrode B disposed within the peripheral region 106 by additional wires. Accordingly, a semiconductor capacitor 10 composed of two conductive layers and an insulating material interposed therebetween is obtained.

In addition, in a variation of the preferred embodiment, the first finger electrode 112 to the eighth finger electrode 146 in the adjacent layer 110/120/130/14 are in capacitance The regions 102 can be electrically isolated from one another and electrically connected to different electrodes in the perimeter region by additional wires, depending on product requirements.

The semiconductor capacitor 10 according to the second preferred embodiment has a braided structure, which is woven by staggered metal wires in both the horizontal direction (i.e., in the same layer) and the vertical direction (i.e., in different layers). Made. Therefore, the woven structure generates electric field lines in both the horizontal direction and the vertical direction, and thus a higher capacitance value can be obtained.

It should be noted that the semiconductor capacitor 10 provided in the preferred embodiment is a four-layer structure as illustrated in FIG. 5, but those skilled in the art should know that the semiconductor capacitor 10 can actually be used with the product. It is desirable to add a film layer in the direction of the vertical substrate 100. In brief, the semiconductor capacitor 10 provided by the present invention may actually include a plurality of odd-numbered layers 110/130 and a plurality of even-numbered layers 120/140, and odd-numbered layers 110/130 and even-numbered layers 120/140 are interleaved on the substrate 100. on. Each of the odd-numbered layers 110130 includes a plurality of first odd-numbered finger electrodes 112/132 and a plurality of second odd-numbered finger electrodes 116/136, and the first odd-numbered finger electrodes 112/132 and the second odd-numbered fingers The electrodes 116/136 are all disposed within the capacitor region 102. The first odd-numbered finger electrodes 112/132 and the second odd-numbered finger electrodes 116/136 are interdigitated with each other, and are physically or electrically separated from each other within the capacitor region 102. Each odd layer 110/130 further includes a first odd layer endpoint 114/134 and a second odd layer endpoint 118/138, and the first odd layer endpoint 114/134 and the second odd layer endpoint 118 The /138 system is set in the endpoint area 104. The first odd-numbered finger electrodes 112/132 are electrically connected to the first odd-numbered layer ends 114/134; the second odd-numbered finger electrodes 116/136 are electrically connected to the second odd-numbered layer ends 118/138. More importantly, the semiconductor capacitor 10 provided by the present invention further includes at least a first odd-numbered layer conductive connection structure 150 and at least a second odd-numbered layer conductive connection structure 152, and An odd number of conductive connection structures 150 and a second odd number of conductive connection structures 152 are disposed within the end region 104. As shown in FIG. 5, the first odd-numbered conductive connection structure 150 is electrically connected to each of the first odd-numbered layer terminals 114/134 in the odd-numbered layers 110/130; and the second odd-numbered conductive connection structure 152 is electrically connected to the odd-numbered Each second odd layer endpoint 118/138 within layer 110/130. Each of the even layers 120140 includes a plurality of first even-numbered finger electrodes 122/142 and a plurality of second even-numbered finger electrodes 126/146, and the first even-layer finger electrodes 122/142 and the second even-layer fingers Electrodes 126/146 are all disposed within capacitor region 102. The first even-numbered finger electrodes 122/142 and the second even-numbered finger electrodes 126/146 are interdigitated with each other, and are physically or electrically separated from each other within the capacitor region 102. Each even layer 120/140 further includes a first even layer endpoint 124/144 and a second even layer endpoint 128/148, and the first even layer endpoint 124/144 and the second even layer endpoint 128 /148 is set in the endpoint area 104. The first even layer finger electrodes 122/142 are electrically connected to the first even layer end points 124/144; and the second even layer finger electrodes 126/146 are electrically connected to the second even layer end points 128/148 . More importantly, the semiconductor capacitor 10 provided by the present invention further includes at least a first even-numbered conductive connection structure 154 and a second even-numbered conductive connection structure 156, and the first even-numbered conductive connection structure 154 and the second even-numbered layer Conductive connection structure 156 is disposed in end region 102. As shown in FIG. 5, the first even-layer conductive connection structure 154 is electrically connected to the first even-numbered layer ends 124/144 in the even-numbered layers 120/140; the second even-numbered conductive connection structure 156 is electrically connected to the even-numbered layers 120/ The second even layer endpoint 128/148 within 140.

Since the extending directions of the respective finger electrodes and the respective end points, and the number and arrangement of the conductive connecting structures and other details are the same as those of the foregoing embodiments, the details will not be described herein.

Please still refer to Figure 5. According to the semiconductor capacitor 10 provided by the present invention, The first odd layer end point 114/134 and the first even layer end point 124/144 are electrically connected to the first electrode A disposed in the peripheral region 106 by another wire; and the second odd layer end point 118/ The 138 and second even layer end points 128/148 are electrically coupled to the second electrode B disposed within the peripheral region 106 by additional wires. Accordingly, a semiconductor capacitor 10 composed of two conductive layers and an insulating material interposed therebetween is obtained.

The semiconductor capacitor 10 according to the present invention has a woven structure, which is woven by staggered metal wires in both the horizontal direction (i.e., in the same layer) and the vertical direction (i.e., in different layers). Therefore, the woven structure has electric field lines in both the horizontal direction and the vertical direction, and thus a higher capacitance value can be obtained. More importantly, each of the endpoints 114/118/134/138 within the odd layer 110/130 and the endpoints 124/128/144/148 within the even layer 120/140 are physically separated from each other without any conductive connection. The structure is set in it. In other words, the endpoints in adjacent layers are physically separated from each other, so there is no electrical interaction between the endpoints.

Briefly, in the semiconductor capacitor provided by the present invention, a conductive connection structure is no longer provided between the conductive materials in adjacent layers as a means of electrical connection. That is to say, in the capacitor region, the finger electrodes in the adjacent layers are physically separated from each other; and in the end region, the endpoints in the adjacent layer are physically separated from each other. Therefore, the semiconductor capacitor provided by the present invention can avoid electromagnetic interaction and inductive effects of conductive materials in adjacent layers.

10‧‧‧Semiconductor capacitance

112‧‧‧First finger electrode

114‧‧‧First endpoint

116‧‧‧second finger electrode

118‧‧‧second endpoint

122‧‧‧ third finger electrode

124‧‧‧ third endpoint

126‧‧‧ fourth finger electrode

128‧‧‧ fourth endpoint

132‧‧‧ fifth finger electrode

134‧‧‧ fifth endpoint

136‧‧‧ sixth finger electrode

138‧‧‧ sixth endpoint

142‧‧‧ seventh finger electrode

144‧‧‧ seventh endpoint

146‧‧‧ eighth finger electrode

148‧‧‧ eighth endpoint

150‧‧‧First conductive connection structure

154‧‧‧ Third conductive connection structure

156‧‧‧fourth conductive connection structure

A‧‧‧first electrode

B‧‧‧second electrode

D1‧‧‧ first direction

D2‧‧‧ second direction

Claims (15)

A semiconductor capacitor includes: a substrate defining a capacitor region, an end region and a peripheral region; a plurality of odd layers disposed on the substrate, and each of the odd layers respectively includes: a plurality of first odd layer fingers a first odd finger disposed in the capacitor region; a plurality of second odd-numbered finger electrodes disposed in the capacitor region, the first odd-numbered layer finger electrodes and the first The two odd-numbered finger electrodes are interdigitated in the capacitance region, and are physically and electrically separated from each other; a first odd terminal is disposed at the end a dot area, wherein the first odd-numbered finger electrodes are electrically connected to the first odd-numbered layer end point; and a second odd-numbered terminal (second odd terminal) is disposed in the end point area, and the a second odd-numbered finger electrode is electrically connected to the second odd-numbered layer end; a plurality of even-numbered layers are disposed on the substrate, and each of the even-numbered layers respectively includes: a plurality of first even-numbered layer finger electrodes (first Even finger), set in the capacitor area a plurality of second even-numbered finger electrodes disposed in the capacitor region, wherein the first even-numbered finger electrodes and the second even-numbered finger electrodes are interdigitated in the capacitor region And being physically and electrically separated from each other; a first even terminal is disposed in the end region, and the first even layer finger electrodes are electrically connected to the first An even number And a second even terminal is disposed in the end region, and the second even layer finger electrodes are electrically connected to the second even layer end; at least one a first odd-numbered connection structure is disposed in the end region, and the first odd-numbered conductive connection structure is electrically connected to the first odd-numbered layer end points in the odd-numbered layers; at least one a second odd-numbered connection structure is disposed in the end region, and the second odd-numbered conductive connection structure is electrically connected to the second odd-numbered layer end points in the odd-numbered layers; at least one a first even connecting structure disposed in the end region, the first even layer conductive connecting structure electrically connecting the first even layer end points in the even layers; and at least A second even-numbered connection structure is disposed in the end region, and the second even-layer conductive connection structure is electrically connected to the second even-numbered layer end points in the even-numbered layers. The semiconductor capacitor of claim 1, wherein the first odd-numbered finger electrodes and the second odd-numbered finger electrode systems extend in a first direction, the first even-numbered finger electrodes And the second even layer finger electrode lines extend in a second direction. The semiconductor capacitor of claim 2, wherein the first direction and the second direction are perpendicular to each other. Such as the semiconductor capacitor described in claim 2, wherein the first odd The plurality of end points and the second odd layer end points extend along the second direction, and the first even layer end points and the second even number end points extend in the first direction. The semiconductor capacitor of claim 1, wherein the first odd-numbered layer endpoints, the second odd-numbered layer endpoints, the first even-numbered layer endpoints, and the second even-numbered layer endpoints They are isolated from each other within the endpoint area. The semiconductor capacitor of claim 1, further comprising a first electrode and a second electrode disposed in the peripheral region. The semiconductor capacitor of claim 6, wherein the first odd-numbered layer end points and the first even-numbered layer end points are electrically connected to the first electrode, and the second odd-numbered layer ends The second even layer end points are electrically connected to the second electrode. A semiconductor capacitor comprising: a substrate defining a capacitor region, an end region and a peripheral region; a first layer disposed on the substrate, and the first layer comprising: a plurality of first finger electrodes And disposed in the capacitor region; and the plurality of second finger electrodes are disposed in the capacitor region, wherein the first finger electrodes and the second finger electrodes are in the capacitor region, and Physically and electrically separated from each other; a second layer disposed on the substrate, and the second layer includes: a plurality of third finger electrodes disposed in the capacitor region; and a plurality of fourth fingers An electrode is disposed in the capacitor region, and the third finger electrodes and the fourth finger electrodes are mutually orthogonal to each other in the capacitor region, and are physically and electrically separated from each other; a third layer is disposed on the substrate, and the third layer includes: a plurality of fifth finger electrodes disposed in the capacitor region, and a plurality of sixth finger electrodes disposed in the capacitor region The fifth finger electrodes and the sixth finger electrodes are mutually orthogonal to each other in the capacitance region, and are physically and electrically separated from each other, wherein the first finger electrodes and the fifth fingers are The electrodes are electrically connected to each other in the end region, the second finger electrodes and the sixth finger electrodes are electrically connected to each other in the end region, and the third finger electrodes and the The fourth finger electrode is electrically isolated from the first finger electrodes, the second finger electrodes, the fifth finger electrodes, and the sixth finger electrodes. The semiconductor capacitor of claim 8, wherein the first finger electrodes, the second finger electrodes, the fifth finger electrodes, and the sixth finger electrodes are parallel to each other. The semiconductor capacitor of claim 9, wherein the third finger electrodes and the fourth finger electrodes are perpendicular to the first finger electrodes, the second finger electrodes, and the like a fifth finger electrode and the sixth finger electrodes. The semiconductor capacitor of claim 8, wherein the first finger electrodes, the third finger electrodes and the fifth finger electrodes are electrically connected to a peripheral region. First electrode. The semiconductor capacitor of claim 11, wherein the second finger electrodes, the fourth finger electrodes and the sixth finger electrodes are electrically connected to a peripheral region. Second electrode. The semiconductor capacitor of claim 8, wherein the first finger electrodes and the second finger electrodes comprise a first material, and the third finger electrodes, the fourth fingers The electrodes, the fifth finger electrodes, and the sixth finger electrodes comprise a second material. The semiconductor capacitor of claim 13, wherein the first material is the same as the second material. The semiconductor capacitor of claim 13, wherein the first material is different from the second material.