CN103545287B - Semiconductor structure - Google Patents
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- CN103545287B CN103545287B CN201210238365.9A CN201210238365A CN103545287B CN 103545287 B CN103545287 B CN 103545287B CN 201210238365 A CN201210238365 A CN 201210238365A CN 103545287 B CN103545287 B CN 103545287B
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Abstract
The present invention discloses a kind of semiconductor structure, and it includes one first electric capacity and one second electric capacity.First electric capacity includes multiple first modules, and respectively the first module includes multiple first finger electrodes.Second electric capacity includes multiple second units, and respectively the second unit includes multiple second finger electrodes.The first module such as this is staggered to form an array with the grade second unit.The semiconductor structure also includes multiple first connecting lines and the second connecting line parallel to each other, and the connecting line of grade first electrically connects the finger electrode of grade first, and the finger electrode of grade first and its adjacent the first connecting line of grade shape are in line；The connecting line of grade second electrically connects the finger electrode of grade second, and the finger electrode of grade second and its adjacent the second connecting line of grade shape are in line.
Description
Technical field
The present invention relates to a kind of semiconductor structure, electric capacity mismatches (mismatch) half can be improved more particularly, to one kind
Capacitance of conductor structure.
Background technology
In modern integrated circuit, capacitor is one of main circuit element.For example, industry is used for logic mould
The capacitor for intending element includes metal oxide layer-metal (metal-oxide-metal, MOM) capacitor and metal-insulator
Layer-metal (metal-insulator-metal, MIM) capacitor etc..The capacitance of capacitor is to manufacture craft and structure design
Quite sensitive, so the electric capacity of each capacitor is often because of the unmatched problem of electric capacity, influence finally data signal it is accurate
Property.
Therefore, industry stills need a kind of capacitor arrangement being effectively improved the problems such as electric capacity is mismatched.
The content of the invention
To solve the above problems, the present invention provides a kind of semiconductor structure, and the semiconductor structure includes one first electric capacity,
One first film layer is arranged at, first electric capacity includes multiple first modules, respectively the first module also includes multiple first finger-like
Electrode.The semiconductor structure also includes one second electric capacity, is arranged at first film layer, and second electric capacity includes multiple second
Unit, the grade second unit with this etc. first module be staggered and form an array, and respectively the second unit also comprising multiple
Second finger electrode.The semiconductor structure also includes multiple the first connecting lines for being arranged at first film layer and is connected with second
Line, the connecting line of grade first is parallel to each other with the connecting line of grade second.The connecting line of grade first electrically connects the finger-like of grade first electricity
Pole, and the finger electrode of grade first and its adjacent the first connecting line of grade shape are in line；And the connecting line of grade second is electrically connected
The finger electrode of grade second is connect, and the finger electrode of grade second and its adjacent the second connecting line of grade shape are in line.
The present invention also provides a kind of semiconductor structure, and the semiconductor structure includes multiple and is arranged at one first film layer and
First finger electrode of the second film layer, multiple are arranged at first film layer and the second finger electrode, the Duo Geshe of second film layer
Be placed in the common finger electrode of first film layer and second film layer, multiple the first connecting lines being arranged in first film layer,
And multiple is arranged at the second connecting line in second film layer.The common finger electrode of grade interlocks with the finger electrode of grade first
Fork closes arrangement with forming multiple first modules in first film layer and second film layer, and the common finger electrode of grade with this etc.
Second finger electrode interlocks fork conjunction arrangement with the multiple second units of formation in first film layer and second film layer.The grade first
Connecting line is used to electrically connect two the first finger electrodes most close in the first module such as this；And the connecting line of grade second is being electrically connected
Two the second finger electrodes most close in the grade second unit are connect, and the connecting line of grade first is with the connecting line of grade second each other
It is parallel.
According to semiconductor structure provided by the present invention, the connecting line for being used to connect finger electrode is all parallel setting each other
Put, therefore the reliability of capacitor is more lifted in the unmatched premise of electric capacity is not influenceed.
Brief description of the drawings
Fig. 1 to Fig. 3 is the schematic diagram of the first preferred embodiment of semiconductor structure provided by the present invention；
Fig. 4 is the schematic diagram of one second preferred embodiment of semiconductor structure provided by the present invention；
Fig. 5 to Fig. 7 is the schematic diagram of one the 3rd preferred embodiment of semiconductor element provided by the present invention；
Fig. 8 is a schematic diagram of the 4th preferred embodiment of semiconductor element provided by the present invention；
Fig. 9 is the schematic diagram of the 5th preferred embodiment of semiconductor structure provided by the present invention；
Figure 10 is the schematic diagram of one the 6th preferred embodiment of semiconductor element provided by the present invention；
Figure 11 is the schematic diagram of one the 7th preferred embodiment of semiconductor element provided by the present invention；
Figure 12 and Figure 13 is the schematic diagram of one the 8th preferred embodiment of semiconductor element provided by the present invention.
Main element symbol description
10th, 14 first film layer
20th, 24 second film layer
12 film layers
30th, 32 protection ring
34 connectors
100th, 300,700 first module
110th, 310,710 first finger electrode
112nd, 312,712 first electrode
120 the 3rd finger electrodes
122 the 3rd electrodes
130th, 330,730 first connecting line
132 the 3rd connecting lines
200th, 400,800 second unit
210th, 410,810 second finger electrode
212nd, 412,812 second electrode
220 the 4th finger electrodes
222 the 4th electrodes
230th, 430,830 second connecting line
232 the 4th connecting lines
500th, 900 common finger electrode
714 first interlayer connectors
814 second interlayer connectors
914 the 3rd interlayer connectors
d1、d2Spacing
Specific embodiment
Fig. 1 to Fig. 3 is referred to, Fig. 1 to Fig. 3 is showing for the first preferred embodiment of semiconductor structure provided by the present invention
It is intended to.As shown in figure 1, the first preferred embodiment provides one first electric capacity C1With one second electric capacity C2, the first electric capacity C1Comprising multiple
First module (unit) 100, and the second electric capacity C2Comprising multiple second units 200.First module 100 in this preferred embodiment
Quantity with second unit 200 is identical, that is to say, that first module 100 is 1 than ratio with the quantity of second unit 200.Such as Fig. 1
Shown, each first module 100 is respectively comprising multiple first finger electrodes 110 and multiple 3rd finger electrodes 120, and the first finger-like
Staggeredly fork closes arrangement and constitutes the first module 100 finger electrode 120 of electrode 110 and the 3rd.Similarly, 200 points of each second unit
Not Bao Han multiple second finger electrodes 210 and multiple 4th finger electrodes 220, and the second finger electrode 210 is electric with the 4th finger-like
Staggeredly pitch and close arrangement and constitute the second unit 200 in pole 220.Other first finger electrode 110 passes through a first electrode 112 each other
Electrically connect and be in a comb shape, similarly the 3rd finger electrode 120 is electrically connected to each other by one the 3rd electrode 122 and forms a comb
Shape, the second finger electrode 210 are electrically connected to each other by a second electrode 212 and form a comb shape, the 4th finger electrode 220 and pass through
One the 4th electrode 222 is electrically connected to each other and forms a comb shape.First module 100 is arranged at the first film layer 10 with second unit 200
In the second film layer 20, in other words, the first finger electrode 110 and the 3rd finger electrode 120 are arranged at the first film layer 10 and
In two film layers 20；Similarly the second finger electrode 210 and the 4th finger electrode 220 are also disposed on the first film layer 10 and the second film layer 20
In, and the first film layer 10 and the second film layer 20 for example can be the first film layers (M1) and second for being located at back segment metal interconnecting layer
Film layer (M2), but not limited to this.
Please continue to refer to Fig. 1.First module 100 in the first film layer 10 with the second film layer 20 has with second unit 200
There is identical arrangement position.It is worth noting that, first module 100 and second unit in the first film layer 10 and the second film layer 20
200 are all staggered and form an array.As shown in figure 1, the array that first module 100 is constituted with second unit 200 has
Multirow (column) and multiple row (row), and be arranged in the central point of the first module 100 of same row and second unit 200
Heart point forms a broken line as shown in Figure 1.Moreover, the central point and second unit of the first module 100 of same a line are arranged at
200 central point also forms a broken line as shown in Figure 1.First finger electrode 110 of the first module 100 in other adjacent column with
3rd finger electrode 120 puts in order conversely.For example, in the first module 100 of odd number row, the first finger electrode 110
It is that the 3rd finger electrode 120 is first with putting in order for the 3rd finger electrode 120, and the first finger electrode 110 is rear；But
In the first module 100 of even column, putting in order for the first finger electrode 110 and the 3rd finger electrode 120, is the first finger-like
Electrode 110 is first, and the 3rd finger electrode 120 is rear.Similarly the second finger electrode 210 of the second unit 200 in adjacent column
Put in order with the 4th finger electrode 220 also opposite.For example, in the second unit 200 of odd number row, the second finger electrode
210 and the 4th putting in order for finger electrode 220 be the second finger electrode 210 for first, and the 4th finger electrode 220 is rear；So
And in the second unit 200 of even column, putting in order for the second finger electrode 210 and the 4th finger electrode 220, is the 4th
Finger electrode 220 is first, and the second finger electrode 210 is rear.
Refer to Fig. 2.The semiconductor structure that this preferred embodiment is provided is set also comprising multiple first connecting lines 130
In the first film layer 10, the first connecting line 130 electrically connects the first finger electrode 110, that is to say, that the first finger in the first film layer 10
Shape electrode 110 is all electrically connected by first electrode 112 with the first connecting line 130.First finger electrode 110 and its phase
The first adjacent connecting line 130 is parallel, and shape more as shown in Figure 2 is in line.It is worth noting that, the first connecting line 130 is by connecting
Connect the first finger electrode 110 and electrically connect the first module 100 of adjacent column, and adjacent column first module 100 such as alternate leaf
As interaction be arranged in the both sides of the first connecting line 130.In addition the semiconductor structure that this preferred embodiment is provided is also comprising multiple the
Two connecting lines 230, are arranged at the first film layer 10, and the second connecting line 230 electrically connects the second finger electrode 210, that is to say, that first
The second finger electrode 210 in film layer 10 is all electrically connected by second electrode 212 with the second connecting line 230.Second
Finger electrode 210 and its second adjacent connecting line 230 are parallel, and shape more as shown in Figure 2 is in line.Second connecting line 230 leads to
Cross the second finger electrode 210 of connection and electrically connect the second unit 200 of adjacent column, and the second unit 200 of adjacent column is such as mutual
Interaction as leave is arranged in the both sides of the second connecting line 230.Importantly, the first connecting line 130 and the second connecting line 230 are as schemed
It is parallel to each other shown in 2.
Refer to Fig. 3.The semiconductor structure that other this preferred embodiment is provided also includes multiple 3rd connecting lines 132,
The second film layer 20 is arranged at, the 3rd connecting line 132 is vertical with the 3rd finger electrode 120, and phase is electrically connected by the 3rd electrode 122
3rd finger electrode 120 of adjacent rows, and the interaction such as alternate leaf of first module 100 of adjacent lines is arranged in the 3rd connecting line 132
Both sides.The 3rd finger electrode 120 in second film layer 20 is all connected electrically in by the 3rd electrode 122 with the 3rd connecting line 132
Together.In addition the semiconductor structure that this preferred embodiment is provided also comprising multiple 4th connecting lines 232, is arranged at the second film layer
20, the 4th connecting line 232 is also vertical with the 4th finger electrode 220, and the 4th finger of adjacent lines is electrically connected by the 4th electrode 222
Shape electrode 220, and the interaction such as alternate leaf of second unit 200 of adjacent lines is arranged in the both sides of the 4th connecting line 232.Second film layer
The 4th finger electrode 220 in 20 is all electrically connected by the 4th electrode 222 with the 4th connecting line 232.Such as Fig. 3 institutes
Show, the 3rd connecting line 132 is parallel to each other with the 4th connecting line 232.
According to the semiconductor structure that this first preferred embodiment is provided, it is used to electrically connect the connecting line of same capacitance unit
All parallel or perpendicular to finger electrode, and it is different from the prior art, connecting line and finger electrode be not parallel or out of plumb, even
With about 45 degree of arrangement modes of (°) angle.Therefore, in the prior art, because connecting line and finger electrode are not parallel or out of plumb
Arrangement mode and cause the semiconductor structure that the missing on capacitance arrangement's pattern can be provided by this preferred embodiment to improve.
In addition, the semiconductor structure that the first preferred embodiment is provided has four connection end points (terminal)（Figure is not
Show）, such as positioned at the positive end points C of the first electric capacity of the first film layer 101+ and the positive end points C of the second electric capacity2+, and positioned at the second film layer 20
First electrode negative terminal C1- and the second electric capacity negative terminal C2-.As it was previously stated, the first finger electrode 110 is all connected electrically in one
Rise, and be electrically connected to the positive end points C of the first electric capacity1+.Similarly the second finger electrode 210 is all electrically connected, and is electrically connected to
The positive end points C of second electric capacity2+；3rd finger electrode 120 is all electrically connected, and is electrically connected to first electrode negative terminal C1-；
4th finger electrode 220 is all electrically connected, and is electrically connected to the second electric capacity negative terminal C2-。
Fig. 4 is referred to, Fig. 4 is the schematic diagram of one second preferred embodiment of semiconductor structure provided by the present invention.
It is worth noting that, with the first preferred embodiment identical element with identical symbol description in the second preferred embodiment, and the
Two preferred embodiments are repeated no more with the first preferred embodiment something in common.In addition, Fig. 4 is depicted is arranged at the first film layer simultaneously
10 and second film layer 20 the first electric capacity C1With the second electric capacity C2.In the first preferred embodiment, first module 100 and second connects
The spacing d of the connecting line 232 of wiring 230 and the 4th1Less than or equal to 0.6 micron (micrometer, μm)；And second unit 200 with
The spacing d of the first connecting line 130 and the 3rd connecting line 1322Again smaller than equal to 0.6 μm.As shown in figure 4, the second preferred embodiment
The semiconductor structure difference for being provided is：Between the connecting line 230 of first module 100 and second and the 4th connecting line 232
Away from d1Between 0.6 μm to 0.8 micron μm；The similarly spacing d of the connecting line 130 of second unit 200 and first and the 3rd connecting line 1322
Also between 0.6 μm to 0.8 μm.In other words, each capacitor cell 100/200 to different capacitor cell 200/100 connecting line
Spacing can be exaggerated.
According to the semiconductor structure that this second preferred embodiment is provided, by increasing capacitor cell 100/200 to different
The spacing d of the connecting line of capacitor cell 200/1001、d2, reduce the coupled capacitor between different capacitor cells 100/200
(coupling capacitance), and for reducing capacitive cross-talk (capacitive crosstalk).
Fig. 5 to Fig. 7 is referred to, Fig. 5 to Fig. 7 is one the 3rd preferred embodiment of semiconductor element provided by the present invention
Schematic diagram.It is worth noting that, with foregoing preferred embodiment identical element with identical symbol in the 3rd preferred embodiment
Illustrate, and the 3rd preferred embodiment is repeated no more with foregoing preferred embodiment something in common.It is further noted that the 3rd is preferable
Each capacitor cell 100/200 to the spacing of the connecting line of different capacitor cell 200/100 can preferably be implemented such as second in embodiment
Example is described, is amplified to 0.6 μm to 0.8 μm.3rd preferred embodiment is with the second preferred embodiment difference：First
In film layer 10, between this preferred embodiment first module 100 also adjacent in each column as shown in Figure 5 and second unit 200
Multiple protection rings (guarding ring) 30 are set；In addition in the second film layer 20, also optionally also exist as shown in Figure 6
Multiple protection rings 32 are set in per a line between adjacent first module 100 and second unit 200.And as shown in figs. 5 and 6,
The bearing of trend of protection ring 30 is identical with the bearing of trend of the first connecting line 130 and the second connecting line 230 in first film layer 10；And
The bearing of trend of protection ring 32 is identical with the bearing of trend of the 3rd connecting line 132 and the 4th connecting line 232 in second film layer 20.This
Protection ring 30/32 in outer different film layers 10/20 can be electrically connected by connector 34, and as shown in fig. 7, be grounded by connector 34
(grounding).Therefore different capacitor cells 100/200 are shielded by protection ring 30/32, and can more reduce coupled capacitor.
According to the semiconductor structure that this 3rd preferred embodiment is provided, by increasing capacitor cell 100/200 to different
The spacing d of the connecting line of capacitor cell 200/1001/d2, and by the setting of protection ring 30/32, more reduce different electric capacity
Coupled capacitor between unit 100/200, and for reducing capacitive cross-talk.
Fig. 8 is referred to, Fig. 8 is a schematic diagram of the 4th preferred embodiment of semiconductor structure provided by the present invention.
It is worth noting that, with foregoing preferred embodiment identical element with identical symbol description in the 4th preferred embodiment.Additionally,
Semiconductor structure shown in Fig. 8 is the schematic diagram obtained after overlapping the first film layer 10 and the second film layer 20.Such as Fig. 8 institutes
Show, this preferred embodiment also provides one first electric capacity C1With one second electric capacity C2, the first electric capacity C1Comprising multiple first modules 100,
And the second electric capacity C2Comprising multiple second units 200.
As shown in figure 8, each first module 100 is respectively comprising multiple first finger electrodes 110 and multiple 3rd finger electrodes
120, and the first finger electrode 110 and the 3rd finger electrode 120 staggeredly fork closes arrangement and constitutes the first module 100.Similarly, respectively
Second unit 200 is respectively comprising multiple second finger electrodes 210 and multiple 4th finger electrodes 220, and the second finger electrode 210
Staggeredly pitched with the 4th finger electrode 220 and close arrangement and constitute the second unit 200.Other first finger electrode 110 is by one the
One electrode 112 is electrically connected to each other and is in a comb shape, and similarly the 3rd finger electrode 120 is electrically connected each other by one the 3rd electrode 122
Connect and form a comb shape, the second finger electrode 210 and be electrically connected to each other by a second electrode 212 and form a comb shape, the 4th finger
Shape electrode 220 is electrically connected to each other by one the 4th electrode 222 and forms a comb shape.
Please continue to refer to Fig. 8.The semiconductor structure that this preferred embodiment is provided also comprising multiple first connecting lines 130,
It is arranged at the first film layer 10, the first connecting line 130 electrically connects the first finger electrode 110, and the first finger electrode 110 and its adjacent
The first connecting line 130 it is parallel, and as shown in Figure 8 shape in line.In addition the semiconductor structure that this preferred embodiment is provided
Multiple second connecting lines 230 are also included, the first film layer 10 is arranged at, the second connecting line 230 electrically connect the second finger electrode 210,
And second finger electrode 210 and its second adjacent connecting line 230 it is parallel, and also shape as shown in Figure 8 is in line.It is prior
It is that the first connecting line 130 is parallel to each other as shown in Figure 8 with the second connecting line 230.
Please referring still to Fig. 8.The semiconductor structure that other this preferred embodiment is provided is also comprising multiple 3rd connecting lines
132, the second film layer 20 is arranged at, the 3rd connecting line 132 electrically connects the 3rd finger electrode 120 by the 3rd electrode 122.This compared with
In good embodiment, the 3rd connecting line 132 is vertical with the 3rd finger electrode 120.In addition the semiconductor that this preferred embodiment is provided
Structure also comprising multiple 4th connecting lines 232, is arranged at the second film layer 20, and the 4th connecting line 232 is electrically connected by the 4th electrode 222
The 4th finger electrode 220 is connect, and the 4th connecting line 232 is also vertical with the 4th finger electrode 220.And as shown in figure 8, the 3rd connection
Line 132 is parallel to each other with the 4th connecting line 232.
It is worth noting that, in this preferred embodiment, first module 100 is different from the quantity of second unit 200, also
It is to say that first module 100 has a ratio with the quantity ratio of second unit 200, and the ratio is more than 1.As shown in figure 8, this is preferably
First module 100 and the quantity of second unit 200 in embodiment are 3 than ratio, but first module 100 and second unit 200
Quantity can also be 5 or 7, and not limited to this than ratio.
In addition, this preferred embodiment still can increase the connection of capacitor cell 100/200 to different capacitor cell 200/100
The spacing d of line1、d2（It is not shown）, and protection ring 30/32 setting, more reduce between different capacitor cells 100/200
Coupled capacitor, and for reducing capacitive cross-talk.
According to the semiconductor structure that this 4th preferred embodiment is provided, can be single by adjusting first module 100 and second
The quantity of unit 200, makes the first electric capacity C1With the second electric capacity C2With different capacitances.In other words, the present invention can be by difference
Winding Design obtain the resilient capacitance ratio of tool, and be relatively beneficial to the different capacitor requirements of integrated circuit.
Fig. 9 is referred to, Fig. 9 is the schematic diagram of the 5th preferred embodiment of semiconductor structure provided by the present invention.Such as Fig. 9
It is shown.5th preferred embodiment provides one first electric capacity C1With one second electric capacity C2, the first electric capacity C1Comprising multiple first modules
300, and the second electric capacity C2Comprising multiple second units 400.First module 300 and second unit 400 in this preferred embodiment
Quantity it is identical, that is to say, that the quantity of first module 300 and second unit 400 is 1 than ratio.As shown in figure 9, each first is single
Unit 300 includes multiple first finger electrodes 310 respectively, and each second unit 400 then includes multiple second finger electrodes 410.Separately
Outer first finger electrode 310 is electrically connected to each other by a first electrode 312 and is in a comb shape, similarly the second finger electrode 410
It is electrically connected to each other by a second electrode 412 and forms a comb shape.First module 300 is arranged at one first with second unit 400
In film layer 12, in other words, the first finger electrode 310 and the second finger electrode 410 are arranged in the first film layer 12.It is worth noting
, this preferred embodiment also comprising multiple common finger electrodes 500, is arranged in the first film layer 12, and common finger electrode
500 have a herringbone form.As shown in figure 9, the finger electrode 310 of common finger electrode 500 and first is staggeredly pitched and closes arrangement with shape
Into this etc. first module 300；Similarly also staggeredly fork closes arrangement to form this common finger electrode 500 with the second finger electrode 410
Deng second unit 400.Please continue to refer to Fig. 9.First module 300 and second unit 400 in first film layer 12 are all staggered
And form an array.As shown in figure 9, first module 300 has multirow and multiple row with the array that second unit 400 is constituted, and
The central point of first module 300 and the central point of second unit 400 for being arranged at same row form a broken line.
Please referring still to Fig. 9.The semiconductor structure that this preferred embodiment is provided also comprising multiple first connecting lines 330,
The first film layer 12 is arranged at, and the first connecting line 330 electrically connects the first finger electrode 310, that is to say, that the first finger electrode
310 are all electrically connected by first electrode 312 with the first connecting line 330.First finger electrode 310 and its adjacent
One connecting line 330 is parallel, and shape more as shown in Figure 9 is in line.It is worth noting that, the first connecting line 330 is by connection first
Finger electrode 310 and the first module 300 of same row is electrically connected.In addition the semiconductor structure that this preferred embodiment is provided is also
Comprising multiple second connecting lines 430, the first film layer 12 is arranged at, and the second connecting line 430 electrically connects the second finger electrode 410,
That is, the second finger electrode 410 is all electrically connected by second electrode 412 with the second connecting line 430.Second refers to
Shape electrode 410 and its second adjacent connecting line 430 are parallel, and shape more as shown in Figure 9 is in line.Second connecting line 430 passes through
Connect the second finger electrode 410 and electrically connect the second unit 400 of same row.Importantly, the first connecting line 330 and
Two connecting lines 430 are parallel to each other as shown in Figure 9.
According to the semiconductor structure that this preferred embodiment is provided, script can be needed by the setting of common finger electrode
Want the electrode of two-layer to simplify to implement to single film layer 12, therefore more can letter province manufacture craft.But it is familiar with the people of this technology
Scholar is, it should be understood that the semiconductor element that this preferred embodiment is provided can be respectively made in two-layer film layer according to product demand, and is passed through
Interlayer connector is set in the axis of first electrode 412 and second electrode 512 and the common finger electrode 500 of herring-bone form（Figure is not
Show）, it is used to electrically connect the first module 300 and second unit 400 of different film layers, for completing the first electric capacity C1With the second electric capacity
C2Making.
In addition, the semiconductor structure that the 5th preferred embodiment is provided has three connection end points（It is not shown）, such as position
In the positive end points C of the first electric capacity in film layer 121+, the positive end points C of the second electric capacity2+ and shared negative terminal C-.As it was previously stated, first
Finger electrode 310 is all electrically connected, and is electrically connected to the positive end points C of the first electric capacity1+.Similarly the second finger electrode 410 is complete
Portion is electrically connected, and is electrically connected to the positive end points C of the second electric capacity2+；Finger electrode 500 is shared all to be electrically connected, and
It is electrically connected to common pole negative terminal C-.
Figure 10 is referred in addition and one the 6th preferred embodiment that Figure 11, Figure 10 are semiconductor element provided by the present invention
Schematic diagram, Figure 11 then for semiconductor element provided by the present invention one the 7th preferred embodiment schematic diagram.Additionally, can be same
When refering to the 6th preferred embodiment and the 7th preferred embodiment, to become more apparent upon the 6th preferred embodiment and the 7th preferred embodiment
The difference of exposure.Need it is worth noting that, the 6th is identical with the 5th preferred embodiment with the 7th preferred embodiment in addition
Element with identical symbol description, and the 6th and the 7th preferred embodiment is no longer gone to live in the household of one's in-laws on getting married with the 5th preferred embodiment something in common
State.
6th preferred embodiment is with the 5th preferred embodiment difference：The first finger-like in 5th preferred embodiment
Electrode 310 is electrically connected with second electrode 412 by first electrode 312 and is in into comb shape respectively with the second finger electrode 410；But
The first finger electrode 310 and the second finger electrode 410 in 6th preferred embodiment are respectively by the electricity of first electrode 312 and second
Pole 412 electrically connects and is in into herring-bone form.And first electrode 312 is the axis of each first finger electrode 310 of electrical connection；Similarly second
Electrode 412 is the axis of each second finger electrode 410 of connection.And the first finger electrode 310 and the second finger electrode 410 it
Between, then it is provided with the common finger electrode 500 of multiple herring-bone forms.In this preferred embodiment, the first finger electrode 310 and second
The quantity of finger electrode 410 is identical, that is, the first electric capacity C1With the second electric capacity C2Capacitance ratio be 1.
Refer to Figure 11.The 7th preferred embodiment disclosed by Figure 11 is with the 6th preferred embodiment difference,
In seven preferred embodiments, the quantity of the first finger electrode 310 is different from the quantity of the second finger electrode 410.As shown in figure 11, exist
In with a line, the quantity ratio of the first finger electrode 310 and the second finger electrode 410 is 3：2；In other words, the first finger electrode
310 and the quantity of the second finger electrode 410 than ratio be more than 1.
According to the semiconductor structure that the 6th and the 7th preferred embodiment is provided, can setting by common finger electrode 500
Put, need the electrode of two-layer to simplify script and implement to single film layer 12, therefore can also letter province manufacture craft.In addition, may be used also
By adjusting the quantity of the first finger electrode 310 and the second finger electrode 410, make the first electric capacity C1With the second electric capacity C2With not
Same capacitance.In other words, the present invention can obtain the resilient capacitance ratio of tool by different Winding Designs, and more beneficial
In the different capacitor requirements of integrated circuit.
Refer to Figure 12 and Figure 13, Figure 12 preferably real with the 8th that Figure 13 is semiconductor structure provided by the present invention
Apply the schematic diagram of example.As shown in Figure 12 and Figure 13, the semiconductor structure that this preferred embodiment is provided includes multiple first finger-like
Electrode 710, multiple second finger electrodes 810 and multiple common finger electrode 900, be respectively arranged at one first film layer 14 with
One second film layer 24.Other first finger electrode 710 is electrically connected to each other by a first electrode 712 and is in a comb shape；Similarly
Second finger electrode 810 is electrically connected to each other by a second electrode 812 and forms a comb shape.As shown in Figure 12 and Figure 13, jointly
The finger electrode 710 of finger electrode 900 and first interlocks to pitch and closes arrangement, and in formation multiple in the first film layer 14 and the second film layer 24
First module 700.Similarly staggeredly fork closes arrangement to the finger electrode 810 of common finger electrode 900 and second, and in the first film layer 14 with
Multiple second units 800 are formed in second film layer 24.First module 700 and second in the first film layer 14 and the second film layer 24
Unit 800 has identical arrangement position.It is worth noting that, in the first film layer 14 and the second film layer 24 first module 700 with
Second unit 800 is all staggered and forms an array.For example, no matter the first film layer 14 or in this preferred embodiment
In two film layers 24, first module 700 is all adjacent with second unit 800, therefore first module 700 can be considered oblique angle spread configuration.Together
Reason second unit 800 is all adjacent with first module 700, therefore second unit 800 can be considered oblique angle spread configuration.
In addition, this preferred embodiment also includes multiple first interlayer connectors 714, multiple second interlayer connectors 814, Yi Jiduo
Individual 3rd interlayer connector 914（All it is only illustrated in Figure 13）.First interlayer connector 714 is used to electrically connect in the first film layer 14 and the second film
The first finger electrode 710 in layer 24, the second interlayer connector 814 is used to electrically connect in the first film layer 14 and in the second film layer 24
Second finger electrode 810, and the 3rd interlayer connector 914 be then used to electrically connect in the first film layer 14 with it is common in the second film layer 24
Finger electrode 900.It is to form one first so that the first module 700 in the first film layer 14 and in the second film layer 24 is electrically connected to each other
Electric capacity C1；And be electrically connected to each other and form one second electric capacity C with the second unit 800 in the second film layer 24 in the first film layer 142。
Please continue to refer to Figure 12 and Figure 13.The semiconductor structure that this preferred embodiment is provided also is connected comprising multiple first
Line 730, is arranged in the first film layer 14, is used to electrically connect two the first finger electrodes 710 most close in first module 700.
The semiconductor structure that this preferred embodiment is provided is arranged in the second film layer 24 also comprising multiple second connecting lines 830, is used to
Two most close the second finger electrodes 810 in electrical connection second unit 800.It is worth noting that, the first connecting line 730 is vertical
In each first finger electrode 710；And the second connecting line 830 is perpendicular to each second finger electrode 810.Importantly, being arranged at
The first connecting line 730 in first film layer 14 is parallel to each other with the second connecting line 830 being arranged in the second film layer 24.
According to the semiconductor structure that this preferred embodiment is provided, be used to connect the connecting line of same capacitance unit perpendicular to
Finger electrode, and being different from the prior art, connecting line is not parallel with finger electrode or out of plumb, even there is about 45 degree (°)
The arrangement mode of angle.Therefore, in the prior art, because connecting line and finger electrode are not parallel or out of plumb arrangement mode lead
Send a telegraph and hold the semiconductor structure improvement that the missing on layout patterns can be provided by this preferred embodiment.
According to semiconductor structure provided by the present invention, the connecting line for being used to connect finger electrode is all and be arranged in parallel, and
It is parallel with finger electrode or vertical, therefore the reliability of capacitor can be also lifted in the unmatched premise of electric capacity is not influenceed.
The foregoing is only presently preferred embodiments of the present invention, all impartial changes done according to the claims in the present invention with repair
Decorations, should all belong to covering scope of the invention.
Claims (20)
1. a kind of semiconductor structure, includes：
First electric capacity, is arranged at the first film layer, and first electric capacity includes multiple first modules, and respectively the first module is also comprising more
Individual first finger electrode；
Second electric capacity, is arranged at first film layer, and second electric capacity includes multiple second units, the plurality of second unit with should
Multiple first modules are staggered and form an array, and respectively the second unit also includes multiple second finger electrodes；
Multiple first connecting lines, are arranged at first film layer, and the plurality of first connecting line electrically connects the plurality of first finger electrode,
And the plurality of first finger electrode and its adjacent the plurality of first connecting line shape are in line；And
Multiple second connecting lines, are arranged at first film layer and, the plurality of second connecting line parallel with the plurality of first connecting line
The plurality of second finger electrode is electrically connected, and the plurality of second finger electrode and its adjacent the plurality of second connecting line form one
Straight line.
2. semiconductor structure as claimed in claim 1, the wherein array include multirow and multiple row.
3. semiconductor structure as claimed in claim 2, be provided with central point in the plurality of first module of same row with
The central point of the plurality of second unit forms a broken line.
4. semiconductor structure as claimed in claim 2, be provided with central point in the plurality of first module of same a line with
The central point of the plurality of second unit forms a broken line.
5. semiconductor structure as claimed in claim 1, wherein respectively the first module also includes multiple 3rd finger electrodes, is set
In first film layer, and the plurality of 3rd finger electrode and the plurality of first finger electrode interlock fork close arrangement with formed this first
Unit.
6. semiconductor structure as claimed in claim 5, wherein respectively the second unit also includes multiple 4th finger electrodes, is set
In first film layer, and the plurality of 4th finger electrode and the plurality of second finger electrode interlock fork close arrangement with formed this second
Unit.
7. semiconductor structure as claimed in claim 6, wherein the plurality of first finger electrode and the plurality of 3rd finger electrode
One second film layer is also formed into, and the plurality of second finger electrode is also formed into second film with the plurality of 4th finger electrode
Layer.
8. semiconductor structure as claimed in claim 7, also comprising multiple 3rd connecting lines and multiple 4th connecting lines, is arranged at
Second film layer, the plurality of 3rd connecting line electrically connects the plurality of 3rd finger electrode, and the plurality of 4th connecting line is electrically connected
The plurality of 4th finger electrode.
9. semiconductor structure as claimed in claim 8, wherein the plurality of 3rd connecting line is with the plurality of 4th connecting line each other
It is parallel.
10. the spacing of semiconductor structure as claimed in claim 1, the wherein first module and second connecting line, and should
The spacing of second unit and first connecting line is all between 0.6 micron to 0.8 micron.
11. semiconductor structures as claimed in claim 1, also comprising multiple protection rings, are arranged at the plurality of first module and are somebody's turn to do
Between multiple second units.
12. semiconductor structures as claimed in claim 1, wherein the plurality of first module also includes one with the plurality of second unit
Quantity ratio, and the quantity than ratio be more than or equal to 1.
13. semiconductor structures as claimed in claim 1, also comprising multiple common finger electrodes, are arranged in first film layer.
14. semiconductor structures as claimed in claim 13, wherein the plurality of common finger electrode and the plurality of first finger-like electricity
Pole interlocks fork conjunction arrangement to form the plurality of first module, and the plurality of common finger electrode is handed over the plurality of second finger electrode
Mistake fork closes arrangement to form the plurality of second unit.
15. semiconductor structures as claimed in claim 13, wherein the quantity of the plurality of first finger electrode and second finger-like
The quantity of electrode is identical.
16. semiconductor structures as claimed in claim 13, wherein the quantity of the plurality of first finger electrode and second finger-like
The quantity of electrode is different.
A kind of 17. semiconductor structures, include：
Multiple first finger electrodes, are arranged at one first film layer and one second film layer；
Multiple second finger electrodes, are arranged at first film layer and second film layer；
Multiple common finger electrodes, are arranged at first film layer and second film layer, the plurality of common finger electrode with it is the plurality of
The first finger electrode fork that interlocks closes arrangement with forming multiple first modules in first film layer and second film layer and the plurality of
Finger electrode interlocks fork conjunction arrangement with formation in first film layer and second film layer with the plurality of second finger electrode jointly
Multiple second units；
Multiple first connecting lines, are arranged in first film layer, are used to electrically connect most close in the plurality of first module two
First finger electrode；And
Multiple second connecting lines, are arranged in second film layer, are used to electrically connect most close in the plurality of second unit two
Second finger electrode, and the plurality of first connecting line is parallel to each other with the plurality of second connecting line.
18. semiconductor structures as claimed in claim 17, wherein the plurality of first module and the plurality of second unit staggered row
Arrange and form an array.
19. semiconductor structures as claimed in claim 17, are provided with the plurality of with second film layer in first film layer
First module is electrically connected to form one first electric capacity, is arranged at the plurality of second unit electricity of first film layer and second film layer
Connect to form one second electric capacity.
20. semiconductor structures as claimed in claim 17, also include：
Multiple first interlayer connectors, are used to electrically connect in first film layer and the plurality of first finger-like electricity in second film layer
Pole；
Multiple second interlayer connectors, are used to electrically connect in first film layer and the plurality of second finger-like electricity in second film layer
Pole；And
Multiple 3rd interlayer connectors, are used to electrically connect in first film layer and the plurality of common finger-like electricity in second film layer
Pole.
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| KR20160145108A (en) * | 2014-04-17 | 2016-12-19 | 쓰리엠 이노베이티브 프로퍼티즈 컴파니 | Capacitive touch sensor with z-shaped electrode pattern |
| EP3514828B1 (en) * | 2018-01-19 | 2021-08-25 | Socionext Inc. | Semiconductor integrated circuitry |
| CN114446957A (en) | 2020-11-05 | 2022-05-06 | 长鑫存储技术有限公司 | Semiconductor structure and method for manufacturing semiconductor structure |
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| CN101174620A (en) * | 2006-11-01 | 2008-05-07 | 台湾积体电路制造股份有限公司 | Semiconductor device and integrated circuit |
| CN101276812A (en) * | 2007-03-29 | 2008-10-01 | 松下电器产业株式会社 | Capacitor structure |
| CN101681721A (en) * | 2007-06-06 | 2010-03-24 | 高通股份有限公司 | Intertwined finger capacitors |
| CN101894795A (en) * | 2009-05-22 | 2010-11-24 | 新加坡格罗方德半导体制造私人有限公司 | Integrated circuit (IC) system and manufacture method thereof with hierarchical capacitor |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101174620A (en) * | 2006-11-01 | 2008-05-07 | 台湾积体电路制造股份有限公司 | Semiconductor device and integrated circuit |
| CN101276812A (en) * | 2007-03-29 | 2008-10-01 | 松下电器产业株式会社 | Capacitor structure |
| CN101681721A (en) * | 2007-06-06 | 2010-03-24 | 高通股份有限公司 | Intertwined finger capacitors |
| CN101894795A (en) * | 2009-05-22 | 2010-11-24 | 新加坡格罗方德半导体制造私人有限公司 | Integrated circuit (IC) system and manufacture method thereof with hierarchical capacitor |
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