CN101710471B - Display device - Google Patents
Display device Download PDFInfo
- Publication number
- CN101710471B CN101710471B CN2009102529343A CN200910252934A CN101710471B CN 101710471 B CN101710471 B CN 101710471B CN 2009102529343 A CN2009102529343 A CN 2009102529343A CN 200910252934 A CN200910252934 A CN 200910252934A CN 101710471 B CN101710471 B CN 101710471B
- Authority
- CN
- China
- Prior art keywords
- patchcord
- external gate
- live width
- gate
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Liquid Crystal (AREA)
Abstract
The invention discloses a display device, comprising a plurality of gate lines, a plurality of data lines, a plurality of first external gate switching lines and a plurality of second external gate switching lines; the first external gate switching lines are arranged in a frame area of a base plate generally and are electrically connected with the corresponding gate line respectively, the second external gate switching lines are generally arranged in the frame area of the base plate and are electrically connected with the corresponding gate line respectively, and each external gate switching line is partially overlapped with the corresponding second external gate switching line at least.
Description
Technical field
The present invention relates to a kind of display device, relate in particular to and a kind ofly have the display device of narrow frame and homogenising load effect through be provided with at least the external gate patchcord that part overlaps in rim area.
Background technology
Along with popularizing of multimedia application, the display device with high resolving power and big visual range has become Developing Trend in Technology.Lifting along with the resolution specification of display device; The lead number that is positioned at the rim area of display device also can increase thereupon; Therefore; The rim area of existing display device must keep certain space to hold numerous lead, so cause the area of the rim area of display device further to reduce.In addition, the lead that is positioned at rim area and the lead that is positioned at the viewing area can be owing to have different resistance capacitance load (RC loading), and the display quality of existing display device is had negative effect.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of display device with narrow frame and homogenising load effect.
A preferred embodiment of the present invention provides a kind of display device.Above-mentioned display device comprises a substrate, many gate lines, many data lines, many first external gate patchcords, and many second external gate patchcords.Substrate has a viewing area and a rim area.Gate line is arranged in the viewing area of substrate generally along a first direction.Data line is arranged in the viewing area of substrate generally along a second direction.The first external gate patchcord is arranged at the rim area of substrate substantially, and wherein corresponding with the one respectively gate line of each first external gate patchcord electrically connects.The second external gate patchcord is arranged at the rim area of substrate substantially, and wherein corresponding with the one respectively gate line of each second external gate patchcord electrically connects.In addition, each first an external gate patchcord and corresponding second external gate patchcord part overlapping at least.
Wherein, This first external gate patchcord is formed by one first conductive layer; And this second external gate patchcord is formed by one second conductive layer; Wherein this first external gate patchcord of part has one first live width, this first external gate patchcord of part has one second live width; And this first external gate patchcord with this first live width is arranged with this first external gate patchcord with this second live width in an alternating manner; Wherein this second external gate patchcord of part has this first live width, this second external gate patchcord of part has this second live width; And this second external gate patchcord with this first live width is arranged with this second external gate patchcord with this second live width in an alternating manner; The one second external gate patchcord part overlapping at least that wherein has one first external gate patchcord of this first live width and have this second live width, and one first external gate patchcord and the part overlapping at least of one second external gate patchcord with this first live width with this second live width.
Wherein, this first external gate patchcord and corresponding this second external gate patchcord with this second live width that has this first live width has a common center line.
Wherein, this first external gate patchcord that has this first live width has a spacing in the horizontal direction with this second external gate patchcord with this first live width.
Wherein, This first external gate patchcord is formed by one first conductive layer; And this second external gate patchcord is formed by one the 3rd conductive layer; Wherein this display device comprises a plurality of compensating electrodes in addition, and wherein this compensating electrode is formed by one second conductive layer, and respectively this compensating electrode between one first external gate patchcord and one second external gate patchcord.
Wherein, respectively this first external gate patchcord has one the 3rd live width with this second external gate patchcord respectively, and wherein respectively this compensating electrode has one the 4th live width.
Wherein, this compensating electrode has a common electric voltage signal.
Wherein, respectively this first external gate patchcord, corresponding respectively this second external gate patchcord and corresponding respectively this compensating electrode have a common center line.
Wherein, other comprises many internal gate patchcords, is arranged at along this second direction in this viewing area of this substrate, and wherein respectively this internal gate patchcord electrically connects with a gate line respectively.
Another preferred embodiment of the present invention provides a kind of display device.Above-mentioned display device comprises a substrate, many gate lines, many data lines, many first external gate patchcords, many second external gate patchcords, and a plurality of compensating electrode.Substrate has a viewing area and a rim area.Gate line is arranged in the viewing area of substrate generally along a first direction.Data line is arranged in the viewing area of substrate generally along a second direction.The first external gate patchcord is arranged at the rim area of substrate substantially, and wherein corresponding with the one respectively gate line of each first external gate patchcord electrically connects.The second external gate patchcord is arranged at the rim area of substrate substantially, and wherein corresponding with the one respectively gate line of each second external gate patchcord electrically connects.Each compensating electrode is substantially between one first external gate patchcord and one second external gate patchcord; Wherein the first external gate patchcord is formed by one first conductive layer; Compensating electrode is formed by one second conductive layer, and the second external gate patchcord is formed by one the 3rd conductive layer.
Therefore display device of the present invention is provided with mutual overlapping in rim area the first external gate patchcord and the second external gate patchcord, can reduce the size of rim area.In addition, can make display device can have the load effect of homogenising through the first external gate patchcord and the formed load compensation electric capacity of the second external gate patchcord.
Description of drawings
Fig. 1 has illustrated the synoptic diagram of the display device of the present invention's one preferred embodiment;
Fig. 2 is for looking synoptic diagram in the first external gate patchcord of the display device that Fig. 1 illustrated and the second external gate patchcord;
Fig. 3 is the first external gate patchcord of the display device that illustrated along the hatching line A-A ' of Fig. 2 and the diagrammatic cross-section of the second external gate patchcord;
Fig. 4 is for looking synoptic diagram in the first external gate patchcord of the display device of another preferred embodiment of the present invention and the second external gate patchcord;
Fig. 5 is the first external gate patchcord of the display device that illustrated along the hatching line B-B ' of Fig. 4 and the diagrammatic cross-section of the second external gate patchcord;
Fig. 6 is for looking synoptic diagram in the first external gate patchcord of the display device of the another preferred embodiment of the present invention and the second external gate patchcord;
Fig. 7 is the first external gate patchcord of the display device that illustrated along the hatching line C-C ' of Fig. 6 and the diagrammatic cross-section of the second external gate patchcord.
Wherein, Reference numeral:
10: display device 12: substrate
12D: viewing area 12B: rim area
14: gate line 16: data line
18: internal gate patchcord external gate patchcord in 20: the first
20A: the first section 20B: second section
22: the second external gate patchcord 22A: first section
22B: second section 24: chip for driving
30: display device A: first live width
B: the second live width D: the 3rd live width
E: the 4th live width C: spacing
F: interval S: distance
Embodiment
For making those skilled in the art can further understand the present invention, the hereinafter spy enumerates several preferred embodiments of the present invention, and cooperate appended graphic, specify constitution content of the present invention and the effect desiring to reach.In addition, embodiments of the invention are to be example with the display panels, but application of the present invention is not as limit.
Please refer to Fig. 1 to Fig. 3.Fig. 1 has illustrated the synoptic diagram of the display device of a preferred embodiment of the present invention; Fig. 2 looks synoptic diagram in the first external gate patchcord of the display device that Fig. 1 illustrated and the second external gate patchcord, and the first external gate patchcord of Fig. 3 display device that to be the hatching line A-A ' along Fig. 2 illustrated and the diagrammatic cross-section of the second external gate patchcord.As shown in Figure 1, the display device 10 of present embodiment comprises a substrate 12, many gate lines 14, many data lines 16, many internal gate patchcords 18, many first external gate patchcords 20, many second external gate patchcords 22 and at least one chip for driving 24.Substrate 12 has a viewing area (display region) 12D and a rim area (borderregion) 12B.Gate line 14 is arranged in the viewing area 12D of substrate 12 generally along a first direction (horizontal direction for example shown in Figure 1), and gate line 14 is parallel substantially.Data line 16 is arranged in the viewing area 12D of substrate 12 generally along a second direction (vertical direction for example shown in Figure 1), and is electrically connected to chip for driving 24, and data line 16 is parallel substantially.Internal gate patchcord 18 is arranged in the viewing area 12D of substrate 12 generally along second direction, and internal gate patchcord 18 is parallel substantially.Corresponding with the one respectively gate line 14 of each internal gate patchcord 18 electrically connects, and the gate line 14 of part can electrically connect via internal gate patchcord 18 and chip for driving 24 whereby.The first external gate patchcord 20 is arranged in the rim area 12B of substrate 12 substantially; And corresponding with the one respectively gate line 14 of each first external gate patchcord 20 electrically connects, and the gate line 14 of part can electrically connect via the first external gate patchcord 20 and chip for driving 24 whereby.The second external gate patchcord 22 is arranged in the rim area 12B of substrate 12 substantially; And corresponding with the one respectively gate line 14 of each second external gate patchcord 22 electrically connects, and the gate line 14 of part can electrically connect via the second external gate patchcord 22 and chip for driving 24 whereby.In addition, display device 10 comprises a glue frame (figure do not show) in addition, be arranged in the rim area 12B of substrate 12, and substrate 12 can stick together with another substrate (scheming not show) through the glue frame and engages.In the present embodiment; The gate line 14 of a part be through be arranged in the 12D of viewing area and with data line 16 alternately and the internal gate patchcord 18 that laterally arranges be forwarded to chip for driving 24, the gate line 14 of another part then is to be forwarded to chip for driving 24 through the first external gate patchcord 20 that is arranged at rim area 12B and the second external gate patchcord 22.
The first external gate patchcord 20 of present embodiment and the second external gate patchcord 22 have the design of overlapping; And for the first external gate patchcord 20 that highlights display device 10 and the electrical connection of the second external gate patchcord 22; The relative position relation of the first external gate patchcord 20 and the second external gate patchcord 22 is not illustrated in Fig. 1, but is illustrated in Fig. 2 and Fig. 3.Like Fig. 2 and shown in Figure 3; The first external gate patchcord 20 and the second external gate patchcord 22 are made up of different conductive layers; For example the first external gate patchcord 20 is made up of one first conductive layer; And the second external gate patchcord 22 is made up of one second conductive layer, but not as limit, the material of each conductive layer can be metal, conducting metal oxide or semiconductor or the like for example.In the present embodiment; The part first external gate patchcord 20 has one first live width A; And the part first external gate patchcord 20 has one second live width B, and the first external gate patchcord 20 with first live width A is arranged with the first external gate patchcord 20 with second live width A in an alternating manner; In addition; The part second external gate patchcord 22 has the first live width A; And the part second external gate patchcord 22 has the second live width B, and the second external gate patchcord 22 with first live width A is arranged with the second external gate patchcord 22 with second live width B in an alternating manner.In addition; Each first an external gate patchcord 20 and corresponding second an external gate patchcord 22 part at least overlap; Observe for ease and explain; At least one rete that has between the first external gate patchcord 20 of present embodiment and the second external gate patchcord 22 does not illustrate, and for example is the dielectric material of capacitance dielectric layer (figure does not show), but not in order to limitation the present invention.Therefore, each first external gate patchcord 20, the corresponding second external gate patchcord 22 and the capacitance dielectric layer that is arranged at therebetween can form a load compensation electric capacity, can make display device 10 have the resistance capacitance load effect of homogenising whereby.
In the present embodiment; The first external gate patchcord 20 and the corresponding second external gate patchcord 22 part overlapping at least with first live width A with second live width B; In addition; The first external gate patchcord 20 with first live width A and the corresponding second external gate patchcord 22 with second live width B have a common center line for example substantially; The arbitrary side that also promptly has the first external gate patchcord 20 of the first live width A has one apart from S with the adjacent side with second external gate patchcord 22 of the second live width B; Can increase tolerance whereby, and avoid the capacitance of load compensation electric capacity to change because of the contraposition deviation for processing procedure contraposition deviation.In addition, the first external gate patchcord 20 with first live width A has a spacing C in the horizontal direction with the second external gate patchcord 22 with first live width A, and its pitch C is a level interval.In the configuration relation of the first external gate patchcord 20 and the second external gate patchcord 22; The first live width A, the second live width B and spacing C are preferable with the relation that satisfies A＞B and C/ (A+C)＞1/4; For example the first live width A is that 5 microns, the second live width B are 3 microns; And spacing C is 3 microns, but not as limit.Relation at the first live width A, the second live width B and spacing C satisfies under the situation of above-mentioned relation, and the frame glue that can guarantee display device 10 has enough irradiation degree and can be hardened effectively when the irradiation hardening process.For example; At the first live width A is that 5 microns, the second live width B are 3 microns; And spacing C is under 3 microns the condition, and the shared overall width in single external gate patchcord unit (comprising the first external gate patchcord 20 and the second external gate patchcord 22 of overlapping) is 8 microns, and (the first width A (5 microns) adds spacing C (3 microns), and wherein photic zone is positioned at the position of spacing C; Therefore, the transmittance of rim area 12B is 37.5% (3/8).Under this transmittance, frame glue can have enough irradiation degree when the irradiation hardening process.
The different place of each embodiment for the purpose of simplifying the description and relatively, below each embodiment use identical symbol to mark same components with previous embodiment, and only be directed against different part and describe.Please refer to Fig. 4 and Fig. 5, and in the lump with reference to figure 1.Fig. 4 looks synoptic diagram in the first external gate patchcord of the display device of another preferred embodiment of the present invention and the second external gate patchcord, and the first external gate patchcord of Fig. 5 display device that to be the hatching line B-B ' along Fig. 4 illustrated and the diagrammatic cross-section of the second external gate patchcord.In the aforementioned embodiment, single the first external gate patchcord 20 only has single live width (the for example first live width A or the second live width B), and single the second external gate patchcord 22 also only has single live width (the for example first live width A or the second live width B).In the present embodiment; Single the first external gate patchcord 20 and single the second external gate patchcord 22 can have a plurality of live widths respectively; In other words; The live width system of single first external gate patchcord 20 and single the second external gate patchcord 22 is unfixing, and the size variation on the width is arranged.Like Fig. 4 and shown in Figure 5, single the first external gate patchcord 20 has one first section 20A and one second section 20B, and wherein the first section 20A has the first live width A, and the second section 20B has the second live width B, and the first live width A is not equal to the second live width B; In addition, each second external gate patchcord 22 has one first section 22A and one second section 22B, and wherein the first section 22A has the second live width B, and the second section 22B has the first live width A, and the first live width A is not equal to the second live width B.In the present embodiment; First section 20A of each first external gate patchcord 20 and the first section 22A of the corresponding second external gate patchcord 22 partly overlap, and the second section 20B of respectively first external gate patchcord 20 and the second section 22B of the corresponding second external gate patchcord 22 partly overlap.Yet in the present embodiment, the first live width A of the first section 20A of the first external gate patchcord 20 can be designed to equate or be not equal to the first live width A of the second section 22B of the second external gate patchcord 22 for example; The second live width B of the second section 20B of the first external gate patchcord 20 can be designed to equate or be not equal to the second live width B of the first section 22A of the second external gate patchcord 22 for example, and it is not in order to limitation the present invention.
Please refer to Fig. 6 and Fig. 7, and in the lump with reference to figure 1.Fig. 6 looks synoptic diagram in the first external gate patchcord of the display device of the another preferred embodiment of the present invention and the second external gate patchcord, and Fig. 7 is for being the first external gate patchcord of the display device that illustrated of the hatching line C-C ' along Fig. 6 and the diagrammatic cross-section of the second external gate patchcord.Like Fig. 6 and shown in Figure 7; In the present embodiment; The first external gate patchcord 20 is made up of one first conductive layer, and the second external gate patchcord 22 is made up of one the 3rd conductive layer, and the material of each conductive layer can be metal, conducting metal oxide or semiconductor or the like for example.In addition; Be respectively arranged with the compensating electrode 26 that constituted by second conductive layer between each first external gate patchcord 20 and the corresponding second external gate patchcord 22 in addition; Observe for ease and explain; Between first external gate patchcord 20 of present embodiment and the compensating electrode 26 and at least one rete that has respectively between the second external gate patchcord 22 and the compensating electrode 26 do not illustrate, for example be the dielectric material of capacitance dielectric layer (figure does not show), but not in order to limit to the present invention.Compensating electrode 26 is to electrically connect with the common signal wire of display device (figure does not show) for example; For example compensating electrode 26 together the messenger line by constitute with one deck conductive layer and directly together the messenger line electrically connect; Or compensating electrode 26 together the messenger line constitute by the different layers conductive layer, but electrically connect, therefore through alternate manner; Compensating electrode 26 has the common electric voltage signal, but not as limit.Each first external gate patchcord 20, the corresponding second external gate patchcord 22; And compensating electrode 26 threes between the first external gate patchcord 20 and the second external gate patchcord 22 overlap, and can produce load compensation electric capacity whereby and make display device have the resistance capacitance load effect of homogenising.In the present embodiment; The first external gate patchcord 20 has the 3rd live width D, the second external gate patchcord 22 also has the 3rd live width D; But not as limit; That is to say that the 3rd live width D of the first external gate patchcord 20 can equate with the 3rd live width D of the second external gate patchcord 22 or be unequal.Compensating electrode 26 has the 4th live width E, and two adjacent compensating electrodes 26 have a spacing F.In addition; The first external gate patchcord 20, the corresponding second external gate patchcord 22 and corresponding compensating electrode 26 have a common center line; Also the i.e. first external gate patchcord 20 or arbitrary side either side limit of the second external gate patchcord 22 and an adjacent side of compensating electrode 26 have one apart from S; Be a horizontal range wherein, can increase tolerance whereby, and avoid the capacitance of load compensation electric capacity to change because of the contraposition deviation for technology contraposition deviation apart from S.In the configuration relation of the first external gate patchcord 20, the second external gate patchcord 22 and compensating electrode 26; The 3rd live width D, the 4th live width E and spacing F are preferable with the relation that satisfies E＞D and F/ (E+F)＞1/4; For example the 3rd live width D is that 3 microns, the 4th live width E are 5 microns; And spacing F is 4 microns, but does not limit with this.Relation at the 3rd live width D, the 4th live width E and spacing F satisfies under the situation of above-mentioned relation, and the frame glue that can guarantee display device has enough irradiation degree and can be hardened effectively when the irradiation hardening process.For example; At the 4th live width E is 5 microns; And spacing F is that the shared overall width in single external gate patchcord unit is 9 microns, and (the 4th width E (5 microns) adds spacing F (4 microns), so the transmittance of rim area 12B can reach 44.4% (4/9) under 4 microns the condition; Therefore, frame glue can have enough irradiation degree when the irradiation hardening process.
In sum, therefore display device of the present invention is provided with mutual overlapping in rim area the first external gate patchcord and the second external gate patchcord, can reduce the size of rim area.In addition, can make display device can have the load effect of homogenising, and promote display quality through the first external gate patchcord and the formed load compensation electric capacity of the second external gate patchcord.Moreover the live width and the spacing of the first external gate patchcord of the present invention and the second external gate patchcord have certain proportion, and the frame glue that can guarantee rim area can obtain sufficient irradiation amount and can be hardened effectively in the irradiation hardening process.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (4)
1. a display device is characterized in that, comprising:
One substrate has a viewing area and a rim area;
Many gate lines are arranged in this viewing area of this substrate along a first direction;
Many data lines are arranged in this viewing area of this substrate along a second direction;
Many first external gate patchcords are arranged at this rim area of this substrate, and wherein respectively corresponding with the one respectively gate line of this first external gate patchcord electrically connects; And
Many second external gate patchcords are arranged at this rim area of this substrate, and wherein respectively corresponding with the one respectively gate line of this second external gate patchcord electrically connects;
Wherein respectively this first external gate patchcord and corresponding this second external gate patchcord part overlapping at least,
And; This first external gate patchcord is formed by one first conductive layer; And this second external gate patchcord is formed by one second conductive layer; Wherein this first external gate patchcord of part has one first live width, this first external gate patchcord of part has one second live width; And this first external gate patchcord with this first live width is arranged with this first external gate patchcord with this second live width in an alternating manner; Wherein this second external gate patchcord of part has this first live width, this second external gate patchcord of part has this second live width; And this second external gate patchcord with this first live width is arranged with this second external gate patchcord with this second live width in an alternating manner; The one second external gate patchcord part overlapping at least that wherein has one first external gate patchcord of this first live width and have this second live width, and one first external gate patchcord and the part overlapping at least of one second external gate patchcord with this first live width with this second live width, and; This first external gate patchcord with this first live width has a spacing in the horizontal direction with this second external gate patchcord with this first live width, and the first live width A, the second live width B and spacing C are to satisfy
A＞BAnd C/ (A+C)＞1/4.
2. display device according to claim 1 is characterized in that, this first external gate patchcord and corresponding this second external gate patchcord with this second live width with this first live width has a common center line.
3. display device according to claim 1 is characterized in that, other comprises many internal gate patchcords, is arranged at along this second direction in this viewing area of this substrate, and wherein respectively this internal gate patchcord electrically connects with a gate line respectively.
4. a display device is characterized in that, comprising:
One substrate has a viewing area and a rim area;
Many gate lines are arranged in this viewing area of this substrate along a first direction;
Many data lines are arranged in this viewing area of this substrate along a second direction;
Many first external gate patchcords are arranged at this rim area of this substrate, and wherein respectively corresponding with the one respectively gate line of this first external gate patchcord electrically connects;
Many second external gate patchcords are arranged at this rim area of this substrate, and wherein respectively corresponding with the one respectively gate line of this second external gate patchcord electrically connects; And
A plurality of compensating electrodes; Respectively this compensating electrode is between one first external gate patchcord and one second external gate patchcord; Wherein this first external gate patchcord is formed by one first conductive layer; This compensating electrode is formed by one second conductive layer, and this second external gate patchcord is formed by one the 3rd conductive layer
Wherein, The first external gate patchcord has the 3rd live width D, the second external gate patchcord also has the 3rd live width D; Compensating electrode has the 4th live width E, and two adjacent compensating electrodes have a spacing F, and the 3rd live width D, the 4th live width E and spacing F are to satisfy E＞D and F/ (E+F)＞1/4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009102529343A CN101710471B (en) | 2009-12-04 | 2009-12-04 | Display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009102529343A CN101710471B (en) | 2009-12-04 | 2009-12-04 | Display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101710471A CN101710471A (en) | 2010-05-19 |
| CN101710471B true CN101710471B (en) | 2012-02-15 |
Family
ID=42403254
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009102529343A Active CN101710471B (en) | 2009-12-04 | 2009-12-04 | Display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101710471B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111708233B (en) | 2019-08-20 | 2022-10-25 | 友达光电股份有限公司 | Display device |
| TWI753778B (en) * | 2020-03-17 | 2022-01-21 | 友達光電股份有限公司 | Display device |
| TWI729735B (en) * | 2020-03-17 | 2021-06-01 | 友達光電股份有限公司 | Display device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1743926A (en) * | 2004-09-01 | 2006-03-08 | 精工爱普生株式会社 | Electro-optical device and electronic apparatus |
| CN1912717A (en) * | 2005-08-08 | 2007-02-14 | 三菱电机株式会社 | Liquid crystal display device |
| CN101494226A (en) * | 2008-01-25 | 2009-07-29 | 群康科技(深圳)有限公司 | Thin-film transistor substrate and method of manufacturing the same, wiring structure and method of manufacturing the same |
-
2009
- 2009-12-04 CN CN2009102529343A patent/CN101710471B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1743926A (en) * | 2004-09-01 | 2006-03-08 | 精工爱普生株式会社 | Electro-optical device and electronic apparatus |
| CN1912717A (en) * | 2005-08-08 | 2007-02-14 | 三菱电机株式会社 | Liquid crystal display device |
| CN101494226A (en) * | 2008-01-25 | 2009-07-29 | 群康科技(深圳)有限公司 | Thin-film transistor substrate and method of manufacturing the same, wiring structure and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101710471A (en) | 2010-05-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101359825B1 (en) | Liquid crystal display device | |
| CN104880871B (en) | Display panel and display device | |
| CN102844803B (en) | Active matrix substrate and display device | |
| TWI408471B (en) | Display device | |
| CN102012593B (en) | array substrate of liquid crystal display device | |
| US20200166788A1 (en) | Pixel array | |
| CN104698711A (en) | Array substrate, display panel and electronic equipment | |
| KR101098084B1 (en) | Liquid crystal display device | |
| US9488881B2 (en) | Array substrate and display device | |
| CN104503176A (en) | Array substrate, display panel and display device | |
| CN103336392B (en) | Array base palte, display panels and device | |
| US10269788B2 (en) | Array panel with ESD protection circuit | |
| CN101527306B (en) | Active component array substrate and LCD panel | |
| US10001893B2 (en) | Touch screen and display apparatus | |
| CN104317115A (en) | Pixel structure and manufacturing method thereof, array substrate, display panel and display device | |
| CN103250092B (en) | Liquid crystal indicator | |
| CN101710471B (en) | Display device | |
| CN103941494B (en) | A liquid crystal display device | |
| CN104952878A (en) | Display panel | |
| CN102169261B (en) | Thin film transistor substrate of liquid crystal display panel | |
| CN1318908C (en) | Thin film transistor array | |
| CN106842733A (en) | Display panel and its array base palte | |
| US11586085B2 (en) | Display apparatus | |
| CN112363354B (en) | Array substrate and display panel | |
| JP2015052628A (en) | Display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |