TWI549323B - Semiconductor lead frame package and led package - Google Patents

Semiconductor lead frame package and led package Download PDF

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TWI549323B
TWI549323B TW103119422A TW103119422A TWI549323B TW I549323 B TWI549323 B TW I549323B TW 103119422 A TW103119422 A TW 103119422A TW 103119422 A TW103119422 A TW 103119422A TW I549323 B TWI549323 B TW I549323B
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die pad
central opening
semiconductor package
pin
package structure
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TW103119422A
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TW201547069A (en
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陳盈仲
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日月光半導體製造股份有限公司
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半導體導線架封裝及發光二極體封裝 Semiconductor lead frame package and LED package

本發明係關於半導體封裝(semiconductor package),且更特定言之,係關於半導體導線架封裝及發光二極體(LED)封裝。 This invention relates to semiconductor packages and, more particularly, to semiconductor leadframe packages and light emitting diode (LED) packages.

對於許多照明應用,發光二極體(light-emitting diode,LED)元件由於其所提供之優點(諸如,低成本、低能量消耗及相關環境益處)而受到青睞。傳統的LED元件包括含有LED晶片之至少一個LED封裝。LED元件效率不僅取決於LED晶片量子效率,而且取決於封裝設計。 For many lighting applications, light-emitting diode (LED) components are favored for their advantages such as low cost, low energy consumption, and related environmental benefits. A conventional LED component includes at least one LED package containing an LED chip. LED component efficiency depends not only on the quantum efficiency of the LED chip, but also on the package design.

LED元件在使用期間產生必須耗散之熱。熱不僅造成效率差,而且影響LED元件之長期可靠性。因此,LED元件通常包括用於較佳熱耗散之金屬散熱片。 LED components generate heat that must be dissipated during use. Heat not only causes inefficiency, but also affects the long-term reliability of LED components. Therefore, LED components typically include metal heat sinks for better heat dissipation.

一些LED封裝包括一預模製導線架(Pre-molded Lead Frame)(而非習知的陶瓷基板)用以攜載LED晶片。預模製導線架包括一預模製絕緣體以封裝具有多個電極及一熱墊(Thermal Pad)之導線架。電極及熱墊曝露於LED封裝之底部上。 Some LED packages include a pre-molded lead frame (rather than a conventional ceramic substrate) for carrying LED wafers. The pre-molded leadframe includes a pre-molded insulator to encapsulate a leadframe having a plurality of electrodes and a thermal pad. The electrodes and thermal pads are exposed on the bottom of the LED package.

然而,習知的LED封裝不能直接地表面黏著至金屬散熱片之導電表面,此係因為散熱片將使LED封裝之已曝露電極短路。通常,印刷電路板在習知的LED封裝與散熱片之間提供電絕緣緩衝器以克服此問題,但此解決方案顯著地增加製造成本。 However, conventional LED packages do not directly adhere to the conductive surface of the metal heat sink because the heat sink will short the exposed electrode of the LED package. Typically, printed circuit boards provide electrically insulated buffers between conventional LED packages and heat sinks to overcome this problem, but this solution adds significantly to manufacturing costs.

另外,為了減少LED封裝與散熱片之間的熱阻抗,電路板常常具備貫穿電路板之熱通路(Thermal Via)或金屬嵌件(Metal Insert)。此等特徵反而會進一步增加製造成本。 In addition, in order to reduce the thermal impedance between the LED package and the heat sink, the circuit board often has a thermal via (Metal Via) or a metal insert (Metal Insert). These features will further increase manufacturing costs.

另一LED封裝設計(被稱為板面晶片(Chip-On-Board,COB)封裝)包括安裝於金屬芯印刷電路板(Metal-Core Printed Circuit Board,MCPCB)上之LED晶片。MCPCB通常包括鋁板,鋁板具有塗佈於其前表面上之絕緣層及在絕緣層上之銅圖案,銅圖案提供電佈線及連接。 Another LED package design (referred to as a Chip-On-Board (COB) package) includes an LED chip mounted on a Metal-Core Printed Circuit Board (MCPCB). The MCPCB typically includes an aluminum plate having an insulating layer coated on its front surface and a copper pattern on the insulating layer, the copper pattern providing electrical wiring and connections.

板面晶片(COB)LED封裝可直接地表面黏著至金屬散熱片之導電表面。然而,自LED晶片至散熱片之熱傳輸顯著地受到銅圖案與鋁芯之間的絕緣層阻礙,此情形導致低熱耗散效率。 A surface-mount wafer (COB) LED package can be directly bonded to the conductive surface of the metal heat sink. However, heat transfer from the LED chip to the heat sink is significantly hindered by the insulating layer between the copper pattern and the aluminum core, which results in low heat dissipation efficiency.

根據一項實施例,一種半導體導線架封裝包括一晶粒墊;一引腳;一晶粒,其設置於該晶粒墊之一頂面上且電連接至該引腳之一主要部分,該主要部分設置於該晶粒墊上方。一絕緣本體部分地封裝該晶粒墊及該引腳,該引腳之一電極部分摺疊至該絕緣本體之一頂面上,該電極部分平行於該主要部分,其中該晶粒墊之一底面係自該絕緣本體之一底面曝露。 According to an embodiment, a semiconductor lead frame package includes a die pad; a pin; a die disposed on a top surface of the die pad and electrically connected to a main portion of the pin, The main portion is disposed above the die pad. An insulating body partially encapsulates the die pad and the pin, and one of the electrode portions of the pin is folded onto a top surface of the insulating body, the electrode portion is parallel to the main portion, wherein a bottom surface of the die pad It is exposed from the bottom surface of one of the insulating bodies.

在一項實施例中,該晶粒墊之該曝露底面直接地接觸一散熱片。亦即,該晶粒墊之該底面熱附接(Thermally Attached)至該散熱片。因此,由該晶粒產生之熱可通過該晶粒墊及該散熱片而快速地耗散至空氣,此情形導致高熱耗散效率。 In one embodiment, the exposed bottom surface of the die pad directly contacts a heat sink. That is, the bottom surface of the die pad is thermally attached to the heat sink. Therefore, heat generated by the die can be quickly dissipated to the air through the die pad and the heat sink, which results in high heat dissipation efficiency.

在一項實施例中,該引腳包括該主要部分、自該主要部分摺疊之一連接部分,及自該連接部分摺疊至該絕緣本體之該頂面上之該電極部分。該引腳之該連接部分摺疊至該絕緣本體之一凹口中,使得該連接部分自該絕緣本體之一側表面凹入。藉由使該連接部分自該絕緣本體之該側表面凹入,有效地減少在該引腳與該散熱片之間發生短路 之機會。 In one embodiment, the pin includes the main portion, a connecting portion folded from the main portion, and the electrode portion folded from the connecting portion to the top surface of the insulative housing. The connecting portion of the pin is folded into a recess of the insulative housing such that the connecting portion is recessed from a side surface of the insulative housing. By causing the connecting portion to be recessed from the side surface of the insulating body, the short circuit between the pin and the heat sink is effectively reduced Opportunity.

1‧‧‧半導體導線架封裝 1‧‧‧Semiconductor lead frame package

1a‧‧‧半導體導線架封裝 1a‧‧‧Semiconductor lead frame package

11‧‧‧外部散熱片 11‧‧‧External heat sink

12‧‧‧晶粒墊 12‧‧‧ die pad

14‧‧‧引腳 14‧‧‧ pin

16‧‧‧肋狀物 16‧‧‧ ribs

18‧‧‧固定元件 18‧‧‧Fixed components

20‧‧‧條帶部分 20‧‧‧ strip section

22‧‧‧絕緣本體 22‧‧‧Insulated body

23‧‧‧中心開口 23‧‧‧Center opening

24‧‧‧上部中心開口 24‧‧‧ upper center opening

25‧‧‧上部內側壁 25‧‧‧ upper inner side wall

26‧‧‧下部中心開口 26‧‧‧ Lower central opening

27‧‧‧下部內側壁 27‧‧‧ Lower inner side wall

28‧‧‧LED晶粒 28‧‧‧LED dies

30‧‧‧導線 30‧‧‧Wire

32‧‧‧封裝物 32‧‧‧Package

33‧‧‧頂面 33‧‧‧ top surface

34‧‧‧連接器 34‧‧‧Connector

50‧‧‧扣件 50‧‧‧fasteners

60‧‧‧外部電力供應電路系統 60‧‧‧External power supply circuit system

62‧‧‧接點或電線 62‧‧‧Contacts or wires

111‧‧‧開口 111‧‧‧ openings

121‧‧‧頂面 121‧‧‧ top surface

122‧‧‧底面 122‧‧‧ bottom

123‧‧‧底面 123‧‧‧ bottom

141‧‧‧主要部分 141‧‧‧ main part

141a‧‧‧底面 141a‧‧‧ bottom

142‧‧‧連接部分 142‧‧‧Connected section

143‧‧‧電極部分 143‧‧‧Electrode part

181‧‧‧通孔 181‧‧‧through hole

201‧‧‧第一桿體部分 201‧‧‧First body part

202‧‧‧第二桿體部分 202‧‧‧Second body part

221‧‧‧頂面 221‧‧‧ top surface

222‧‧‧底面 222‧‧‧ bottom

223‧‧‧凹口 223‧‧‧ notch

224‧‧‧側表面 224‧‧‧ side surface

225‧‧‧側壁 225‧‧‧ side wall

281‧‧‧光轉換層 281‧‧‧Light conversion layer

341‧‧‧中心環 341‧‧‧ center ring

342‧‧‧頂部肋狀物 342‧‧‧Top ribs

343‧‧‧底座 343‧‧‧Base

344‧‧‧垂直部分 344‧‧‧ vertical part

圖1說明根據一項實施例之安裝至散熱片之半導體導線架封裝的立體示意圖;圖2說明沿著圖1之線2-2的剖面圖;圖3說明沿著圖1之線3-3的剖面圖;圖4說明沿著圖1之線4-4的剖面圖;圖4A說明圖4之半導體導線架封裝的剖面圖,該半導體導線架封裝係藉由電線而連接至外部電力供應電路系統;圖5說明根據另一實施例之半導體導線架封裝的立體示意圖;圖6說明圖5之半導體導線架封裝的俯視圖,該半導體導線架封裝係經由連接器而安裝至外部散熱片;圖7、圖8、圖9、圖10、圖11、圖12、圖13、圖14、圖15、圖16、圖17、圖18說明根據一項實施例之用於製造半導體導線架封裝之製程;及圖19至圖20說明根據另一實施例之用於製造半導體導線架封裝之製程。 1 illustrates a perspective view of a semiconductor leadframe package mounted to a heat sink in accordance with an embodiment; FIG. 2 illustrates a cross-sectional view taken along line 2-2 of FIG. 1; and FIG. 3 illustrates a line 3-3 along FIG. FIG. 4 illustrates a cross-sectional view of the semiconductor leadframe package of FIG. 4, the semiconductor leadframe package being connected to an external power supply circuit by wires FIG. 5 illustrates a perspective view of a semiconductor leadframe package in accordance with another embodiment; FIG. 6 illustrates a top view of the semiconductor leadframe package of FIG. 5 mounted to an external heat sink via a connector; FIG. 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 , 17 , and 18 illustrate a process for fabricating a semiconductor lead frame package in accordance with an embodiment; 19 through 20 illustrate a process for fabricating a semiconductor leadframe package in accordance with another embodiment.

參看圖1,說明根據一項實施例之半導體導線架封裝1。半導體導線架封裝1包括晶粒墊12、至少一個引腳14(例如,兩個引腳14)、至少一個肋狀物16(例如,四個肋狀物16)、至少一個固定元件18(例如,兩個固定元件18)、絕緣本體22、至少一個導線30(例如,三個導線30)、至少一個晶粒28(例如,兩個晶粒28)、至少一個光轉換層281(例如,兩個光轉換層281),及封裝物32。 Referring to Figure 1, a semiconductor leadframe package 1 is illustrated in accordance with an embodiment. The semiconductor leadframe package 1 includes a die pad 12, at least one pin 14 (eg, two pins 14), at least one rib 16 (eg, four ribs 16), at least one securing element 18 (eg, Two fixing elements 18), an insulative body 22, at least one wire 30 (for example, three wires 30), at least one die 28 (for example, two die 28), at least one light conversion layer 281 (for example, two Light conversion layer 281), and package 32.

晶粒墊12用於攜載晶粒28。在此實施例中,晶粒28為發光二極體(LED)晶粒,且黏附至晶粒墊12。因此,半導體導線架封裝1為LED 封裝。晶粒墊12之材料為諸如銅之金屬。 The die pad 12 is used to carry the die 28. In this embodiment, the die 28 is a light emitting diode (LED) die and adheres to the die pad 12. Therefore, the semiconductor lead frame package 1 is an LED Package. The material of the die pad 12 is a metal such as copper.

雖然諸圖中說明兩個晶粒28,但在另一實施例中,半導體導線架封裝1包括僅單一晶粒28。在又一實施例中,半導體導線架封裝1包括兩個以上晶粒28。 Although two dies 28 are illustrated in the figures, in another embodiment, the semiconductor leadframe package 1 includes only a single die 28. In yet another embodiment, the semiconductor leadframe package 1 includes more than two dies 28.

絕緣本體22(亦被稱作外殼)部分地封裝晶粒墊12及引腳14,藉此形成預模製導線架,且絕緣本體22具有頂面221、底面222、至少一個凹口223(例如,兩個凹口223),及中心開口23。凹口223設置於絕緣本體22之邊緣上。更特定言之,絕緣本體22之側表面224垂直地延伸於絕緣本體22之頂面221與底面222之間,且凹口223形成於側表面224內。 The insulative housing 22 (also referred to as a housing) partially encapsulates the die pad 12 and the leads 14 thereby forming a pre-molded leadframe, and the insulative housing 22 has a top surface 221, a bottom surface 222, and at least one recess 223 (eg, , two notches 223), and a central opening 23. The recess 223 is disposed on the edge of the insulative housing 22. More specifically, the side surface 224 of the insulative housing 22 extends perpendicularly between the top surface 221 and the bottom surface 222 of the insulative housing 22, and the recess 223 is formed in the side surface 224.

絕緣本體22之上部內側壁25界定絕緣本體22中之上部中心開口24。絕緣本體22之下部內側壁27界定絕緣本體22之下部中心開口26。中心開口23包括下部中心開口26及上部中心開口24。 The upper inner side wall 25 of the insulative body 22 defines an upper central opening 24 in the insulative body 22. The lower inner side wall 27 of the insulative body 22 defines a central opening 26 at the lower portion of the insulative body 22. The central opening 23 includes a lower central opening 26 and an upper central opening 24.

上部中心開口24係與下部中心開口26連通,且上部中心開口24之尺寸大於下部中心開口26之尺寸。下部中心開口26曝露晶粒墊12之部分,晶粒28設置於曝露之晶粒墊12之部分,且上部中心開口24曝露引腳14之部分,導線30係接合至曝露引腳14之部分。絕緣本體22之材料可為封膠材料,諸如,透明或半透明聚合物、軟凝膠(Soft Gel)、彈性體(Elastomer)、樹脂、環氧樹脂(Epoxy Resin)、聚矽氧(Silicone),或環氧樹脂-聚矽氧混合式樹脂(Epoxy-Silicone Hybrid Resin)。 The upper central opening 24 is in communication with the lower central opening 26 and the upper central opening 24 is sized larger than the lower central opening 26. The lower central opening 26 exposes a portion of the die pad 12, the die 28 is disposed over a portion of the exposed die pad 12, and the upper central opening 24 exposes a portion of the lead 14, and the wire 30 is bonded to a portion of the exposed pin 14. The material of the insulative body 22 may be a sealant material, such as a transparent or translucent polymer, Soft Gel, Elastomer, Resin, Epoxy Resin, Silicone. , or Epoxy-Silicone Hybrid Resin.

兩個引腳14係與晶粒墊12電隔離,且每一該等引腳14具有主要部分141、連接部分142及電極部分143(例如,作為正電極及負電極)。主要部分141嵌入於絕緣本體22中,且主要部分141之一部分係自絕緣本體22之上部中心開口24曝露,且經由導線30而電連接至晶粒28。連接部分142連接主要部分141及電極部分143,且設置於凹口223 中。 The two pins 14 are electrically isolated from the die pad 12, and each of the pins 14 has a main portion 141, a connection portion 142, and an electrode portion 143 (eg, as a positive electrode and a negative electrode). The main portion 141 is embedded in the insulative housing 22, and a portion of the main portion 141 is exposed from the upper central opening 24 of the insulative housing 22 and is electrically connected to the die 28 via wires 30. The connecting portion 142 connects the main portion 141 and the electrode portion 143 and is disposed at the recess 223 in.

在此實施例中,連接部分142延伸出絕緣本體22之外,且設置於凹口223之側壁225上(參見圖4)。連接部分142經摺疊成使得連接部分142實質上垂直於主要部分141。雖然可將各種特徵描述為垂直、平行或具有其他關係,但按照本發明,熟習此項技術者應理解,該等特徵可不精確地垂直或平行,而是僅在可接受之製造容許度內實質上垂直或平行。 In this embodiment, the connecting portion 142 extends beyond the insulative housing 22 and is disposed on the sidewall 225 of the recess 223 (see FIG. 4). The connecting portion 142 is folded such that the connecting portion 142 is substantially perpendicular to the main portion 141. Although various features may be described as being vertical, parallel, or otherwise, it will be understood by those skilled in the art that the features may be inaccurately perpendicular or parallel, but only within acceptable manufacturing tolerances. Vertical or parallel.

電極部分143設置於絕緣本體22之頂面221上,且用於外部電連接。電極部分143經摺疊成使得電極部分143實質上垂直於連接部分142,且電極部分143實質上平行於主要部分141。在此實施例中,引腳14(主要部分141、連接部分142及電極部分143)之材料為諸如銅之金屬。引腳14及晶粒墊12可稱作導線架。 The electrode portion 143 is disposed on the top surface 221 of the insulative housing 22 and is used for external electrical connection. The electrode portion 143 is folded such that the electrode portion 143 is substantially perpendicular to the connecting portion 142, and the electrode portion 143 is substantially parallel to the main portion 141. In this embodiment, the material of the lead 14 (the main portion 141, the connecting portion 142, and the electrode portion 143) is a metal such as copper. Pin 14 and die pad 12 may be referred to as a leadframe.

封裝物32設置於中心開口23(亦即,下部中心開口26及上部中心開口24)中,以封裝晶粒28及導線30。封裝物32係可由透明聚合物或半透明聚合物(例如,軟凝膠、彈性體、樹脂、環氧樹脂、聚矽氧,或環氧樹脂-聚矽氧混合式樹脂)製成。 The package 32 is disposed in the central opening 23 (ie, the lower central opening 26 and the upper central opening 24) to encapsulate the die 28 and the wires 30. The encapsulant 32 may be made of a transparent polymer or a translucent polymer (for example, a soft gel, an elastomer, a resin, an epoxy resin, a polyoxymethylene, or an epoxy-polyoxyl mixed resin).

為了改良自晶粒28之發光之均一性,可使光隨著其被發射而散射。因此,可將散射粒子添加至封裝物32中以使光通過封裝物32時隨機地折射。 In order to improve the uniformity of illumination from the die 28, light can be scattered as it is emitted. Thus, scattering particles can be added to the encapsulant 32 to randomly refract light as it passes through the encapsulant 32.

在此實施例中,封裝物32之頂面33係與絕緣本體22之頂面221共平面;然而,在其他實施例中,封裝物32之頂面33可凸出以形成凸透鏡結構。 In this embodiment, the top surface 33 of the package 32 is coplanar with the top surface 221 of the insulative body 22; however, in other embodiments, the top surface 33 of the package 32 may be convex to form a convex lens structure.

光轉換層281設置於封裝物32與晶粒28之間。光轉換層281實質上覆蓋晶粒28之頂面,且亦可覆蓋每一導線30之部分。 The light conversion layer 281 is disposed between the package 32 and the die 28. Light conversion layer 281 substantially covers the top surface of die 28 and may also cover portions of each wire 30.

光轉換層281包括光轉換物質之粒子,諸如,螢光粒子。自晶粒28發射之光(例如,藍光)係可由光轉換物質轉換成不同色彩(諸如,綠 色、黃色及紅色)之光,且該等不同色彩接著可混合以產生白光。 The light conversion layer 281 includes particles of a light conversion substance such as fluorescent particles. Light emitted from the die 28 (eg, blue light) can be converted to a different color by a light converting substance (such as green Light, yellow, and red), and the different colors can then be mixed to produce white light.

然而,在其他實施例中,可針對單色LED封裝省略光轉換層281。或者,可藉由封裝物32中之光轉換物質來替換光轉換層281。 However, in other embodiments, the light conversion layer 281 can be omitted for a single color LED package. Alternatively, the light conversion layer 281 may be replaced by a light converting substance in the package 32.

肋狀物16之部分及固定元件18係自絕緣本體22曝露。固定元件18係經由肋狀物16而連接至晶粒墊12。在此實施例中,固定元件18為板,且具有用於外部連接之通孔181。肋狀物16及固定元件18之材料為諸如銅之金屬。 Portions of the ribs 16 and the securing elements 18 are exposed from the insulative body 22. The fixing element 18 is connected to the die pad 12 via ribs 16. In this embodiment, the securing element 18 is a plate and has a through hole 181 for external connection. The material of the rib 16 and the fixing member 18 is a metal such as copper.

參看圖2,說明沿著圖1之線2-2的剖面圖,其中半導體導線架封裝1進一步安裝至外部散熱片11以形成LED模組。晶粒墊12具有頂面121及底面122。晶粒28設置於晶粒墊12之頂面121上。晶粒墊12之底面122係與絕緣本體22之底面222共平面,以便自絕緣本體22之底面222曝露且直接地接觸散熱片11。亦即,晶粒墊12之底面122熱附接至散熱片11。 Referring to Figure 2, a cross-sectional view taken along line 2-2 of Figure 1 is illustrated in which the semiconductor leadframe package 1 is further mounted to an external heat sink 11 to form an LED module. The die pad 12 has a top surface 121 and a bottom surface 122. The die 28 is disposed on the top surface 121 of the die pad 12. The bottom surface 122 of the die pad 12 is coplanar with the bottom surface 222 of the insulative housing 22 so as to be exposed from the bottom surface 222 of the insulative housing 22 and directly contact the heat sink 11. That is, the bottom surface 122 of the die pad 12 is thermally attached to the heat sink 11.

因此,由晶粒28產生之熱係可通過晶粒墊12及散熱片11而快速地耗散至空氣,此情形導致高熱耗散效率。此外,晶粒墊12、肋狀物16及固定元件18為藉由沖壓而形成之同一板,使得肋狀物16彎曲,且固定元件18之底面123係與晶粒墊12之底面122共平面。固定元件18用以緊固至散熱片11。 Therefore, the heat generated by the die 28 can be quickly dissipated to the air by the die pad 12 and the heat sink 11, which results in high heat dissipation efficiency. In addition, the die pad 12, the ribs 16, and the fixing member 18 are the same plate formed by stamping, so that the rib 16 is bent, and the bottom surface 123 of the fixing member 18 is coplanar with the bottom surface 122 of the die pad 12. . The fixing member 18 is for fastening to the heat sink 11.

在此實施例中,扣件50位於固定元件18之通孔181及散熱片11之開口111內,以將半導體導線架封裝1緊固至散熱片11。扣件50及散熱片11之開口111可具有螺紋。然而,可以理解的是,固定元件18可黏附或焊接至散熱片11。另外,固定元件18之底面123係與晶粒墊12之底面122共平面,使得當固定元件18緊固至散熱片11時,晶粒墊12之底面122同時地接觸散熱片11。 In this embodiment, the fastener 50 is located in the through hole 181 of the fixing member 18 and the opening 111 of the heat sink 11 to fasten the semiconductor lead frame package 1 to the heat sink 11. The fasteners 50 and the openings 111 of the fins 11 may have threads. However, it will be appreciated that the securing element 18 can be adhered or welded to the heat sink 11. In addition, the bottom surface 123 of the fixing member 18 is coplanar with the bottom surface 122 of the die pad 12 such that when the fixing member 18 is fastened to the heat sink 11, the bottom surface 122 of the die pad 12 simultaneously contacts the heat sink 11.

參看圖3,說明沿著圖1之線3-3的剖面圖,其中半導體導線架封裝1進一步安裝至散熱片11。引腳14之主要部分141之水平線高於晶粒 墊12之水平線,亦即,引腳14之主要部分141所處的平面位於晶粒墊12所處的平面上方。亦即,引腳14之主要部分141設置於晶粒墊12上方且與晶粒墊12隔開。 Referring to FIG. 3, a cross-sectional view along line 3-3 of FIG. 1 is illustrated in which the semiconductor leadframe package 1 is further mounted to the heat sink 11. The horizontal portion of the main portion 141 of the lead 14 is higher than the crystal grain The horizontal line of pad 12, i.e., the plane in which main portion 141 of pin 14 is located, lies above the plane in which die pad 12 is located. That is, the main portion 141 of the lead 14 is disposed over the die pad 12 and spaced apart from the die pad 12.

在本實施例中,引腳14之主要部分141之底面141a係由絕緣本體22覆蓋,使得可在不使引腳14短路的情況下將半導體導線架封裝1直接地安裝至金屬散熱片11。 In the present embodiment, the bottom surface 141a of the main portion 141 of the lead 14 is covered by the insulative housing 22 so that the semiconductor lead frame package 1 can be directly mounted to the metal fins 11 without shorting the leads 14.

引腳14之主要部分141與晶粒墊12之間的絕緣本體22之部分界定下部中心開口26,且引腳14之主要部分141上的絕緣本體22之部分界定上部中心開口24。更特定言之,絕緣本體22之下部內側壁27延伸於引腳14之主要部分141與晶粒墊12之間,且界定下部中心開口26。絕緣本體22之上部內側壁25延伸於引腳14之主要部分141與絕緣本體22之頂面221之間,且界定上部中心開口24。 A portion of the insulative body 22 between the main portion 141 of the lead 14 and the die pad 12 defines a lower central opening 26, and a portion of the insulative body 22 on the main portion 141 of the pin 14 defines an upper central opening 24. More specifically, the lower inner sidewall 27 of the insulative body 22 extends between the main portion 141 of the lead 14 and the die pad 12 and defines a lower central opening 26. The upper inner sidewall 25 of the insulative housing 22 extends between the main portion 141 of the lead 14 and the top surface 221 of the insulative housing 22 and defines an upper central opening 24.

參看圖4,說明沿著圖1之線4-4的剖面圖。參看圖4A,圖4之半導體導線架封裝1係藉由一對接點或電線62(圖4A中僅顯示一個)而連接至外部電力供應電路系統60,該對接點或電線62緊固至引腳14之曝露電極部分143。外部電力供應電路系統60將電流傳送至半導體導線架封裝1,使得LED晶粒28可產生光。 Referring to Figure 4, a cross-sectional view along line 4-4 of Figure 1 is illustrated. Referring to FIG. 4A, the semiconductor leadframe package 1 of FIG. 4 is connected to an external power supply circuitry 60 by a pair of contacts or wires 62 (only one of which is shown in FIG. 4A). The butt or wire 62 is secured to the leads. The exposed electrode portion 143 of 14. The external power supply circuitry 60 delivers current to the semiconductor leadframe package 1 such that the LED die 28 can produce light.

在此實施例中,引腳14(主要部分141、連接部分142及電極部分143)係一體成形,且被摺疊兩次以分別形成主要部分141、連接部分142及電極部分143。引腳14之一部分(亦即,連接部分142)摺疊至凹口223之側壁225上,使得連接部分142自絕緣本體22之側表面224凹入,且引腳14之另一部分(亦即,電極部分143)進一步摺疊至絕緣本體22之頂面221上。 In this embodiment, the lead 14 (the main portion 141, the connecting portion 142, and the electrode portion 143) are integrally formed and folded twice to form the main portion 141, the connecting portion 142, and the electrode portion 143, respectively. One portion of the pin 14 (i.e., the connecting portion 142) is folded over the sidewall 225 of the recess 223 such that the connecting portion 142 is recessed from the side surface 224 of the insulative housing 22 and another portion of the pin 14 (i.e., the electrode) Portion 143) is further folded onto top surface 221 of insulative body 22.

凹口223之位置對應於引腳14之摺疊部分(亦即,連接部分142及電極部分143)。在某些實施例中,連接部分142係自絕緣本體22之側表面224凹入至少0.15mm,藉此有效地減少在引腳14與散熱片11之 間發生短路之機會,如下文進一步所論述。 The position of the recess 223 corresponds to the folded portion of the lead 14 (i.e., the connecting portion 142 and the electrode portion 143). In some embodiments, the connecting portion 142 is recessed from the side surface 224 of the insulative housing 22 by at least 0.15 mm, thereby effectively reducing the pin 14 and the heat sink 11 The chance of a short circuit between them is discussed further below.

在一項實施例中,半導體導線架封裝1不具有凹口223,且連接部分142設置於側表面224上,此情形縮短引腳14與散熱片11之間的距離,且可導致在引腳14與散熱片11之間發生短路之可能性增加。另外,在所說明實施例中,當自絕緣本體22之底面222進行檢視時,晶粒墊12之底面122曝露,但引腳14之主要部分141之底面141a未曝露。 In one embodiment, the semiconductor leadframe package 1 does not have a recess 223 and the connection portion 142 is disposed on the side surface 224, which shortens the distance between the pin 14 and the heat sink 11 and can result in a pin The possibility of a short circuit between the 14 and the heat sink 11 increases. In addition, in the illustrated embodiment, when viewed from the bottom surface 222 of the insulative housing 22, the bottom surface 122 of the die pad 12 is exposed, but the bottom surface 141a of the main portion 141 of the lead 14 is not exposed.

參看圖5,說明根據另一實施例之半導體導線架封裝1a。半導體導線架封裝1a實質上相似於圖1之半導體導線架封裝1,且相同元件賦予相同標號。此實施例之半導體導線架封裝1a與圖1之半導體導線架封裝1之間的差異為:半導體導線架封裝1a不具有半導體導線架封裝1之固定元件18。因此,肋狀物16僅一部分自絕緣本體22之側曝露。 Referring to Figure 5, a semiconductor leadframe package 1a in accordance with another embodiment is illustrated. The semiconductor lead frame package 1a is substantially similar to the semiconductor lead frame package 1 of FIG. 1 and the same elements are given the same reference numerals. The difference between the semiconductor lead frame package 1a of this embodiment and the semiconductor lead frame package 1 of FIG. 1 is that the semiconductor lead frame package 1a does not have the fixing member 18 of the semiconductor lead frame package 1. Therefore, only a portion of the rib 16 is exposed from the side of the insulative body 22.

參看圖6,說明圖5之俯視圖,其中半導體導線架封裝1a係經由連接器34(圖6中之影線區域)而進一步安裝至外部散熱片11。連接器34包含中心環341、兩個頂部肋狀物342、兩個底座343及兩個垂直部分344。中心環341設置於絕緣本體22之頂面221上,且對應於絕緣本體22之上部中心開口24。中心環341之內徑稍微大於上部中心開口24之直徑。 Referring to Fig. 6, a top view of Fig. 5 is illustrated in which the semiconductor lead frame package 1a is further mounted to the outer fins 11 via a connector 34 (hatched area in Fig. 6). The connector 34 includes a center ring 341, two top ribs 342, two bases 343, and two vertical portions 344. The center ring 341 is disposed on the top surface 221 of the insulative housing 22 and corresponds to the central opening 24 of the upper portion of the insulative housing 22. The inner diameter of the center ring 341 is slightly larger than the diameter of the upper central opening 24.

頂部肋狀物342自中心環341延伸至絕緣本體22之兩個角落,且分別經由兩個垂直部分344而連接底座343。底座343之底面係與晶粒墊12之底面122共平面,且每一該等底座343之形狀配合絕緣本體22之角落,以便鎖定絕緣本體22。扣件50用以通過底座343之通孔(未圖示)而將半導體導線架封裝1a緊固至散熱片11。 The top rib 342 extends from the center ring 341 to the two corners of the insulative body 22 and is coupled to the base 343 via two vertical portions 344, respectively. The bottom surface of the base 343 is coplanar with the bottom surface 122 of the die pad 12, and each of the bases 343 is shaped to fit the corner of the insulative housing 22 to lock the insulative housing 22. The fastener 50 is used to fasten the semiconductor lead frame package 1a to the heat sink 11 through a through hole (not shown) of the base 343.

參看圖7至圖18,說明根據一實施例之用於製造半導體導線架封裝之半導體製程。 Referring to Figures 7 through 18, a semiconductor process for fabricating a semiconductor leadframe package in accordance with an embodiment is illustrated.

參看圖7,提供導線架。導線架包括橫越彼此之複數個條帶部分20以界定複數個單元。每一該等單元包括晶粒墊12、至少一個引腳 14、至少一個肋狀物16、至少一個固定元件18、至少一個第一桿體部分201及至少一個第二桿體部分202。可藉由沖壓或蝕刻銅板來形成導線架之圖案。 Referring to Figure 7, a lead frame is provided. The leadframe includes a plurality of strip portions 20 that traverse each other to define a plurality of cells. Each of the units includes a die pad 12, at least one pin 14. At least one rib 16, at least one fixing element 18, at least one first rod portion 201 and at least one second rod portion 202. The pattern of the leadframe can be formed by stamping or etching a copper plate.

在此實施例中,每一該等單元包括兩個引腳14、四個肋狀物16及兩個固定元件18。在此實施例中,每一該等固定元件18板,且具有用於外部連接之通孔181。肋狀物16連接固定元件18及晶粒墊12,且固定元件18係藉由第一桿體部分201而連接至條帶部分20。引腳14沿著晶粒墊12而延伸,且不連接晶粒墊12。每一該等引腳14具有主要部分141、連接部分142及電極部分143。連接部分142連接主要部分141及電極部分143。電極部分143係藉由第二桿體部分202而連接至條帶部分20。 In this embodiment, each of the units includes two pins 14, four ribs 16, and two securing elements 18. In this embodiment, each of the fastening elements 18 is plated and has a through hole 181 for external connection. The ribs 16 connect the fixing member 18 and the die pad 12, and the fixing member 18 is coupled to the strip portion 20 by the first body portion 201. The leads 14 extend along the die pad 12 without the die pad 12 being attached. Each of the pins 14 has a main portion 141, a connecting portion 142, and an electrode portion 143. The connecting portion 142 connects the main portion 141 and the electrode portion 143. The electrode portion 143 is connected to the strip portion 20 by the second rod portion 202.

參看圖8,說明沿著圖7之線8-8的剖面圖。晶粒墊12具有頂面121及底面122。主要部分141具有底面141a。引腳14之主要部分141之水平線高於晶粒墊12之水平線。亦即,引腳14之主要部分141設置於晶粒墊12上方且與晶粒墊12隔開。 Referring to Figure 8, a cross-sectional view taken along line 8-8 of Figure 7 is illustrated. The die pad 12 has a top surface 121 and a bottom surface 122. The main portion 141 has a bottom surface 141a. The horizontal line of the main portion 141 of the pin 14 is higher than the horizontal line of the die pad 12. That is, the main portion 141 of the lead 14 is disposed over the die pad 12 and spaced apart from the die pad 12.

參看圖9,說明沿著圖7之線9-9的剖面圖。在此實施例中,晶粒墊12、肋狀物16及固定元件18為藉由沖壓而形成之同一板,使得肋狀物16彎曲,且固定元件18之底面123係與晶粒墊12之底面122共平面。因此,當固定元件18緊固至散熱片11(圖2)時,晶粒墊12之底面122同時地接觸散熱片11。 Referring to Figure 9, a cross-sectional view along line 9-9 of Figure 7 is illustrated. In this embodiment, the die pad 12, the ribs 16, and the fixing member 18 are the same plate formed by stamping, so that the rib 16 is bent, and the bottom surface 123 of the fixing member 18 is bonded to the die pad 12 The bottom surface 122 is coplanar. Therefore, when the fixing member 18 is fastened to the heat sink 11 (FIG. 2), the bottom surface 122 of the die pad 12 simultaneously contacts the heat sink 11.

參看圖10,形成絕緣本體22以部分地封裝晶粒墊12及引腳14,且絕緣本體22具有至少一個凹口223及一中心開口23。凹口223設置於絕緣本體22之邊緣上。中心開口23包括下部中心開口26及上部中心開口24。上部中心開口24係與下部中心開口26連通,且上部中心開口24之尺寸大於下部中心開口26之尺寸。下部中心開口26曝露晶粒墊12之部分,晶粒28設置於曝露之晶粒墊12之部分,且上部中心開口24曝露 引腳14之主要部分141之一部分,導線30係接合至該曝露引腳14之主要部分141之部分。絕緣本體22之材料可為封膠材料,諸如,透明或半透明聚合物、軟凝膠(Soft Gel)、彈性體(Elastomer)、樹脂、環氧樹脂(Epoxy Resin)、聚矽氧(Silicone),或環氧樹脂-聚矽氧混合式樹脂(Epoxy-Silicone Hybrid Resin)。。 Referring to FIG. 10, an insulative housing 22 is formed to partially encapsulate the die pad 12 and the leads 14, and the insulative housing 22 has at least one recess 223 and a central opening 23. The recess 223 is disposed on the edge of the insulative housing 22. The central opening 23 includes a lower central opening 26 and an upper central opening 24. The upper central opening 24 is in communication with the lower central opening 26 and the upper central opening 24 is sized larger than the lower central opening 26. The lower central opening 26 exposes a portion of the die pad 12, the die 28 is disposed in a portion of the exposed die pad 12, and the upper central opening 24 is exposed A portion of the main portion 141 of the pin 14 is bonded to a portion of the main portion 141 of the exposed pin 14. The material of the insulative body 22 may be a sealant material, such as a transparent or translucent polymer, Soft Gel, Elastomer, Resin, Epoxy Resin, Silicone. , or Epoxy-Silicone Hybrid Resin. .

參看圖11,說明沿著圖10之線11-11的剖面圖。絕緣本體22進一步具有頂面221、底面222、至少一個凹口223,及中心開口23。引腳14之主要部分141與晶粒墊12之間的絕緣本體22之部分界定下部中心開口26,且引腳14之主要部分141上的絕緣本體22之部分界定上部中心開口24。 Referring to Figure 11, a cross-sectional view taken along line 11-11 of Figure 10 is illustrated. The insulative housing 22 further has a top surface 221, a bottom surface 222, at least one recess 223, and a central opening 23. A portion of the insulative body 22 between the main portion 141 of the lead 14 and the die pad 12 defines a lower central opening 26, and a portion of the insulative body 22 on the main portion 141 of the pin 14 defines an upper central opening 24.

參看圖12,說明沿著圖10之線12-12的剖面圖。晶粒墊12之底面122係與絕緣本體22之底面222共平面,以便自絕緣本體22之底面222曝露。肋狀物16之部分及固定元件18係自絕緣本體22曝露。 Referring to Figure 12, a cross-sectional view along line 12-12 of Figure 10 is illustrated. The bottom surface 122 of the die pad 12 is coplanar with the bottom surface 222 of the insulative housing 22 for exposure from the bottom surface 222 of the insulative body 22. Portions of the ribs 16 and the securing elements 18 are exposed from the insulative body 22.

參看圖13,說明沿著圖10之線13-13的剖面圖。凹口223之位置對應於引腳14之連接部分142及電極部分143。因此,連接部分142及電極部分143通過凹口223而延伸出絕緣本體22之外。 Referring to Figure 13, a cross-sectional view along line 13-13 of Figure 10 is illustrated. The position of the recess 223 corresponds to the connecting portion 142 of the lead 14 and the electrode portion 143. Therefore, the connecting portion 142 and the electrode portion 143 extend beyond the insulating body 22 through the recess 223.

參看圖14,附接晶粒28至晶粒墊12之頂面121。在此實施例中,晶粒28為發光二極體(LED)晶粒,且黏附至晶粒墊12。接著,至少一個導線30自晶粒28接合至引腳14之主要部分141之曝露部分。接著,光轉換層281經塗覆以覆蓋晶粒28之頂面,且亦可覆蓋每一導線30之部分。 Referring to Figure 14, the die 28 is attached to the top surface 121 of the die pad 12. In this embodiment, the die 28 is a light emitting diode (LED) die and adheres to the die pad 12. Next, at least one wire 30 is bonded from die 28 to the exposed portion of main portion 141 of pin 14. Next, the light conversion layer 281 is coated to cover the top surface of the die 28 and may also cover portions of each of the wires 30.

光轉換層281包括光轉換物質之粒子,諸如,螢光粒子。自晶粒28發射之光(例如,藍光)係可由光轉換物質轉換成不同色彩(諸如,綠色、黃色及紅色)之光,且該等不同色彩接著可混合以產生白光。然而,在其他實施例中,可針對單色LED封裝省略光轉換層281。 The light conversion layer 281 includes particles of a light conversion substance such as fluorescent particles. Light emitted from the die 28 (e.g., blue light) can be converted to light of different colors (such as green, yellow, and red) by the light converting material, and the different colors can then be mixed to produce white light. However, in other embodiments, the light conversion layer 281 can be omitted for a single color LED package.

接著,施加封裝物32於中心開口23(亦即,下部中心開口26及上 部中心開口24)中,以封裝晶粒28及導線30。封裝物32係可由透明聚合物或半透明聚合物(例如,軟凝膠、彈性體、樹脂、環氧樹脂、聚矽氧,或環氧樹脂-聚矽氧混合式樹脂)製成。 Next, the package 32 is applied to the central opening 23 (ie, the lower central opening 26 and above) In the central opening 24), the die 28 and the wire 30 are packaged. The encapsulant 32 may be made of a transparent polymer or a translucent polymer (for example, a soft gel, an elastomer, a resin, an epoxy resin, a polyoxymethylene, or an epoxy-polyoxyl mixed resin).

為了改良自晶粒28之發光之均一性,可使光隨著其被發射而散射。因此,可將散射粒子添加至封裝物32中以使光隨著其通過封裝物32時隨機地折射。在此實施例中,封裝物32之頂面33係與絕緣本體22之頂面221共平面;然而,在其他實施例中,封裝物32之頂面可凸出以形成凸透鏡結構。 In order to improve the uniformity of illumination from the die 28, light can be scattered as it is emitted. Thus, scattering particles can be added to the encapsulant 32 to cause the light to refract randomly as it passes through the encapsulant 32. In this embodiment, the top surface 33 of the package 32 is coplanar with the top surface 221 of the insulative body 22; however, in other embodiments, the top surface of the package 32 may be convex to form a convex lens structure.

參看圖14及圖15,切掉第二桿體部分202。 Referring to Figures 14 and 15, the second shaft portion 202 is cut away.

參看圖16,向上摺疊引腳14之連接部分142。 Referring to Figure 16, the connecting portion 142 of the pin 14 is folded upward.

參看圖17,說明沿著圖16之線17-17的剖面圖。在此實施例中,連接部分142摺疊於凹口223之側壁225上,且實質上垂直於主要部分141。同時,引腳14之電極部分143自絕緣本體22之頂面221突起。 Referring to Figure 17, a cross-sectional view taken along line 17-17 of Figure 16 is illustrated. In this embodiment, the connecting portion 142 is folded over the side wall 225 of the recess 223 and is substantially perpendicular to the main portion 141. At the same time, the electrode portion 143 of the pin 14 protrudes from the top surface 221 of the insulative body 22.

參看圖18,引腳14之電極部分143摺疊至絕緣本體22之頂面221上,使得電極部分143實質上垂直於連接部分142,且電極部分143實質上平行於主要部分141。電極部分143用於外部電連接。接著,第一桿體部分201被切掉,以獲得圖1之半導體導線架封裝1。 Referring to Figure 18, the electrode portion 143 of the pin 14 is folded over the top surface 221 of the insulative body 22 such that the electrode portion 143 is substantially perpendicular to the connecting portion 142 and the electrode portion 143 is substantially parallel to the main portion 141. The electrode portion 143 is used for external electrical connection. Next, the first body portion 201 is cut away to obtain the semiconductor lead frame package 1 of FIG.

參看圖19至圖20,說明根據另一實施例之用於製造半導體導線架封裝之半導體製程。 Referring to Figures 19 through 20, a semiconductor process for fabricating a semiconductor leadframe package in accordance with another embodiment is illustrated.

參看圖19,提供導線架。此實施例之導線架實質上相似於圖7之導線架,且相同元件賦予相同標號。此實施例之導線架與圖7之導線架之間的差異為:此實施例之導線架不具有圖7之導線架之固定元件18,且肋狀物16直接地連接條帶部分20。因此,在相同尺寸之導線架中,此實施例之設計具有較多單元,此情形增加封裝密度。 Referring to Figure 19, a lead frame is provided. The lead frame of this embodiment is substantially similar to the lead frame of Figure 7, and the same elements are given the same reference numerals. The difference between the lead frame of this embodiment and the lead frame of Fig. 7 is that the lead frame of this embodiment does not have the fixing member 18 of the lead frame of Fig. 7, and the ribs 16 directly connect the strip portion 20. Therefore, in the lead frame of the same size, the design of this embodiment has more cells, which increases the package density.

參看圖20,形成絕緣本體22以部分地封裝晶粒墊12及引腳14,如圖10。接著,附接晶粒28至晶粒墊12之頂面121,將導線30自晶粒 28接合至引腳14之主要部分141之曝露部分,塗覆光轉換層281以覆蓋晶粒28之頂面,且亦可覆蓋每一導線30之部分,如圖10及圖14。 Referring to Figure 20, an insulative body 22 is formed to partially encapsulate the die pad 12 and leads 14, as in Figure 10. Next, the die 28 is attached to the top surface 121 of the die pad 12, and the wire 30 is self-made. 28 is bonded to the exposed portion of the main portion 141 of the lead 14, coated with a light conversion layer 281 to cover the top surface of the die 28, and may also cover portions of each of the wires 30, as in Figures 10 and 14.

此實施例之後續步驟相同於圖15至圖18之步驟,以便獲得圖5之半導體導線架封裝1a。 The subsequent steps of this embodiment are the same as those of Figures 15 through 18 in order to obtain the semiconductor leadframe package 1a of Figure 5.

雖然已參考本發明之特定實施例而描述及說明本發明,但此等描述及說明並不限制本發明。熟習此項技術者應理解,在不脫離如由隨附申請專利範圍界定的本發明之真實精神及範疇的情況下,可進行各種改變且可代用等效者。該等說明可未必按比例繪製。在本發明中之技藝性轉譯與實際裝置之間可歸因於製造程序及容許度而存在差別。本發明可存在未被特定地說明之其他實施例。本說明書及圖式應被視為說明性的而非限制性的。可進行修改以使特定情形、材料、物質組合、方法或程序適應於本發明之目標、精神及範疇。所有此等修改意欲在此處隨附之申請專利範圍之範疇內。雖然已參考以特定次序所執行之特定操作而描述本文所揭示之方法,但應理解,在不脫離本發明之教示的情況下,可對此等操作進行組合、再分或重新排序以形成等效方法。因此,除非本文中有特定指示,否則該等操作之次序及分組不為本發明之限制。 The present invention has been described and illustrated with reference to the particular embodiments of the invention. It will be understood by those skilled in the art that various changes may be made and the equivalents may be substituted without departing from the true spirit and scope of the invention as defined by the appended claims. The descriptions may not necessarily be drawn to scale. There is a difference between the technical translation in the present invention and the actual device attributable to the manufacturing process and tolerance. Other embodiments of the invention that are not specifically described may exist. The description and drawings are to be regarded as illustrative rather Modifications may be made to adapt a particular situation, material, combination of matter, method or procedure to the objects, spirit and scope of the invention. All such modifications are intended to be within the scope of the appended claims. Although the methods disclosed herein have been described with reference to the specific operations performed in a particular order, it is understood that such operations can be combined, sub-divided or re-ordered to form, etc. without departing from the teachings of the present invention. Effective method. Therefore, the order and grouping of such operations are not limiting of the invention unless specifically indicated herein.

1‧‧‧半導體導線架封裝 1‧‧‧Semiconductor lead frame package

11‧‧‧外部散熱片 11‧‧‧External heat sink

12‧‧‧晶粒墊 12‧‧‧ die pad

14‧‧‧引腳 14‧‧‧ pin

16‧‧‧肋狀物 16‧‧‧ ribs

18‧‧‧固定元件 18‧‧‧Fixed components

22‧‧‧絕緣本體 22‧‧‧Insulated body

23‧‧‧中心開口 23‧‧‧Center opening

24‧‧‧上部中心開口 24‧‧‧ upper center opening

25‧‧‧上部內側壁 25‧‧‧ upper inner side wall

26‧‧‧下部中心開口 26‧‧‧ Lower central opening

27‧‧‧下部內側壁 27‧‧‧ Lower inner side wall

28‧‧‧LED晶粒 28‧‧‧LED dies

30‧‧‧導線 30‧‧‧Wire

32‧‧‧封裝物 32‧‧‧Package

50‧‧‧扣件 50‧‧‧fasteners

121‧‧‧頂面 121‧‧‧ top surface

141‧‧‧主要部分 141‧‧‧ main part

142‧‧‧連接部分 142‧‧‧Connected section

143‧‧‧電極部分 143‧‧‧Electrode part

181‧‧‧通孔 181‧‧‧through hole

221‧‧‧頂面 221‧‧‧ top surface

222‧‧‧底面 222‧‧‧ bottom

223‧‧‧凹口 223‧‧‧ notch

224‧‧‧側表面 224‧‧‧ side surface

281‧‧‧光轉換層 281‧‧‧Light conversion layer

Claims (20)

一種半導體封裝結構,其包含:一晶粒墊(Die Pad);一引腳(Lead);一晶粒,其設置於該晶粒墊之一頂面上且電連接至該引腳之一主要部分,該主要部分設置於該晶粒墊上方;及一絕緣本體,其部分地封裝該晶粒墊及該引腳,該引腳之一電極部分摺疊至該絕緣本體之一頂面上,該電極部分平行於該主要部分,其中該晶粒墊之一底面係自該絕緣本體之一底面曝露。 A semiconductor package structure comprising: a die pad; a lead; a die disposed on a top surface of the die pad and electrically connected to one of the pins The main portion is disposed above the die pad; and an insulative body partially encapsulating the die pad and the pin, and one of the pin portions is folded to a top surface of the insulative body, The electrode portion is parallel to the main portion, wherein a bottom surface of the die pad is exposed from a bottom surface of the insulating body. 如請求項1之半導體封裝結構,其中該晶粒墊之該底面係與該絕緣本體之該底面共平面。 The semiconductor package structure of claim 1, wherein the bottom surface of the die pad is coplanar with the bottom surface of the insulating body. 如請求項1之半導體封裝結構,其中該引腳之該主要部分所處的一平面係與該晶粒墊所處的一平面隔開。 The semiconductor package structure of claim 1, wherein a plane in which the main portion of the pin is located is spaced apart from a plane in which the die pad is located. 如請求項1之半導體封裝結構,其中該引腳之該主要部分之一底面係由該絕緣本體覆蓋。 The semiconductor package structure of claim 1, wherein a bottom surface of one of the main portions of the pin is covered by the insulating body. 如請求項1之半導體封裝結構,其進一步包含一散熱片,該晶粒墊之該底面直接地接觸該散熱片。 The semiconductor package structure of claim 1, further comprising a heat sink, the bottom surface of the die pad directly contacting the heat sink. 如請求項5之半導體封裝結構,其進一步包含一固定元件,該固定元件連接至該晶粒墊且緊固至該散熱片,其中該絕緣本體之該底面、該晶粒墊之該底面及該固定元件之一底面共平面且直接地接觸該散熱片。 The semiconductor package structure of claim 5, further comprising a fixing component coupled to the die pad and fastened to the heat sink, wherein the bottom surface of the insulating body, the bottom surface of the die pad, and the One of the bottom surfaces of the fixing member is coplanar and directly contacts the heat sink. 如請求項1之半導體封裝結構,其中該引腳進一步包含一連接部分,該連接部分垂直於該主要部分及該電極部分。 The semiconductor package structure of claim 1, wherein the pin further comprises a connection portion perpendicular to the main portion and the electrode portion. 如請求項1之半導體封裝結構,其中該絕緣本體包含一下部內側 壁,該下部內側壁延伸於該引腳之該主要部分與該晶粒墊之間,該下部內側壁界定一下部中心開口,該下部中心開口曝露該晶粒墊。 The semiconductor package structure of claim 1, wherein the insulating body comprises a lower inner side a wall, the lower inner sidewall extending between the main portion of the lead and the die pad, the lower inner sidewall defining a lower central opening that exposes the die pad. 如請求項8之半導體封裝結構,其中該絕緣本體包含一上部內側壁,該上部內側壁延伸於該絕緣本體之該頂面與該引腳之該主要部分之間,該上部內側壁界定一上部中心開口,該上部中心開口曝露該引腳之該主要部分。 The semiconductor package structure of claim 8, wherein the insulative housing comprises an upper inner sidewall extending between the top surface of the insulative housing and the main portion of the lead, the upper inner sidewall defining an upper portion a central opening that exposes the major portion of the pin. 如請求項1之半導體封裝結構,其中該絕緣本體進一步包含一上部中心開口及一下部中心開口,該上部中心開口曝露該引腳之該主要部分,該下部中心開口曝露該晶粒墊,該上部中心開口及該下部中心開口界定該絕緣本體之一中心開口,該結構進一步包含:一封裝物,其設置於該中心開口中。 The semiconductor package structure of claim 1, wherein the insulative housing further comprises an upper central opening and a lower central opening, the upper central opening exposing the main portion of the lead, the lower central opening exposing the die pad, the upper portion The central opening and the lower central opening define a central opening of the insulative body, the structure further comprising: an encapsulation disposed in the central opening. 如請求項10之半導體封裝結構,其中該封裝物之一頂面係與該絕緣本體之該頂面共平面。 The semiconductor package structure of claim 10, wherein a top surface of the package is coplanar with the top surface of the insulating body. 一種半導體封裝結構,其包含:一晶粒墊;一引腳,其包含:一主要部分;一連接部分;及一電極部分;一晶粒,其設置於該晶粒墊上且電連接至引腳之該主要部分;及一絕緣本體,其部分地封裝該晶粒墊及該引腳之該主要部分,該絕緣本體包含:一頂面,其具有設置於其上之該電極部分; 一底面;及一側表面,其延伸於該頂面與該底面之間,該側表面包含一凹口,該連接部分設置於該凹口中。 A semiconductor package structure comprising: a die pad; a pin comprising: a main portion; a connection portion; and an electrode portion; a die disposed on the die pad and electrically connected to the pin The main portion; and an insulative housing partially encapsulating the die pad and the main portion of the pin, the insulative body comprising: a top surface having the electrode portion disposed thereon; a bottom surface; and a side surface extending between the top surface and the bottom surface, the side surface including a notch, the connecting portion being disposed in the recess. 如請求項12之半導體封裝結構,其中該連接部分係自該側表面凹入。 The semiconductor package structure of claim 12, wherein the connecting portion is recessed from the side surface. 如請求項12之半導體封裝結構,其中該凹口包含一側壁,該連接部分設置於該側壁上。 The semiconductor package structure of claim 12, wherein the recess comprises a sidewall, the connecting portion being disposed on the sidewall. 如請求項12之半導體封裝結構,其中該連接部分垂直於該主要部分及該電極部分,且該主要部分平行於該電極部分。 The semiconductor package structure of claim 12, wherein the connecting portion is perpendicular to the main portion and the electrode portion, and the main portion is parallel to the electrode portion. 如請求項12之半導體封裝結構,其中該絕緣本體進一步包含一中心開口,該中心開口包含:一下部中心開口,其曝露該晶粒墊;及一上部中心開口,其曝露該引腳之該主要部分。 The semiconductor package structure of claim 12, wherein the insulative housing further comprises a central opening, the central opening comprising: a lower central opening exposing the die pad; and an upper central opening exposing the main portion of the pin section. 如請求項16之半導體封裝結構,其中該晶粒為一發光二極體(LED)晶粒,該結構進一步包含一封裝物,該封裝物位於該中心開口中且封裝該LED晶粒。 The semiconductor package structure of claim 16, wherein the die is a light emitting diode (LED) die, the structure further comprising an encapsulation in the central opening and encapsulating the LED die. 一種製造半導體封裝結構之方法,其包含:部分地封裝一晶粒墊及一引腳於一絕緣本體中,其中該晶粒墊之一底面係自該絕緣本體之一底面曝露;附接一晶粒至該晶粒墊之一頂面;將一導線自該晶粒接合至該引腳之一主要部分;及將該引腳之一連接部分摺疊於該絕緣本體之一凹口之一側壁上。 A method of fabricating a semiconductor package structure, comprising: partially packaging a die pad and a pin in an insulative body, wherein a bottom surface of the die pad is exposed from a bottom surface of the insulative body; attaching a crystal Graining to a top surface of the die pad; bonding a wire from the die to a main portion of the pin; and folding a connecting portion of the pin to a sidewall of one of the recesses of the insulating body . 如請求項18之方法,其進一步包含:將該引腳之一電極部分摺疊至該絕緣本體之一頂面上。 The method of claim 18, further comprising: folding one of the electrode portions of the pin to a top surface of the insulative body. 如請求項19之方法,其中該絕緣本體之該底面及該晶粒墊之該 底面共平面,該方法進一步包含:將一散熱片直接地接觸該絕緣本體之該底面及該晶粒墊之該底面。 The method of claim 19, wherein the bottom surface of the insulating body and the die pad The bottom surface is coplanar, and the method further comprises: directly contacting a heat sink to the bottom surface of the insulating body and the bottom surface of the die pad.
TW103119422A 2014-06-04 2014-06-04 Semiconductor lead frame package and led package TWI549323B (en)

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TWM442581U (en) * 2012-05-22 2012-12-01 I Chiun Precision Ind Co Ltd Led with electrostatic protection mechanism

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TWM384415U (en) * 2010-02-12 2010-07-11 Forward Electronics Co Ltd Supporting plate piece structure for LED
TW201203627A (en) * 2010-07-15 2012-01-16 Lextar Electronics Corp Light emitting diode and method for forming supporting frame thereof and improved structure of the supporting frame
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