TWI538572B - Circuit board and method for manufacturing same - Google Patents

Circuit board and method for manufacturing same Download PDF

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Publication number
TWI538572B
TWI538572B TW102136656A TW102136656A TWI538572B TW I538572 B TWI538572 B TW I538572B TW 102136656 A TW102136656 A TW 102136656A TW 102136656 A TW102136656 A TW 102136656A TW I538572 B TWI538572 B TW I538572B
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layer
conductive
insulating layer
circuit board
polymer film
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TW102136656A
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Chinese (zh)
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TW201517701A (en
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何明展
胡先欽
沈芾雲
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臻鼎科技股份有限公司
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0707Shielding
    • H05K2201/0715Shielding provided by an outer layer of PCB

Description

電路板及其製作方法 Circuit board and manufacturing method thereof

本發明涉及電路板製作技術,尤其涉及一種電路板及其製作方法。 The invention relates to a circuit board manufacturing technology, in particular to a circuit board and a manufacturing method thereof.

由於柔性電路板的輕薄化要求,當內部線路作為對外信號傳輸的信號線路時,通常需要使用導電銀箔(EMI shielding film)覆蓋於柔性電路板的外層,以防止外界電磁干擾而造成的訊號損失。 Due to the thin and light requirements of the flexible circuit board, when the internal circuit is used as the signal line for external signal transmission, it is usually required to cover the outer layer of the flexible circuit board with an EMI shielding film to prevent signal loss caused by external electromagnetic interference.

導電銀箔通常為四層結構,即依次為保護膜、金屬薄膜、導電膠及離型膜。在進行貼合之前,需要將離型膜去除,從而將導電膠與柔性電路板相互結合。在得到的產品中,為了使得金屬薄膜能夠與柔性電路板緊密結合,需要先將導電銀箔貼合於電路板之後進行熱壓合,這樣,增加了電路板製作的時間。並且,導電銀箔較脆弱,在貼合過程中容易產生報廢,從而增加電路板的製作成本。進一步的,導電銀箔的價格較昂貴,從而造成電路板的生產成本較高。 The conductive silver foil is usually a four-layer structure, that is, a protective film, a metal film, a conductive paste, and a release film in this order. Before the bonding, the release film needs to be removed to bond the conductive paste and the flexible circuit board to each other. In the obtained product, in order to enable the metal film to be tightly combined with the flexible circuit board, it is necessary to first heat-bond the conductive silver foil to the circuit board, thereby increasing the time for manufacturing the circuit board. Moreover, the conductive silver foil is relatively fragile, and it is easy to be scrapped during the bonding process, thereby increasing the manufacturing cost of the circuit board. Further, the price of the conductive silver foil is relatively expensive, resulting in a high production cost of the circuit board.

因此,有必要提供一種電路板及其製作方法,無需使用導電銀箔也能實現對信號線路的電磁遮罩作用。 Therefore, it is necessary to provide a circuit board and a method of fabricating the same that can achieve electromagnetic shielding of signal lines without using conductive silver foil.

一種電路板,其包括依次設置的電路基板、導電性高分子膜層及鍍銅遮罩層。所述電路基板包括導電線路層及第三絕緣層。所述 導電線路層及導電性高分子膜層形成於第三絕緣層的相對兩側。所述導電線路層包括信號線路及接地線路。所述鍍銅遮罩層通過電鍍方式形成於導電高分子膜層表面。所述第三絕緣層內形成有第二導電孔。所述接地線路通過所述第二導電孔與鍍銅遮罩層電導通。所述電路基板還包括第二絕緣層及接地導電層。所述接地導電層形成於第二絕緣層和第三絕緣層之間。所述第二絕緣層內形成有第一導電孔。所述接地導電層與接地線路通過所述第一導電孔相互電連通。 A circuit board comprising a circuit board, a conductive polymer film layer and a copper plating mask layer which are sequentially disposed. The circuit substrate includes a conductive circuit layer and a third insulating layer. Said The conductive circuit layer and the conductive polymer film layer are formed on opposite sides of the third insulating layer. The conductive circuit layer includes a signal line and a ground line. The copper plating mask layer is formed on the surface of the conductive polymer film layer by electroplating. A second conductive hole is formed in the third insulating layer. The grounding line is electrically connected to the copper-plated mask layer through the second conductive hole. The circuit substrate further includes a second insulating layer and a ground conductive layer. The ground conductive layer is formed between the second insulating layer and the third insulating layer. A first conductive hole is formed in the second insulating layer. The ground conductive layer and the ground line are in electrical communication with each other through the first conductive hole.

一種電路板的製作方法,包括步驟:提供電路基板,所述電路基板包括相接觸的導電線路層及第三絕緣層,所述導電線路層包括信號線路及接地線路,所述第三絕緣層內形成有多個開孔,所述接地線路從所述開孔露出;在所述第三絕緣層的表面及開孔的內側壁形成導電性高分子膜層;以及在所述導電性高分子膜層表面及從所述開孔露出的接地線路表面通過電鍍的方式形成鍍銅遮罩層及第二導電孔,所述接地線路通過所述第二導電孔與鍍銅遮罩層相互電導通。所述電路基板還包括第二絕緣層及接地導電層。所述接地導電層形成於第二絕緣層和第三絕緣層之間。所述第二絕緣層內形成有第一導電孔。所述接地導電層與接地線路通過所述第一導電孔相互電連通。 A method of manufacturing a circuit board, comprising the steps of: providing a circuit substrate, wherein the circuit substrate comprises a conductive circuit layer and a third insulating layer, wherein the conductive circuit layer comprises a signal line and a ground line, and the third insulating layer is Forming a plurality of openings, the ground line is exposed from the opening; forming a conductive polymer film layer on a surface of the third insulating layer and an inner sidewall of the opening; and the conductive polymer film The surface of the layer and the surface of the grounding line exposed from the opening are formed by electroplating to form a copper-plated mask layer and a second conductive hole, and the grounding line is electrically connected to the copper-plated mask layer through the second conductive hole. The circuit substrate further includes a second insulating layer and a ground conductive layer. The ground conductive layer is formed between the second insulating layer and the third insulating layer. A first conductive hole is formed in the second insulating layer. The ground conductive layer and the ground line are in electrical communication with each other through the first conductive hole.

本技術方案提供的電路板及其製作方法,通過對絕緣層的表面形成導電性高分子層,然後通過電鍍的方式形成接地導電層。所述接地導電層可以對信號線路起到電磁遮罩的作用,從而可以防止外界對信號線路產生的電磁干擾。相比於先前技術中採用貼合導電銀箔形成電磁遮罩層,能夠有效地縮短電路板製作的流程,降 低電路板製作成本,並且提高電路板製作的良率。 The circuit board and the manufacturing method thereof provided by the technical solution form a conductive polymer layer by forming a conductive polymer layer on the surface of the insulating layer, and then forming a ground conductive layer by electroplating. The grounding conductive layer can act as an electromagnetic shielding on the signal line, thereby preventing external electromagnetic interference generated on the signal line. Compared with the prior art, the conductive conductive silver foil is used to form the electromagnetic shielding layer, which can effectively shorten the process of circuit board fabrication. Low board manufacturing costs and improved board yield.

110‧‧‧電路基板 110‧‧‧ circuit board

101‧‧‧電磁遮罩區 101‧‧‧Electromagnetic mask area

102‧‧‧普通區 102‧‧‧General area

111‧‧‧第一絕緣層 111‧‧‧First insulation

112‧‧‧接地導電層 112‧‧‧Grounding conductive layer

113‧‧‧第二絕緣層 113‧‧‧Second insulation

1131‧‧‧第一導電孔 1131‧‧‧first conductive hole

114‧‧‧導電線路層 114‧‧‧ Conductive circuit layer

1141‧‧‧信號線路 1141‧‧‧Signal line

1142‧‧‧接地線路 1142‧‧‧ Grounding circuit

115‧‧‧第三絕緣層 115‧‧‧ third insulation

1151‧‧‧開孔 Opening 1151‧‧

1152‧‧‧第二導電孔 1152‧‧‧Second conductive hole

120‧‧‧導電性高分子膜層 120‧‧‧ Conductive polymer film

130‧‧‧鍍銅遮罩層 130‧‧‧copper-coated mask

140‧‧‧防焊層 140‧‧‧ solder mask

100‧‧‧電路板 100‧‧‧ boards

圖1係本技術方案實施例提供的電路基板的俯視圖。 1 is a top plan view of a circuit substrate provided by an embodiment of the present technical solution.

圖2係圖1沿II-II線的剖面示意圖。 Figure 2 is a schematic cross-sectional view taken along line II-II of Figure 1.

圖3係圖2的電路基板上形成導電性高分子膜層後的剖面示意圖。 3 is a schematic cross-sectional view showing a conductive polymer film layer formed on the circuit board of FIG. 2.

圖4係圖3的導電性高分子膜層表面性成鍍銅遮罩層後的剖面示意圖。 4 is a schematic cross-sectional view showing the surface of the conductive polymer film layer of FIG. 3 as a copper plating mask layer.

圖5係圖4的鍍銅遮罩層表面形成防焊層後得到電路板的剖面示意圖。 FIG. 5 is a schematic cross-sectional view showing a circuit board obtained by forming a solder resist layer on the surface of the copper-plated mask layer of FIG. 4. FIG.

下面將結合附圖及實施例對本技術方案提供的電路板及其製作方法作進一步的詳細說明。 The circuit board provided by the technical solution and the manufacturing method thereof will be further described in detail below with reference to the accompanying drawings and embodiments.

本技術方案實施例提供的電路板的製作方法包括以下步驟: The manufacturing method of the circuit board provided by the embodiment of the technical solution includes the following steps:

第一步,請一併參閱圖1及圖2,提供電路基板110。 In the first step, please refer to FIG. 1 and FIG. 2 together to provide a circuit substrate 110.

本實施例中,電路基板110為製作形成有導電線路的電路板。電路基板110包括依次設置的第一絕緣層111、接地導電層112、第二絕緣層113、導電線路層114及第三絕緣層115。 In the present embodiment, the circuit substrate 110 is a circuit board on which a conductive line is formed. The circuit substrate 110 includes a first insulating layer 111, a ground conductive layer 112, a second insulating layer 113, a conductive wiring layer 114, and a third insulating layer 115 which are sequentially disposed.

電路基板110具有一電磁遮罩形成區101及除該電磁遮罩形成區101外的普通區102,該電磁遮罩形成區101用於形成電磁遮罩結構。 The circuit substrate 110 has an electromagnetic mask forming region 101 and a common region 102 other than the electromagnetic mask forming region 101 for forming an electromagnetic mask structure.

在所述電磁遮罩區101內,導電線路層114包括信號線路1141及接地線路1142。所述接地線路1142圍繞所述信號線路1141。所述第 二絕緣層113內形成第一導電孔1131。接地線路1142通過所述第一導電孔1131與接地導電層112相互電連接。所述第三絕緣層115內形成有多個開孔1151,使得位於信號線路1141周圍的接地線路1142從所述開孔1151露出。 In the electromagnetic shielding area 101, the conductive circuit layer 114 includes a signal line 1141 and a ground line 1142. The ground line 1142 surrounds the signal line 1141. The first A first conductive via 1131 is formed in the second insulating layer 113. The ground line 1142 is electrically connected to the ground conductive layer 112 through the first conductive via 1131. A plurality of openings 1151 are formed in the third insulating layer 115 such that the ground line 1142 located around the signal line 1141 is exposed from the opening 1151.

本步驟中,所述導電線路層114及第一導電孔1131可以採用先前技術中導電線路及導電孔的製作方法製作形成。所述開孔1151可以採用鐳射燒蝕的方式形成。 In this step, the conductive circuit layer 114 and the first conductive via 1131 can be formed by using the prior art conductive lines and conductive holes. The opening 1151 can be formed by laser ablation.

在形成開孔1151的過程中,部分原來開孔部分的材料殘留在開孔1151內,或者吸附於開孔1151的內壁,形成膠渣。在形成開孔1151之後,還可以進一步包括對電路基板110進行除膠渣處理。即採用等離子體對電路基板110進行處理,使得開孔1151內的膠渣被去除。 In the process of forming the opening 1151, a portion of the material of the original opening portion remains in the opening 1151, or is adsorbed to the inner wall of the opening 1151 to form a slag. After forming the opening 1151, the method further includes performing desmear treatment on the circuit substrate 110. That is, the circuit substrate 110 is processed by plasma so that the slag in the opening 1151 is removed.

第二步,請參閱圖3,在電磁遮罩區101內的所述第三絕緣層115的表面及開孔1151的內側壁形成導電性高分子膜層120。 In the second step, referring to FIG. 3, the conductive polymer film layer 120 is formed on the surface of the third insulating layer 115 and the inner sidewall of the opening 1151 in the electromagnetic mask region 101.

所述導電性高分子膜層120的形成可以採用如下方法:首先,將所述第三絕緣層115的表面及開孔1151的內側壁浸於二氧化錳溶液中,使得第三絕緣層115的表面及開孔1151的內側壁吸附有二氧化錳。可以理解的是,在將所述第三絕緣層115的表面及開孔1151的內側壁浸於二氧化錳溶液之前,還可以進一步包括對所述第三絕緣層115的表面及開孔1151進行清洗等處理,使得所述第三絕緣層115的表面及開孔1151清潔。 The conductive polymer film layer 120 can be formed by first immersing the surface of the third insulating layer 115 and the inner sidewall of the opening 1151 in the manganese dioxide solution, so that the third insulating layer 115 The surface and the inner side wall of the opening 1151 are adsorbed with manganese dioxide. It can be understood that before the surface of the third insulating layer 115 and the inner sidewall of the opening 1151 are immersed in the manganese dioxide solution, the surface of the third insulating layer 115 and the opening 1151 may be further included. The treatment such as cleaning causes the surface of the third insulating layer 115 and the opening 1151 to be cleaned.

然後,將所述電路基板110浸泡於導電性高分子單體內,從而在第三絕緣層115的表面及開孔1151的內側壁形成導電性高分子膜 層120。 Then, the circuit board 110 is immersed in the conductive polymer monomer to form a conductive polymer film on the surface of the third insulating layer 115 and the inner side wall of the opening 1151. Layer 120.

當所述電路基板110浸泡於導電性高分子單體內時,二氧化錳作為催化劑,使得導電性高分子單體發生聚合,從而在第三絕緣層115的表面及開孔1151的內側壁形成導電性高分子膜層120。所述導電性高分子單體為聚合後形成的高分子具有導電性的單體。所述導電性高分子單體具體可以為苯胺、吡咯或噻吩等,也可以為苯胺的衍生物、吡咯衍生物或者噻吩衍生物等,如3,4-二氧乙撐噻吩、2,5-二甲氧苯胺等。導電性高分子單體通常為液體。優選為3,4-二氧乙撐噻吩。 When the circuit substrate 110 is immersed in the conductive polymer monomer, the manganese dioxide is used as a catalyst to polymerize the conductive polymer monomer, thereby forming a conductive layer on the surface of the third insulating layer 115 and the inner sidewall of the opening 1151. Polymer film layer 120. The conductive polymer monomer is a monomer having conductivity in a polymer formed after polymerization. The conductive polymer monomer may specifically be aniline, pyrrole or thiophene, or may be a derivative of aniline, a pyrrole derivative or a thiophene derivative, such as 3,4-dioxyethylenethiophene, 2,5- Dimethoxyaniline and the like. The conductive polymer monomer is usually a liquid. Preference is given to 3,4-dioxyethylenethiophene.

導電性高分子膜層120可以為聚苯胺、聚吡咯或聚噻吩。或者苯胺的衍生物、吡咯衍生物或者噻吩衍生物的聚合物。如聚3,4-乙撐二氧噻吩或者聚2,5-二甲氧苯胺等。 The conductive polymer film layer 120 may be polyaniline, polypyrrole or polythiophene. Or a derivative of an aniline derivative, a pyrrole derivative or a thiophene derivative. Such as poly 3,4-ethylenedioxythiophene or poly 2,5-dimethoxyaniline.

由於導電性高分子膜層120形成於第三絕緣層115的表面及開孔1151的內側壁,且為有機材料,其於第三絕緣層115的表面及開孔1151的內側壁的結合力較大,而不會形成於開孔1151露出的接地線路1142的表面。 Since the conductive polymer film layer 120 is formed on the surface of the third insulating layer 115 and the inner sidewall of the opening 1151 and is an organic material, the bonding force between the surface of the third insulating layer 115 and the inner sidewall of the opening 1151 is higher. Large, but not formed on the surface of the ground line 1142 exposed by the opening 1151.

所述導電性高分子膜層120具有導電性,其導電率約為5千歐姆每英寸。所述導電性高分子膜層120的厚度為100納米至500納米。 The conductive polymer film layer 120 has electrical conductivity and has a conductivity of about 5 kilohms per inch. The conductive polymer film layer 120 has a thickness of 100 nm to 500 nm.

第三步,請參閱圖4,在電磁遮罩區101對應的所述導電性高分子膜層120表面電鍍金屬形成鍍銅遮罩層130,並同時在開孔1151內電鍍金屬形成第二導電孔1152,所述接地線路1142通過第二導電孔1152與鍍銅遮罩層130相互電連接。 In the third step, referring to FIG. 4, the surface of the conductive polymer film layer 120 corresponding to the electromagnetic shielding region 101 is plated with metal to form a copper-plated mask layer 130, and at the same time, a metal is plated in the opening 1151 to form a second conductive layer. The hole 1152 is electrically connected to the copper plating mask layer 130 through the second conductive hole 1152.

將所述電路基板110浸泡於可溶性金屬鹽溶液中進行電鍍,由於 聚合後得到的導電性高分子具有氧化/還原狀態轉化的特性,在所述導電性高分子氧化/還原狀態轉化過程中,可以釋放出自由電子,從而可以使得可溶性金屬鹽溶液中的金屬離子被還原為金屬單質,在所述導電性高分子膜層120表面形成金屬層。本實施例中,以硫酸銅溶液為例來進行說明。當將所述電路基板110浸泡於硫酸銅溶液後,在所述導電性高分子膜層120表面還原形成銅。 Soaking the circuit substrate 110 in a soluble metal salt solution for electroplating, The conductive polymer obtained after the polymerization has the property of being converted in an oxidation/reduction state, and during the oxidation/reduction state conversion of the conductive polymer, free electrons can be released, so that the metal ions in the soluble metal salt solution can be made The metal element is reduced to a simple metal, and a metal layer is formed on the surface of the conductive polymer film layer 120. In the present embodiment, a copper sulfate solution will be described as an example. After the circuit board 110 is immersed in a copper sulfate solution, copper is reduced on the surface of the conductive polymer film layer 120.

導電性高分子膜層120具有導電性,還原形成於導電性高分子膜層120金屬能夠增加導電性高分子膜層120的導電性,因此,能夠快速的在開孔1151內部及導電性高分子膜層120形成電鍍金屬層,所述電鍍金屬層的材料可以為銅,從而得到鍍銅遮罩層130及第二導電孔1152。所述鍍銅遮罩層130的厚度為5微米至15微米。 The conductive polymer film layer 120 has electrical conductivity, and reduction of the metal formed on the conductive polymer film layer 120 can increase the conductivity of the conductive polymer film layer 120. Therefore, the conductive polymer film layer 120 can be quickly formed inside the opening 1151 and the conductive polymer. The film layer 120 forms a plated metal layer, and the material of the plated metal layer may be copper, thereby obtaining a copper plated mask layer 130 and a second conductive hole 1152. The copper-plated mask layer 130 has a thickness of 5 micrometers to 15 micrometers.

第四步,請參閱圖5,在所述鍍銅遮罩層130及第二導電孔1152表面形成防焊層140,得到電路板100。 In the fourth step, referring to FIG. 5, a solder resist layer 140 is formed on the surface of the copper plating mask layer 130 and the second conductive via 1152 to obtain the circuit board 100.

所述防焊層140可以通過印刷油墨的方式形成。所述防焊層140的厚度為2微米至10微米。 The solder resist layer 140 can be formed by printing ink. The solder resist layer 140 has a thickness of 2 micrometers to 10 micrometers.

請參閱圖5,本技術方案還提供一種採用上述方法製作形成的電路板100,所述電路板100包括依次設置的電路基板110、導電性高分子膜層120、鍍銅遮罩層130及防焊層140。 Referring to FIG. 5 , the technical solution further provides a circuit board 100 formed by the above method. The circuit board 100 includes a circuit board 110 , a conductive polymer film layer 120 , a copper plating mask layer 130 , and an anti-static layer . Solder layer 140.

電路基板110包括依次設置的第一絕緣層111、接地導電層112、第二絕緣層113、第一導電線路層114及第三絕緣層115。第一導電線路層114包括信號線路1141及接地線路1142。所述接地線路1142圍繞所述信號線路1141。所述第二絕緣層113內形成第一導 電孔1131。接地線路1142通過所述第一導電孔1131與接地導電層112相互電連接。所述第三絕緣層115內形成有第二導電孔1152。 The circuit substrate 110 includes a first insulating layer 111, a ground conductive layer 112, a second insulating layer 113, a first conductive wiring layer 114, and a third insulating layer 115 which are sequentially disposed. The first conductive circuit layer 114 includes a signal line 1141 and a ground line 1142. The ground line 1142 surrounds the signal line 1141. Forming a first guide in the second insulating layer 113 Electrical hole 1131. The ground line 1142 is electrically connected to the ground conductive layer 112 through the first conductive via 1131. A second conductive via 1152 is formed in the third insulating layer 115.

所述電路基板110包括電磁遮罩區101及除電磁遮罩區101之外的普通區102。導電性高分子膜層120、鍍銅遮罩層130及防焊層140均形成於電磁遮罩區101。所述鍍銅遮罩層130通過第二導電孔1152與接地線路1142相互電連接。 The circuit substrate 110 includes an electromagnetic mask region 101 and a common region 102 other than the electromagnetic mask region 101. The conductive polymer film layer 120, the copper plating mask layer 130, and the solder resist layer 140 are all formed in the electromagnetic mask region 101. The copper-plated mask layer 130 is electrically connected to the ground line 1142 via the second conductive via 1152.

所述導電性高分子膜層120可以為聚苯胺、聚吡咯或聚噻吩。或者苯胺的衍生物、吡咯衍生物或者噻吩衍生物的聚合物。如聚3,4-乙撐二氧噻吩或者聚2,5-二甲氧苯胺等。導電性高分子膜層120形成於第三絕緣層115的表面及第二導電孔1152內。 The conductive polymer film layer 120 may be polyaniline, polypyrrole or polythiophene. Or a derivative of an aniline derivative, a pyrrole derivative or a thiophene derivative. Such as poly 3,4-ethylenedioxythiophene or poly 2,5-dimethoxyaniline. The conductive polymer film layer 120 is formed on the surface of the third insulating layer 115 and in the second conductive hole 1152.

所述第二導電孔1152內的導電金屬及鍍銅遮罩層130同時通過電鍍金屬形成。 The conductive metal and the copper-plated mask layer 130 in the second conductive via 1152 are simultaneously formed by plating metal.

所述導電性高分子膜層120的厚度為100納米至500納米。所述鍍銅遮罩層130的厚度為5微米至15微米。所述防焊層140的厚度為2微米至10微米。 The conductive polymer film layer 120 has a thickness of 100 nm to 500 nm. The copper-plated mask layer 130 has a thickness of 5 micrometers to 15 micrometers. The solder resist layer 140 has a thickness of 2 micrometers to 10 micrometers.

所述接地導電層112與鍍銅遮罩層130可以為片狀導體,信號線路1141位於接地導電層112與鍍銅遮罩層130之間。接地導電層112與鍍銅遮罩層130的面積均大於信號線路1141分佈的區域,並且均與接地線路1142相互電連接,從而可以起到對信號線路1141電磁遮罩作用。可以理解的是,也可以根據需要,所述電路板100也可以不包括接地導電層112,僅在信號線路1141的一側形成鍍銅遮罩層130。 The ground conductive layer 112 and the copper plating mask layer 130 may be a sheet conductor, and the signal line 1141 is located between the ground conductive layer 112 and the copper plating mask layer 130. The areas of the grounding conductive layer 112 and the copper-plated mask layer 130 are both larger than the area where the signal line 1141 is distributed, and are electrically connected to the ground line 1142 so as to function as an electromagnetic mask for the signal line 1141. It can be understood that the circuit board 100 may also include the grounding conductive layer 112 as needed, and only the copper plating mask layer 130 is formed on one side of the signal line 1141.

本技術方案提供的電路板及其製作方法,通過對絕緣層的表面形 成導電性高分子層,然後通過電鍍的方式形成接地導電層。所述接地導電層可以對信號線路起到電磁遮罩的作用,從而可以防止外界對信號線路產生的電磁干擾。相比於先前技術中採用貼合導電銀箔形成電磁遮罩層,能夠有效地縮短電路板製作的流程,降低電路板製作成本,並且提高電路板製作的良率。 The circuit board provided by the technical solution and the manufacturing method thereof, the surface shape of the insulating layer A conductive polymer layer is formed, and then a ground conductive layer is formed by electroplating. The grounding conductive layer can act as an electromagnetic shielding on the signal line, thereby preventing external electromagnetic interference generated on the signal line. Compared with the prior art, the use of the laminated conductive silver foil to form the electromagnetic mask layer can effectively shorten the process of circuit board fabrication, reduce the manufacturing cost of the circuit board, and improve the yield of the circuit board.

綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士爰依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

111‧‧‧第一絕緣層 111‧‧‧First insulation

112‧‧‧接地導電層 112‧‧‧Grounding conductive layer

113‧‧‧第二絕緣層 113‧‧‧Second insulation

1131‧‧‧第一導電孔 1131‧‧‧first conductive hole

114‧‧‧導電線路層 114‧‧‧ Conductive circuit layer

1141‧‧‧信號線路 1141‧‧‧Signal line

1142‧‧‧接地線路 1142‧‧‧ Grounding circuit

115‧‧‧第三絕緣層 115‧‧‧ third insulation

1152‧‧‧第二導電孔 1152‧‧‧Second conductive hole

120‧‧‧導電性高分子膜層 120‧‧‧ Conductive polymer film

130‧‧‧鍍銅遮罩層 130‧‧‧copper-coated mask

140‧‧‧防焊層 140‧‧‧ solder mask

100‧‧‧電路板 100‧‧‧ boards

Claims (6)

一種電路板,其包括依次設置的電路基板、導電性高分子膜層及鍍銅遮罩層,所述電路基板包括導電線路層及第三絕緣層,所述導電線路層及導電性高分子膜層形成於第三絕緣層的相對兩側,所述導電線路層包括信號線路及接地線路,所述鍍銅遮罩層通過電鍍方式形成於導電高分子膜層表面,所述第三絕緣層內形成有第二導電孔,所述接地線路通過所述第二導電孔與鍍銅遮罩層電導通,所述電路基板還包括第二絕緣層及接地導電層,所述接地導電層形成於第二絕緣層和第三絕緣層之間,所述第二絕緣層內形成有第一導電孔,所述接地導電層與接地線路通過所述第一導電孔相互電連通。 A circuit board comprising a circuit substrate, a conductive polymer film layer and a copper plating mask layer which are sequentially disposed, the circuit substrate comprising a conductive circuit layer and a third insulating layer, the conductive circuit layer and the conductive polymer film The layer is formed on opposite sides of the third insulating layer, the conductive circuit layer includes a signal line and a ground line, and the copper-plated mask layer is formed on the surface of the conductive polymer film layer by electroplating, and the third insulating layer is Forming a second conductive hole, the ground line is electrically connected to the copper-plated mask layer through the second conductive hole, the circuit substrate further includes a second insulating layer and a ground conductive layer, wherein the ground conductive layer is formed on the first Between the second insulating layer and the third insulating layer, a first conductive hole is formed in the second insulating layer, and the ground conductive layer and the ground line are electrically connected to each other through the first conductive hole. 如申請專利範圍第1項所述的電路板,其中,所述導電性高分子膜層的厚度為100納米至500納米,所述鍍銅遮罩層的厚度為5微米至15微米。 The circuit board according to claim 1, wherein the conductive polymer film layer has a thickness of 100 nm to 500 nm, and the copper plating mask layer has a thickness of 5 μm to 15 μm. 如申請專利範圍第1項所述的電路板,其中,還包括防焊層,所述防焊層形成於鍍銅遮罩層的表面,所述防焊層的厚度為2微米至10微米。 The circuit board of claim 1, further comprising a solder resist layer formed on a surface of the copper plating mask layer, the solder resist layer having a thickness of 2 micrometers to 10 micrometers. 一種電路板的製作方法,包括步驟:提供電路基板,所述電路基板包括相接觸的導電線路層及第三絕緣層,所述導電線路層包括信號線路及接地線路,所述第三絕緣層內形成有多個開孔,所述接地線路從所述開孔露出,所述電路基板還包括第二絕緣層及接地導電層,所述接地導電層形成於第二絕緣層和第三絕緣層之間,所述第二絕緣層內形成有第一導電孔,所述接地導電層與接地線路通過所述第一導電孔相互電連通;在所述第三絕緣層的表面及開孔的內側壁形成導電性高分子膜層;以及在所述導電性高分子膜層表面及從所述開孔露出的接地線路表面通過電 鍍的方式形成鍍銅遮罩層及第二導電孔,所述接地線路通過所述第二導電孔與鍍銅遮罩層相互電導通。 A method of manufacturing a circuit board, comprising the steps of: providing a circuit substrate, wherein the circuit substrate comprises a conductive circuit layer and a third insulating layer, wherein the conductive circuit layer comprises a signal line and a ground line, and the third insulating layer is Forming a plurality of openings, the ground line is exposed from the opening, the circuit substrate further includes a second insulating layer and a ground conductive layer, wherein the ground conductive layer is formed on the second insulating layer and the third insulating layer a first conductive hole is formed in the second insulating layer, and the ground conductive layer and the ground line are electrically connected to each other through the first conductive hole; the surface of the third insulating layer and the inner sidewall of the opening Forming a conductive polymer film layer; and passing electricity on a surface of the conductive polymer film layer and a surface of the ground line exposed from the opening The plating method forms a copper plating mask layer and a second conductive hole, and the ground line is electrically connected to the copper plating mask layer through the second conductive hole. 如申請專利範圍第4項所述的電路板的製作方法,其中,形成所述導電性高分子膜層包括步驟:將所述第三絕緣層的表面及開孔的內側壁浸於二氧化錳溶液中,使得第三絕緣層的表面及開孔的內側壁吸附有二氧化錳;以及將所述電路基板浸泡於導電性高分子單體內,從而在第三絕緣層的表面及開孔的內側壁形成導電性高分子膜層。 The method for fabricating a circuit board according to claim 4, wherein the forming the conductive polymer film layer comprises the steps of: immersing the surface of the third insulating layer and the inner sidewall of the opening in manganese dioxide In the solution, the surface of the third insulating layer and the inner sidewall of the opening are adsorbed with manganese dioxide; and the circuit substrate is immersed in the conductive polymer monomer so as to be in the surface of the third insulating layer and in the opening A conductive polymer film layer is formed on the sidewall. 如申請專利範圍第5項所述的電路板的製作方法,其中,所述導電性高分子單體為3,4-二氧乙撐噻吩。 The method for producing a circuit board according to claim 5, wherein the conductive polymer monomer is 3,4-dioxyethylenethiophene.
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