TWI533274B - Display panel - Google Patents

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Publication number
TWI533274B
TWI533274B TW104112443A TW104112443A TWI533274B TW I533274 B TWI533274 B TW I533274B TW 104112443 A TW104112443 A TW 104112443A TW 104112443 A TW104112443 A TW 104112443A TW I533274 B TWI533274 B TW I533274B
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Taiwan
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layer
thermoelectric
display panel
disposed
electrically connected
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TW104112443A
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Chinese (zh)
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TW201638913A (en
Inventor
張正杰
郭庭瑋
顏紹文
陳振彰
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友達光電股份有限公司
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Priority to TW104112443A priority Critical patent/TWI533274B/en
Priority to CN201510291103.2A priority patent/CN104882074A/en
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Publication of TWI533274B publication Critical patent/TWI533274B/en
Publication of TW201638913A publication Critical patent/TW201638913A/en

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Description

顯示面板 Display panel

本發明係關於一種顯示面板,尤指一種利用熱電模組作為副供電系統可將顯示面板產生的熱轉換成電能並減少耗能的顯示面板。 The present invention relates to a display panel, and more particularly to a display panel that utilizes a thermoelectric module as a secondary power supply system to convert heat generated by a display panel into electrical energy and reduce energy consumption.

近年來,隨著科技的進步,電子產品例如個人數位助理(personal digital assistant,PDA)、行動電話(mobile phone)、智慧型手機(smart phone)與筆記型電腦(notebook,NB)等的使用越來越普遍。當使用者對電子產品的需求日漸提升,在電子產品中扮演重要角色的顯示螢幕/面板(display screen/panel)亦成為設計者關注的焦點。 In recent years, with the advancement of technology, the use of electronic products such as personal digital assistants (PDAs), mobile phones, smart phones, and notebooks (NB) has become more and more The more common it is. As users' demand for electronic products is increasing, display screens/panels, which play an important role in electronic products, have also become the focus of designers.

由於顯示面板內的電子元件在運作時會產生熱,一旦顯示面板內的溫度過高,會造成顯示面板內各電子元件的電性表現衰退。此外,顯示面板的耗電量也是設計的一大考量。因此,提供顯示面板有效的散熱效果以及低耗電的特性,是目前顯示面板發展上的一大課題。 Since the electronic components in the display panel generate heat during operation, once the temperature in the display panel is too high, the electrical performance of each electronic component in the display panel may be degraded. In addition, the power consumption of the display panel is also a major consideration in design. Therefore, providing an effective heat dissipation effect of the display panel and low power consumption is a major issue in the development of the display panel.

本發明之目的之一在於提供一種顯示面板,於顯示面板的顯示區內設置熱電模組,以增加整體的散熱效果與減少整體的耗電量。 One of the objectives of the present invention is to provide a display panel in which a thermoelectric module is disposed in a display area of the display panel to increase the overall heat dissipation effect and reduce overall power consumption.

本發明之一實施例提供一種顯示面板,其包括一基板、一畫素陣列以及一熱電模組。基板包括複數個畫素區。畫素陣列設置於基板上,其中畫素陣列包括複數個驅動元件以及複數個發光元件。驅動元件設置於畫素區 內。發光元件設置於畫素區內並分別與驅動元件電性連接。熱電模組設置於畫素陣列內,其中熱電模組包括一熱端絕緣基材、一冷端絕緣基材及複數個熱電單元,且熱電單元是設置於熱端絕緣基材與冷端絕緣基材之間並且彼此電性連接。 An embodiment of the present invention provides a display panel including a substrate, a pixel array, and a thermoelectric module. The substrate includes a plurality of pixel regions. The pixel array is disposed on the substrate, wherein the pixel array includes a plurality of driving elements and a plurality of light emitting elements. Drive component is set in the pixel area Inside. The illuminating elements are disposed in the pixel area and are electrically connected to the driving elements respectively. The thermoelectric module is disposed in the pixel array, wherein the thermoelectric module comprises a hot end insulating substrate, a cold end insulating substrate and a plurality of thermoelectric units, and the thermoelectric unit is disposed on the hot end insulating substrate and the cold end insulating base The materials are electrically connected to each other.

本發明將熱電模組設置於顯示面板的畫素陣列內,其中熱電模組除了可提供發光元件良好的散熱效果之外,亦可作為副供電系統,將顯示面板產生的熱轉換成電能再利用,因此可減少顯示面板的主電源的負荷。 The thermoelectric module is disposed in the pixel array of the display panel, wherein the thermoelectric module can provide the heat dissipation effect of the light-emitting component, and can also be used as a secondary power supply system to convert the heat generated by the display panel into electrical energy for reuse. Therefore, the load of the main power of the display panel can be reduced.

顯示面板 Display panel

12‧‧‧基板 12‧‧‧Substrate

12P‧‧‧周邊區 12P‧‧‧ surrounding area

12D‧‧‧顯示區 12D‧‧‧ display area

14‧‧‧畫素區 14‧‧‧Photo area

16‧‧‧畫素陣列 16‧‧‧ pixel array

18‧‧‧驅動元件 18‧‧‧Drive components

19‧‧‧半導體層 19‧‧‧Semiconductor layer

20‧‧‧多晶矽通道層 20‧‧‧ Polysilicon channel layer

22‧‧‧重摻雜半導體層 22‧‧‧ heavily doped semiconductor layer

23‧‧‧輕摻雜半導體層 23‧‧‧Lightly doped semiconductor layer

24‧‧‧汲極電極 24‧‧‧汲electrode

26‧‧‧源極電極 26‧‧‧Source electrode

28‧‧‧閘極電極 28‧‧‧gate electrode

30‧‧‧閘極絕緣層 30‧‧‧ gate insulation

32‧‧‧介電層 32‧‧‧Dielectric layer

33‧‧‧保護層 33‧‧‧Protective layer

34‧‧‧緩衝層 34‧‧‧buffer layer

38‧‧‧轉接電極 38‧‧‧Transfer electrode

40‧‧‧冷端絕緣基材 40‧‧‧ Cold end insulating substrate

42‧‧‧第二連接電極 42‧‧‧Second connection electrode

44‧‧‧熱電單元 44‧‧‧Thermal unit

46‧‧‧第一通道層 46‧‧‧first channel layer

48‧‧‧第二通道層 48‧‧‧second channel layer

50‧‧‧絕緣層 50‧‧‧Insulation

52‧‧‧第一連接電極 52‧‧‧First connecting electrode

54‧‧‧熱端絕緣基材 54‧‧‧hot end insulating substrate

56‧‧‧接觸洞 56‧‧‧Contact hole

58‧‧‧熱電模組 58‧‧‧Thermal module

60‧‧‧下電極 60‧‧‧ lower electrode

62‧‧‧圖案化堤壩層 62‧‧‧ patterned dam layer

62A‧‧‧開口 62A‧‧‧ openings

66‧‧‧反射層 66‧‧‧reflective layer

68‧‧‧側壁 68‧‧‧ side wall

72‧‧‧導電黏著層 72‧‧‧ Conductive adhesive layer

74‧‧‧發光元件 74‧‧‧Lighting elements

78‧‧‧第一電極 78‧‧‧First electrode

80‧‧‧第二電極 80‧‧‧second electrode

82‧‧‧P-N二極體層 82‧‧‧P-N diode layer

84‧‧‧填充層 84‧‧‧Filling layer

86‧‧‧上電極 86‧‧‧Upper electrode

88‧‧‧電源模組 88‧‧‧Power Module

90‧‧‧主電源 90‧‧‧Main power supply

92‧‧‧輔助電源 92‧‧‧Auxiliary power supply

第1圖繪示了本發明之顯示面板的功能方塊圖。 FIG. 1 is a functional block diagram of a display panel of the present invention.

第2圖繪示了本發明之顯示面板的畫素區的剖面圖。 Fig. 2 is a cross-sectional view showing a pixel area of the display panel of the present invention.

第3圖至第13圖繪示了本發明之一實施例之製作顯示面板的方法的示意圖。 3 to 13 are schematic views showing a method of fabricating a display panel according to an embodiment of the present invention.

第14圖繪示了本發明之一變化實施例之顯示面板的畫素區的剖面圖。 Figure 14 is a cross-sectional view showing a pixel region of a display panel in accordance with a variant embodiment of the present invention.

為使熟悉本發明所屬技術領域之一般技藝者能更進一步了解本發明,下文特列舉本發明之較佳實施例,並配合所附圖式,詳細說明本發明的構成內容及所欲達成之功效。 The present invention will be further understood by the following detailed description of the preferred embodiments of the invention, .

請參考第1圖與第2圖。第1圖繪示了本發明之顯示面板的功能方塊圖。第2圖繪示了本發明之顯示面板的畫素區的剖面圖。如第1圖所示,本實施例之顯示面板1包括一基板12、一畫素陣列16、一熱電模組58以及一電源模組88。基板12包括一周邊區12P與一顯示區12D。畫素陣列16與熱電模組58設置於基板12的顯示區12D,而電源模組88設置於基板12的 周邊區12P。熱電模組58是與電源模組88電性連接,且熱電模組58產生之電能可提供給電源模組88。電源模組88例如可包括至少一主電源90以及一輔助電源92。主電源90可包括至少一電壓轉換器(例如DC-DC電壓轉換器)與至少一積體電路晶片(IC chip)等,可將電能或訊號傳遞至顯示面板1內各個需要電能或訊號的電子元件。輔助電源92可包括至少一電壓轉換器(例如DC-DC電壓轉換器)與至少一積體電路晶片(IC chip)等,輔助電源92是與熱電模組58電性連接,且輔助電源92也與主電源90電性連接。藉此,當顯示面板1運作時,顯示面板1內的熱可透過熱電模組58轉換成電能,再傳遞至電源模組88中的輔助電源92。透過輔助電源92中的電壓轉換器與積體電路晶片,可對由熱電模組58產生之電流作例如升壓、降壓、負壓或穩壓的動作,以進一步將電能或訊號傳遞給主電源90,或是輔助電源92與主電源90可一起傳遞電能或訊號至顯示面板1內的各電子元件。換言之,顯示面板1內的各電子元件所需要之電能一部分可以由熱電模組58經由輔助電源92提供,藉此主電源90只需提供剩餘部分之電能,進而可以減少主電源90的負荷,亦減少顯示面板1的耗能。 Please refer to Figure 1 and Figure 2. FIG. 1 is a functional block diagram of a display panel of the present invention. Fig. 2 is a cross-sectional view showing a pixel area of the display panel of the present invention. As shown in FIG. 1 , the display panel 1 of the present embodiment includes a substrate 12 , a pixel array 16 , a thermoelectric module 58 , and a power module 88 . The substrate 12 includes a peripheral region 12P and a display region 12D. The pixel array 16 and the thermoelectric module 58 are disposed on the display area 12D of the substrate 12, and the power module 88 is disposed on the substrate 12. Peripheral area 12P. The thermoelectric module 58 is electrically connected to the power module 88, and the electrical energy generated by the thermoelectric module 58 can be supplied to the power module 88. The power module 88 can include, for example, at least one main power source 90 and an auxiliary power source 92. The main power source 90 can include at least one voltage converter (such as a DC-DC voltage converter) and at least one integrated circuit chip (IC chip), etc., and can transmit power or signals to each of the electronic components in the display panel 1 that require power or signals. element. The auxiliary power source 92 can include at least one voltage converter (such as a DC-DC voltage converter) and at least one integrated circuit chip (IC chip), etc., the auxiliary power source 92 is electrically connected to the thermoelectric module 58, and the auxiliary power source 92 is also It is electrically connected to the main power source 90. Thereby, when the display panel 1 is in operation, the heat in the display panel 1 can be converted into electric energy through the thermoelectric module 58 and then transmitted to the auxiliary power source 92 in the power module 88. Through the voltage converter and the integrated circuit chip in the auxiliary power source 92, the current generated by the thermoelectric module 58 can be subjected to, for example, step-up, step-down, negative voltage or voltage regulation to further transfer power or signals to the main. The power source 90, or the auxiliary power source 92, together with the main power source 90, can transfer power or signals to various electronic components within the display panel 1. In other words, a portion of the electrical energy required by the various electronic components in the display panel 1 can be provided by the thermoelectric module 58 via the auxiliary power source 92, whereby the main power source 90 only needs to supply the remaining portion of the electrical energy, thereby reducing the load on the main power source 90. The energy consumption of the display panel 1 is reduced.

如第2圖所示,本實施例之顯示面板1具有基板12、畫素陣列16以及熱電模組58,其中畫素陣列16設置於基板12上,而熱電模組58設置於畫素陣列16內。基板12的顯示區12D可具有複數個畫素區14。畫素陣列16具有複數個驅動元件18與複數個發光元件74,其中驅動元件18設置於畫素區14內,且發光元件74設置於畫素區14內並分別與驅動元件18電性連接。詳細而言,本實施例的熱電模組58是設置於發光元件74與驅動元件18之間。熱電模組58具有一熱端絕緣基材54、一冷端絕緣基材40以及複數個熱電單元44。熱端絕緣基材54是設置於發光元件74與熱電單元44之間,冷端絕緣基材40是設置於驅動元件18與熱電單元44之間。熱電單元44設置於熱端絕緣基材54與冷端絕緣基材40之間並彼此電性連接。各熱電單元 44具有一第一通道層46與一第二通道層48,其中第一通道層46與第二通道層48具有不同的席貝克係數(seebeck coefficient)。在本實施例中,熱電單元44係以串聯方式電性連接,例如熱電模組58可進一步包括複數個第一連接電極52與複數個第二連接電極42,其中各熱電單元44的第一通道層46與第二通道層48可與對應的第一連接電極52電性連接,而各熱電單元44的第二通道層48與相鄰的熱電單元44的第一通道層46則可與對應的第二連接電極42電性連接,其中第一連接電極52可設置於熱電單元44與熱端絕緣基材54之間,而第二連接電極42可設置於熱電單元44與冷端絕緣基材40之間,但不以此為限。藉此,熱電單元44可形成一迴路,即可於熱電模組58內形成電流,並且若進一步將熱電模組58電性連接至畫素陣列16外部的一負載即可輸出對應之電壓。也就是說,只要當顯示面板1在運作時,熱電模組58可將發光元件74產生的熱轉換成電能輸出,達到同時能散熱也可產生額外電能的效果。在其它變化實施例中,熱電單元44也可以其它方式彼此電性連接,利用以並聯方式電性連接,或者一部分的熱電單元44可利用串聯方式電性連接且另一部分的熱電單元44可利用並聯方式電性連接,或者利用其它方式電性連接。或者,熱電單元44可區分為複數組,其中各組內的熱電單元44彼此電性連接,而不同組內的熱電單元44則彼此不電性連接。 As shown in FIG. 2, the display panel 1 of the present embodiment has a substrate 12, a pixel array 16 and a thermoelectric module 58, wherein the pixel array 16 is disposed on the substrate 12, and the thermoelectric module 58 is disposed on the pixel array 16. Inside. The display area 12D of the substrate 12 may have a plurality of pixel areas 14. The pixel array 16 has a plurality of driving elements 18 and a plurality of light emitting elements 74. The driving elements 18 are disposed in the pixel area 14, and the light emitting elements 74 are disposed in the pixel area 14 and electrically connected to the driving elements 18, respectively. In detail, the thermoelectric module 58 of the present embodiment is disposed between the light emitting element 74 and the driving element 18. The thermoelectric module 58 has a hot end insulating substrate 54, a cold end insulating substrate 40, and a plurality of thermoelectric units 44. The hot-end insulating base material 54 is disposed between the light-emitting element 74 and the thermoelectric unit 44, and the cold-end insulating base material 40 is disposed between the drive element 18 and the thermoelectric unit 44. The thermoelectric unit 44 is disposed between the hot end insulating substrate 54 and the cold end insulating substrate 40 and electrically connected to each other. Each thermoelectric unit 44 has a first channel layer 46 and a second channel layer 48, wherein the first channel layer 46 and the second channel layer 48 have different Seebeck coefficients. In this embodiment, the thermoelectric units 44 are electrically connected in series. For example, the thermoelectric module 58 may further include a plurality of first connection electrodes 52 and a plurality of second connection electrodes 42 , wherein the first channels of each thermoelectric unit 44 The layer 46 and the second channel layer 48 can be electrically connected to the corresponding first connection electrode 52, and the second channel layer 48 of each thermoelectric unit 44 and the first channel layer 46 of the adjacent thermoelectric unit 44 can be correspondingly The second connection electrode 42 is electrically connected, wherein the first connection electrode 52 can be disposed between the thermoelectric unit 44 and the hot end insulating substrate 54 , and the second connection electrode 42 can be disposed on the thermoelectric unit 44 and the cold end insulating substrate 40 . Between, but not limited to. Thereby, the thermoelectric unit 44 can form a loop, that is, a current can be formed in the thermoelectric module 58, and if the thermoelectric module 58 is further electrically connected to a load outside the pixel array 16, a corresponding voltage can be output. That is to say, as long as the display panel 1 is in operation, the thermoelectric module 58 can convert the heat generated by the light-emitting element 74 into an electrical energy output, thereby achieving the effect of simultaneously dissipating heat and generating additional electrical energy. In other variant embodiments, the thermoelectric units 44 may also be electrically connected to each other in other ways, by electrically connecting in parallel, or a part of the thermoelectric units 44 may be electrically connected in series and another part of the thermoelectric units 44 may be connected in parallel. The method is electrically connected or electrically connected by other means. Alternatively, the thermoelectric unit 44 can be divided into multiple arrays in which the thermoelectric units 44 in each group are electrically connected to each other, and the thermoelectric units 44 in the different groups are not electrically connected to each other.

請參考第3圖至第13圖,第3圖至第13圖繪示了本發明之一實施例之製作顯示面板的方法示意圖。如第3圖所示,首先提供基板12,基板12包括複數個畫素區14。本實施例之基板12可包括硬式基板或可撓式基板,例如玻璃基板或塑膠基板,但不以此為限。畫素區14可包括用以提供不同顏色之畫素區例如紅色畫素區、綠色畫素區與藍色畫素區,但不以此為限,其中可提供不同顏色光之畫素區14以陣列方式排列,藉此畫素區14所提供不同顏色的光可進行混色以達到全彩顯示的效果。接著,於基板12上形成複數個驅動元件18,分別位於畫素區14內。各驅動元件18可包括至少一薄膜電 晶體,例如矽基薄膜電晶體或氧化物半導體薄膜電晶體,且薄膜電晶體可選用頂閘極型薄膜電晶體、底閘極型薄膜電晶體或其它型式薄膜電晶體。本實施例係使用頂閘極型的多晶矽薄膜電晶體作為驅動元件18,其包括半導體層19閘極絕緣層30、閘極電極28、介電層32、汲極電極24以及源極電極26。半導體層19例如可包括多晶矽通道層20、兩重摻雜半導體層22位於多晶矽通道層20之兩側並分別作為汲極摻雜區與源極摻雜區、兩輕摻雜半導體層23分別位於多晶矽通道層20與重摻雜半導體層22之間。半導體層19的材料不以多晶矽為限,而可為其它適合的半導體,例如其它矽基半導體層(例如非晶矽、微晶矽),氧化物半導體層例如氧化銦鎵鋅(IGZO)或其它適合的半導體材料。閘極絕緣層30覆蓋半導體層19。閘極電極28位於閘極絕緣層30上並實質上對應多晶矽通道層20。介電層32位於閘極電極28與閘極絕緣層30上。汲極電極24與源極電極26位於介電層32上並分別與重摻雜半導體層22電性連接。此外,本實施例之方法可選擇性地在形成多晶矽通道層20之前先於基板12上形成至少一緩衝層34,其中緩衝層34可為單層結構,緩衝層34的材料可為絕緣層例如一氧化矽緩衝層、一氮化矽緩衝層、氮氧化矽緩衝層或氧化鋁緩衝層,但不以此為限。緩衝層34也可為多層結構,可為不同材料的絕緣層的堆疊,例如一氧化矽緩衝層與一氮化矽緩衝層的堆疊,但不以此為限。此外,本實施例之方法可進一步於介電層32上形成一保護層33,其中保護層33可為單層結構或多層結構,且保護層33可暴露出部分之汲極電極24與源極電極26。接著,可選擇性地於保護層33上形成複數個轉接電極38,其中轉接電極38分別與保護層33暴露出的汲極電極24電性連接,且轉接電極38可選用具有良好導電性的材料例如金屬或合金,但不以此為限。 Please refer to FIG. 3 to FIG. 13 . FIG. 3 to FIG. 13 are schematic diagrams showing a method of manufacturing a display panel according to an embodiment of the present invention. As shown in FIG. 3, a substrate 12 is first provided, and the substrate 12 includes a plurality of pixel regions 14. The substrate 12 of the embodiment may include a rigid substrate or a flexible substrate, such as a glass substrate or a plastic substrate, but is not limited thereto. The pixel area 14 may include pixel regions for providing different colors, such as a red pixel region, a green pixel region, and a blue pixel region, but not limited thereto, wherein a different color light pixel region 14 may be provided. Arranged in an array manner, the light of different colors provided by the pixel area 14 can be mixed to achieve the effect of full color display. Next, a plurality of driving elements 18 are formed on the substrate 12, respectively, in the pixel area 14. Each of the driving elements 18 can include at least one thin film The crystal is, for example, a bismuth-based thin film transistor or an oxide semiconductor thin film transistor, and the thin film transistor may be a top gate type thin film transistor, a bottom gate type thin film transistor or other type of thin film transistor. In this embodiment, a top gate type polysilicon thin film transistor is used as the driving element 18, which includes a semiconductor layer 19 gate insulating layer 30, a gate electrode 28, a dielectric layer 32, a drain electrode 24, and a source electrode 26. The semiconductor layer 19 may include, for example, a polysilicon channel layer 20, and two heavily doped semiconductor layers 22 on both sides of the polysilicon channel layer 20 and respectively located as a gate doped region and a source doped region, and two lightly doped semiconductor layers 23, respectively. The polysilicon channel layer 20 is between the heavily doped semiconductor layer 22. The material of the semiconductor layer 19 is not limited to polysilicon, but may be other suitable semiconductors, such as other germanium-based semiconductor layers (eg, amorphous germanium, microcrystalline germanium), oxide semiconductor layers such as indium gallium zinc oxide (IGZO) or others. Suitable semiconductor materials. The gate insulating layer 30 covers the semiconductor layer 19. The gate electrode 28 is located on the gate insulating layer 30 and substantially corresponds to the polysilicon channel layer 20. Dielectric layer 32 is on gate electrode 28 and gate insulating layer 30. The drain electrode 24 and the source electrode 26 are located on the dielectric layer 32 and are electrically connected to the heavily doped semiconductor layer 22, respectively. In addition, the method of the present embodiment can selectively form at least one buffer layer 34 on the substrate 12 before forming the polysilicon channel layer 20, wherein the buffer layer 34 can be a single layer structure, and the material of the buffer layer 34 can be an insulating layer, for example. The cerium oxide buffer layer, the cerium nitride buffer layer, the cerium oxynitride buffer layer or the aluminum oxide buffer layer is not limited thereto. The buffer layer 34 may also be a multi-layer structure, which may be a stack of insulating layers of different materials, such as a stack of a ruthenium oxide buffer layer and a tantalum nitride buffer layer, but is not limited thereto. In addition, the method of the embodiment may further form a protective layer 33 on the dielectric layer 32, wherein the protective layer 33 may be a single layer structure or a multilayer structure, and the protective layer 33 may expose a portion of the drain electrode 24 and the source. Electrode 26. Then, a plurality of transfer electrodes 38 are selectively formed on the protective layer 33, wherein the transfer electrodes 38 are electrically connected to the drain electrodes 24 exposed by the protective layer 33, respectively, and the transfer electrodes 38 are preferably electrically conductive. Sexual materials such as metals or alloys, but not limited to them.

如第4圖所示,接著於驅動元件18上形成一冷端絕緣基材40。舉例而言,冷端絕緣基材40可形成於轉接電極38與保護層33上,但不以此 為限。冷端絕緣基材40的材料可為導熱性良好的絕緣材料,較佳可包括絕緣性佳與導熱性佳的陶瓷材料,但不以此為限。冷端絕緣基材40亦可為表面鍍有二氧化矽的半導體基板(例如:矽基板)或表面經過陽極氧化處理的鋁複合基板等。如第5圖所示,接著於冷端絕緣基材40上形成複數個第二連接電極42,其中任兩相鄰的第二連接電極42之間具有間隙,也就是說,各第二連接電極42可以是獨立的圖案,彼此並沒有接觸。第二連接電極42的材料可包括導電性與導熱性皆良好的材料,較佳可包括非透明導電材料例如銀、鋁、銅、鎂或鉬、透明導電材料例如氧化銦錫、氧化銦鋅或氧化鋁鋅、上述材料之複合層或上述材料之合金,但並不以此為限。 As shown in FIG. 4, a cold-ended insulating substrate 40 is then formed on the driving member 18. For example, the cold-end insulating substrate 40 may be formed on the via electrode 38 and the protective layer 33, but not Limited. The material of the cold-end insulating substrate 40 may be an insulating material having good thermal conductivity, and preferably includes a ceramic material having good insulating properties and thermal conductivity, but is not limited thereto. The cold-end insulating substrate 40 may be a semiconductor substrate (for example, a tantalum substrate) having a surface coated with ruthenium dioxide or an aluminum composite substrate having an anodized surface. As shown in FIG. 5, a plurality of second connection electrodes 42 are formed on the cold-end insulating substrate 40, wherein any two adjacent second connection electrodes 42 have a gap therebetween, that is, each second connection electrode 42 may be separate patterns that are not in contact with each other. The material of the second connection electrode 42 may include a material having good electrical conductivity and thermal conductivity, and may preferably include a non-transparent conductive material such as silver, aluminum, copper, magnesium or molybdenum, a transparent conductive material such as indium tin oxide, indium zinc oxide or Alumina zinc, a composite layer of the above materials or an alloy of the above materials, but is not limited thereto.

接著,如第6圖所示,於第二連接電極42上形成複數個熱電單元44,其中各熱電單元44包括一第一通道層46與一第二通道層48。詳細而言,如第4圖所示,本實施例中之第一通道層46與第二通道層48可分別為一第一半導體層與一第二半導體層。第一半導體層與第二半導體層的形成方法例如可先於第二連接電極42與冷端絕緣基材40上全面形成一半導體層,再以摻雜製程(例如擴散製程或離子佈植製程)於半導體層中形成具有第一摻雜型式以及第二摻雜型式的區域,且第一摻雜型式不同於第二摻雜型式,但不以此為限。隨後以圖案化製程(例如微影蝕刻製程)形成具有第一摻雜型式的第一半導體層以及具有第二摻雜型式的第二半導體層。第一半導體層與第二半導體層可分別為一P型半導體與一N型半導體或第一半導體層與第二半導體層可分別為N型半導體與P型半導體,但不以此為限。P型半導體與N型半導體的基材可為各式半導體材料例如IV A族元素(例如矽、鍺)並分別具有P型摻雜例如磷、砷與N型摻雜例如硼。或者,P型半導體與N型半導體的基材可為III-V族化合物半導體例如氮化鎵(GaN)或II-VI族化合物半導體例如硫化鋅(ZnS),並可選擇性具有P型摻雜與N型摻雜。在本實施例中,第一半導體層與第二半導體層分別為P型摻雜矽以及N型摻雜矽,但不以此為限。值得 一提的是,由於半導體材料的熱電轉換效率大體上比金屬以及絕緣體材料要高,並且若將P型半導體與N型半導體配對組合又可進一步提升熱電轉換的效率,因此本實施例之熱電單元44中的第一半導體層與第二半導體層以P型摻雜矽與N型摻雜矽配對組合在一起,可以提升整體熱電單元44的熱電轉換效率。此外,熱電單元44的第一通道層46與第二通道層48的材料不限定為半導體材料,也可以選用金屬例如銻、銅、鉍、鎳、鈷或其它適合之材料。 Next, as shown in FIG. 6, a plurality of thermoelectric units 44 are formed on the second connection electrode 42, wherein each of the thermoelectric units 44 includes a first channel layer 46 and a second channel layer 48. In detail, as shown in FIG. 4, the first channel layer 46 and the second channel layer 48 in this embodiment may be a first semiconductor layer and a second semiconductor layer, respectively. For example, the first semiconductor layer and the second semiconductor layer can be formed on the second connecting electrode 42 and the cold-end insulating substrate 40 to form a semiconductor layer, and then doped by a doping process (for example, a diffusion process or an ion implantation process). A region having a first doping pattern and a second doping pattern is formed in the semiconductor layer, and the first doping pattern is different from the second doping pattern, but is not limited thereto. A first semiconductor layer having a first doping pattern and a second semiconductor layer having a second doping pattern are then formed in a patterning process (eg, a photolithography process). The first semiconductor layer and the second semiconductor layer may be a P-type semiconductor and an N-type semiconductor, respectively, or the first semiconductor layer and the second semiconductor layer may be an N-type semiconductor and a P-type semiconductor, respectively, but not limited thereto. The substrate of the P-type semiconductor and the N-type semiconductor may be various semiconductor materials such as Group IV A elements (e.g., germanium, antimony) and have P-type doping such as phosphorus, arsenic, and N-type doping such as boron, respectively. Alternatively, the substrate of the P-type semiconductor and the N-type semiconductor may be a III-V compound semiconductor such as gallium nitride (GaN) or a II-VI compound semiconductor such as zinc sulfide (ZnS), and may selectively have a P-type doping. Doped with N-type. In this embodiment, the first semiconductor layer and the second semiconductor layer are respectively P-type doped germanium and N-type doped germanium, but are not limited thereto. worth it It is noted that since the thermoelectric conversion efficiency of the semiconductor material is substantially higher than that of the metal and the insulator material, and the P-type semiconductor is combined with the N-type semiconductor to further improve the efficiency of the thermoelectric conversion, the thermoelectric unit of the embodiment The first semiconductor layer and the second semiconductor layer of 44 are paired with a P-type doped germanium and an N-type doped germanium, which can improve the thermoelectric conversion efficiency of the overall thermoelectric unit 44. Further, the material of the first channel layer 46 and the second channel layer 48 of the thermoelectric unit 44 is not limited to a semiconductor material, and a metal such as ruthenium, copper, iridium, nickel, cobalt or other suitable materials may also be used.

接著,如第7圖所示,於兩相鄰的第一通道層46與第二通道層48之間形成絕緣層50。在本實施例中,第一通道層46、絕緣層50與第二通道層48沿水平方向依序排列的結構,且絕緣層50是位於第一通道層46與第二通道層48之間。絕緣層50的材料可包括無機材料例如氮化矽(silicon nitride)、氧化矽(silicon oxide)、氮氧化矽(silicon oxynitride)或氮摻雜碳化矽(nitrogen-doped silicon carbide,SiCN)、有機材料例如丙烯酸類樹脂(acrylic resin)或其它適合之絕緣材料。在本實施例中,絕緣層50的材料是二氧化矽(silicon dioxide),但不以此為限。本發明形成熱電單元44與絕緣層50的方法並不以上述方法為限。舉例而言,可以先形成複數個不相連的絕緣層50,再於兩相鄰之絕緣層50之間分別形成第一通道層46與第二通道層48。 Next, as shown in FIG. 7, an insulating layer 50 is formed between the two adjacent first channel layers 46 and the second channel layer 48. In the present embodiment, the first channel layer 46, the insulating layer 50 and the second channel layer 48 are sequentially arranged in the horizontal direction, and the insulating layer 50 is located between the first channel layer 46 and the second channel layer 48. The material of the insulating layer 50 may include an inorganic material such as silicon nitride, silicon oxide, silicon oxynitride or nitrogen-doped silicon carbide (SiCN), organic material. For example, an acrylic resin or other suitable insulating material. In this embodiment, the material of the insulating layer 50 is silicon dioxide, but not limited thereto. The method of forming the thermoelectric unit 44 and the insulating layer 50 of the present invention is not limited to the above method. For example, a plurality of unconnected insulating layers 50 may be formed first, and then a first channel layer 46 and a second channel layer 48 may be formed between the two adjacent insulating layers 50, respectively.

如第8圖所示,接著於熱電單元44上形成複數個第一連接電極52。各相鄰的第一連接電極52之間具有間隙,也就是說,各第一連接電極52是獨立的圖案,彼此並沒有接觸。第一連接電極52的材料可包括導電性與導熱性皆良好的材料,較佳可包括非透明導電材料例如銀、鋁、銅、鎂或鉬、透明導電材料例如氧化銦錫、氧化銦鋅或氧化鋁鋅、上述材料之複合層或上述材料之合金,但並不以此為限。詳細而言,在本實施例中各第一連接電極52是與對應之熱電單元44之第一通道層46與第二通道層48電性連接,且各第二連接電極42是與對應之熱電單元44之第二通道層48與相鄰之熱電 單元44之第一通道層46電性連接。換言之,各熱電單元44之第二通道層48是與相鄰之熱電單元44之第一通道層46電性連接,因此熱電單元44可透過第一連接電極52以及第二連接電極42形成串聯,但不以此為限。在其它變化實施例中,熱電單元44也可以其它方式彼此電性連接,利用以並聯方式電性連接,或者一部分的熱電單元44可利用串聯方式電性連接且另一部分的熱電單元44可利用並聯方式電性連接。 As shown in FIG. 8, a plurality of first connection electrodes 52 are then formed on the thermoelectric unit 44. There is a gap between each of the adjacent first connection electrodes 52, that is, each of the first connection electrodes 52 is a separate pattern and is not in contact with each other. The material of the first connection electrode 52 may include a material having good electrical conductivity and thermal conductivity, and may preferably include a non-transparent conductive material such as silver, aluminum, copper, magnesium or molybdenum, a transparent conductive material such as indium tin oxide, indium zinc oxide or Alumina zinc, a composite layer of the above materials or an alloy of the above materials, but is not limited thereto. In detail, in the embodiment, each of the first connection electrodes 52 is electrically connected to the first channel layer 46 and the second channel layer 48 of the corresponding thermoelectric unit 44, and each of the second connection electrodes 42 is corresponding to the thermoelectricity. The second channel layer 48 of unit 44 and the adjacent thermoelectric The first channel layer 46 of the unit 44 is electrically connected. In other words, the second channel layer 48 of each thermoelectric unit 44 is electrically connected to the first channel layer 46 of the adjacent thermoelectric unit 44. Therefore, the thermoelectric unit 44 can be connected in series through the first connection electrode 52 and the second connection electrode 42. But not limited to this. In other variant embodiments, the thermoelectric units 44 may also be electrically connected to each other in other ways, by electrically connecting in parallel, or a part of the thermoelectric units 44 may be electrically connected in series and another part of the thermoelectric units 44 may be connected in parallel. Mode electrical connection.

接著,如第9圖所示,於對應部分絕緣層50上的第一連接電極52,以圖案化製程(例如微影蝕刻製程)形成一開口,其中開口暴露出部分的絕緣層50且開口的直徑可為r1。接著,如第10圖所示。於絕緣層50與第一連接電極52上形成一熱端絕緣基材54,以形成熱電模組58。熱端絕緣基材54的材料可為導熱性良好的絕緣材料,較佳可包括絕緣性佳與導熱性佳的陶瓷材料,但不以此為限。熱端絕緣基材54亦可為表面鍍有二氧化矽的半導體矽基板或表面經過陽極氧化處理的鋁複合基板等。隨後,於對應各第一連接電極52開口的部分熱端絕緣基材54,以圖案化製程(例如微影蝕刻製程)形成一接觸洞56,其中接觸洞56部分暴露出驅動元件18,舉例而言,接觸洞56係部分暴露出轉接電極38。此外,接觸洞56的直徑可為r2,且接觸洞56的直徑r2可小於開口的直徑r1,藉此接觸洞56不會暴露出第一連接電極52。 Next, as shown in FIG. 9, an opening is formed in a patterning process (eg, a photolithography process) on the first connection electrode 52 on the corresponding portion of the insulating layer 50, wherein the opening exposes a portion of the insulating layer 50 and is open The diameter can be r1. Next, as shown in Figure 10. A hot end insulating substrate 54 is formed on the insulating layer 50 and the first connecting electrode 52 to form a thermoelectric module 58. The material of the hot-end insulating substrate 54 may be an insulating material having good thermal conductivity, and preferably includes a ceramic material having good insulating properties and thermal conductivity, but is not limited thereto. The hot-end insulating base material 54 may be a semiconductor tantalum substrate having a surface coated with ruthenium dioxide or an aluminum composite substrate having an anodized surface. Subsequently, a portion of the hot-end insulating substrate 54 corresponding to each of the first connection electrodes 52 is opened, and a contact hole 56 is formed by a patterning process (for example, a photolithography process), wherein the contact hole 56 partially exposes the driving element 18, for example. That is, the contact hole 56 portion partially exposes the transfer electrode 38. Further, the diameter of the contact hole 56 may be r2, and the diameter r2 of the contact hole 56 may be smaller than the diameter r1 of the opening, whereby the contact hole 56 does not expose the first connection electrode 52.

如第11圖所示,於熱電模組58上以及分別於畫素區14內形成複數個下電極60,其中下電極60分別經由接觸洞56與驅動元件18電性連接,例如下電極60可經由轉接電極38與驅動元件18的汲極電極24電性連接。下電極60的材料較佳可包括非透明導電材料例如銀、鋁、銅、鎂或鉬、透明導電材料例如氧化銦錫、氧化銦鋅或氧化鋁鋅、上述材料之複合層或上述材料之合金,但並不以此為限。 As shown in FIG. 11 , a plurality of lower electrodes 60 are formed on the thermoelectric module 58 and in the pixel region 14 respectively, wherein the lower electrodes 60 are electrically connected to the driving element 18 via the contact holes 56 respectively, for example, the lower electrode 60 can be The gate electrode 24 of the driving element 18 is electrically connected via the switching electrode 38. The material of the lower electrode 60 may preferably comprise a non-transparent conductive material such as silver, aluminum, copper, magnesium or molybdenum, a transparent conductive material such as indium tin oxide, indium zinc oxide or aluminum zinc oxide, a composite layer of the above materials or an alloy of the above materials. , but not limited to this.

接著,如第12圖所示,於熱端絕緣基材54以及下電極60上形成一圖案化堤壩層62(patterned bank layer),其中圖案化堤壩層62包括複數個開口62A,且開口62A分別位於畫素區14內。在本實施例中,圖案化堤壩層62的材料可為有機絕緣材料,且較佳可具有感光性,藉此可利用曝光暨顯影製程定義出其圖案,但不以此為限。圖案化堤壩層62的材料較佳可包括有機材料例如光阻、苯環丁烯(BCB)、聚甲基丙烯酸甲酯(PMMA)、聚甲醛(POM)、聚對苯二甲酸二丁酯(PBT)、聚己內酯(PCL)、聚對苯二甲酸乙二酯(PET)、聚碳酸酯(PC)、聚酯(polyester)、聚乙烯(PE)、聚苯醚謎酮(PEEK)、聚乳酸(PLA)、聚丙烯(PP)、聚苯乙烯(PS)或聚偏二氯乙烯(PVDC),但不以此為限。圖案化堤壩層62可為單層或多層結構,且其材料亦可為其它適合的無機材料、有機材料(例如可選自上述的有機材料)或有機/無機混成材料。隨後可選擇性地於圖案化堤壩層62上形成至少一反射層66,其中反射層66可至少設置於圖案化堤壩層62之開口62A的側壁68上,且反射層66可進一步設置於下電極60上並與下電極60電性連接。反射層66可為單層或多層結構,其材料包括反射材料例如金屬、合金、或其他合適的材料。 Next, as shown in FIG. 12, a patterned bank layer is formed on the hot-end insulating substrate 54 and the lower electrode 60, wherein the patterned bank layer 62 includes a plurality of openings 62A, and the openings 62A are respectively Located in the pixel area 14. In this embodiment, the material of the patterned bank layer 62 may be an organic insulating material, and preferably may be photosensitive, whereby the pattern may be defined by an exposure and development process, but not limited thereto. The material of the patterned bank layer 62 may preferably include organic materials such as photoresist, benzocyclobutene (BCB), polymethyl methacrylate (PMMA), polyoxymethylene (POM), and polybutylene terephthalate ( PBT), polycaprolactone (PCL), polyethylene terephthalate (PET), polycarbonate (PC), polyester, polyethylene (PE), poly(phenylene ketone) (PEEK) , but not limited to polylactic acid (PLA), polypropylene (PP), polystyrene (PS) or polyvinylidene chloride (PVDC). The patterned bank layer 62 may be a single layer or a multilayer structure, and the material thereof may be other suitable inorganic materials, organic materials (for example, may be selected from the above organic materials) or organic/inorganic hybrid materials. At least one reflective layer 66 can then be selectively formed on the patterned bank layer 62, wherein the reflective layer 66 can be disposed at least on the sidewall 68 of the opening 62A of the patterned bank layer 62, and the reflective layer 66 can be further disposed on the lower electrode 60 is electrically connected to the lower electrode 60. The reflective layer 66 can be a single layer or a multilayer structure, the material of which includes a reflective material such as a metal, alloy, or other suitable material.

接著,如第13圖所示,隨後利用複數個導電黏著層72將複數個發光元件74分別固定並電性連接於各反射層66上。發光元件74可包括無機發光二極體元件、有機發光二極體元件或其它各種類型之電激發光元件。在本實施例中,發光元件74較佳包括複數個無機發光二極體元件,其中各無機發光二極體元件包括一第一電極78、一第二電極80以及一P-N二極體層82。第二電極80是設置於第一電極78上,且P-N二極體層82是設置於第一電極78與第二電極80之間。舉例而言,本實施例之方法可利用微機械裝置夾取或吸取製作完成的無機發光二極體元件並利用導電黏著層72將無機發光二極體元件分別固定並電性連接於反射層66上。也就是說,導電黏著層72是夾設於各反射層66與各無機發光二極體元件之第一電極78之間。導電黏著 層72具備導電特性,並具有可熔化(meltable)特性,藉此可利用熱製程將導電黏著層72熔化。固定無機發光二極體元件可利用下列方法。先於反射層66上形成對應的導電黏著層72,並將導電黏著層72熔化,再將無機發光二極體元件放置於所對應的導電黏著層72上且與導電黏著層72接觸,而待導電黏著層72固化後即可使無機發光二極體元件黏固並電性連接於反射層66上;或者,將導電黏著層72先形成於無機發光二極體元件上,並將導電黏著層72熔化,接著再將無機發光二極體元件上的導電黏著層72放置於所對應的反射層66上且與反射層66接觸,而待導電黏著層72固化後即可使無機發光二極體元件黏固並電性連接於反射層66上。導電黏著層72可為導電膠或其它合適的導電材料,其導電材料可為例如銦(In)、鉍(Bi)、錫(Sn)、銀(Ag)、金、銅、鎵(Ga)與銻(Sb)之其中至少一者,但不以此為限。接著,複數個填充層84分別填入開口62A內並分別環繞對應之發光元件74。在本實施例中,填充層84是分別填充於無機發光二極體元件以及反射層66之間所形成的空間。隨後,至少一上電極86形成於填充層84上並與發光元件74之第二電極80電性連接,以製作出本實施例之顯示面板1,其中上電極86的材料可為透明導電材料例如氧化銦錫、氧化銦鋅或氧化鋁鋅,藉此發光元件74所發出之光可穿透上電極86以提供顯示效果。值得一提的是,本發明之發光元件74並不限定於利用導電黏著層72將發光元件74分別固定並電性連接於各反射層66上,也可先以圖案化製程(例如微影蝕刻製程)於各反射層66形成開口,再利用導電黏著層72將發光元件74分別固定並電性連接於各下電極60上。另外,本發明之發光元件74也可不藉由導電黏著層72,而是直接將各發光元件74形成於各下電極60或各反射層66上,但不以此為限。此外,本實施例是以於各畫素區14中設置一發光元件74為範例做說明,但不限於此。在其他變化實施例中,也可於各畫素區14中設置多個發光元件74。 Next, as shown in FIG. 13, a plurality of light-emitting elements 74 are then fixed and electrically connected to the respective reflective layers 66 by a plurality of conductive adhesive layers 72, respectively. Light-emitting element 74 can include an inorganic light-emitting diode element, an organic light-emitting diode element, or other various types of electroluminescent light elements. In the present embodiment, the light-emitting element 74 preferably includes a plurality of inorganic light-emitting diode elements, wherein each of the inorganic light-emitting diode elements includes a first electrode 78, a second electrode 80, and a P-N diode layer 82. The second electrode 80 is disposed on the first electrode 78, and the P-N diode layer 82 is disposed between the first electrode 78 and the second electrode 80. For example, the method of the embodiment may use a micromechanical device to clamp or suck the fabricated inorganic light emitting diode element and fix and electrically connect the inorganic light emitting diode element to the reflective layer 66 by using the conductive adhesive layer 72. on. That is, the conductive adhesive layer 72 is interposed between each of the reflective layers 66 and the first electrode 78 of each of the inorganic light emitting diode elements. Conductive adhesion Layer 72 is electrically conductive and has meltable characteristics whereby the conductive adhesive layer 72 can be melted using a thermal process. The following method can be utilized for the fixed inorganic light-emitting diode element. A corresponding conductive adhesive layer 72 is formed on the reflective layer 66, and the conductive adhesive layer 72 is melted, and then the inorganic light emitting diode element is placed on the corresponding conductive adhesive layer 72 and is in contact with the conductive adhesive layer 72. After the conductive adhesive layer 72 is cured, the inorganic light-emitting diode element can be adhered and electrically connected to the reflective layer 66; or the conductive adhesive layer 72 is first formed on the inorganic light-emitting diode element, and the conductive adhesive layer is formed. 72 is melted, and then the conductive adhesive layer 72 on the inorganic light-emitting diode element is placed on the corresponding reflective layer 66 and in contact with the reflective layer 66. After the conductive adhesive layer 72 is cured, the inorganic light-emitting diode can be made. The component is bonded and electrically connected to the reflective layer 66. The conductive adhesive layer 72 may be a conductive paste or other suitable conductive material, and the conductive material may be, for example, indium (In), bismuth (Bi), tin (Sn), silver (Ag), gold, copper, gallium (Ga) and At least one of 锑(Sb), but not limited to this. Next, a plurality of filling layers 84 are respectively filled into the openings 62A and respectively surround the corresponding light-emitting elements 74. In the present embodiment, the filling layer 84 is a space formed by filling between the inorganic light emitting diode element and the reflective layer 66, respectively. Subsequently, at least one upper electrode 86 is formed on the filling layer 84 and electrically connected to the second electrode 80 of the light emitting element 74 to fabricate the display panel 1 of the embodiment, wherein the material of the upper electrode 86 may be a transparent conductive material such as Indium tin oxide, indium zinc oxide or aluminum zinc oxide, whereby light emitted from the light-emitting element 74 can penetrate the upper electrode 86 to provide a display effect. It is to be noted that the light-emitting element 74 of the present invention is not limited to the use of the conductive adhesive layer 72 to fix and electrically connect the light-emitting elements 74 to the respective reflective layers 66, or may be patterned by a process such as photolithography. The process forms an opening in each of the reflective layers 66, and the light-emitting elements 74 are respectively fixed and electrically connected to the lower electrodes 60 by the conductive adhesive layer 72. In addition, the light-emitting element 74 of the present invention may be formed on each of the lower electrodes 60 or the reflective layers 66 without using the conductive adhesive layer 72, but is not limited thereto. In addition, this embodiment is described by taking a light-emitting element 74 in each pixel area 14 as an example, but is not limited thereto. In other variant embodiments, a plurality of light-emitting elements 74 may also be provided in each pixel region 14.

請繼續參考第13圖,第13圖為顯示面板的示意圖。如第13圖所 示,本發明之顯示面板1之結構包括基板12、畫素陣列16以及熱電模組58。基板12包括複數個畫素區14。畫素陣列16設置於基板12上,其中畫素陣列16包括複數個驅動元件18以及複數個發光元件74,驅動元件18以及發光元件74皆是設置於畫素區14內。熱電模組58是設置於畫素陣列16內,熱電模組58是一種能利用溫度梯度或溫度差來驅動載子移動以形成電流的元件,也就是熱電模組58可以將熱轉換成電能。以本實施例為例,發光元件74與熱電模組58是共用熱端絕緣基材54。當顯示面板1運作時,熱端絕緣基材54的溫度是比位於熱電模組58另一側的冷端絕緣基材40的溫度高,由於本實施例之第一半導體層的材料是P型摻雜矽,因此第一半導體層中的多數載子是電洞,並藉由熱端絕緣基材54與冷端絕緣基材40之間的溫度梯度可以驅動第一半導體層中的電洞往冷端絕緣基材40移動。另一方面,本實施例之第二半導體層的材料是N型摻雜矽,因此第二半導體層中的多數載子是電子,並藉由熱端絕緣基材54與冷端絕緣基材40之間的溫度梯度驅動第二半導體層中的電子往冷端絕緣基材40移動。如此一來,只要透過第一連接電極52與第二連接電極42將各熱電單元44中的第一半導體層與第二半導體層串聯成一迴路,即可於熱電模組58內形成電流,並且若進一步將熱電模組58電性連接至畫素陣列16外部的一負載即可輸出對應之電壓。詳細而言,熱電模組58中各熱電單元44中的第一半導體層與第二半導體層可藉由第一連接電極52與第二連接電極42串聯成一迴路,且熱電模組58可藉由第一連接電極52或第二連接電極42連接至電源模組88,但不以此為限。在其它變化實施例中,熱電單元44也可以其它方式彼此電性連接,利用以並聯方式電性連接,或者一部分的熱電單元44可利用串聯方式電性連接且另一部分的熱電單元44可利用並聯方式電性連接。詳細而言,在本實施例中於彼此電性連接的熱電單元44中,兩終端的熱電單元44之第一通道層46或第二通道層48對應的第一連接電極52或第二連接電極42可分別透過導線電性連接至電源模組88中的輔助電源92,將熱電單元44產生的電能輸出至電源模組88, 但不以此為限。在其他變化實施例中,亦可於彼此電性連接的熱電單元44中選擇其中的兩個第一通道層46或第二通道層48對應的第一連接電極52或第二連接電極42,並透過導線電性連接至電源模組88中的輔助電源92。或者,當熱電單元44區分為複數組,且不同組內的熱電單元44則彼此不電性連接時,可以於各組內的熱電單元44中選擇其中的兩個第一通道層46或第二通道層48對應的第一連接電極52或第二連接電極42,並透過導線電性連接至電源模組88中的輔助電源92。藉此,只要當顯示面板1在運作時,熱電模組58可將發光元件74產生的熱轉換成電能輸出至電源模組88,達到同時能散熱也可產生額外電能的效果。 Please continue to refer to Figure 13, which is a schematic diagram of the display panel. As shown in Figure 13 The structure of the display panel 1 of the present invention includes a substrate 12, a pixel array 16 and a thermoelectric module 58. The substrate 12 includes a plurality of pixel regions 14. The pixel array 16 is disposed on the substrate 12, wherein the pixel array 16 includes a plurality of driving elements 18 and a plurality of light emitting elements 74. The driving elements 18 and the light emitting elements 74 are disposed in the pixel area 14. The thermoelectric module 58 is disposed in the pixel array 16. The thermoelectric module 58 is an element that can drive the carrier to move to form a current by using a temperature gradient or a temperature difference, that is, the thermoelectric module 58 can convert heat into electrical energy. Taking the embodiment as an example, the light-emitting element 74 and the thermoelectric module 58 share the hot-end insulating substrate 54. When the display panel 1 is in operation, the temperature of the hot-end insulating substrate 54 is higher than the temperature of the cold-end insulating substrate 40 located on the other side of the thermoelectric module 58, since the material of the first semiconductor layer of the present embodiment is P-type. The germanium is doped, so that most of the carriers in the first semiconductor layer are holes, and the holes in the first semiconductor layer can be driven by the temperature gradient between the hot-end insulating substrate 54 and the cold-end insulating substrate 40. The cold end insulating substrate 40 moves. On the other hand, the material of the second semiconductor layer of the present embodiment is an N-type doped germanium, so that most of the carriers in the second semiconductor layer are electrons, and the hot-end insulating substrate 54 and the cold-end insulating substrate 40 are used. The temperature gradient between the electrodes drives the electrons in the second semiconductor layer to move toward the cold-end insulating substrate 40. In this way, if the first semiconductor layer and the second semiconductor layer in each of the thermoelectric units 44 are connected in series through the first connection electrode 52 and the second connection electrode 42, a current can be formed in the thermoelectric module 58 and Further, the thermoelectric module 58 is electrically connected to a load outside the pixel array 16 to output a corresponding voltage. In detail, the first semiconductor layer and the second semiconductor layer of each of the thermoelectric units 44 in the thermoelectric module 58 can be connected in series by the first connection electrode 52 and the second connection electrode 42, and the thermoelectric module 58 can be The first connection electrode 52 or the second connection electrode 42 is connected to the power module 88, but is not limited thereto. In other variant embodiments, the thermoelectric units 44 may also be electrically connected to each other in other ways, by electrically connecting in parallel, or a part of the thermoelectric units 44 may be electrically connected in series and another part of the thermoelectric units 44 may be connected in parallel. Mode electrical connection. In detail, in the thermoelectric unit 44 electrically connected to each other in the embodiment, the first connection electrode 52 or the second connection electrode corresponding to the first channel layer 46 or the second channel layer 48 of the thermoelectric unit 44 of the two terminals 42 can be electrically connected to the auxiliary power source 92 in the power module 88 through a wire, and the power generated by the thermoelectric unit 44 is output to the power module 88. But not limited to this. In other variant embodiments, the first connection electrode 52 or the second connection electrode 42 corresponding to the two first channel layers 46 or the second channel layer 48 may be selected from the thermoelectric units 44 electrically connected to each other, and The auxiliary power source 92 in the power module 88 is electrically connected through a wire. Alternatively, when the thermoelectric unit 44 is divided into multiple arrays, and the thermoelectric units 44 in different groups are not electrically connected to each other, two of the first channel layers 46 or the second may be selected among the thermoelectric units 44 in each group. The first connecting electrode 52 or the second connecting electrode 42 corresponding to the channel layer 48 is electrically connected to the auxiliary power source 92 in the power module 88 through a wire. Therefore, when the display panel 1 is in operation, the thermoelectric module 58 can convert the heat generated by the light-emitting element 74 into electrical energy output to the power module 88, thereby achieving the effect of simultaneously dissipating heat and generating additional electrical energy.

在本實施例中,熱電模組58包括熱端絕緣基材54、冷端絕緣基材40及複數個熱電單元44,且熱電單元44是設置於熱端絕緣基材54與冷端絕緣基材40之間。熱端絕緣基材54是設置於發光元件74以及熱電單元44之間,而冷端絕緣基材40是設置於熱電單元44以及驅動元件18之間。換句話說,熱端絕緣基材54是距離發光元件74較近,而冷端絕緣基材40是距離發光元件74較遠。各熱電單元44包括第一通道層46以及第二通道層48。第一通道層46與第二通道層48材料的選擇可從各材料的席貝克係數(seebeck coefficient)搭配席貝克效應(seebeck effect)的公式,再依據熱電模組58欲產生的電壓來決定。表1列舉了熱電單元44之第一通道層46與第二通道層48的材料及其席貝克係數,但不以此為限。公式(1)為席貝克效應的公式其中Th是熱端絕緣基材54的溫度、Tc為冷端絕緣基材40的溫度、aa為第一通道層46的席貝克係數、ab為第二通道層48的席貝克係數、n為熱電單元44串聯的個數,以及△Vab為熱電模組58產生的電壓差。舉例而言,若熱電模組58中包括三個熱電單元44之串聯,各熱電單元44之第一通道層46與第二通道層48的材料分別為P型摻雜矽與N型摻雜矽,且熱電模組58兩端之溫度差為5℃至80℃,則熱電模組58可產生之電壓差可為0.0135伏特至 0.22伏特。值得一提的是,公式(1)說明熱電模組58產生的電壓差與熱電單元44中第一通道層46與第二通道層48材料席貝克係數的差呈正比關係。也就是說,第一通道層46與第二通道層48材料的席貝克係數之差距越大,熱電模組58的熱電轉換效率會越高。由上述可知,若分別以P型半導體與N型半導體作為熱電單元44中的第一通道層46與第二通道層48,熱電單元44可提供較佳的熱電轉換效率。熱電單元44之第一通道層46與第二通道層48的材料選擇並不以上述為限,舉例來說,第一通道層46與第二通道層48的材料可依據熱電模組58所搭配之裝置的製程相容性來選擇。此外,熱電模組58中的熱電單元44並不以串聯為限,例如熱電單元44可為並聯或是串聯與並聯之組合。 In this embodiment, the thermoelectric module 58 includes a hot end insulating substrate 54, a cold end insulating substrate 40, and a plurality of thermoelectric units 44, and the thermoelectric unit 44 is disposed on the hot end insulating substrate 54 and the cold end insulating substrate. Between 40. The hot-end insulating substrate 54 is disposed between the light-emitting element 74 and the thermoelectric unit 44, and the cold-end insulating substrate 40 is disposed between the thermoelectric unit 44 and the driving element 18. In other words, the hot end insulating substrate 54 is closer to the light emitting element 74 and the cold end insulating substrate 40 is further from the light emitting element 74. Each thermoelectric unit 44 includes a first channel layer 46 and a second channel layer 48. The material of the first channel layer 46 and the second channel layer 48 can be selected from the Seebeck coefficient of each material in accordance with the formula of the Seebeck effect, and then based on the voltage to be generated by the thermoelectric module 58. Table 1 lists the materials of the first channel layer 46 and the second channel layer 48 of the thermoelectric unit 44 and their Schiebeck coefficients, but not limited thereto. The formula (1) is a formula of the Sibeck effect, where T h is the temperature of the hot-end insulating substrate 54, T c is the temperature of the cold-end insulating substrate 40, a a is the Sbeck coefficient of the first channel layer 46, a b The Sibeck coefficient of the second channel layer 48, n is the number of series connected to the thermoelectric unit 44, and ΔV ab is the voltage difference generated by the thermoelectric module 58. For example, if the thermoelectric module 58 includes three series of thermoelectric units 44, the materials of the first channel layer 46 and the second channel layer 48 of each thermoelectric unit 44 are P-type doped N and N-type doped 矽, respectively. The temperature difference between the two ends of the thermoelectric module 58 is 5 ° C to 80 ° C, and the thermoelectric module 58 can generate a voltage difference of 0.0135 volts to 0.22 volts. It is worth mentioning that the formula (1) shows that the voltage difference generated by the thermoelectric module 58 is proportional to the difference between the material of the first channel layer 46 and the second channel layer 48 in the thermoelectric unit 44. That is to say, the greater the difference between the Sibeck coefficients of the materials of the first channel layer 46 and the second channel layer 48, the higher the thermoelectric conversion efficiency of the thermoelectric module 58. It can be seen from the above that the thermoelectric unit 44 can provide better thermoelectric conversion efficiency if the P-type semiconductor and the N-type semiconductor are respectively used as the first channel layer 46 and the second channel layer 48 in the thermoelectric unit 44. The material selection of the first channel layer 46 and the second channel layer 48 of the thermoelectric unit 44 is not limited to the above. For example, the materials of the first channel layer 46 and the second channel layer 48 may be matched according to the thermoelectric module 58. The process compatibility of the device is chosen. In addition, the thermoelectric unit 44 in the thermoelectric module 58 is not limited to the series. For example, the thermoelectric unit 44 may be in parallel or a combination of series and parallel.

Vab=n(aa-ab)(Th-Tc)......公式(1) V ab =n(a a -a b )(T h -T c )...Formula (1)

在本實施例中,顯示面板1中的發光元件74包括複數個無機發光二極體元件,但不以此為限。各無機發光二極體元件包括第一電極78、第二電極80以及P-N二極體層82。第二電極80是設置於第一電極78上且P-N二極體層82是設置於第一電極78與第二電極80之間,其中P-N二極體層 82可為任何適合之半導體材料,在此不再贅述。本實施例之無機發光二極體元件除了以P-N二極體層82為範例之外,亦可使用P-I-N(positive-intrinsic-negative)二極體層、P-I(positive-intrinsic)二極體層、N-I(negative-intrinsic)二極體層、或其它合適的二極體層、或上述至少二種二極體層的串接/並接。另外,本實施例之無機發光二極體元件可選用微型無機發光二極體(或稱為微米等級的LED,μ-LED),其尺寸(長度與寬度)實質上小於5微米,即無機發光二極體之尺寸是小於微米等級,但不以此為限。此外,本實施例是以於各畫素區14中包括一發光元件74為範例做說明,但不限於此。在其他變化實施例中,於各畫素區14中也可包括多個發光元件74。 In this embodiment, the light-emitting element 74 in the display panel 1 includes a plurality of inorganic light-emitting diode elements, but is not limited thereto. Each of the inorganic light emitting diode elements includes a first electrode 78, a second electrode 80, and a P-N diode layer 82. The second electrode 80 is disposed on the first electrode 78 and the P-N diode layer 82 is disposed between the first electrode 78 and the second electrode 80, wherein the P-N diode layer 82 may be any suitable semiconductor material and will not be described herein. In addition to the PN diode layer 82, the inorganic light-emitting diode element of the present embodiment may also use a PIN (positive-intrinsic-negative) diode layer, a PI (positive-intrinsic) diode layer, and a NI (negative). -intrinsic) a diode layer, or other suitable diode layer, or a series/parallel connection of at least two of the above-described diode layers. In addition, the inorganic light-emitting diode element of the embodiment may be a micro-inorganic light-emitting diode (or micro-level LED, μ-LED) whose size (length and width) is substantially less than 5 micrometers, that is, inorganic light-emitting. The size of the diode is less than the micron level, but not limited to this. In addition, this embodiment is described as an example in which each of the pixel regions 14 includes a light-emitting element 74, but is not limited thereto. In other variant embodiments, a plurality of light-emitting elements 74 may also be included in each pixel region 14.

本實施例之顯示面板1中,驅動元件18是設置於基板12與熱電模組58之間,且熱電模組58是設置於驅動元件18與發光元件74之間。此外,複數個下電極60設置於熱電模組58上並分別位於畫素區14內,其中於各畫素區14的絕緣層50中具有一接觸洞56,接觸洞56暴露出部分的驅動元件18。下電極60分別經由接觸洞56與驅動元件18電性連接,且發光元件74是分別設置於下電極60上並分別經由下電極60與驅動元件18電性連接(或透過反射層66與下電極60電性連接),因此各驅動元件18可以透過下電極60提供訊號至對應之發光元件74。在本實施例中,圖案化堤壩層62可設置於熱端絕緣基材54上,其可具有複數個開口62A分別位於畫素區14內,且發光元件74係分別位於開口62A內。再者,至少一反射層66可設置於圖案化堤壩層62之開口62A內的側壁68上。反射層66可將發光元件74側面發出的光往出光面的方向反射,以增加顯示面板1的亮度。在本實施例中,複數個填充層84是分別填入開口62A內並分別環繞對應之發光元件74,其中填充層84可提供保護發光元件74的功效並可導引由發光元件74發出的光線往出光面的方向行進以增進顯示效果。至少一上電極86是設置於填充層84上並與發光元件74之第二電極80電性連接。此外,上電極86可選擇性 地與多個位於不同畫素區14內的發光元件74電性連接,藉此使得多個位於不同畫素區14內的發光元件74可以接收共同的訊號。 In the display panel 1 of the present embodiment, the driving element 18 is disposed between the substrate 12 and the thermoelectric module 58 , and the thermoelectric module 58 is disposed between the driving element 18 and the light emitting element 74 . In addition, a plurality of lower electrodes 60 are disposed on the thermoelectric module 58 and respectively located in the pixel region 14, wherein the insulating layer 50 of each pixel region 14 has a contact hole 56, and the contact hole 56 exposes a portion of the driving component. 18. The lower electrode 60 is electrically connected to the driving element 18 via the contact hole 56, and the light emitting element 74 is respectively disposed on the lower electrode 60 and electrically connected to the driving element 18 via the lower electrode 60 (or through the reflective layer 66 and the lower electrode). 60 is electrically connected), so each driving element 18 can provide a signal to the corresponding light-emitting element 74 through the lower electrode 60. In the present embodiment, the patterned bank layer 62 may be disposed on the hot end insulating substrate 54, which may have a plurality of openings 62A respectively located in the pixel region 14, and the light emitting elements 74 are respectively located in the openings 62A. Furthermore, at least one reflective layer 66 can be disposed on the sidewall 68 in the opening 62A of the patterned bank layer 62. The reflective layer 66 reflects the light emitted from the side of the light-emitting element 74 toward the light-emitting surface to increase the brightness of the display panel 1. In the present embodiment, a plurality of filling layers 84 are respectively filled into the openings 62A and respectively surround the corresponding light-emitting elements 74, wherein the filling layer 84 can provide the function of protecting the light-emitting elements 74 and can guide the light emitted by the light-emitting elements 74. Travel in the direction of the light surface to enhance the display. At least one upper electrode 86 is disposed on the filling layer 84 and electrically connected to the second electrode 80 of the light emitting element 74. In addition, the upper electrode 86 is optional The ground is electrically connected to a plurality of light-emitting elements 74 located in different pixel regions 14, whereby a plurality of light-emitting elements 74 located in different pixel regions 14 can receive a common signal.

請參考第14圖,第14圖繪示了本發明之顯示面板的畫素區之變化實施例的結構剖面示意圖。與上述實施例不同的是,本實施例之顯示面板1不具有轉接電極,因此下電極60分別經由接觸洞56與保護層33暴露出的汲極電極24直接電性連接,使得各驅動元件18可以透過下電極60提供訊號至對應之發光元件74。本變化實施例之顯示面板內的其它元件可以與上述實施例相同,並可參考第13圖所示,在此不再贅述。本實施例之顯示面板1的製作方法與上述實施例類似,唯製程中省略轉接電極的製作,在形成驅動元件18、介電層32及保護層33後就於驅動元件18上形成冷端絕緣基材40。本實施例中其餘顯示面板內元件的製作方法與上述實施例皆相同,並可參考第3圖至第13圖所示,因此不在此贅述。 Referring to FIG. 14, FIG. 14 is a cross-sectional view showing the structure of a variation of the pixel area of the display panel of the present invention. Different from the above embodiments, the display panel 1 of the present embodiment does not have the adapter electrode, so the lower electrode 60 is directly electrically connected to the drain electrode 24 exposed by the protective layer 33 via the contact hole 56, so that the driving components are respectively driven. 18 can provide a signal through the lower electrode 60 to the corresponding light-emitting element 74. The other elements in the display panel of the present embodiment can be the same as the above embodiment, and can be referred to FIG. 13 and will not be described again. The manufacturing method of the display panel 1 of the present embodiment is similar to that of the above embodiment, except that the fabrication of the via electrode is omitted in the process, and the cold junction is formed on the driving component 18 after the driving component 18, the dielectric layer 32 and the protective layer 33 are formed. Insulating substrate 40. The manufacturing method of the components in the remaining display panels in this embodiment is the same as that in the above embodiment, and can be referred to in FIGS. 3 to 13 and therefore will not be described herein.

綜上所述,本發明之顯示面板於畫素陣列上設置熱電模組,且熱電模組是與電源模組電性連接。也就是說,熱電模組除了作為顯示面板的散熱系統外,由於可將熱電模組轉換出之電能傳遞至電源模組,因此亦可作為副供電系統之用,以減少顯示面板的耗能。本發明之熱電模組與發光元件共用熱端絕緣基材,因此可提供顯示面板良好的散熱效果。此外,由於本發明之熱電模組是設置於畫素陣列上,因此本發明可利用的熱電轉換面積比一般將熱電模組設置於顯示面板的周邊區或其它位置的面積大,故散熱的效果以及能產生的電能也比較多。再者,本發明的熱電模組是設置於畫素陣列上,因此製作熱電模組的製程可以整合進一般顯示面板的製程,並不需另外製作熱電模組,且可以同顯示面板大面積製作。 In summary, the display panel of the present invention is provided with a thermoelectric module on the pixel array, and the thermoelectric module is electrically connected to the power module. That is to say, in addition to being a heat dissipation system of the display panel, the thermoelectric module can also be used as a secondary power supply system to reduce the energy consumption of the display panel, since the power converted from the thermoelectric module can be transmitted to the power module. The thermoelectric module of the present invention shares the hot-end insulating substrate with the light-emitting element, thereby providing a good heat-dissipating effect of the display panel. In addition, since the thermoelectric module of the present invention is disposed on the pixel array, the thermoelectric conversion area available in the present invention is larger than the area in which the thermoelectric module is generally disposed in the peripheral region or other position of the display panel, so the heat dissipation effect is obtained. And the amount of electrical energy that can be generated is also relatively large. Furthermore, the thermoelectric module of the present invention is disposed on the pixel array, so that the process for fabricating the thermoelectric module can be integrated into the process of the general display panel, and the thermoelectric module is not separately required, and can be made with a large area of the display panel. .

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均 等變化與修飾,皆應屬本發明之涵蓋範圍。 The above description is only a preferred embodiment of the present invention, and all of the scopes of the patent application according to the present invention are Equivalent changes and modifications are intended to be within the scope of the present invention.

1‧‧‧顯示面板 1‧‧‧ display panel

12P‧‧‧周邊區 12P‧‧‧ surrounding area

12D‧‧‧顯示區 12D‧‧‧ display area

16‧‧‧畫素陣列 16‧‧‧ pixel array

58‧‧‧熱電模組 58‧‧‧Thermal module

88‧‧‧電源模組 88‧‧‧Power Module

90‧‧‧主電源 90‧‧‧Main power supply

92‧‧‧輔助電源 92‧‧‧Auxiliary power supply

Claims (14)

一種顯示面板,包括:一基板,包括複數個畫素區;一畫素陣列,設置於該基板上,其中該畫素陣列包括:複數個驅動元件,設置於該等畫素區內;以及複數個發光元件,設置於該等畫素區內並分別與該等驅動元件電性連接;以及一熱電模組,設置於該畫素陣列內,其中該熱電模組包括一熱端絕緣基材、一冷端絕緣基材及複數個熱電單元,且該等熱電單元係設置於該熱端絕緣基材與該冷端絕緣基材之間且彼此電性連接。 A display panel comprising: a substrate comprising a plurality of pixel regions; a pixel array disposed on the substrate, wherein the pixel array comprises: a plurality of driving elements disposed in the pixel regions; and a plurality of pixels The light-emitting elements are disposed in the pixel regions and electrically connected to the driving elements respectively; and a thermoelectric module is disposed in the pixel array, wherein the thermoelectric module comprises a hot-end insulating substrate, A cold-end insulating substrate and a plurality of thermoelectric units, and the thermoelectric units are disposed between the hot-end insulating substrate and the cold-end insulating substrate and electrically connected to each other. 如請求項1所述之顯示面板,另包括一電源模組,其中該熱電模組係與該電源模組電性連接,且該熱電模組產生之電能係提供給該電源模組。 The display panel of claim 1, further comprising a power module, wherein the thermoelectric module is electrically connected to the power module, and the power generated by the thermoelectric module is provided to the power module. 如請求項1所述之顯示面板,另包括複數個絕緣層設置於該熱端絕緣基材與該冷端絕緣基材之間,其中各該熱電單元包括:一第一通道層;以及一第二通道層,其中該第一通道層與該第二通道層具有不同的席貝克係數(seebeck coefficient),各該熱電單元之該第二通道層係與相鄰之該熱電單元之該第一通道層電性連接,且該等絕緣層係分別設置於兩相鄰之該第一通道層與該第二通道層之間。 The display panel of claim 1, further comprising a plurality of insulating layers disposed between the hot end insulating substrate and the cold end insulating substrate, wherein each of the thermoelectric units comprises: a first channel layer; and a first a second channel layer, wherein the first channel layer and the second channel layer have different Seebeck coefficients, and the second channel layer of each of the thermoelectric units and the first channel of the adjacent thermoelectric unit The layers are electrically connected, and the insulating layers are respectively disposed between the two adjacent first channel layers and the second channel layer. 如請求項3所述之顯示面板,其中該第一通道層包括具有一第一摻雜型式的一第一半導體層,該第二通道層包括具有一第二摻雜型式的一第二半導體層,且該第一摻雜型式不同於該第二摻雜型式。 The display panel of claim 3, wherein the first channel layer comprises a first semiconductor layer having a first doping pattern, and the second channel layer comprises a second semiconductor layer having a second doping pattern And the first doping pattern is different from the second doping pattern. 如請求項3所述之顯示面板,其中各該熱電單元中的該第一通道層、該絕緣層以及該第二通道層係沿一水平方向依序設置於該畫素陣列內。 The display panel of claim 3, wherein the first channel layer, the insulating layer and the second channel layer in each of the thermoelectric units are sequentially disposed in the pixel array in a horizontal direction. 如請求項3所述之顯示面板,其中該熱電模組另包括複數個第一連接電極與複數個第二連接電極,該等第一連接電極係位於該等熱電單元與該熱端絕緣基材之間,該等第二連接電極係位於該等熱電單元與該冷端絕緣基材之間,各該第一連接電極係與對應之該熱電單元之該第一通道層與該第二通道層電性連接,且各該第二連接電極係與對應之該熱電單元之該第二通道層與相鄰之該熱電單元之該第一通道層電性連接。 The display panel of claim 3, wherein the thermoelectric module further comprises a plurality of first connecting electrodes and a plurality of second connecting electrodes, wherein the first connecting electrodes are located at the thermoelectric units and the hot end insulating substrate The second connecting electrodes are located between the thermoelectric units and the cold end insulating substrate, and the first connecting electrodes and the corresponding first and second channel layers of the thermoelectric unit Electrically connected, and each of the second connecting electrodes is electrically connected to the second channel layer of the corresponding thermoelectric unit and the first channel layer of the adjacent thermoelectric unit. 如請求項1所述之顯示面板,其中該等發光元件包括複數個無機發光二極體元件。 The display panel of claim 1, wherein the light emitting elements comprise a plurality of inorganic light emitting diode elements. 如請求項7所述之顯示面板,其中各該無機發光二極體元件包括:一第一電極;一第二電極,設置於該第一電極上;以及一P-N二極體層,設置於該第一電極與該第二電極之間。 The display panel of claim 7, wherein each of the inorganic light emitting diode elements comprises: a first electrode; a second electrode disposed on the first electrode; and a PN diode layer disposed on the first An electrode and the second electrode. 如請求項7所述之顯示面板,其中該等驅動元件係設置於該基板與該熱電模組之間,且該熱電模組係設置於該等驅動元件與該等發光元件之間。 The display panel of claim 7, wherein the driving elements are disposed between the substrate and the thermoelectric module, and the thermoelectric module is disposed between the driving elements and the light emitting elements. 如請求項9所述之顯示面板,另包括一圖案化堤壩層(patterned bank layer),設置於該熱端絕緣基材上,其中該圖案化堤壩層具有複數個開口,分別位於該等畫素區內,且該等發光元件係分別位於該等開口內。 The display panel of claim 9, further comprising a patterned bank layer disposed on the hot end insulating substrate, wherein the patterned bank layer has a plurality of openings respectively located at the pixels In the region, the light-emitting elements are respectively located in the openings. 如請求項10所述之顯示面板,另包括至少一反射層,其中該至少一反射層係設置於該圖案化堤壩層之該等開口的側壁上。 The display panel of claim 10, further comprising at least one reflective layer, wherein the at least one reflective layer is disposed on sidewalls of the openings of the patterned dam layer. 如請求項9所述之顯示面板,另包括複數個下電極設置於該熱電模組上並分別位於該等畫素區內,其中各該畫素區之該絕緣層具有一接觸洞部分暴露出對應之該驅動元件,而該等下電極分別經由該等接觸洞與該等驅動元件電性連接,且該等發光元件係分別設置於該等下電極上並分別經由該等下電極與該等驅動元件電性連接。 The display panel of claim 9, further comprising a plurality of lower electrodes disposed on the thermoelectric module and respectively located in the pixel regions, wherein the insulating layer of each of the pixel regions has a contact hole portion exposed Corresponding to the driving elements, the lower electrodes are electrically connected to the driving elements via the contact holes, and the light emitting elements are respectively disposed on the lower electrodes and respectively connected to the lower electrodes and the like The drive components are electrically connected. 如請求項12所述之顯示面板,另包括複數個填充層以及至少一上電極,其中該等填充層係分別填入該等開口內並分別環繞對應之該發光元件,且該至少一上電極係設置於該等填充層上並與該等發光元件之該等第二電極電性連接。 The display panel of claim 12, further comprising a plurality of filling layers and at least one upper electrode, wherein the filling layers are respectively filled in the openings and respectively surround the corresponding light emitting elements, and the at least one upper electrode And being disposed on the filling layers and electrically connected to the second electrodes of the light emitting elements. 如請求項1所述之顯示面板,其中至少一部分之該等熱電單元係以串聯方式電性連接。 The display panel of claim 1, wherein at least a part of the thermoelectric units are electrically connected in series.
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