TWI744678B - Electronic device and method for manufacturing the same - Google Patents

Electronic device and method for manufacturing the same Download PDF

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Publication number
TWI744678B
TWI744678B TW108129890A TW108129890A TWI744678B TW I744678 B TWI744678 B TW I744678B TW 108129890 A TW108129890 A TW 108129890A TW 108129890 A TW108129890 A TW 108129890A TW I744678 B TWI744678 B TW I744678B
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layer
layer body
spacer
conductive material
electronic device
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TW108129890A
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TW202109933A (en
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李志宗
柯聰盈
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友達光電股份有限公司
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Priority to CN202010138999.1A priority patent/CN111324237B/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/123Connection of the pixel electrodes to the thin film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/124Insulating layers formed between TFT elements and OLED elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40OLEDs integrated with touch screens
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Geometry (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

An electronic device includes a first layer, a second layer, a first spacer, a filling, and a conductive material. The first layer includes a first component. The second layer is disposed on the first layer and has a second component. The first spacer is disposed between the first layer and the second layer and has a through hole. The filling is disposed between the first layer and the second layer, and a material of the filling is different than a material of the first spacer. The conductive material is located in the through hole, and the first layer and the second layer are electrically connected to each other through the conductive material.

Description

電子裝置及其製作方法 Electronic device and manufacturing method thereof

本揭露內容是關於一種電子裝置及其製作方法。 This disclosure relates to an electronic device and a manufacturing method thereof.

隨著科技的發展,各種商用或家用的設備已逐漸電子化。舉例來說,在家用電器方面的各式消費性電子產品之中,顯示面板由於可提供顯示影像及操作介面,故已被廣泛地應用在不同的產品之中。顯示面板包含了多個電子元件以及連接這些電子元件的線路。例如,在應用畫素陣列的顯示面板中,可透過線路傳輸訊號至畫素陣列的薄膜電晶體,以施加電壓予連接薄膜電晶體的畫素電極。 With the development of technology, various commercial or household equipment has gradually become electronic. For example, among various consumer electronic products in household appliances, display panels have been widely used in different products because they can provide display images and operating interfaces. The display panel contains multiple electronic components and circuits connecting these electronic components. For example, in a display panel using a pixel array, a signal can be transmitted to the thin film transistor of the pixel array through a line to apply a voltage to the pixel electrode connected to the thin film transistor.

對於顯示面板的線路配置來說,其可透過形成多層的線路層來完成電性連接,例如可在介電層上形成接觸洞來完成不同層體之間的電性連接,因此,形成接觸洞的過程將會影響到顯示面板的良率。也因此,如何能提升接觸洞的製程良率,已成為相關領域的重要議題之一。 For the circuit configuration of the display panel, the electrical connection can be completed by forming multiple circuit layers. For example, a contact hole can be formed on the dielectric layer to complete the electrical connection between different layers, thus forming a contact hole The process will affect the yield of the display panel. Therefore, how to improve the process yield of contact holes has become one of the important issues in related fields.

本揭露內容之一實施方式提供一種電子裝置,包 含第一層體、第二層體、第一間隙物、填充物以及導電材料。第一層體具有第一元件。第二層體設置於第一層體之上,並具有第二元件。第一間隙物設置於第一層體與第二層體之間,並具有接觸洞。填充物設置於第一層體與第二層體之間,且填充物之材質不同於第一間隙物之材質。導電材料位在接觸洞內,且第一元件與第二元件藉由導電材料電性連接。 One embodiment of the present disclosure provides an electronic device, including Contains a first layer body, a second layer body, a first spacer, a filler, and a conductive material. The first layer body has a first element. The second layer body is arranged on the first layer body and has a second element. The first spacer is arranged between the first layer body and the second layer body and has a contact hole. The filler is arranged between the first layer body and the second layer body, and the material of the filler is different from the material of the first spacer. The conductive material is located in the contact hole, and the first element and the second element are electrically connected by the conductive material.

於部分實施方式中,電子裝置更包含第二間隙物。第二間隙物設置於第一層體與第二層體之間,並與第一層體及第一間隙物透過填充物完全分隔開來。 In some embodiments, the electronic device further includes a second spacer. The second spacer is arranged between the first layer body and the second layer body, and is completely separated from the first layer body and the first spacer through the filler.

於部分實施方式中,第二間隙物沿著第一方向延伸,使得第二間隙物在第一方向上的長度大於第一間隙物在第一方向上的長度。 In some embodiments, the second spacer extends along the first direction, so that the length of the second spacer in the first direction is greater than the length of the first spacer in the first direction.

於部分實施方式中,電子裝置更包含導電墊。導電墊設置於導電材料與第二層體之間,且導電材料與第二元件藉由導電墊電性連接。 In some embodiments, the electronic device further includes a conductive pad. The conductive pad is arranged between the conductive material and the second layer body, and the conductive material and the second element are electrically connected through the conductive pad.

於部分實施方式中,第一元件及第二元件各自為薄膜電晶體、無機發光二極體、有機發光二極體、扇出型走線、觸控線路或其組合。 In some embodiments, the first element and the second element are each a thin film transistor, an inorganic light emitting diode, an organic light emitting diode, a fan-out wiring, a touch circuit, or a combination thereof.

於部分實施方式中,第一間隙物的寬度在厚度方向為漸縮、垂直或漸擴。 In some embodiments, the width of the first spacer is tapered, vertical, or gradually expanded in the thickness direction.

於部分實施方式中,第二元件包含導電層,且導電材料穿過導電層。 In some embodiments, the second element includes a conductive layer, and the conductive material passes through the conductive layer.

於部分實施方式中,導電材料自第一層體內延伸至超過第二層體與填充物之間的交界面。 In some embodiments, the conductive material extends from the first layer body to beyond the interface between the second layer body and the filler.

本揭露內容之一實施方式提供一種電子裝置的製作方法,包含以下步驟。於第一層體上形成第一間隙物。在第一間隙物形成後,於第一層體之上配置填充物。將第二層體覆蓋至第一間隙物及填充物之上。形成穿過第一間隙物之導電材料。 One embodiment of the present disclosure provides a manufacturing method of an electronic device, including the following steps. A first spacer is formed on the first layer body. After the first spacer is formed, a filler is disposed on the first layer body. The second layer body is covered on the first spacer and the filler. A conductive material passing through the first spacer is formed.

於部分實施方式中,形成導電材料的步驟係進行於將第二層體覆蓋至第一間隙物及填充物之上的步驟之後。 In some embodiments, the step of forming the conductive material is performed after the step of covering the second layer body on the first spacer and the filler.

透過上述配置,在電子裝置的製作流程中,可以是在確定第一層體與第二層體的距離後,才形成接觸洞並接著於其內形成導電材料,如此一來,接觸洞可以是在其預計深度能被確定的情況下形成,因此可使接觸洞具有穩定的穿孔尺寸,並也能提升接觸洞的穿孔品質,並也,從而連帶提升後續所形成之導電材料的可靠度。 Through the above configuration, in the manufacturing process of the electronic device, the contact hole can be formed after the distance between the first layer body and the second layer body is determined, and then the conductive material is formed in it. In this way, the contact hole can be It is formed under the condition that the expected depth can be determined, so that the contact hole can have a stable perforation size, and the perforation quality of the contact hole can also be improved, and also, thus, the reliability of the subsequently formed conductive material can be improved.

100A、100B、100C、100D、100E、100F:電子裝置 100A, 100B, 100C, 100D, 100E, 100F: electronic device

102:第一承載基板 102: The first carrier substrate

108:第二承載基板 108: second carrier substrate

109:第三承載基板 109: The third carrier substrate

110:第一層體 110: first layer body

111:第一基板 111: first substrate

112:第一閘極絕緣層 112: first gate insulating layer

113:第一介電層 113: first dielectric layer

114:第一薄膜電晶體 114: The first thin film transistor

115:第一閘極電極 115: first gate electrode

116:第一源極電極 116: first source electrode

117:第一汲極電極 117: first drain electrode

118:第一通道層 118: The first channel layer

119:平坦層 119: Flat layer

120、210:填充物 120, 210: filler

130:第二層體 130: second layer body

131:第二基板 131: second substrate

132:第二閘極絕緣層 132: second gate insulating layer

133:第二介電層 133: second dielectric layer

134:第二薄膜電晶體 134: The second thin film transistor

135:第二閘極電極 135: second gate electrode

136:第二源極電極 136: second source electrode

137:第二汲極電極 137: second drain electrode

138:第二通道層 138: The second channel layer

140、140’、140A、140B、140C:第一間隙物 140, 140’, 140A, 140B, 140C: first spacer

142、142A、142B、142C、182、184、222:接觸洞 142, 142A, 142B, 142C, 182, 184, 222: contact hole

150、150’、150A、150B、150C、172、230:導電材料 150, 150’, 150A, 150B, 150C, 172, 230: conductive material

152:凹槽 152: Groove

154、232:側壁 154, 232: side wall

160、167:介電層體結構 160, 167: Dielectric layer structure

162A、162B、162C、164A、164B:走線層 162A, 162B, 162C, 164A, 164B: routing layer

166、244:畫素定義層 166, 244: pixel definition layer

168A、168B:觸控線路層 168A, 168B: touch circuit layer

170、246:發光元件 170, 246: light-emitting element

174:導電墊 174: Conductive pad

180、180’:延伸間隙物 180, 180’: Extension spacer

190:輔助間隙物 190: Auxiliary Spacer

192:輔助接觸洞 192: Auxiliary Contact Hole

200:第二間隙物 200: second spacer

220:第三間隙物 220: third spacer

240:第三層體 240: third layer body

242:第三基板 242: third substrate

248:驅動電極 248: drive electrode

250:第三介電層 250: third dielectric layer

260:島狀結構 260: Island structure

262:資料線 262: Data Line

264:掃描線 264: scan line

D1:第一方向 D1: First direction

D2:第二方向 D2: second direction

W1:底部寬度 W1: bottom width

W2:頂部寬度 W2: top width

第1圖為根據本揭露內容的第一實施方式繪示電子裝置的側剖面示意圖。 FIG. 1 is a schematic side sectional view of an electronic device according to the first embodiment of the present disclosure.

第2圖為根據本揭露內容的第二實施方式繪示電子裝置的側剖面示意圖。 FIG. 2 is a schematic side sectional view of the electronic device according to the second embodiment of the present disclosure.

第3圖為根據本揭露內容的第三實施方式繪示電子裝置的側剖面示意圖。 FIG. 3 is a schematic side sectional view of the electronic device according to the third embodiment of the present disclosure.

第4圖為根據本揭露內容的第四實施方式繪示電子裝置的側剖面示意圖。 FIG. 4 is a schematic side sectional view of the electronic device according to the fourth embodiment of the present disclosure.

第5圖為根據本揭露內容的第五實施方式繪示電子裝置的側剖面示意圖 FIG. 5 is a schematic side sectional view of the electronic device according to the fifth embodiment of the present disclosure

第6A圖至第6D圖分別為根據本揭露內容的部分實施方式繪示電子裝置於製作方法中的不同階段的側剖面示意圖。 FIGS. 6A to 6D are respectively schematic side sectional views showing different stages of the manufacturing method of the electronic device according to some embodiments of the present disclosure.

第7A圖至第7D圖分別為根據本揭露內容的部分實施方式繪示電子裝置於製作方法中的不同階段的側剖面示意圖。 FIGS. 7A to 7D are respectively schematic side cross-sectional diagrams showing the electronic device in different stages of the manufacturing method according to some embodiments of the present disclosure.

第8A圖至第8E圖分別為根據本揭露內容的部分實施方式繪示電子裝置於製作方法中的不同階段的側剖面示意圖。 FIGS. 8A to 8E are respectively schematic side cross-sectional diagrams showing different stages of the manufacturing method of the electronic device according to some embodiments of the present disclosure.

第9A圖至第9C圖分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的側剖面示意圖。 FIGS. 9A to 9C are respectively schematic side cross-sectional diagrams showing different stages of the manufacturing process of the electronic device according to some embodiments of the present disclosure.

第10A圖至第10C圖分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的側剖面示意圖 FIGS. 10A to 10C are schematic side cross-sectional diagrams showing the electronic device at different stages of the manufacturing process according to some embodiments of the present disclosure.

第11A圖至第11G圖分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的示意圖。 FIG. 11A to FIG. 11G are schematic diagrams respectively illustrating different stages of the manufacturing process of the electronic device according to some embodiments of the present disclosure.

第12A圖為根據本揭露內容的第六實施方式繪示電子裝置的側剖面示意圖。 FIG. 12A is a schematic side sectional view of an electronic device according to a sixth embodiment of the present disclosure.

第12B圖繪示電子裝置應用成可伸展性結構的側剖面示意圖。 FIG. 12B is a schematic side sectional view of the electronic device applied as a stretchable structure.

第12C圖繪示電子裝置的結構的上視示意圖。 FIG. 12C is a schematic top view of the structure of the electronic device.

第12D圖繪示電子裝置的結構於伸展後的上視示意圖。 FIG. 12D is a schematic top view of the structure of the electronic device after being stretched.

第13A圖至第13C圖分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的側剖面示意圖。 FIGS. 13A to 13C are respectively schematic side cross-sectional diagrams showing the electronic device at different stages in the manufacturing process according to some embodiments of the present disclosure.

以下將以圖式揭露本揭露內容之複數個實施方式,為明確說明起見,許多實務上的細節將在以下敘述中一併說明。然而,應瞭解到,這些實務上的細節不應用以限制本揭露內容。也就是說,在本揭露內容部分實施方式中,這些實務上的細節為非必要的。此外,為簡化圖式起見,一些習知慣用的結構與元件在圖式中將以簡單示意的方式繪示之。 Hereinafter, multiple implementation manners of the disclosure will be disclosed in diagrams. For the sake of clarity, many practical details will be described in the following description. However, it should be understood that these practical details should not be used to limit the content of this disclosure. That is to say, these practical details are not necessary in the part of the implementation of the present disclosure. In addition, in order to simplify the drawings, some conventionally used structures and elements are shown in the drawings in a simple and schematic manner.

當一個元件被稱為「在…上」時,可指元件直接連接在其他元件上,也可以是有其他元件存在於兩者之中,以達成間接連接。在本文中,使用第一與第二等詞彙,來描述各種元件與/或層是可以被理解的,這些詞彙是用來辨別單一元件與/或層。因此,在下文中的第一元件與/或層也可被稱為第二元件與/或層,而不脫離本揭露內容的本意。 When an element is referred to as being "on", it can mean that the element is directly connected to other elements, or there can be other elements between the two to achieve an indirect connection. In this article, it is understandable to use terms such as first and second to describe various elements and/or layers, and these terms are used to identify a single element and/or layer. Therefore, the first element and/or layer hereinafter may also be referred to as the second element and/or layer without departing from the original intent of the present disclosure.

本揭露內容的電子裝置可將其內部層疊結構相互電性連接,以利進行元件之間的電路布局。請參照第1圖,第1圖為根據本揭露內容的第一實施方式繪示電子裝置100A的側剖面示意圖。電子裝置100A包含第一層體110、填充物120、第二層體130、第一間隙物140以及導電材料150,其中第二層體130設置於第一層體110之上,而填充物120及第一間隙物140設置於第一層體110與第二層體130之間。 The electronic device disclosed in the present disclosure can electrically connect its internal stacked structures to each other to facilitate the circuit layout between components. Please refer to FIG. 1. FIG. 1 is a schematic side cross-sectional view of the electronic device 100A according to the first embodiment of the present disclosure. The electronic device 100A includes a first layer body 110, a filler 120, a second layer body 130, a first spacer 140, and a conductive material 150, wherein the second layer body 130 is disposed on the first layer body 110, and the filler 120 And the first spacer 140 is disposed between the first layer body 110 and the second layer body 130.

第一層體110可具有第一元件,而第二層體130可具有第二元件、上表面以及相對此上表面的下表面,其中第二層體130的下表面位於第一間隙物140與上表面之間,而第一元件及第二元件各自可為薄膜電晶體、無機發光二極體、有機發光二極體、扇出型走線、觸控線路或其組合,以使電子裝 置100A能應用成為顯示面板、觸控面板或其他裝置,關於此些元件的進一步結構細節將於後文說明。 The first layer body 110 may have a first element, and the second layer body 130 may have a second element, an upper surface, and a lower surface opposite to the upper surface. The lower surface of the second layer body 130 is located between the first spacer 140 and Between the upper surface, the first element and the second element can be thin film transistors, inorganic light-emitting diodes, organic light-emitting diodes, fan-out wiring, touch-control circuits, or a combination thereof, so as to make the electronic device The device 100A can be used as a display panel, a touch panel or other devices. Further details of the structure of these components will be described later.

第一間隙物140可用來支撐第二層體130,並定義出第一層體110與第二層體130之間的距離。具體來說,第一間隙物140的底面為朝向並接觸第一層體110,而第一間隙物140的頂面則朝向並接觸第二層體130。如此一來,第一層體110與第二層體130之間的距離可以是由第一間隙物140的高度決定,使得第一層體110與第二層體130之間的距離可等於或近似於第一間隙物140的厚度,此將利於提升電子裝置100A於製程期間的良率。 The first spacer 140 can be used to support the second layer body 130 and define the distance between the first layer body 110 and the second layer body 130. Specifically, the bottom surface of the first spacer 140 faces and contacts the first layer body 110, and the top surface of the first spacer 140 faces and contacts the second layer body 130. In this way, the distance between the first layer body 110 and the second layer body 130 can be determined by the height of the first spacer 140, so that the distance between the first layer body 110 and the second layer body 130 can be equal to or The thickness is similar to the thickness of the first spacer 140, which will help improve the yield of the electronic device 100A during the manufacturing process.

第一間隙物140可具有接觸洞142,且第一間隙物140的接觸洞142可自第一層體110連通至第二層體130。導電材料150可穿過第二層體130,並位在第二層體130中與接觸洞142內,使得第一層體110的第一元件與第二層體130的第二元件能藉由導電材料150達成電性連接,其中導電材料150之一部分位於第二層體130的上表面上,並覆蓋部分此上表面。以第1圖為例,第二層體130可更具有貫孔,而導電材料150能從第二層體130的貫孔內延伸至第一間隙物140的接觸洞142。導電材料150可形成為柱狀結構,或是形成為具有凹槽,像是導電材料150’,此些差異可視後續製程而定。例如,若後續製程的需求為要在第二層體130上層疊具有突出狀的層體時,可透過導電材料150’的凹槽152來符合所層疊的層體形貌。此外,導電材料150可凸出於第二層體130的相對上表面與下表面,並且從第二層體130的上表面與下表面完全貫穿第二層體 130,如第1圖所示。 The first spacer 140 may have a contact hole 142, and the contact hole 142 of the first spacer 140 may communicate from the first layer body 110 to the second layer body 130. The conductive material 150 can pass through the second layer body 130 and be located in the second layer body 130 and in the contact hole 142, so that the first element of the first layer body 110 and the second element of the second layer body 130 can pass through The conductive material 150 achieves an electrical connection, wherein a part of the conductive material 150 is located on the upper surface of the second layer body 130 and covers a part of the upper surface. Taking FIG. 1 as an example, the second layer body 130 may further have a through hole, and the conductive material 150 can extend from the through hole of the second layer body 130 to the contact hole 142 of the first spacer 140. The conductive material 150 may be formed in a columnar structure or formed with grooves, such as the conductive material 150', and these differences may be determined by subsequent manufacturing processes. For example, if the requirement of the subsequent process is to laminate a protruding layer on the second layer 130, the groove 152 of the conductive material 150' can be used to conform to the morphology of the laminated layer. In addition, the conductive material 150 can protrude from the opposite upper and lower surfaces of the second layer body 130, and completely penetrate the second layer body from the upper surface and the lower surface of the second layer body 130. 130, as shown in Figure 1.

填充物120之材質可不同於第一間隙物140之材質。具體來說,填充物120可包含環氧樹脂、膠材、液態材料、可固化材料或其組合,而第一間隙物140則可包含壓克力材料、聚亞醯胺、光感應樹酯或其組合,且第一間隙物140可透過光罩製程來形成。舉例來說,可先形成一層聚亞醯胺膜,並透過光罩製程來圖案化此聚亞醯胺膜,從而形成第一間隙物140。如此一來,可使所形成的第一間隙物140能具有良好的成膜品質,藉以減少於其內形成接觸洞142的製程變異,從而提升形成接觸洞142的製程良率。由光罩製程形成的第一間隙物140可具有漸變的寬度,舉例來說,第一間隙物140的寬度在其厚度方向(即沿著自第一層體110指向第二層體130的方向)會是漸縮的,使得第一間隙物140的底部寬度W1會大於頂部寬度W2。本揭露內容不以此為限,雖本實施方式的第一間隙物140的寬度在其厚度方向為漸縮,然而,於其他實施方式中,第一間隙物140的寬度在其厚度方向也可以是垂直或是漸擴。 The material of the filler 120 may be different from the material of the first spacer 140. Specifically, the filler 120 may include epoxy resin, glue, liquid material, curable material, or a combination thereof, and the first spacer 140 may include acrylic material, polyimide, light-sensitive resin, or The combination, and the first spacer 140 can be formed through a photomask process. For example, a layer of polyimide film may be formed first, and the polyimide film may be patterned through a photomask process to form the first spacer 140. In this way, the formed first spacer 140 can have a good film forming quality, thereby reducing the process variation of forming the contact hole 142 therein, thereby improving the process yield of forming the contact hole 142. The first spacer 140 formed by the photomask process may have a gradual width. For example, the width of the first spacer 140 is in the thickness direction (that is, along the direction from the first layer 110 to the second layer 130). ) Will be tapered, so that the bottom width W1 of the first spacer 140 will be greater than the top width W2. The present disclosure is not limited to this. Although the width of the first spacer 140 in this embodiment is tapered in its thickness direction, in other embodiments, the width of the first spacer 140 may also be in the thickness direction. Is it vertical or gradual.

再者,由於用來使第一層體110的第一元件能電性連接至第二層體130的第二元件的導電材料150是形成在接觸洞142內,故提升接觸洞142的製程良率也可連帶提升將第一元件電性連接至第二元件的可靠度。更進一步來說,在所形成的第一間隙物140能具有良好的成膜品質的情況下,可提升其定義出接觸洞142邊界的側壁品質,從而減少形成導電材料150時的製程變異。 Furthermore, since the conductive material 150 used to electrically connect the first element of the first layer body 110 to the second element of the second layer body 130 is formed in the contact hole 142, the process of improving the contact hole 142 is good. The rate can also improve the reliability of electrically connecting the first element to the second element. Furthermore, when the formed first spacer 140 can have good film forming quality, the quality of the sidewall defining the boundary of the contact hole 142 can be improved, thereby reducing the process variation when forming the conductive material 150.

另一方面,在採上述配置的情況下,若對填充物120的材料有更換需求時,由於接觸洞142是形成在第一間隙物140內,故即使更換了填充物120的材料,像是更換成液晶材料或是液態散熱材料等,也不會對接觸洞142的形成過程造成影響。 On the other hand, in the case of the above configuration, if there is a need to replace the material of the filler 120, since the contact hole 142 is formed in the first spacer 140, even if the material of the filler 120 is replaced, it is like Changing to a liquid crystal material or a liquid heat dissipation material will not affect the formation process of the contact hole 142.

上述結構可應用至採不同配置方式的第一元件及第二元件,以應用成為不同用途的電子裝置,也就是說,上述結構具有高度結構相容性,以下將對此做說明。請看到第2圖,第2圖為根據本揭露內容的第二實施方式繪示電子裝置100B的側剖面示意圖。本實施方式中,第一層體110的第一元件及第二層體130的第二元件各自係形成為薄膜電晶體。 The above structure can be applied to the first element and the second element in different configurations to be used as electronic devices for different purposes, that is, the above structure has a high degree of structural compatibility, which will be described below. Please see FIG. 2, which is a schematic side sectional view of the electronic device 100B according to the second embodiment of the present disclosure. In this embodiment, the first element of the first layer body 110 and the second element of the second layer body 130 are each formed as a thin film transistor.

具體來說,第一層體110可包含第一基板111、第一閘極絕緣層112、第一介電層113以及第一薄膜電晶體114,其中第一薄膜電晶體114包含第一閘極電極115、第一源極電極116、第一汲極電極117以及第一通道層118,且第一薄膜電晶體可視為是第一層體110的第一元件,其中第一元件位於第一介電層113與第一基板111之間。本文中,所述的「介電材料」、「介電層」、「絕緣層」及「平坦層」各自可包含有機材料或無機材料,像是環氧樹脂、氧化矽(SiOx)、氮化矽(SiNx)、由氧化矽及氮化矽共同組成的複合層或是其他合適的介電材料。所述的「通道層」可包含矽,像是單晶矽材料、多晶矽材料或其他適合的材料。 Specifically, the first layer body 110 may include a first substrate 111, a first gate insulating layer 112, a first dielectric layer 113, and a first thin film transistor 114, wherein the first thin film transistor 114 includes a first gate electrode. The electrode 115, the first source electrode 116, the first drain electrode 117, and the first channel layer 118, and the first thin film transistor can be regarded as the first element of the first layer body 110, wherein the first element is located in the first medium Between the electrical layer 113 and the first substrate 111. In this article, the “dielectric material”, “dielectric layer”, “insulating layer” and “flat layer” can each include organic materials or inorganic materials, such as epoxy resin, silicon oxide (SiOx), nitride Silicon (SiNx), a composite layer composed of silicon oxide and silicon nitride, or other suitable dielectric materials. The "channel layer" may include silicon, such as monocrystalline silicon material, polycrystalline silicon material, or other suitable materials.

第一基板111可以是介電材料、透光基板、軟性基板或其組合。第一通道層118與第一閘極絕緣層112可設置 在第一基板111的上表面,且第一閘極絕緣層112覆蓋住第一通道層118。第一閘極電極115與第一介電層113可設置在第一閘極絕緣層112的上表面,其中第一介電層113覆蓋住第一閘極電極115,且第一閘極電極115係位在第一通道層118的正上方。第一源極電極116與第一汲極電極117可設置在第一介電層113的上表面,且第一介電層113與第一閘極絕緣層112可共同具有對應第一通道層118的兩個通孔,使得第一源極電極116與第一汲極電極117可分別透過此些通孔電性連接至第一通道層118。 The first substrate 111 may be a dielectric material, a light-transmitting substrate, a flexible substrate, or a combination thereof. The first channel layer 118 and the first gate insulating layer 112 can be provided On the upper surface of the first substrate 111, the first gate insulating layer 112 covers the first channel layer 118. The first gate electrode 115 and the first dielectric layer 113 may be disposed on the upper surface of the first gate insulating layer 112, wherein the first dielectric layer 113 covers the first gate electrode 115, and the first gate electrode 115 It is located directly above the first channel layer 118. The first source electrode 116 and the first drain electrode 117 may be disposed on the upper surface of the first dielectric layer 113, and the first dielectric layer 113 and the first gate insulating layer 112 may have a corresponding first channel layer 118 in common The two through holes of, make the first source electrode 116 and the first drain electrode 117 electrically connect to the first channel layer 118 through these through holes, respectively.

第二層體130可包含第二基板131、第二閘極絕緣層132、第二介電層133以及第二薄膜電晶體134,其中第一介電層113、第二介電層133與填充物120皆位於第一基板111與第二基板131之間。第二薄膜電晶體134包含第二閘極電極135、第二源極電極136、第二汲極電極137以及第二通道層138,且第二薄膜電晶體134可視為是第二層體130的第二元件。 The second layer body 130 may include a second substrate 131, a second gate insulating layer 132, a second dielectric layer 133, and a second thin film transistor 134, wherein the first dielectric layer 113, the second dielectric layer 133 and the filling The objects 120 are located between the first substrate 111 and the second substrate 131. The second thin film transistor 134 includes a second gate electrode 135, a second source electrode 136, a second drain electrode 137, and a second channel layer 138, and the second thin film transistor 134 can be regarded as the second layer body 130 The second element.

第二基板131可以是介電材料、透光基板、軟性基板或其組合,而第二基板131的上表面等同於第二層體130的上表面。第二通道層138與第二閘極絕緣層132可設置在第二基板131的下表面,且第二閘極絕緣層132覆蓋住第二通道層138,其中第二閘極絕緣層132位於第二基板131與第二介電層133之間。第二閘極電極135與第二介電層133可設置在第二閘極絕緣層132的下表面,其中第二介電層133覆蓋住第二閘極電極135,且第二閘極電極135係位在第二通道層138的正下 方。第二源極電極136與第二汲極電極137可設置在第二介電層133的下表面,且第二介電層133與第二閘極絕緣層132可共同具有對應第二通道層138的兩個通孔,使得第二源極電極136與第二汲極電極137可分別透過此些通孔電性連接至第二通道層138。 The second substrate 131 may be a dielectric material, a light-transmitting substrate, a flexible substrate, or a combination thereof, and the upper surface of the second substrate 131 is equivalent to the upper surface of the second layer body 130. The second channel layer 138 and the second gate insulating layer 132 can be disposed on the lower surface of the second substrate 131, and the second gate insulating layer 132 covers the second channel layer 138, wherein the second gate insulating layer 132 is located on the second substrate 131. Between the second substrate 131 and the second dielectric layer 133. The second gate electrode 135 and the second dielectric layer 133 may be disposed on the lower surface of the second gate insulating layer 132, wherein the second dielectric layer 133 covers the second gate electrode 135, and the second gate electrode 135 It is located directly under the second channel layer 138 square. The second source electrode 136 and the second drain electrode 137 may be disposed on the lower surface of the second dielectric layer 133, and the second dielectric layer 133 and the second gate insulating layer 132 may have a corresponding second channel layer 138 in common The two through holes of, so that the second source electrode 136 and the second drain electrode 137 can be electrically connected to the second channel layer 138 through these through holes, respectively.

同樣地,填充物120及第一間隙物140設置於第一層體110與第二層體130之間,更進一步來說,第一間隙物140的底面會是設置在第一層體110的第一介電層113上,並可位在第一源極電極116與第一汲極電極117之間,而第一間隙物1140的頂面則可接觸第二層體130的第二汲極電極137。 Similarly, the filler 120 and the first spacer 140 are disposed between the first layer body 110 and the second layer body 130. Furthermore, the bottom surface of the first spacer 140 will be disposed on the first layer body 110. On the first dielectric layer 113, it can be located between the first source electrode 116 and the first drain electrode 117, and the top surface of the first spacer 1140 can contact the second drain of the second layer body 130 Electrode 137.

導電材料150可穿過第二層體130,例如穿過第二層體130的第二基板131、第二閘極絕緣層132、第二介電層133以及第二汲極電極137,藉以延伸進入至第一間隙物140的接觸洞142內,並進一步地穿過第一層體110的第一介電層113,直至接觸第一閘極電極115,從而電性連接第一元件。換言之,導電材料150可自第一層體110內延伸至超過第二層體130與填充物120之間的交界面。 The conductive material 150 may pass through the second layer body 130, such as the second substrate 131, the second gate insulating layer 132, the second dielectric layer 133, and the second drain electrode 137 of the second layer body 130, so as to extend It enters into the contact hole 142 of the first spacer 140 and further penetrates the first dielectric layer 113 of the first layer body 110 until it contacts the first gate electrode 115, thereby electrically connecting the first element. In other words, the conductive material 150 can extend from the inside of the first layer body 110 to exceed the interface between the second layer body 130 and the filler 120.

在此配置下,導電材料150會與第一薄膜電晶體114的第一閘極電極115形成交界面,以電性連接第一薄膜電晶體114。導電材料150的側壁154的至少一部分係會由第二層體130的導電層圍繞且接觸,以電性連接至第二層體130的第二元件。具體來說,第二層體130的第二汲極電極137可圍繞且接觸導電材料150的側壁154,如此一來,可使導電材料150電性連接至第二薄膜電晶體134,並使得第一層體110的第一 薄膜電晶體114能透過導電材料150電性連接第二層體130的第二薄膜電晶體134。 In this configuration, the conductive material 150 will form an interface with the first gate electrode 115 of the first thin film transistor 114 to electrically connect the first thin film transistor 114. At least a part of the sidewall 154 of the conductive material 150 is surrounded by and in contact with the conductive layer of the second layer body 130 to be electrically connected to the second element of the second layer body 130. Specifically, the second drain electrode 137 of the second layer body 130 can surround and contact the sidewall 154 of the conductive material 150. In this way, the conductive material 150 can be electrically connected to the second thin film transistor 134, and the first The first of a layer of 110 The thin film transistor 114 can be electrically connected to the second thin film transistor 134 of the second layer body 130 through the conductive material 150.

請再看到第3圖,第3圖為根據本揭露內容的第三實施方式繪示電子裝置100C的側剖面示意圖。本實施方式中,第一層體110的第一元件及第二層體130的第二元件各自係形成為薄膜電晶體,而本實施方式與第二實施方式的至少一個差異點在於,本實施方式的第二層體130具有不同的層體配置。 Please refer to FIG. 3 again, which is a schematic side sectional view of the electronic device 100C according to the third embodiment of the present disclosure. In this embodiment, the first element of the first layer body 110 and the second element of the second layer body 130 are each formed as a thin film transistor. However, at least one difference between this embodiment and the second embodiment is that this embodiment The second layer body 130 of the method has a different layer body configuration.

具體來說,在第二層體130中,第二薄膜電晶體134的第二源極電極136及第二汲極電極137為完全地位在第二閘極絕緣層132之上,且第二汲極電極137除了圍繞並接觸導電材料150的側壁154的至少一部分之外,尚透過其部分的上表面接觸導電材料150。此外,第一間隙物140的頂面則是接觸第二層體130的第二介電層133,並形成交界面。 Specifically, in the second layer body 130, the second source electrode 136 and the second drain electrode 137 of the second thin film transistor 134 are completely located on the second gate insulating layer 132, and the second drain electrode The pole electrode 137 not only surrounds and contacts at least a part of the side wall 154 of the conductive material 150, but also contacts the conductive material 150 through a part of the upper surface thereof. In addition, the top surface of the first spacer 140 is in contact with the second dielectric layer 133 of the second layer body 130 and forms an interface.

請再看到第4圖,第4圖為根據本揭露內容的第四實施方式繪示電子裝置100D的側剖面示意圖。本實施方式中,第一層體110的第一元件係形成為薄膜電晶體,而第二層體130的第二元件係形成為扇出型走線,而本實施方式與第二實施方式的至少一個差異點在於,本實施方式對第一間隙物140A、140B、140C及導電材料150A、150B、150C的配置方式不同。 Please refer to FIG. 4 again, which is a schematic side cross-sectional view of the electronic device 100D according to the fourth embodiment of the present disclosure. In this embodiment, the first element of the first layer body 110 is formed as a thin film transistor, and the second element of the second layer body 130 is formed as a fan-out wiring. At least one difference is that the configuration of the first spacers 140A, 140B, 140C and the conductive materials 150A, 150B, 150C is different in this embodiment.

具體來說,第二層體130可包含介電層體結構160以及多個走線層162A、162B、162C,且走線層162A-162C可延伸至進入電子裝置100D的扇出型走線區。走線層162A、 162C可位在介電層體結構160內,而走線層162B則可位在介電層體結構160上,且走線層162A-162C各自相對第一層體110的高度可不相同,此可透過將介電層體結構160配置成複合層體來實現。舉例來說,形成走線層162A-162C的製程可穿插至形成介電層體結構160之複合層體的製程之中,例如可在形成介電層體結構160之第一層結構後,先形成走線層162C,而接著在形成介電層體結構160之第二層結構後,再形成走線層162A。 Specifically, the second layer body 130 may include a dielectric layer body structure 160 and a plurality of wiring layers 162A, 162B, 162C, and the wiring layers 162A-162C may extend to enter the fan-out wiring area of the electronic device 100D . Wiring layer 162A, 162C can be located in the dielectric layer structure 160, and the wiring layer 162B can be located on the dielectric layer structure 160, and the height of the wiring layers 162A-162C relative to the first layer 110 can be different. This is achieved by configuring the dielectric layer structure 160 into a composite layer. For example, the process of forming the wiring layers 162A-162C can be inserted into the process of forming the composite layer of the dielectric layer structure 160. For example, after the first layer structure of the dielectric layer structure 160 is formed, The wiring layer 162C is formed, and then after the second layer structure of the dielectric layer structure 160 is formed, the wiring layer 162A is formed.

走線層162A-162C可分別位在第一源極電極116、第一閘極電極115及第一汲極電極117上方,其中第一間隙物140A位在走線層162A與第一源極電極116之間;第一間隙物140B位在走線層162B與第一閘極電極115之間;第一間隙物140C位在走線層162C與第一汲極電極117之間。 The wiring layers 162A-162C can be respectively located above the first source electrode 116, the first gate electrode 115 and the first drain electrode 117, wherein the first spacer 140A is located on the wiring layer 162A and the first source electrode 116; the first spacer 140B is located between the wiring layer 162B and the first gate electrode 115; the first spacer 140C is located between the wiring layer 162C and the first drain electrode 117.

導電材料150A-150C可穿過介電層體結構160,並穿過不同的走線層162A-162C,直至接觸到第一層體110之中對應的電極。具體來說,導電材料150A可穿過介電層體結構160及走線層162A,藉以延伸進入至第一間隙物140A的接觸洞142A內,並接觸第一層體110的第一源極電極116;導電材料150B可穿過介電層體結構160及走線層162B,藉以延伸進入至第一間隙物140B的接觸洞142B內,並進一步地穿過第一層體110的第一介電層113,直至接觸第一層體110的第一閘極電極115;導電材料150C可穿過介電層體結構160及走線層162C,藉以延伸進入至第一間隙物140C的接觸洞142C內,並接觸第一層體110的第一汲極電極117。 The conductive materials 150A-150C can pass through the dielectric layer structure 160 and pass through different wiring layers 162A-162C until they contact the corresponding electrodes in the first layer body 110. Specifically, the conductive material 150A can pass through the dielectric layer structure 160 and the wiring layer 162A, thereby extending into the contact hole 142A of the first spacer 140A, and contacting the first source electrode of the first layer body 110 116; The conductive material 150B can pass through the dielectric layer structure 160 and the wiring layer 162B, thereby extending into the contact hole 142B of the first spacer 140B, and further through the first dielectric layer of the first layer 110 The layer 113 reaches the first gate electrode 115 contacting the first layer body 110; the conductive material 150C can pass through the dielectric layer body structure 160 and the wiring layer 162C, thereby extending into the contact hole 142C of the first spacer 140C , And contact the first drain electrode 117 of the first layer body 110.

同樣地,對於由導電材料150A-150C穿過的走線層162A-162C而言,其可藉由圍繞且接觸對應導電材料150A-150C的側壁的至少一部分,以電性連接對應導電材料150A-150C。因此,第一薄膜電晶體114的第一源極電極116、第一閘極電極115及第一汲極電極117可分別透過導電材料150A-150C分別電性連接走線層162A-162C,從而能更進一步地電性連接至扇出型走線區。 Similarly, for the wiring layers 162A-162C passing through the conductive materials 150A-150C, they can be electrically connected to the corresponding conductive materials 150A-150C by surrounding and contacting at least a part of the sidewalls of the corresponding conductive materials 150A-150C. 150C. Therefore, the first source electrode 116, the first gate electrode 115, and the first drain electrode 117 of the first thin film transistor 114 can be electrically connected to the wiring layers 162A-162C through the conductive materials 150A-150C, respectively, so as to be able to Furthermore, it is electrically connected to the fan-out wiring area.

請再看到第5圖,第5圖為根據本揭露內容的第五實施方式繪示電子裝置100E的側剖面示意圖。本實施方式中,第一層體110的第一元件係形成為包含薄膜電晶體、扇出型走線、發光二極體,而第二層體130的第二元件係形成為觸控線路,且本實施方式與第二實施方式的至少一個差異點在於,本實施方式對第一間隙物140A、140B及導電材料150A、150B的配置方式不同。 Please refer to FIG. 5 again, which is a schematic side sectional view of the electronic device 100E according to the fifth embodiment of the present disclosure. In this embodiment, the first element of the first layer body 110 is formed to include a thin film transistor, fan-out wiring, and a light emitting diode, and the second element of the second layer body 130 is formed as a touch circuit. And at least one difference between this embodiment and the second embodiment is that the configuration of the first spacers 140A, 140B and the conductive materials 150A, 150B is different in this embodiment.

具體來說,第一層體110除了包含前述的第一基板111、第一閘極絕緣層112、第一介電層113以及第一薄膜電晶體114以外,更包含了走線層164A、164B、平坦層119、畫素定義層166及發光元件170。走線層164A設置在第一閘極絕緣層112與第一介電層113之間,而走線層164B則設置在第一介電層113與平坦層119之間,且走線層164A、164B可延伸至進入電子裝置100E的扇出型走線區(未繪示)。平坦層119設置在第一介電層113上,而畫素定義層166設置在平坦層119上。畫素定義層166可定義出配置發光元件170的位置,例如畫素定義層166可具有開口,而發光元件170可設置在平坦層 119上並位在開口內,且第一薄膜電晶體114的第一汲極電極117可穿過平坦層119,以電性連接發光元件170。於部分實施方式中,發光元件170包含上電極及發光層,其中發光層係設置於第一汲極電極117與上電極之間,使得第一汲極電極117與上電極可共同施加偏壓予發光層。此外,於部分實施方式中,發光元件170可以是有機發光元件、無機發光元件、微米發光二極體(micro-LED)或是次毫米發光二極體(mini-LED)。 Specifically, the first layer body 110 not only includes the aforementioned first substrate 111, the first gate insulating layer 112, the first dielectric layer 113, and the first thin film transistor 114, but also includes wiring layers 164A and 164B. , A flat layer 119, a pixel definition layer 166, and a light-emitting element 170. The wiring layer 164A is disposed between the first gate insulating layer 112 and the first dielectric layer 113, and the wiring layer 164B is disposed between the first dielectric layer 113 and the flat layer 119, and the wiring layers 164A, 164B can extend into the fan-out wiring area (not shown) into the electronic device 100E. The flat layer 119 is disposed on the first dielectric layer 113, and the pixel definition layer 166 is disposed on the flat layer 119. The pixel defining layer 166 can define the position where the light emitting element 170 is arranged. For example, the pixel defining layer 166 can have an opening, and the light emitting element 170 can be arranged on a flat layer. The upper part 119 is located in the opening, and the first drain electrode 117 of the first thin film transistor 114 can pass through the flat layer 119 to be electrically connected to the light-emitting element 170. In some embodiments, the light-emitting element 170 includes an upper electrode and a light-emitting layer. The light-emitting layer is disposed between the first drain electrode 117 and the upper electrode, so that the first drain electrode 117 and the upper electrode can jointly apply a bias voltage. Luminescent layer. In addition, in some embodiments, the light-emitting element 170 may be an organic light-emitting element, an inorganic light-emitting element, a micro-LED or a sub-millimeter light-emitting diode (mini-LED).

第二層體130包含介電層體結構167以及觸控線路層168A、168B。觸控線路層168A、168B可位在介電層體結構167內,且觸控線路層168A、168B各自相對第一層體110的高度可不相同,此同樣可透過將介電層體結構167配置成複合層體實現,在此不再贅述。觸控線路層168A、168B可分別位在走線層164A、164B上方,其中第一間隙物140A位在走線層164A與觸控線路層168A之間,而第一間隙物140B位在走線層164B與觸控線路層168B之間。觸控線路層168A、168B可分別是驅動電極(Tx)與感應電極(Rx),以使電子裝置100E能具有觸控功能。 The second layer body 130 includes a dielectric layer body structure 167 and touch circuit layers 168A and 168B. The touch circuit layers 168A and 168B can be located in the dielectric layer structure 167, and the height of the touch circuit layers 168A and 168B relative to the first layer body 110 can be different. This can also be achieved by arranging the dielectric layer structure 167 It is realized as a composite layer, which will not be repeated here. The touch circuit layers 168A and 168B can be respectively located above the wiring layers 164A and 164B, wherein the first spacer 140A is located between the wiring layer 164A and the touch circuit layer 168A, and the first spacer 140B is located on the wiring Between the layer 164B and the touch circuit layer 168B. The touch circuit layers 168A and 168B may be driving electrodes (Tx) and sensing electrodes (Rx), respectively, so that the electronic device 100E can have a touch function.

導電材料150A、150B可穿過介電層體結構167,並穿過不同的觸控線路層168A、168B,直至接觸到第一層體110之中對應的走線層164A、164B。具體來說,導電材料150A可穿過介電層體結構167及觸控線路層168A,藉以延伸進入至第一間隙物140A的接觸洞142A內,並進一步地穿過第一層體110的平坦層119及第一介電層113,直至接觸第一 層體110的走線層164A;導電材料150B可穿過介電層體結構167及觸控線路層168B,藉以延伸進入至第一間隙物140B的接觸洞142B內,並進一步地穿過第一層體110的平坦層119,直至接觸第一層體110的走線層164B。 The conductive materials 150A and 150B can pass through the dielectric layer structure 167 and through different touch circuit layers 168A and 168B until they contact the corresponding wiring layers 164A and 164B in the first layer body 110. Specifically, the conductive material 150A can pass through the dielectric layer structure 167 and the touch circuit layer 168A, thereby extending into the contact hole 142A of the first spacer 140A, and further penetrate the flat surface of the first layer 110 Layer 119 and the first dielectric layer 113 until contacting the first The wiring layer 164A of the layer body 110; the conductive material 150B can pass through the dielectric layer structure 167 and the touch circuit layer 168B, thereby extending into the contact hole 142B of the first spacer 140B, and further passing through the first The flat layer 119 of the layer body 110 reaches to the wiring layer 164B of the first layer body 110.

同樣地,對於由導電材料150A、150B穿過的觸控線路層168A、168B而言,其可藉由圍繞且接觸對應導電材料150A、150B的側壁的至少一部分,以電性連接對應導電材料150A、150B。因此,第一層體110的走線層164A、164B可透過導電材料150A、150B分別電性連接觸控線路層168A、168B,以將觸控線路層168A、168B電性連接至扇出型走線區。雖本實施方式是將導電材料150A、150B形成為具有凹槽,然而本揭露內容不以此為限,於其他實施方式中,也可將此具有凹槽之導電材料150A、150B更換為柱狀結構。 Similarly, for the touch circuit layers 168A, 168B passing through the conductive materials 150A, 150B, they can be electrically connected to the corresponding conductive materials 150A by surrounding and contacting at least a part of the sidewalls of the corresponding conductive materials 150A, 150B. , 150B. Therefore, the wiring layers 164A and 164B of the first layer body 110 can be electrically connected to the touch circuit layers 168A and 168B through the conductive materials 150A and 150B, respectively, so as to electrically connect the touch circuit layers 168A and 168B to the fan-out type wiring. Line area. Although this embodiment forms the conductive materials 150A, 150B with grooves, the content of the disclosure is not limited to this. In other embodiments, the conductive materials 150A, 150B with grooves can also be replaced with columnar shapes. structure.

除了上所述的結構配置外,也可以變更上述組合,例如可省略第五實施方式的發光元件170,並保留走線層164A、164B。 In addition to the above-mentioned structural configuration, the above-mentioned combination can also be changed. For example, the light-emitting element 170 of the fifth embodiment can be omitted, and the wiring layers 164A and 164B can be retained.

以下將對電子裝置的製作方法做說明,為了不使圖式過於複雜,製作方法中的第一層體與第二層體係繪示成如第1圖所示的外觀,然而本揭露內容不以此為限,所繪示的第一層體與第二層體係可配置為具有薄膜電晶體、無機發光二極體、有機發光二極體、扇出型走線、觸控線路或其組合。 The manufacturing method of the electronic device will be described below. In order not to make the diagram too complicated, the first layer and the second layer system in the manufacturing method are drawn as shown in Figure 1. However, the content of this disclosure is not This is a limitation. The illustrated first layer and second layer system can be configured to have thin-film transistors, inorganic light-emitting diodes, organic light-emitting diodes, fan-out wiring, touch-control circuits, or a combination thereof.

請參照第6A圖至第6D圖,其分別為根據本揭露內容的部分實施方式繪示電子裝置於製作方法中的不同階段的側剖面示意圖。 Please refer to FIG. 6A to FIG. 6D, which are respectively schematic side cross-sectional diagrams illustrating different stages of the manufacturing method of the electronic device according to some embodiments of the present disclosure.

如第6A圖所示,可先在第一承載基板102上形成第一層體110,其中第一承載基板102可以是玻璃基板,而第一層體110可如前述包含第一元件。接著,可於第一層體110上形成第一間隙物140,其中第一間隙物140可透過光罩製程來圖案化單一膜層而形成,此單一膜層可包含壓克力材料、聚亞醯胺、光感應樹酯或其組合,或是採用噴墨列印(Ink-jet printing;IJP)的方式形成。於部分實施方式中,可對所形成的第一間隙物140進行表面處理,以提升第一間隙物140的潔淨度,從而利於後續製程的良率。於部分實施方式中,所形成的第一間隙物140的厚度可以是約0.1微米至約200微米,或者亦可為約2微米至約5微米。此外,本揭露內容中,所形成的第一間隙物140的形狀可不以第6A圖所繪為限,於其他實施方式中,第一間隙物140也可以倒梯形、矩形或具有弧面。 As shown in FIG. 6A, the first layer body 110 may be formed on the first carrier substrate 102 first, wherein the first carrier substrate 102 may be a glass substrate, and the first layer body 110 may include the first element as described above. Next, a first spacer 140 can be formed on the first layer body 110, wherein the first spacer 140 can be formed by patterning a single film layer through a photomask process, and the single film layer can include acrylic material, polyacrylic material, etc. Amide, light-sensitive resin, or a combination thereof, or formed by ink-jet printing (IJP). In some embodiments, the formed first spacer 140 may be subjected to surface treatment to improve the cleanliness of the first spacer 140, thereby facilitating the yield of subsequent processes. In some embodiments, the thickness of the formed first spacer 140 may be about 0.1 μm to about 200 μm, or may also be about 2 μm to about 5 μm. In addition, in the present disclosure, the shape of the formed first spacer 140 may not be limited to that depicted in FIG. 6A. In other embodiments, the first spacer 140 may also be inverted trapezoid, rectangular or curved.

如第6B圖所示,在第一間隙物140形成後,可於第一層體110之上配置填充物120。所配置的填充物120可以高過第一間隙物140,使得填充物120在後續製程中能有足夠的量可被擠壓而向外流動。於部分實施方式中,當電子裝置係應用成為顯示裝置時,填充物120也可以是配置在周邊區,並藉由引流的方式導引至顯示區。 As shown in FIG. 6B, after the first spacer 140 is formed, the filler 120 may be disposed on the first layer body 110. The configured filler 120 may be higher than the first spacer 140, so that the filler 120 can be squeezed and flowed outward in a sufficient amount in the subsequent manufacturing process. In some embodiments, when the electronic device is used as a display device, the filler 120 may also be arranged in the peripheral area and guided to the display area by way of drainage.

如第6C圖所示,可在第二承載基板108上形成第二層體130,其中第二承載基板108可以是玻璃基板130,而第二層體130可如前述包含第二元件。接著,再將第二承載基板108及第二層體130配置在第一間隙物140以及填充物120之上,以完成對組。於對組過程中,第二層體130會覆蓋至第一 間隙物140以及填充物120之上,並擠壓多餘的填充物120,使得填充物120能填滿於第一層體110與第二層體130之間。於對組之後,即可使第二承載基板108自第二層體130脫離。 As shown in FIG. 6C, the second layer body 130 may be formed on the second carrier substrate 108, wherein the second carrier substrate 108 may be a glass substrate 130, and the second layer body 130 may include the second element as described above. Then, the second carrier substrate 108 and the second layer body 130 are disposed on the first spacer 140 and the filler 120 to complete the pairing. During the pairing process, the second layer body 130 will cover the first On the spacer 140 and the filler 120, the excess filler 120 is squeezed so that the filler 120 can be filled between the first layer body 110 and the second layer body 130. After the assembly, the second carrier substrate 108 can be separated from the second layer body 130.

如第6D圖所示,可進行穿孔製程,其包含移除一部分的第二層體130及一部分的第一間隙物140,並可在第一間隙物140內形成連通至第一層體110的接觸洞142。於部分實施方式中,穿孔製程可藉由雷射蝕刻、反應離子刻蝕(reactive-ion etching;RIE)、電感耦合電漿蝕刻(inductively coupled plasma RIE;ICP-RIE)或氣體電漿蝕刻實現。接著,可在接觸洞142內形成導電材料150,且導電材料150會高過第二層體130,從而形成穿過第二層體130及第一間隙物140之導電材料150。由於導電材料150可形成在接觸洞142內,故導電材料150可電性連接第一層體110。同樣地,導電材料150可形成為柱狀結構或是具有凹槽。在導電材料150形成後,即可使第一承載基板102自第一層體110脫離,從而得到如前述所繪的電子裝置的結構。 As shown in FIG. 6D, a perforation process can be performed, which includes removing a part of the second layer body 130 and a part of the first spacer 140, and forming a connection to the first layer body 110 in the first spacer 140 Contact hole 142. In some embodiments, the perforation process can be achieved by laser etching, reactive-ion etching (RIE), inductively coupled plasma RIE (ICP-RIE), or gas plasma etching. Then, a conductive material 150 may be formed in the contact hole 142, and the conductive material 150 will be higher than the second layer body 130, thereby forming a conductive material 150 passing through the second layer body 130 and the first spacer 140. Since the conductive material 150 can be formed in the contact hole 142, the conductive material 150 can be electrically connected to the first layer body 110. Similarly, the conductive material 150 may be formed in a columnar structure or have grooves. After the conductive material 150 is formed, the first carrier substrate 102 can be detached from the first layer body 110 to obtain the structure of the electronic device as described above.

透過採用上述製作流程,形成導電材料150的步驟係會是進行於將第二層體130覆蓋至第一間隙物140以及填充物120之上的步驟之後,如此一來,可在確定第一層體110與第二層體130之間的距離後,才在第一間隙物140內形成接觸洞142。也就是說,接觸洞142是在其預計深度可被確定的情況下形成,因此可使接觸洞142具有穩定的穿孔尺寸,並提升接觸洞142的穿孔品質。 By using the above-mentioned manufacturing process, the step of forming the conductive material 150 will be performed after the step of covering the second layer 130 on the first spacer 140 and the filler 120. In this way, the first layer can be determined The contact hole 142 is formed in the first spacer 140 only after the distance between the body 110 and the second layer body 130. In other words, the contact hole 142 is formed under the condition that the expected depth of the contact hole 142 can be determined, so that the contact hole 142 can have a stable perforation size, and the perforation quality of the contact hole 142 can be improved.

再者,同前所述,由於第一層體110與第二層體 130之間的距離可等於或近似於第一間隙物140的厚度,故可避免第一層體110與第二層體130之間的距離過小或過大。當第一層體110與第二層體130之間的距離過小時,將可能造成第一層體110與第二層體130之間的層體或元件遭到擠壓,而當第一層體110與第二層體130之間的距離過大時,將可能致使電子裝置的厚度過厚。 Furthermore, as mentioned above, since the first layer body 110 and the second layer body The distance between 130 may be equal to or similar to the thickness of the first spacer 140, so that the distance between the first layer body 110 and the second layer body 130 can be prevented from being too small or too large. When the distance between the first layer body 110 and the second layer body 130 is too small, the layer body or components between the first layer body 110 and the second layer body 130 may be squeezed. When the distance between the body 110 and the second layer body 130 is too large, the thickness of the electronic device may be too thick.

請參照第7A圖至第7D圖,其分別為根據本揭露內容的部分實施方式繪示電子裝置於製作方法中的不同階段的側剖面示意圖。本實施方式與前述製作方法的至少一個差異點在於,本實施方式中,可在配置填充物的步驟之前,先對第一間隙物進行穿孔製程。 Please refer to FIG. 7A to FIG. 7D, which are respectively schematic side cross-sectional diagrams showing different stages of the manufacturing method of the electronic device according to some embodiments of the present disclosure. At least one difference between this embodiment and the aforementioned manufacturing method is that in this embodiment, the first spacer may be perforated before the step of disposing the filler.

具體來說,如第7A圖所示,當在第一承載基板102上形成第一層體110與第一間隙物140之後,可先對第一間隙物140進行穿孔製程,以在第一間隙物140內形成預穿孔141。 Specifically, as shown in FIG. 7A, after the first layer body 110 and the first spacer 140 are formed on the first carrier substrate 102, the first spacer 140 may be first subjected to a perforation process to make the first gap A pre-perforated hole 141 is formed in the object 140.

如第7B圖所示,在第一間隙物140形成後,可於第一層體110之上配置填充物120。所配置的填充物120可以高過第一間隙物140,使得填充物120在後續製程中能有足夠的量可被擠壓而向外流動。 As shown in FIG. 7B, after the first spacer 140 is formed, the filler 120 may be disposed on the first layer body 110. The configured filler 120 may be higher than the first spacer 140, so that the filler 120 can be squeezed and flowed outward in a sufficient amount in the subsequent manufacturing process.

如第7C圖所示,可在第二承載基板108上形成第二層體130,並將第二層體130固定至第一間隙物140以及填充物120之上,以完成對組。接著,可使第二承載基板108自第二層體130脫離,此可同於前第6C圖所述的製作階段,在此不再贅述。 As shown in FIG. 7C, a second layer body 130 may be formed on the second carrier substrate 108, and the second layer body 130 may be fixed on the first spacer 140 and the filler 120 to complete the pairing. Then, the second carrier substrate 108 can be detached from the second layer body 130, which can be the same as the manufacturing stage described in FIG. 6C, and will not be repeated here.

如第7D圖所示,可進行穿孔製程,其至少包含移除一部分的第二層體130,並於第一間隙物140內形成連通至第一層體110的接觸洞142。於部分實施方式中,若預穿孔141(如第7A圖所示)的尺寸與預計形成的接觸洞142的尺寸相同,則在移除一部分的第二層體130後,即可將預穿孔141視為接觸洞142。於其他實施方式中,若預穿孔141(如第7A圖所示)的尺寸小於預計形成的接觸洞142的尺寸,則在移除一部分的第二層體130後,即繼續移除一部分的第一間隙物140,以形成接觸洞142。接著,可在接觸洞142內形成導電材料150,且導電材料150係穿過第二層體130及第一間隙物140,同樣地,導電材料150可形成為柱狀結構或是具有凹槽。於形成導電材料150後,使第一承載基板102自第一層體110脫離,此可同於前第6D圖所述的製作階段,在此不再贅述。 As shown in FIG. 7D, a perforation process can be performed, which includes at least removing a part of the second layer body 130, and forming a contact hole 142 in the first spacer 140 that is connected to the first layer body 110. In some embodiments, if the size of the pre-perforated hole 141 (as shown in FIG. 7A) is the same as the size of the expected contact hole 142, the pre-perforated hole 141 can be removed after a part of the second layer body 130 is removed. Considered as a contact hole 142. In other embodiments, if the size of the pre-perforated hole 141 (as shown in FIG. 7A) is smaller than the size of the contact hole 142 that is expected to be formed, after removing a part of the second layer body 130, the removal of a part of the first layer is continued. A spacer 140 is used to form a contact hole 142. Then, a conductive material 150 may be formed in the contact hole 142, and the conductive material 150 may pass through the second layer body 130 and the first spacer 140. Similarly, the conductive material 150 may be formed in a columnar structure or have a groove. After the conductive material 150 is formed, the first carrier substrate 102 is detached from the first layer body 110, which can be the same as the manufacturing stage described in FIG. 6D, and will not be repeated here.

透過採用上述製作流程,可提升形成接觸洞142的良率,並使製作流程能更具有彈性。 By adopting the above-mentioned manufacturing process, the yield rate of forming the contact hole 142 can be improved, and the manufacturing process can be more flexible.

請參照第8A圖至第8E圖,其分別為根據本揭露內容的部分實施方式繪示電子裝置於製作方法中的不同階段的側剖面示意圖。本實施方式與前述製作方法的至少一個差異點在於,本實施方式中,導電材料係形成於對組之前。 Please refer to FIG. 8A to FIG. 8E, which are respectively schematic side cross-sectional diagrams showing the electronic device at different stages of the manufacturing method according to some embodiments of the present disclosure. At least one difference between this embodiment and the aforementioned manufacturing method is that in this embodiment, the conductive material is formed before the pair.

具體來說,如第8A圖所示,可先在第一承載基板102上形成第一層體110,且第一層體110係形成為具有第一元件。接著,可透過光罩製程來圖案化單一膜層,以在第一層體110上形成第一間隙物140,此可同於前第6A圖所述的製作階段,在此不再贅述。 Specifically, as shown in FIG. 8A, the first layer body 110 may be formed on the first carrier substrate 102 first, and the first layer body 110 is formed to have the first element. Then, a single film layer can be patterned through a photomask process to form a first spacer 140 on the first layer body 110, which can be the same as the manufacturing stage described in FIG. 6A, and will not be repeated here.

如第8B圖所示,可對第一間隙物140進行穿孔製程,以在第一間隙物140內形成連通至第一層體110的接觸洞142。接著,可在接觸洞142內形成導電材料172,且導電材料172可高過第一間隙物140,從而形成穿過第一間隙物140之導電材料172。由於導電材料172是形成在接觸洞142內,故導電材料172可電性連接第一層體110。此外,可在第二承載基板108上形成第二層體130,且第二層體130係形成為具有第二元件,並接著可在第二層體130上形成導電墊174,其中導電墊174可電性連接第二層體130的第二元件。於部分實施方式中,導電墊174可以是透過圖案化金屬層而形成,例如圖案化銅金屬層。 As shown in FIG. 8B, the first spacer 140 may be subjected to a perforation process to form a contact hole 142 in the first spacer 140 that is connected to the first layer body 110. Then, a conductive material 172 may be formed in the contact hole 142, and the conductive material 172 may be higher than the first spacer 140, thereby forming a conductive material 172 passing through the first spacer 140. Since the conductive material 172 is formed in the contact hole 142, the conductive material 172 can be electrically connected to the first layer body 110. In addition, a second layer body 130 may be formed on the second carrier substrate 108, and the second layer body 130 is formed to have a second element, and then a conductive pad 174 may be formed on the second layer body 130, wherein the conductive pad 174 The second element of the second layer body 130 can be electrically connected. In some embodiments, the conductive pad 174 may be formed through a patterned metal layer, such as a patterned copper metal layer.

如第8C圖所示,在第一間隙物140及穿過其的導電材料172形成後,可於第一層體110之上配置填充物120。所配置的填充物120可以高過第一間隙物140及導電材料172使得填充物120在後續製程中能有足夠的量可被擠壓而向外流動。此外,填充物120可不配置在第二承載基板108之上。 As shown in FIG. 8C, after the first spacer 140 and the conductive material 172 passing therethrough are formed, the filler 120 may be disposed on the first layer body 110. The configured filler 120 may be higher than the first spacer 140 and the conductive material 172 so that the filler 120 can be squeezed and flowed outward in a sufficient amount in the subsequent manufacturing process. In addition, the filler 120 may not be disposed on the second carrier substrate 108.

如第8D圖所示,可將第二承載基板108及第二層體130配置在第一間隙物140以及填充物120之上,其中第二層體130會覆蓋至填充物120之上,以完成對組。於對組過程中,導電墊174可對準導電材料172。因此,於完成對組之後,導電墊174會設置於導電材料172與第二層體130之間,並連接至導電材料172,以使導電材料172與第二元件可藉由導電墊174電性連接。如此一來,可使第二層體130的第二元件能透過導電墊174及導電材料172而電性連接第一層體110的第一元 件。此外,在對組過程中,第二層體130會擠壓多餘的填充物120,使得填充物120能填滿於第一層體110與第二層體130之間。 As shown in FIG. 8D, the second carrier substrate 108 and the second layer body 130 can be disposed on the first spacer 140 and the filler 120, wherein the second layer body 130 will cover the filler 120 to Complete the pair. During the pairing process, the conductive pad 174 can be aligned with the conductive material 172. Therefore, after the pairing is completed, the conductive pad 174 is disposed between the conductive material 172 and the second layer body 130, and is connected to the conductive material 172, so that the conductive material 172 and the second element can be electrically connected through the conductive pad 174 connect. In this way, the second element of the second layer body 130 can be electrically connected to the first element of the first layer body 110 through the conductive pad 174 and the conductive material 172. Pieces. In addition, during the assembly process, the second layer body 130 squeezes the excess filler 120 so that the filler 120 can be filled between the first layer body 110 and the second layer body 130.

如第8E圖所示,於完成對組之後,即可使第一承載基板102自第一層體110脫離,並也使第二承載基板108自第二層體130脫離。透過採用上述製作流程,可使製作流程能更具有彈性。 As shown in FIG. 8E, after the pairing is completed, the first carrier substrate 102 can be separated from the first layer body 110, and the second carrier substrate 108 can also be separated from the second layer body 130. By adopting the above-mentioned production process, the production process can be made more flexible.

請參照第9A圖至第9C圖,其分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的側剖面示意圖。本實施方式與前述製作方法的至少一個差異點在於,本實施方式中,可在第二層體上形成延伸間隙物。 Please refer to FIG. 9A to FIG. 9C, which are respectively schematic side cross-sectional diagrams showing the electronic device at different stages in the manufacturing process according to some embodiments of the present disclosure. At least one difference between this embodiment and the aforementioned manufacturing method is that in this embodiment, an extension spacer can be formed on the second layer body.

具體來說,如第9A圖所示,可先在第一承載基板102上形成第一層體110,且第一層體110係形成為具有第一元件,並接著透過光罩製程來圖案化單一膜層,以在第一層體110上形成第一間隙物140。在此階段中,可對部分的第一間隙物140進行穿孔製程,以使部分的第一間隙物140會具有接觸洞142。舉例來說,第一間隙物140即先透過穿孔製程而具有接觸洞142,而第一間隙物140’則尚未具有接觸洞。另一方面,可在第二承載基板108上形成第二層體130,且第二層體130係形成為具有第二元件,並接著透過光罩製程來圖案化單一膜層,而在第二層體130上形成延伸間隙物180。同樣地,在此階段中,可對部分的延伸間隙物180進行穿孔製程,以使部分的延伸間隙物180會具有接觸洞182。舉例來說,延伸間隙物180即先透過穿孔製程而具有接觸洞182,而延伸間隙物 180’則尚未具有接觸洞。 Specifically, as shown in FIG. 9A, a first layer body 110 can be formed on the first carrier substrate 102 first, and the first layer body 110 is formed to have a first element, and then patterned through a photomask process A single film layer is used to form a first spacer 140 on the first layer body 110. In this stage, part of the first spacer 140 may be subjected to a perforation process, so that a part of the first spacer 140 will have a contact hole 142. For example, the first spacer 140 first has a contact hole 142 through the perforation process, while the first spacer 140' does not yet have a contact hole. On the other hand, the second layer body 130 can be formed on the second carrier substrate 108, and the second layer body 130 is formed with a second element, and then a single film layer is patterned through a photomask process. An extension spacer 180 is formed on the layer body 130. Similarly, at this stage, a part of the extension spacer 180 may be subjected to a perforation process, so that a part of the extension spacer 180 will have a contact hole 182. For example, the extension spacer 180 first has a contact hole 182 through the perforation process, and the extension spacer 180 180’ does not yet have contact holes.

如第9B圖所示,可將第二承載基板108及第二層體130配置在第一承載基板102及第一層體110之上,以完成對組。於對組過程中,填充物120會配置於第一層體110與第二層體130之間,且延伸間隙物180可對準第一間隙物140。因此,於完成對組之後,第一間隙物140與延伸間隙物180會相連接,且其各自的接觸洞142與接觸洞182也會相連通。此外,在對組過程中,第二層體130會擠壓多餘的填充物120,使得填充物120能填滿於第一層體110與第二層體130之間。 As shown in FIG. 9B, the second carrier substrate 108 and the second layer body 130 can be disposed on the first carrier substrate 102 and the first layer body 110 to complete the pairing. During the assembly process, the filler 120 is disposed between the first layer body 110 and the second layer body 130, and the extension spacer 180 can be aligned with the first spacer 140. Therefore, after the pairing is completed, the first spacer 140 and the extension spacer 180 will be connected, and their respective contact holes 142 and contact holes 182 will also be connected. In addition, during the assembly process, the second layer body 130 squeezes the excess filler 120 so that the filler 120 can be filled between the first layer body 110 and the second layer body 130.

如第9C圖所示,可先將第二承載基板108自第二層體130脫離,並接著進行穿孔製程,其包含移除一部分的第二層體130、一部分的第一間隙物140及一部分的延伸間隙物180,並可在原先未具有接觸洞的第一間隙物140’與延伸間隙物180’內形成連通至第一層體110的接觸洞184。接著,可在接觸洞184內形成導電材料150,且導電材料150係穿過第二層體130、第一間隙物140、140’及延伸間隙物180、180’,同樣地,導電材料150可形成為柱狀結構或是具有凹槽。之後,可使第一承載基板102自第一層體110脫離。 As shown in FIG. 9C, the second carrier substrate 108 can be detached from the second layer body 130 first, and then a perforation process is performed, which includes removing a part of the second layer body 130, a part of the first spacer 140, and a part The extension spacer 180 can form a contact hole 184 connected to the first layer body 110 in the first spacer 140 ′ and the extension spacer 180 ′ that did not have a contact hole. Then, a conductive material 150 can be formed in the contact hole 184, and the conductive material 150 passes through the second layer body 130, the first spacers 140, 140', and the extension spacers 180, 180'. Similarly, the conductive material 150 can be It is formed into a columnar structure or has grooves. After that, the first carrier substrate 102 can be detached from the first layer body 110.

透過採用上述製作流程,可使第一層體110與第二層體130之間的距離能更有彈性。換言之,若遭遇到要增加第一層體110與第二層體130之間的距離之需求時,可選擇在第一層體110及第二層體130上分別形成間隙物,以於對組後增加第一層體110與第二層體130之間的距離。如此一來,可不用增加形成在第一層體110上的第一間隙物140的厚度,此 可利於維持第一間隙物140的成膜品質。 By adopting the above-mentioned manufacturing process, the distance between the first layer body 110 and the second layer body 130 can be made more flexible. In other words, if there is a need to increase the distance between the first layer body 110 and the second layer body 130, spacers can be formed on the first layer body 110 and the second layer body 130 respectively to form a pair of Then the distance between the first layer body 110 and the second layer body 130 is increased. In this way, there is no need to increase the thickness of the first spacer 140 formed on the first layer body 110. This It is beneficial to maintain the film forming quality of the first spacer 140.

請參照第10A圖至第10C圖,其分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的側剖面示意圖。本實施方式與前述製作方法的至少一個差異點在於,本實施方式中,可在第二層體上形成輔助間隙物,且輔助間隙物會置入於第一間隙物的接觸洞內。 Please refer to FIG. 10A to FIG. 10C, which are schematic side cross-sectional diagrams illustrating the electronic device at different stages in the manufacturing process according to some embodiments of the present disclosure. At least one difference between this embodiment and the aforementioned manufacturing method is that in this embodiment, an auxiliary spacer can be formed on the second layer body, and the auxiliary spacer will be placed in the contact hole of the first spacer.

具體來說,如第10A圖所示,可先在第一承載基板102上形成第一層體110,且第一層體110係形成為具有第一元件,並接著透過光罩製程來圖案化單一膜層,以在第一層體110上形成第一間隙物140,且可再對第一間隙物140進行穿孔製程,以使第一間隙物140會具有接觸洞142。另一方面,可先在第二承載基板108上形成第二層體130,且第二層體130係形成為具有第二元件,並接著透過光罩製程來圖案化單一膜層,而在第二層體130上形成輔助間隙物190。 Specifically, as shown in FIG. 10A, a first layer body 110 may be formed on the first carrier substrate 102 first, and the first layer body 110 is formed to have a first element, and then patterned through a photomask process A single film layer is used to form a first spacer 140 on the first layer body 110, and the first spacer 140 can be further subjected to a perforation process, so that the first spacer 140 will have a contact hole 142. On the other hand, the second layer body 130 can be formed on the second carrier substrate 108 first, and the second layer body 130 is formed with the second element, and then a single film layer is patterned through a photomask process, and the second layer 130 is formed on the second carrier substrate 108. An auxiliary spacer 190 is formed on the two-layer body 130.

如第10B圖所示,可將第二層體130配置在第一層體110之上,以完成對組,且於對組後,可將第二承載基板108自第二層體130脫離。於對組過程中,填充物120會配置於第一層體110與第二層體130之間,且輔助間隙物190可對準第一間隙物140的接觸洞142。因此,於完成對組之後,輔助間隙物190會置入於第一間隙物140的接觸洞142內。此外,在對組過程中,第二層體130會擠壓多餘的填充物120,使得填充物120能填滿於第一層體110與第二層體130之間。 As shown in FIG. 10B, the second layer body 130 can be disposed on the first layer body 110 to complete the pairing, and after the pairing, the second carrier substrate 108 can be separated from the second layer body 130. During the assembly process, the filler 120 is disposed between the first layer body 110 and the second layer body 130, and the auxiliary spacer 190 can be aligned with the contact hole 142 of the first spacer 140. Therefore, after the pairing is completed, the auxiliary spacer 190 will be inserted into the contact hole 142 of the first spacer 140. In addition, during the assembly process, the second layer body 130 squeezes the excess filler 120 so that the filler 120 can be filled between the first layer body 110 and the second layer body 130.

如第10C圖所示,可接著進行穿孔製程,其包含移除一部分的第二層體130以及至少一部分的輔助間隙物 190,並可在輔助間隙物190內形成連通至第一層體110的輔助接觸洞192。接著,可在輔助接觸洞192內形成導電材料150,且導電材料150係穿過第二層體130、第一間隙物140及輔助間隙物190,同樣地,導電材料150可形成為柱狀結構或是具有凹槽。之後,可將第一承載基板102自第一層體110脫離。 As shown in FIG. 10C, a perforation process can be followed, which includes removing a part of the second layer body 130 and at least a part of the auxiliary spacer 190, and an auxiliary contact hole 192 connected to the first layer body 110 may be formed in the auxiliary spacer 190. Then, a conductive material 150 may be formed in the auxiliary contact hole 192, and the conductive material 150 may pass through the second layer body 130, the first spacer 140, and the auxiliary spacer 190. Similarly, the conductive material 150 may be formed into a columnar structure Or have grooves. After that, the first carrier substrate 102 can be detached from the first layer body 110.

透過採用上述製作流程,可提升第一層體110與第二層體130之間的對位精準度。此外,於部分實施方式中,在進行穿孔製程之後,也可以是完全地移除輔助間隙物190,如此一來,導電材料150將會形成在第一間隙物140的接觸洞142內,並與第一間隙物140形成交界面,而由於第一間隙物140的內壁表面原先是由輔助間隙物190蓋住,故可於製程期間維持第一間隙物140的內壁表面的潔淨度。 By using the above-mentioned manufacturing process, the alignment accuracy between the first layer body 110 and the second layer body 130 can be improved. In addition, in some embodiments, after the perforation process, the auxiliary spacer 190 may also be completely removed. In this way, the conductive material 150 will be formed in the contact hole 142 of the first spacer 140, and will be The first spacer 140 forms an interface, and since the inner wall surface of the first spacer 140 is originally covered by the auxiliary spacer 190, the cleanliness of the inner wall surface of the first spacer 140 can be maintained during the manufacturing process.

請參照第11A圖至第11G圖,其分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的示意圖。本實施方式與前述製作方法的至少一個差異點在於,本實施方式中,可在第二層體上形成第二間隙物,以提供對填充物的引流效果。 Please refer to FIG. 11A to FIG. 11G, which are schematic diagrams illustrating different stages of the manufacturing process of the electronic device according to some embodiments of the present disclosure. At least one difference between this embodiment and the aforementioned manufacturing method is that, in this embodiment, a second spacer can be formed on the second layer body to provide a drainage effect for the filler.

具體來說,如第11A圖及第11B圖所示,其分別繪示製作階段中的側剖面視角及正視視角,可先在第一承載基板102上形成第一層體110,且第一層體110係形成為具有第一元件,並接著透過光罩製程來圖案化單一膜層,以在第一層體110上形成第一間隙物140。第一間隙物140可以是沿著彼此相異的第一方向D1與第二方向D2排列成陣列,其中第一方向D1與第二方向D2可以是呈正交關係,例如第一方向D1可以是縱 向方向,而第二方向D2則可以是橫向方向。 Specifically, as shown in FIG. 11A and FIG. 11B, which respectively illustrate the side sectional view angle and the front view angle in the manufacturing stage, the first layer body 110 may be formed on the first carrier substrate 102 first, and the first layer The body 110 is formed to have a first element, and then a single film layer is patterned through a photomask process to form a first spacer 140 on the first layer body 110. The first spacers 140 may be arranged in an array along a first direction D1 and a second direction D2 that are different from each other. The first direction D1 and the second direction D2 may be in an orthogonal relationship. For example, the first direction D1 may be vertical Direction, and the second direction D2 may be a lateral direction.

如第11C圖及第11D圖所示,其分別繪示製作階段中的側剖面視角及正視視角,可在第二承載基板108上形成第二層體130,且第二層體130係形成為具有第二元件,並接著透過光罩製程來圖案化單一膜層,以在第二層體上形成第二間隙物200。第二間隙物200可以沿著第一方向D1延伸,使得第二間隙物200在第一方向D1上的長度會大於第一間隙物140在第一方向D1上的長度,此外,第二間隙物200係沿著第二方向D2排列。 As shown in Figures 11C and 11D, which respectively illustrate the side sectional view and the front view in the manufacturing stage, the second layer body 130 can be formed on the second carrier substrate 108, and the second layer body 130 is formed as It has a second element, and then a single film layer is patterned through a photomask process to form a second spacer 200 on the second layer body. The second spacer 200 may extend along the first direction D1, so that the length of the second spacer 200 in the first direction D1 is greater than the length of the first spacer 140 in the first direction D1. In addition, the second spacer 200 The 200 is arranged along the second direction D2.

如第11E圖所示,其繪示製作階段中的正視視角,在第二間隙物200形成後,可於第二層體130之上配置填充物。所配置的填充物120可以高過第二間隙物200,使得填充物120在後續製程中能有足夠的量可被擠壓而向外流動。 As shown in FIG. 11E, which shows the front view during the manufacturing stage, after the second spacer 200 is formed, a filler can be disposed on the second layer body 130. The configured filler 120 may be higher than the second spacer 200, so that the filler 120 can be squeezed and flowed outward in a sufficient amount in the subsequent manufacturing process.

如第11F圖所示,其繪示製作階段中的側剖面視角,可將第二承載基板108及第二層體130配置在第一承載基板102及第一層體110之上,以完成對組。於對組過程中,第二間隙物200可對準第一間隙物140之間的間隔。因此,於完成對組之後,第一間隙物140與第二間隙物200會是交錯排列的。更進一步來說,在後續製程中,將會形成穿過第一間隙物140的導電材料,因此在第一層體110與第二層體130之間,第一間隙物140以外的區域可視為是沒有電性導通需求之區域,也因此,第二間隙物200可被配置在這些沒有電性導通需求之區域,以使填充物120能被擠壓至更廣的分佈位置,從而提升壓合均勻性。 As shown in Figure 11F, which shows the side cross-sectional view during the manufacturing stage, the second carrier substrate 108 and the second layer body 130 can be arranged on the first carrier substrate 102 and the first layer body 110 to complete the alignment. Group. During the pairing process, the second spacer 200 can be aligned with the space between the first spacers 140. Therefore, after the pairing is completed, the first spacers 140 and the second spacers 200 are arranged in a staggered manner. Furthermore, in the subsequent manufacturing process, a conductive material passing through the first spacer 140 will be formed. Therefore, between the first layer body 110 and the second layer body 130, the area outside the first spacer 140 can be regarded as It is an area where there is no electrical conduction requirement. Therefore, the second spacer 200 can be arranged in these areas where there is no electrical conduction requirement, so that the filler 120 can be squeezed to a wider distribution position, thereby improving the pressing Uniformity.

此外,第一間隙物140的高度會大於第二間隙物200的高度,如此一來,設置於第一層體110與第二層體130之間的第二間隙物200可透過填充物120而與第一層體110及第一間隙物140完全分隔開來,此將導致可僅以第一間隙物140支撐住第二層體130,而第二間隙物200則傾向對填充物120提供引流效果。 In addition, the height of the first spacer 140 is greater than the height of the second spacer 200. As a result, the second spacer 200 disposed between the first layer body 110 and the second layer body 130 can pass through the filler 120. It is completely separated from the first layer body 110 and the first spacer 140, which will cause the second layer body 130 to be supported only by the first spacer 140, while the second spacer 200 tends to provide the filler 120 Drainage effect.

如第11G圖所示,其繪示製作階段中的側剖面視角,可將第二承載基板108自第二層體130脫離,並接著進行穿孔製程,其包含移除一部分的第二層體130以及一部分的第一間隙物140,並可在第一間隙物140內形成連通至第一層體110的接觸洞142。接著,可在接觸洞142內形成導電材料150,且導電材料係穿過第二層體130及第一間隙物140。同樣地,導電材料150可形成為柱狀結構或是具有凹槽。之後,可使第一承載基板102自第一層體110脫離。 As shown in FIG. 11G, which shows a side cross-sectional view during the manufacturing stage, the second carrier substrate 108 can be detached from the second layer body 130, and then a perforation process is performed, which includes removing a part of the second layer body 130 And a part of the first spacer 140, and a contact hole 142 connected to the first layer body 110 may be formed in the first spacer 140. Then, a conductive material 150 can be formed in the contact hole 142, and the conductive material passes through the second layer body 130 and the first spacer 140. Similarly, the conductive material 150 may be formed in a columnar structure or have grooves. After that, the first carrier substrate 102 can be detached from the first layer body 110.

透過採用上述製作流程,可因第二間隙物200能對填充物120提供引流效果,故可提升提升壓合均勻性。此外,利用第二間隙物200來提供引流效果在結構方面會是具有高相容性的,亦即,第二間隙物200也可以應用至其他實施方式。 By adopting the above-mentioned manufacturing process, since the second spacer 200 can provide a drainage effect to the filler 120, the uniformity of pressing can be improved. In addition, the use of the second spacer 200 to provide a drainage effect is structurally highly compatible, that is, the second spacer 200 can also be applied to other embodiments.

請再看到第12A圖,第12A圖為根據本揭露內容的第六實施方式繪示電子裝置100F的側剖面示意圖。本實施方式與第四實施方式的至少一個差異點在於,本實施方式的結構可配置為三層結構,而第四實施方式的結構則是配置為兩層結構。 Please see FIG. 12A again. FIG. 12A is a schematic side cross-sectional view of the electronic device 100F according to the sixth embodiment of the present disclosure. At least one difference between this embodiment and the fourth embodiment is that the structure of this embodiment can be configured as a three-layer structure, while the structure of the fourth embodiment is configured as a two-layer structure.

具體來說,本實施方式的電子裝置100F更包含填充物210、第三間隙物220、導電材料230以及第三層體240,其中本實施方式的第一層體110、第二層體130及其之間的第一間隙物140、導電材料150C和填充物120可相同或相似於第四實施方式的元件配置,這些與第四實施方式相同或相似的元件配置在此不再贅述。 Specifically, the electronic device 100F of this embodiment further includes a filler 210, a third spacer 220, a conductive material 230, and a third layer body 240. Among them, the first layer body 110, the second layer body 130, and the The first spacer 140, the conductive material 150C, and the filler 120 between them may be the same or similar to the component configuration of the fourth embodiment, and the component configurations that are the same or similar to the fourth embodiment will not be repeated here.

第三層體240可設置在第二層體130之上,並包含第三元件,更進一步來說,第三層體240係配置為包含第三基板242、畫素定義層244、發光元件246、驅動電極248及第三介電層250,其中發光元件246可視為是第三元件。 The third layer body 240 may be disposed on the second layer body 130 and includes a third element. Furthermore, the third layer body 240 is configured to include a third substrate 242, a pixel definition layer 244, and a light emitting element 246. , The driving electrode 248 and the third dielectric layer 250, wherein the light-emitting element 246 can be regarded as a third element.

第三基板242可以是介電材料、透光基板、軟性基板或其組合。畫素定義層244可設置在第三基板242的下表面,並可定義出配置發光元件246的位置,例如畫素定義層244可具有開口,而發光元件246可設置在第三基板242的下表面並位在開口內。驅動電極248設置在畫素定義層244及發光元件246的下側,並電性連接發光元件246。第三介電層250設置在畫素定義層244及驅動電極248的下表面。於部分實施方式中,發光元件246包含上電極及發光層,其中發光層係設置於驅動電極248與上電極之間,使得驅動電極248與上電極可共同施加偏壓予發光層。此外,於部分實施方式中,發光元件246可以是有機發光元件、無機發光元件、微發光二極體或是次毫米發光二極體。 The third substrate 242 may be a dielectric material, a light-transmitting substrate, a flexible substrate, or a combination thereof. The pixel definition layer 244 can be disposed on the lower surface of the third substrate 242 and can define the position where the light emitting element 246 is arranged. For example, the pixel definition layer 244 can have an opening, and the light emitting element 246 can be disposed under the third substrate 242. The surfaces are located inside the opening. The driving electrode 248 is disposed on the lower side of the pixel definition layer 244 and the light-emitting element 246, and is electrically connected to the light-emitting element 246. The third dielectric layer 250 is disposed on the lower surface of the pixel definition layer 244 and the driving electrode 248. In some embodiments, the light-emitting element 246 includes an upper electrode and a light-emitting layer, wherein the light-emitting layer is disposed between the driving electrode 248 and the upper electrode, so that the driving electrode 248 and the upper electrode can jointly apply a bias voltage to the light-emitting layer. In addition, in some embodiments, the light-emitting element 246 may be an organic light-emitting element, an inorganic light-emitting element, a micro light-emitting diode, or a sub-millimeter light-emitting diode.

填充物210及第三間隙物220設置於第二層體130與第三層體240之間,具體來說,第三間隙物220會設置於 第一汲極電極117與驅動電極248之間,其中第三間隙物220的底面會是設置在第二層體130上,並至少覆蓋部分的導電材料150C,而第三間隙物220的頂面則可接觸第三層體240的第三介電層250。第三間隙物220的頂面寬度可大於其底面寬度,亦即第三間隙物220可以是倒梯形。此外,第三間隙物220具有接觸洞222,且接觸洞222位在導電材料150C的上方。 The filler 210 and the third spacer 220 are disposed between the second layer body 130 and the third layer body 240. Specifically, the third spacer 220 is disposed on Between the first drain electrode 117 and the driving electrode 248, the bottom surface of the third spacer 220 is disposed on the second layer body 130 and covers at least part of the conductive material 150C, and the top surface of the third spacer 220 Then, the third dielectric layer 250 of the third layer body 240 can be contacted. The width of the top surface of the third spacer 220 may be greater than the width of the bottom surface thereof, that is, the third spacer 220 may be an inverted trapezoid. In addition, the third spacer 220 has a contact hole 222, and the contact hole 222 is located above the conductive material 150C.

導電材料230可穿過第三層體240,例如穿過第三層體240的第三基板242、畫素定義層244、驅動電極248以及第三介電層250,藉以延伸進入至第三間隙物220的接觸洞222內,直至接觸導電材料150C。 The conductive material 230 may pass through the third layer body 240, such as the third substrate 242, the pixel definition layer 244, the driving electrode 248, and the third dielectric layer 250 of the third layer body 240, thereby extending into the third gap Into the contact hole 222 of the object 220 until it contacts the conductive material 150C.

透過上述配置,穿過第三層體240的導電材料230會與穿過第二層體130的導電材料150C形成交界面,以電性連接至第一薄膜電晶體114。再者,導電材料230的側壁232的至少一部分係會由第三層體240的驅動電極248圍繞且接觸,藉以使第一層體110的第一薄膜電晶體114能電性連接第三層體240的發光元件246。而在此配置下,當電子裝置100F是應用成為顯示面板,且走線層162A與162B是分別電性連接資料線及掃描線(未繪示於第12A圖)的情況下,發光元件246即可由資料線及掃描線驅動而發光,從而顯示影像。 Through the above configuration, the conductive material 230 passing through the third layer body 240 will form an interface with the conductive material 150C passing through the second layer body 130 to be electrically connected to the first thin film transistor 114. Furthermore, at least a part of the sidewall 232 of the conductive material 230 is surrounded by and in contact with the driving electrode 248 of the third layer body 240, so that the first thin film transistor 114 of the first layer body 110 can be electrically connected to the third layer body 240 of the light-emitting element 246. In this configuration, when the electronic device 100F is used as a display panel, and the wiring layers 162A and 162B are electrically connected to data lines and scan lines (not shown in FIG. 12A), the light-emitting element 246 is It can be driven by data lines and scan lines to emit light to display images.

另一方面,在此配置下,可將走線層162A、162B與162C形成為可伸展(stretchable)走線,以使電子裝置100F具有可撓性,且其中這些可伸展走線可因受到填充物120、210與間隙物(及第一間隙物140與第三間隙物220)的壓合固定,而可避免發生結構潰散。舉例來說,可將走線層162A、162B 與162C設計為沿著不同方向延伸,且其在俯視視角中的重疊區域能因受到填充物120、210與間隙物的壓合固定,而可避免發生易位導致結構潰散。 On the other hand, in this configuration, the wiring layers 162A, 162B, and 162C can be formed as stretchable traces, so that the electronic device 100F has flexibility, and these stretchable traces can be filled due to filling. The objects 120, 210 and the spacers (and the first spacer 140 and the third spacer 220) are pressed and fixed to avoid structural collapse. For example, the wiring layers 162A, 162B can be The 162C and 162C are designed to extend along different directions, and the overlapping area in the top view view can be fixed by the compression of the fillers 120, 210 and the spacers, which can prevent the structure from collapsing due to translocation.

更進一步來說,請看到第12B圖及第12C圖,第12B圖繪示電子裝置100F應用成可伸展性結構的側剖面示意圖,而第12C圖繪示電子裝置100F的結構的上視示意圖。前述於第12A圖所描述的結構可被配置成多個島狀結構260。具體而言,第一層體110與第三層體240可被製作成島狀的,而這些島狀的第一層體110與第三層體240可由第二層體130相連接,其中第二層體130可更包含可伸展基板及可伸展介電材料,例如像是有機材料,從而使得第二層體130能成為具有可伸展性的連續彈性體。 More specifically, please see FIGS. 12B and 12C. FIG. 12B shows a schematic side sectional view of the electronic device 100F applied as a stretchable structure, and FIG. 12C shows a schematic top view of the structure of the electronic device 100F. . The aforementioned structure described in FIG. 12A may be configured as a plurality of island-shaped structures 260. Specifically, the first layer body 110 and the third layer body 240 can be made into island shapes, and the island-shaped first layer body 110 and the third layer body 240 can be connected by the second layer body 130, wherein the second layer body 130 The layer body 130 may further include a stretchable substrate and a stretchable dielectric material, such as an organic material, so that the second layer body 130 can become a continuous elastic body with stretchability.

資料線262及掃描線264可交錯排列,且每一個島狀結構260可對應地電性連接資料線262及掃描線264。同前所述,資料線262會電性連接每一個島狀結構260的走線162A,而掃描線264則會電性連接每一個島狀結構260的走線162B,從而能驅動對應島狀結構的第一薄膜電晶體114及發光元件246。 The data lines 262 and the scan lines 264 can be arranged alternately, and each island structure 260 can be electrically connected to the data line 262 and the scan line 264 correspondingly. As mentioned above, the data line 262 is electrically connected to the trace 162A of each island structure 260, and the scan line 264 is electrically connected to the trace 162B of each island structure 260, so as to drive the corresponding island structure The first thin film transistor 114 and the light-emitting element 246.

在此配置下,如第12C圖及第12D圖所示,其中第12D圖繪示電子裝置100F的結構於伸展後的上視示意圖。在將第二層體130配置為彈性體,且資料線262及掃描線264也是形成為可伸展走線的情況下,島狀結構240之間的間距會是可變的,使得電子裝置100F能因此具有可伸展性,例如電子裝置100F可自如第12C圖所繪的狀態伸展為如第12D圖所 繪的狀態。此外,同前所述,每一個島狀結構240可因受到填充物與間隙物的壓合固定,而避免於伸展過程發生結構潰散。 In this configuration, as shown in FIG. 12C and FIG. 12D, FIG. 12D is a schematic top view of the structure of the electronic device 100F after being stretched. In the case that the second layer body 130 is configured as an elastic body, and the data lines 262 and the scan lines 264 are also formed as stretchable traces, the spacing between the island structures 240 will be variable, so that the electronic device 100F can Therefore, it is extensible. For example, the electronic device 100F can be stretched as shown in Fig. 12C as shown in Fig. 12D. Painted state. In addition, as described above, each island structure 240 can be compressed and fixed by the filler and the spacer, so as to avoid structural collapse during the stretching process.

請回到第12A圖。雖本實施方式是將自第一層體110電性連接至第三層體240的路徑配置成由兩個導電材料(即導電材料150C與230)形成,然而本揭露內容不以此為限,於其他實施方式中,自第一層體110電性連接至第三層體240的路徑也可以是配置成由單一個導電材料貫穿驅動電極248直至接觸第一薄膜電晶體114的第一汲極電極117而形成。此外,雖本實施方式是將走線層162C配置為連接導電材料150C,然而本揭露內容不以此為限,於其他實施方式中,也可以依據實際需求而省略走線層162C,像是可依據連接至補償電路之需求而配置走線層162C,或是若無此需求則可省略走線層162C。 Please go back to Figure 12A. Although in this embodiment, the path electrically connected from the first layer body 110 to the third layer body 240 is configured to be formed of two conductive materials (ie, conductive materials 150C and 230), the content of the disclosure is not limited thereto. In other embodiments, the path electrically connected from the first layer body 110 to the third layer body 240 may also be configured such that a single conductive material penetrates the driving electrode 248 until it contacts the first drain electrode of the first thin film transistor 114. The electrode 117 is formed. In addition, although the wiring layer 162C is configured to connect the conductive material 150C in this embodiment, the content of the disclosure is not limited to this. In other embodiments, the wiring layer 162C can also be omitted according to actual needs. The wiring layer 162C is configured according to the requirement of connecting to the compensation circuit, or the wiring layer 162C can be omitted if there is no such requirement.

請參照第13A圖至第13C圖,其分別為根據本揭露內容的部分實施方式繪示電子裝置於製作流程中的不同階段的側剖面示意圖。本實施方式與前述製作方法的至少一個差異點在於,本實施方式中,可在第二層體上再層疊第三層體。 Please refer to FIG. 13A to FIG. 13C, which are respectively schematic side cross-sectional diagrams showing the electronic device at different stages in the manufacturing process according to some embodiments of the present disclosure. At least one difference between this embodiment and the aforementioned manufacturing method is that in this embodiment, a third layer body can be laminated on the second layer body.

具體來說,如第13A圖所示,可先完成將第二層體130層疊在第一層體110上,並形成導電材料150,此製作流程可雷同或近似第6A圖至第6D圖的製作流程,在此不再贅述。另一方面,可在第三承載基板109上形成第三層體240,其中第三承載基板109可以是玻璃基板,且第三層體240係形成為具有第三元件,並接著透過光罩製程來圖案化單一膜層,以在第三層體240上形成第三間隙物220。在第三間隙物220 形成後,可於第三層體240之上配置填充物210。所配置的填充物210可以高過第三間隙物220,使得填充物210在後續製程中能有足夠的量可被擠壓而向外流動。 Specifically, as shown in FIG. 13A, the second layer body 130 can be laminated on the first layer body 110 first, and the conductive material 150 is formed. The production process will not be repeated here. On the other hand, a third layer body 240 may be formed on the third carrier substrate 109, wherein the third carrier substrate 109 may be a glass substrate, and the third layer body 240 is formed with a third element, and then passes through the photomask process To pattern a single film layer to form a third spacer 220 on the third layer body 240. In the third spacer 220 After formation, the filler 210 can be disposed on the third layer body 240. The configured filler 210 may be higher than the third spacer 220, so that the filler 210 can be squeezed and flowed outward in a sufficient amount in the subsequent manufacturing process.

如第13B圖所示,可將第三承載基板109及第三層體240配置在第二層體130之上,以完成對組,且於對組後,可將第三承載基板109自第三層體240脫離。於對組過程中,第三間隙物220可對準導電材料150。因此,於完成對組後,一部分的第三間隙物220可與導電材料150形成交界面,而另一部分的第三間隙物220(即未與導電材料150形成交界面的第三間隙物220)則可接觸第二層體130。此外,與導電材料150形成交界面的第三間隙物220可能會因受擠壓而被壓縮。 As shown in FIG. 13B, the third carrier substrate 109 and the third layer body 240 can be arranged on the second layer body 130 to complete the pairing, and after the pairing, the third carrier substrate 109 can be removed from the second layer body 130. The three-layer body 240 is detached. During the pairing process, the third spacer 220 can be aligned with the conductive material 150. Therefore, after the pairing is completed, a part of the third spacer 220 can form an interface with the conductive material 150, and another part of the third spacer 220 (that is, the third spacer 220 that does not form an interface with the conductive material 150) Then, the second layer body 130 can be contacted. In addition, the third spacer 220 forming an interface with the conductive material 150 may be compressed due to being squeezed.

如第13C圖所示,可接著進行穿孔製程,其包含移除一部分的第三層體240以及一部分的第三間隙物220,並可在第三間隙物220內形成連通至導電材料150和連通至第二層體130的接觸洞222。接著,可在接觸洞222內形成導電材料230,且導電材料230係穿過第三層體240及第三間隙物220。之後,可使第一承載基板102自第一層體110脫離。 As shown in FIG. 13C, a perforation process can be followed, which includes removing a part of the third layer body 240 and a part of the third spacer 220, and a connection to the conductive material 150 and a connection can be formed in the third spacer 220 To the contact hole 222 of the second layer body 130. Then, a conductive material 230 can be formed in the contact hole 222, and the conductive material 230 passes through the third layer body 240 and the third spacer 220. After that, the first carrier substrate 102 can be detached from the first layer body 110.

透過採用上述製作流程,可使第一層體110能電性連接第二層體130並也能電性連接第三層體240,且第二層體130也能電性連接第三層體240,從而電性導通不同層的層體。 By using the above manufacturing process, the first layer body 110 can be electrically connected to the second layer body 130 and also to the third layer body 240, and the second layer body 130 can also be electrically connected to the third layer body 240 , So as to electrically conduct the layers of different layers.

綜上所述,本揭露內容的電子裝置包含第一層體、第二層體、第一間隙物、填充物以及導電材料。第一層體及第二層體各自具有第一元件及第二元件,且第二層體設置於 第一層體之上。第一間隙物及填充物設置於第一層體與第二層體之間,且第一間隙物具有接觸洞,其中填充物之材質不同於第一間隙物之材質。導電材料位在接觸洞內,且第一元件與第二元件藉由導電材料電性連接。透過此配置,在電子裝置的製作流程中,可以是在確定第一層體與第二層體的距離後,才形成接觸洞並接著於其內形成導電材料,如此一來,接觸洞可以是在其預計深度能被確定的情況下形成,因此可使接觸洞具有穩定的穿孔尺寸,並也提升接觸洞的穿孔品質,從而連帶提升後續所形成之導電材料的可靠度。 In summary, the electronic device of the present disclosure includes a first layer body, a second layer body, a first spacer, a filler, and a conductive material. The first layer body and the second layer body each have a first element and a second element, and the second layer body is disposed at Above the first layer. The first spacer and the filler are arranged between the first layer body and the second layer body, and the first spacer has a contact hole, and the material of the filler is different from the material of the first spacer. The conductive material is located in the contact hole, and the first element and the second element are electrically connected by the conductive material. Through this configuration, in the manufacturing process of the electronic device, the contact hole can be formed after the distance between the first layer body and the second layer body is determined, and then the conductive material is formed in it. In this way, the contact hole can be It is formed under the condition that the expected depth can be determined, so that the contact hole can have a stable perforation size, and the perforation quality of the contact hole is also improved, thereby improving the reliability of the subsequently formed conductive material.

雖然本揭露內容已以多種實施方式揭露如上,然其並非用以限定本揭露內容,任何熟習此技藝者,在不脫離本揭露內容之精神和範圍內,當可作各種之更動與潤飾,因此本揭露內容之保護範圍當視後附之申請專利範圍所界定者為準。 Although the content of this disclosure has been disclosed in a variety of ways as above, it is not intended to limit the content of this disclosure. Anyone who is familiar with this technique can make various changes and modifications without departing from the spirit and scope of the content of this disclosure. Therefore, The scope of protection of the contents of this disclosure shall be subject to those defined by the attached patent application scope.

100A‧‧‧電子裝置 100A‧‧‧Electronic device

110‧‧‧第一層體 110‧‧‧First Floor

120‧‧‧填充物 120‧‧‧Filling

130‧‧‧第二層體 130‧‧‧Second layer

140‧‧‧第一間隙物 140‧‧‧First gap

142‧‧‧接觸洞 142‧‧‧Contact hole

150、150’‧‧‧導電材料 150、150’‧‧‧Conductive material

152‧‧‧凹槽 152‧‧‧Groove

W1‧‧‧底部寬度 W1‧‧‧Bottom width

W2‧‧‧頂部寬度 W2‧‧‧Top width

Claims (13)

一種電子裝置,包含:一第一層體,具有一第一元件;一第二層體,設置於該第一層體之上,並具有一上表面、一相對該上表面的下表面以及一第二元件;一第一間隙物,設置於該第一層體與該第二層體之間,並具有一接觸洞,其中該第二層體的該下表面位於該第一間隙物與該上表面之間;一填充物,設置於該第一層體與該第二層體之間,且該填充物之材質不同於該第一間隙物之材質;以及至少一導電材料,位該第二層體中與在該接觸洞內,並且穿過該第二層體,其中該至少一導電材料之一部分位於該上表面上,並覆蓋部分該上表面,且該第一元件與該第二元件藉由該導電材料電性連接。 An electronic device, comprising: a first layer body having a first element; a second layer body disposed on the first layer body and having an upper surface, a lower surface opposite to the upper surface, and a A second element; a first spacer, disposed between the first layer body and the second layer body, and has a contact hole, wherein the lower surface of the second layer body is located between the first spacer and the Between the upper surface; a filler, which is disposed between the first layer body and the second layer body, and the material of the filler is different from the material of the first spacer; and at least one conductive material located in the first layer The two-layer body is in the contact hole and passes through the second layer body, wherein a part of the at least one conductive material is located on the upper surface and covers part of the upper surface, and the first element and the second The components are electrically connected by the conductive material. 如申請專利範圍第1項所述之電子裝置,更包含:一第二間隙物,設置於該第一層體與該第二層體之間,並與該第一層體及該第一間隙物透過該填充物完全分隔開來。 The electronic device described in item 1 of the scope of the patent application further includes: a second spacer disposed between the first layer body and the second layer body, and is connected to the first layer body and the first gap The objects are completely separated by the filler. 如申請專利範圍第2項所述之電子裝置,其中該第二間隙物沿著一第一方向延伸,使得該第二間隙物在該第一方向上的長度大於該第一間隙物在該第一方向上的長 度。 According to the electronic device described in claim 2, wherein the second spacer extends along a first direction, so that the length of the second spacer in the first direction is greater than that of the first spacer in the first direction. Length in one direction Spend. 如申請專利範圍第1項所述之電子裝置,更包含至少一導電墊,設置於該導電材料與該第二層體之間,且該導電材料與該第二元件藉由該導電墊電性連接。 The electronic device described in item 1 of the scope of the patent application further includes at least one conductive pad disposed between the conductive material and the second layer body, and the conductive material and the second element are electrically connected through the conductive pad connect. 如申請專利範圍第1項所述之電子裝置,其中該第一元件及該第二元件各自為薄膜電晶體、無機發光二極體、有機發光二極體、扇出型走線、觸控線路或其組合。 The electronic device described in claim 1, wherein the first element and the second element are each a thin film transistor, an inorganic light-emitting diode, an organic light-emitting diode, a fan-out wiring, and a touch circuit Or a combination. 如申請專利範圍第1項所述之電子裝置,其中該第一間隙物的寬度在厚度方向為漸縮、垂直或漸擴。 According to the electronic device described in claim 1, wherein the width of the first spacer is tapered, vertical, or gradually expanded in the thickness direction. 如申請專利範圍第1項所述之電子裝置,其中該第二元件包含一導電層,且該導電材料穿過該導電層,該導電層為一可伸展走線,其中該可伸展走線受到該填充物與該第一間隙物的壓合固定,而避免發生結構潰散。 The electronic device described in claim 1, wherein the second element includes a conductive layer, and the conductive material passes through the conductive layer, the conductive layer is a stretchable trace, and the stretchable trace is subjected to The filling material and the first gap material are pressed and fixed to avoid structural collapse. 如申請專利範圍第1項所述之電子裝置,其中該導電材料自該第一層體內延伸至超過該第二層體與該填充物之間的交界面。 According to the electronic device described in claim 1, wherein the conductive material extends from the first layer body to beyond the interface between the second layer body and the filler. 如申請專利範圍第1項所述之電子裝置,其中該導電材料凸出於該第二層體的該上表面與該下表面,並 且從該上表面與該下表面完全貫穿該第二層體。 The electronic device described in item 1 of the scope of patent application, wherein the conductive material protrudes from the upper surface and the lower surface of the second layer body, and And completely penetrate the second layer body from the upper surface and the lower surface. 如申請專利範圍第1項所述之電子裝置,其中該第二層體更具有一貫孔,而該導電材料從該第二層體的該貫孔內延伸至該第一間隙物的該接觸洞。 The electronic device described in claim 1, wherein the second layer body further has a through hole, and the conductive material extends from the through hole of the second layer body to the contact hole of the first spacer . 如申請專利範圍第1項所述之電子裝置,其中該第一層體包括:一第一基板;一第一閘極絕緣層,設置在該第一基板上;一第一介電層,設置在該第一閘極絕緣層上,其中該第一元件位於該第一介電層與該第一基板之間;該第二層體包括:一第二基板,具有該上表面;一第二介電層,其中該填充物位於該第一介電層與該第二介電層之間,而該第一介電層、該第二介電層與該填充物皆位於該第一基板與該第二基板之間;以及一第二閘極絕緣層,位於該第二基板與該第二介電層之間,其中該第二元件位在該第二基板與該第二介電層之間,該導電材料穿過該第二基板、該第二閘極絕緣層與該第二介電層而延伸進入至該第一間隙物的該接觸洞內,並進一步地穿過該第一介電層而電性連接該第一元件。 The electronic device described in claim 1, wherein the first layer body includes: a first substrate; a first gate insulating layer disposed on the first substrate; a first dielectric layer disposed on the first substrate On the first gate insulating layer, wherein the first element is located between the first dielectric layer and the first substrate; the second layer body includes: a second substrate having the upper surface; a second A dielectric layer, wherein the filler is located between the first dielectric layer and the second dielectric layer, and the first dielectric layer, the second dielectric layer, and the filler are located on the first substrate and Between the second substrate; and a second gate insulating layer located between the second substrate and the second dielectric layer, wherein the second element is located between the second substrate and the second dielectric layer In between, the conductive material passes through the second substrate, the second gate insulating layer and the second dielectric layer, extends into the contact hole of the first spacer, and further passes through the first dielectric. The electrical layer is electrically connected to the first element. 一種電子裝置的製作方法,包含: 於一第一層體上形成一第一間隙物;在該第一間隙物形成後,於該第一層體之上配置一填充物;將一第二層體覆蓋至該第一間隙物及該填充物之上;進行一穿孔製程,以移除部分該第二層體;以及形成穿過該第二層體與該第一間隙物之至少一導電材料,其中該至少一導電材料之一部分位於該第二層體之一上表面上,並覆蓋部分該上表面。 A manufacturing method of an electronic device, including: A first spacer is formed on a first layer body; after the first spacer is formed, a filler is disposed on the first layer body; a second layer body is covered to the first spacer and On the filler; performing a perforation process to remove part of the second layer body; and forming at least one conductive material passing through the second layer body and the first spacer, wherein a part of the at least one conductive material It is located on an upper surface of the second layer body and covers part of the upper surface. 如申請專利範圍第12項所述之電子裝置的製作方法,其中形成該導電材料的步驟係進行於將該第二層體覆蓋至該第一間隙物及該填充物之上的步驟之後。 According to the manufacturing method of the electronic device described in claim 12, the step of forming the conductive material is performed after the step of covering the second layer body on the first spacer and the filler.
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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI824634B (en) * 2021-11-04 2023-12-01 群創光電股份有限公司 Electrical connection structure

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102253519A (en) * 2011-06-10 2011-11-23 友达光电(苏州)有限公司 LCD (liquid crystal display) panel and manufacturing method thereof
US20150028343A1 (en) * 2013-07-11 2015-01-29 Boe Optoelectronics Technology Co., Ltd. Display panel, method for fabricating the same and display device
TW201508970A (en) * 2013-08-09 2015-03-01 Semiconductor Energy Lab Light-emitting element, display module, lighting module, light-emitting device, display device, electronic device, and lighting device
TW201513424A (en) * 2013-08-26 2015-04-01 Semiconductor Energy Lab Light-emitting element, display module, lighting module, light-emitting device, display device, electronic appliance, and lighting device
TW201543621A (en) * 2014-05-07 2015-11-16 King Dragon Internat Inc Semiconductor device package structure and method of the same
TW201638913A (en) * 2015-04-17 2016-11-01 友達光電股份有限公司 Display panel
TW201830749A (en) * 2012-10-03 2018-08-16 日商半導體能源研究所股份有限公司 Light-emitting element, light-emitting device, display device, electronic device, and lighting device
TW201906201A (en) * 2013-03-14 2019-02-01 日商半導體能源研究所股份有限公司 Light emitting device and method of manufacturing same
TW201919164A (en) * 2017-10-31 2019-05-16 南韓商三星電子股份有限公司 Fan-out semiconductor package module
TW201929106A (en) * 2017-12-15 2019-07-16 南韓商三星電機股份有限公司 Fan-out semiconductor package and package on package including the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101500426B1 (en) * 2008-08-26 2015-03-09 삼성디스플레이 주식회사 Touch screen display apparatus
KR102505879B1 (en) * 2016-03-24 2023-03-06 삼성디스플레이 주식회사 Display apparatus
TWI619057B (en) * 2017-06-01 2018-03-21 友達光電股份有限公司 Display device
CN108110005A (en) * 2017-12-07 2018-06-01 睿力集成电路有限公司 Transistor arrangement, memory cell array and preparation method thereof
JP7013902B2 (en) * 2018-02-05 2022-02-01 凸版印刷株式会社 Display device

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102253519A (en) * 2011-06-10 2011-11-23 友达光电(苏州)有限公司 LCD (liquid crystal display) panel and manufacturing method thereof
TW201830749A (en) * 2012-10-03 2018-08-16 日商半導體能源研究所股份有限公司 Light-emitting element, light-emitting device, display device, electronic device, and lighting device
TW201906201A (en) * 2013-03-14 2019-02-01 日商半導體能源研究所股份有限公司 Light emitting device and method of manufacturing same
US20150028343A1 (en) * 2013-07-11 2015-01-29 Boe Optoelectronics Technology Co., Ltd. Display panel, method for fabricating the same and display device
TW201508970A (en) * 2013-08-09 2015-03-01 Semiconductor Energy Lab Light-emitting element, display module, lighting module, light-emitting device, display device, electronic device, and lighting device
TW201513424A (en) * 2013-08-26 2015-04-01 Semiconductor Energy Lab Light-emitting element, display module, lighting module, light-emitting device, display device, electronic appliance, and lighting device
TW201543621A (en) * 2014-05-07 2015-11-16 King Dragon Internat Inc Semiconductor device package structure and method of the same
TW201638913A (en) * 2015-04-17 2016-11-01 友達光電股份有限公司 Display panel
TW201919164A (en) * 2017-10-31 2019-05-16 南韓商三星電子股份有限公司 Fan-out semiconductor package module
TW201929106A (en) * 2017-12-15 2019-07-16 南韓商三星電機股份有限公司 Fan-out semiconductor package and package on package including the same

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