TWI528479B - 電性連接物的形成方法 - Google Patents

電性連接物的形成方法 Download PDF

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Publication number
TWI528479B
TWI528479B TW102148955A TW102148955A TWI528479B TW I528479 B TWI528479 B TW I528479B TW 102148955 A TW102148955 A TW 102148955A TW 102148955 A TW102148955 A TW 102148955A TW I528479 B TWI528479 B TW I528479B
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Taiwan
Prior art keywords
photoresist
electrical connector
light
layer
forming
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TW102148955A
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English (en)
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TW201436071A (zh
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王俊傑
郭宏瑞
劉重希
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台灣積體電路製造股份有限公司
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    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
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Description

電性連接物的形成方法
本發明係關於半導體元件，更特別關於電性連接物的形成方法。
在形成半導體晶圓時，先形成積體電路元件如電晶體於半導體基板的表面中。接著形成內連線結構於積體電路元件上。形成金屬凸塊於半導體晶片的表面上，即完成積體電路元件。
在一般的金屬凸塊製程中，首先形成凸塊下金屬化(UBM)層。接著形成UBM凸塊於UBM層上，其形成方法可為電鍍。上述製程包含形成遮罩覆蓋UBM層的第一部份，以露出UBM層的第二部份。接著電鍍金屬凸塊於UBM層的第二部份上，再移除UBM層的第一部份。
本發明一實施例提供一種電性連接物的形成方法，包括：塗佈光阻於凸塊下金屬化層上；曝光光阻，其中到達光阻之底部的曝光光量與到達光阻之上表面的曝光光量之比值小於約5%；顯影光阻以形成開口於光阻中，其中開口露出部份凸塊下金屬化層，且開口之底部橫向尺寸大於開口之頂部橫向尺寸；以及形成電性連接物於開口中，其中電性連接物係 非再流動材料。
本發明一實施例提供一種電性連接物的形成方法，包括：塗佈光阻於凸塊下金屬化層上；以微影光罩曝光光阻；顯影光阻以移除光阻之未曝光部份，形成開口於光阻中，其中光阻包括光活性化合物，且光阻已曝光之部份將保留至顯影步驟後；電鍍電性連接物於開口中，其中電性連接物的底部橫向尺寸大於電性連接物的頂部橫向尺寸；在電鍍步驟後，移除光阻以露出部份凸塊下金屬化層；以及移除露出的部份凸塊下金屬化層。
本發明一實施例提供一種電性連接物的形成方法，包括：塗佈光阻於凸塊下金屬化層上，其中光阻包括光活性化合物；以微影光罩曝光光阻，其中光阻吸收光以進行曝光，到達光阻之下表面的光具有第一光強度，到達光阻之上表面的光具有第二光強度，且第一光強度與第二光強度的比值小於約0.05；顯影光阻以移除光阻的曝光部份，形成開口於光阻中；電鍍電性連接物於開口中，其中電性連接物包括非焊料材料；在電鍍步驟後，移除光阻以露出部份凸塊下金屬化層；以及移除露出的部份凸塊下金屬化層。
D1‧‧‧底部橫向尺寸
D2、D2’‧‧‧頂部橫向尺寸
H‧‧‧高度
LIGI1、LIGI2‧‧‧強度
T1‧‧‧厚度
20‧‧‧晶圓
30‧‧‧基板
32‧‧‧半導體元件
34‧‧‧內連線結構
35‧‧‧金屬線路
36‧‧‧通孔
38‧‧‧介電層
40‧‧‧金屬墊
42‧‧‧鈍化層
46‧‧‧高分子層
48、48’‧‧‧UBM層
48A‧‧‧阻障層
48B‧‧‧晶種層
50‧‧‧光阻
50A‧‧‧上表面
50B‧‧‧下表面
52‧‧‧光罩
52A‧‧‧透明圖案
53、60A、60B、60C‧‧‧虛線
52B‧‧‧不透明部份
54‧‧‧光
56‧‧‧開口
58‧‧‧電性連接物
58A‧‧‧凸塊部份
58B‧‧‧額外部份
59‧‧‧焊料層
100‧‧‧晶粒
第1至7圖係某些實施例中，形成電性連接物的製程剖視圖；第8圖係多種實施例中的電性連接物，其中電性連接物具有不同形狀；以及第9A、9B、與9C圖係多種實施例中，電性連接物的上視圖， 其中電性連接物具有不同形狀。
如何製作與使用本發明實施例的方法將詳述於下。可以理解的是，本發明提供多種發明概念以實施於多種特定方向，但這些特定實施例僅用以舉例而非侷限本發明範疇。
多種實施例提供用於電路的電性連接物之形成方法。多種實施例中的電性連接物的製程與其變化亦搭配圖示說明如下。在下述說明與圖式中，相同標號將用以標示相同單元。在實施例中，元件晶圓、中介晶圓、或封裝基板係用以解釋本發明實施例的概念。可以理解的是，下述實施例的概念可用於任何其他積體電路構件，其電性連接物可用於接合。
如第1圖所示，晶圓20包含基板30。在某些實施例中，基板30為半導體基板如矽基板，但亦可為其他半導體材料如矽鍺合金、碳化矽、砷化鎵、或類似物。半導體元件32如電晶體、二極體、電阻、或類似物可形成於基板30的表面中。內連線結構34包含金屬線路與通孔(未圖示)，係形成於基板30上並電性耦接至半導體元件32。金屬線路與通孔之組成可為銅或銅合金，且其形成方法可為鑲嵌製程。在另一實施例中，晶圓20為中介晶圓或封裝基板帶，且實質上不含主動元件(如電晶體)或被動元件(如電阻、電容、電感、及/或類似物)。在這些實施例中，基板30可為半導體材料或介電材料。
內連線結構34包含介電層38，以及形成於介電層38中的金屬線路35與通孔36。介電層38可包含層間介電層(ILD)與金屬間介電層(IMD)。在某些實施例中，介電層38為低介電 常數之介電材料，其介電常數可小於約2.8或小於約2.5。金屬線路35與通孔(如接觸插塞)36可為銅、銅合金、鎢、或其他含金屬的導電材料。金屬線路35與通孔36之形成方法可為單鑲嵌及/或雙鑲嵌製程。
金屬墊40係形成於內連線結構34上。金屬墊40可為鋁墊或鋁銅墊。金屬墊40可經由內連線結構34中的金屬線路35及/或通孔36，電性連接至下方的半導體元件32。
鈍化層42係形成於覆蓋金屬墊40的邊緣部份之位置。鈍化層42中的開口將露出金屬墊40的中心部份。鈍化層42可為非孔洞狀的材料。在某些實施例中，鈍化層42為複合層，其包含氧化矽層(未圖示)，與位於氧化矽層上的氮化矽層(未圖示)。在另一實施例中，鈍化層42包含未掺雜矽酸鹽玻璃(USG)、氮氧化矽、及/或類似物。雖然圖式中只有單一鈍化層42，但上述結構可具有多個鈍化層。
高分子層46係形成於鈍化層上。高分子層46可包含高分子如聚亞醯胺、苯並環丁烷(BCB)、聚苯并噁唑(PBO)、或類似物。高分子層46經圖案化後可具有開口以露出金屬墊40的中心部份。
如第2圖所示，形成UBM(凸塊下金屬化)層48。在某些實施例中，UBM層48包含阻障層48A，與阻障層48A上的晶種層48B。阻障層48A延伸至鈍化層42中的開口，並電性耦合或物理接觸金屬墊40。阻障層48A可為鈦層、氮化鈦層、鉭層、氮化鉭層、鈦合金層、或鉭合金層。晶種層48B可為銅或銅合金，因此晶種層48B又稱作銅晶種層。然而晶種層可為其 他材料如銀、金、鈀、鎳、鎳合金、鎢合金、鉻、鉻合金、或上述之組合。在某些實施例中，阻障層48A與晶種層48B的形成方法可為物理氣相沉積(PVD)或其他可行方法。阻障層48A之厚度可介於500Å至約2000Å之間。晶種層48B之厚度可介於約1000Å至約10000Å之間，亦可為其他厚度。
如第3圖所示，塗佈光阻50後，以光罩52曝光光阻50。光罩52包含透明圖案52A以讓光54穿過，以及不透明部份52B以阻擋光54。光阻50的厚度T1介於約30μm至約60μm之間。可以理解的是，上述數值範圍僅用以舉例且可改變為其他數值。光阻50可包含高分子、溶劑、交聯劑、與光活性化合物(PAC)。在某些實施例中，光阻之高分子包含丙烯酸樹脂、酚醛樹脂、或類似物。在某些實施例中，光阻之溶劑可包含醋酸丙二醇甲醚酯(PGMEA)。
在某些實施例中，光阻50中的高分子其重量百分比低於約40wt%。光阻50中的溶劑其重量百分比低於約35wt%。光阻50中的交聯劑其重量百分比低於約20wt%。光阻50中的PAC其重量百分比低於約5wt%，比如介於約1wt%至約5wt%之間。舉例來說，PAC係均勻地分散在光阻50中，且光阻50頂部中的PAC百分比與光阻50底部中的PAC百分比相同。在某些實施例中，藉由挑選PAC種類可讓光阻50之透光率低於約3。
如第3圖所示，以光54曝光光阻50。不透明部份52B阻擋光54，使其無法到達光阻50。透明部份52A允許光54通過以到達部份的光阻50。由於光阻50之透光率低於一般的PAC之 透光率，光阻50中的PAC將吸收光54。隨著光54向下穿過光阻50，能到達越下方之光阻50的光量越少。換言之，越下方的光阻50所能吸收的光量低於越上方的光阻50。如圖式中用以標示光54的箭頭所示，由光阻50之頂部至底部的光54其箭頭寬度越來越小。PAC的材料有部份取決於其能吸收之光波長，以決定其吸收率。在某些實施例中，PAC的材料選擇需符合光54的波長以達適當的吸收率，反之亦然。若光54在光阻50之上表面50A的強度為LIGI1，則光54在光阻50之下表面50B的強度為LIGI2，且LIGI2/LIGI1的比值小於約0.05(5%)，或小於約0.02。在某些實施例中，LIGI2/LIGI1的比值介於約0.005(0.5%)至約0.05之間。
如第4圖所示，曝光後顯影光阻50以形成開口56於光阻50中，其中開口56露出部份UBM層48。接著進行清潔(descum)製程以清除開口56中，移除部份光阻50後的任何殘餘物。清除步驟可採用氧氣電漿。在某些實施例中，光阻50為負光阻，因此移除未曝光部份，並保留已曝光部份(以及曝光不足的部份光阻50)。在第3圖中，未曝光部份即虛線53之間的部份。由於光54穿過光阻50時其強度會逐漸下降，因此第3圖中的虛線53為斜線。
如第4圖所示，開口56為梯形，且其底部橫向尺寸D1大於其頂部橫向尺寸D2。底部橫向尺寸D1與頂部橫向尺寸D2位於相同剖面，其可為長度、寬度、直徑、或類似用語，端視開口56之上視形狀而定。在某些實施例中，底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)大於約2μm，可介於約2μm 至約20μm之間。然而底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)可較大(比如高達約20μm或更大)或較小(比如介於約1μm至4μm之間)。由實驗可知，底部橫向尺寸D1與頂部橫向尺寸D2之差距與光阻50中的PAC量相關。舉例來說，增加光阻50中的PAC量會增加底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)，而減少光阻50中的PAC量會降低底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)。減少光阻中的PAC量即增加光阻50的透光率，因此光54到達光阻50底部的光量會增加。另一方面，增加光阻中的PAC量即減少光阻50的透光率，因此光54到達光阻50底部的光量會減少。
此外，由實驗亦可知底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)與曝光所用之光54的光量有關。光強度與曝光時間均影響曝光光量。減少曝光光量會讓光阻50底部曝光不足的部份更多，進而增加底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)。相反地，增加光54的曝光光量會減少底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)。舉例來說，將曝光光量由1,000mJ/cm2降低至400mJ/cm2，則底部橫向尺寸D1與頂部橫向尺寸D2之差距(D1-D2)由約2μm增加至約20μm。當曝光光量夠高，底部橫向尺寸D1與頂部橫向尺寸D2實質上相同。綜上所述，為使開口56呈梯形，需控制曝光光量。
同樣在第5圖中，接著形成電性連接物58。電性連接物58可為金屬凸塊。此外，電性連接物58可為非再流動材料，即無法於再流動焊料的溫度下再流動。換言之，電性連接物58亦為非焊料凸塊。在某些實施例中，進行電鍍步驟以形成 電性連接物58於UBM層48上與開口56中。電鍍步驟可為電鍍、無電電鍍、浸潤電鍍、或類似方法。在某些實施例中，電性連接物58包含之凸塊部份58A如銅柱具有高熔點而無法再流動。額外部份58B可形成於凸塊部份上。在某些實施例中，額外部份58B係擇自鎳層、鎳合金、鈀層、金層、銀層、與上述之組合。在某些實施例中，焊料層59係電鍍於電性連接物58上，且焊料層59可包含錫銀合金、錫銅合金、錫銀銅合金、或類似物，並可為無鉛材料或含鉛材料。在另一實施例中，可省略焊料層59。電性連接物58之側壁形狀與開口56之側壁形狀相同，因此電性連接物58其底部橫向尺寸D1亦大於其頂部橫向尺寸D2’。
接著移除光阻50，其移除方法可為灰化製程。經上述步驟後，即形成第6圖中的結構。移除光阻50可露出部份的UBM層48。接著如第7圖所示，蝕刻露出的部份UBM層48，並保留電性連接物58覆蓋的部份UBM層48’。蝕刻部份UBM層48的方法可為濕蝕刻步驟、乾蝕刻步驟、及/或類似步驟。在包含焊料層59之結構中，可進行再流動步驟使焊料層59再流動。接著可將晶圓20切割成分開的晶粒100。電性連接物58可用以接合晶粒100至其他封裝構件(未圖示)如中介物、封裝基板、印刷電路板、或類似物。
如第7圖所示，電性連接物58具有高度H。電性連接物58之側壁傾斜程度如(D1-D2)/2H所示。在某些實施例中，(D1-D2)/2H大於約0.06，比如介於約0.06至約0.3之間，或介於約0.2至約0.3之間。
第8圖係電性連接物58可能具有的形狀，其中虛線 60A、60B、與60C為電性連接物58可能具有的側壁形狀。舉例來說，對應虛線60A之電性連接物58其剖面形狀為鐘形，其上半部的傾斜程度小於其下半部。電性連接物58之底部側壁的傾斜角度α小於約60度，比如小於約45度，或小於約30度。與虛線60A相較，實線60B與60C的傾斜程度小於實線60A。電性連接物58之形狀調整方法可為選擇適當的PAC、調整PAC量、調整曝光波長(見第3圖)、以及調整曝光光量。虛線60A、60B、與60C的傾斜程度由頂部平緩的改變至底部，而非於任何部份劇烈改變其傾斜程度。
第9A、9B、與9C圖係多種實施例中，電性連接物58的上視圖。第9A、9B、與9C圖各自具有內環與外環，其中內環為電性連接物58之上表面的上視形狀，而外環為電性連接物58之下表面的上視形狀。在上視圖中，電性連接物58可為圓形(見第9A圖)、橢圓形(見第9B圖)、矩形(未圖示)、六角形(見第9C圖)、其他多邊形(未圖示)、或任何其他形狀。圖式亦標示底部橫向尺寸D1與頂部橫向尺寸D2。
在本發明之實施例中，選擇適當的PAC於形成金屬凸塊的光阻中、適當的曝光波長以曝光光阻、及/或適當的曝光光量以曝光光阻，使形成的金屬凸塊其底部橫向尺寸大於其頂部橫向尺寸。較大的底部橫向尺寸，可降低金屬凸塊施加至下方的低介電常數之介電材料的應力，進而降低低介電常數之介電材料壓合的情況。當頂部橫向尺寸越小，用於連接至電性連接物58之焊料區的尺寸也越小，進而降低焊橋問題。
在實施例中，方法包括塗佈光阻於UBM層上與曝 光光阻。在曝光步驟中，到達光阻底部的曝光光量與到達光阻上表面的曝光光量之比值小於約3%。上述方法更包括顯影光阻以形成開口於光阻中。開口露出部份UBM層。開口之底部橫向尺寸大於開口之頂部橫向尺寸。電性連接物係形成於開口中，其中電性連接物係非再流動材料。
在其他實施例中，方法包括：塗佈光阻於UBM層上；以微影光罩曝光光阻；以及顯影光阻以移除光阻之未曝光部份，形成開口於光阻中，且光阻已曝光之部份將保留至顯影步驟後。電性連接物係電鍍於開口中，其中電性連接物的底部橫向尺寸大於電性連接物的頂部橫向尺寸。在電鍍步驟後，移除光阻以露出部份UBM層。移除露出的部份UBM層。
在其他實施例中，方法包括塗佈光阻於UBM層上，其中光阻包括PAC。光阻吸收光以進行曝光，到達光阻之下表面的光具有第一光強度，到達光阻之上表面的光具有第二光強度，且第一光強度與第二光強度的比值小於約0.05。上述曝光步驟以微影光罩曝光光阻。顯影光阻以移除光阻的未曝光部份，形成開口於光阻中。電性連接物係電鍍於開口中。在電鍍步驟後，移除光阻以露出部份UBM層。移除露出的部份UBM層。
雖然上述內容已詳述實施例與其優點，但應理解在不脫離申請專利範圍和實施例精神的前提下，可進行各種改變、替代、與變更。此外，申請專利範圍不限於上述內容中特定實施例的製程、機器、製作、組成、裝置、方法、和步驟。如本技術領域中具有通常知識者由本發明所知，根據本發明可 用的方式與對應實施例，即可採用目前或未來研發之具有實質上相同功能或可達實質上相同結果的製程、機器、製作、組成、裝置、方法或步驟。綜上所述，申請專利範圍包括上述製程、機器、製作、組成、裝置、方法、或步驟。
D1‧‧‧底部橫向尺寸
D2‧‧‧頂部橫向尺寸
H‧‧‧高度
20‧‧‧晶圓
30‧‧‧基板
32‧‧‧半導體元件
34‧‧‧內連線結構
40‧‧‧金屬墊
42‧‧‧鈍化層
46‧‧‧高分子層
48’‧‧‧UBM層
58‧‧‧電性連接物
58A‧‧‧凸塊部份
58B‧‧‧額外部份
59‧‧‧焊料層
100‧‧‧晶粒

Claims (9)

  1. 一種電性連接物的形成方法，包括：塗佈一光阻於一凸塊下金屬化層上；曝光該光阻，其中到達該光阻之底部的曝光光量與到達該光阻之上表面的曝光光量之比值小於約5%；顯影該光阻以形成一開口於該光阻中，其中該開口露出部份該凸塊下金屬化層，且該開口之一底部橫向尺寸大於該開口之一頂部橫向尺寸；以及形成一電性連接物於該開口中，其中該電性連接物係一非再流動材料。
  2. 如申請專利範圍第1項所述之電性連接物的形成方法，更包括：在形成該電性連接物後，移除該光阻以露出部份該凸塊下金屬化層；以及在移除該光阻後，移除露出的部份該凸塊下金屬化層。
  3. 一種電性連接物的形成方法，包括：塗佈一光阻於一凸塊下金屬化層上；以一微影光罩曝光該光阻；顯影該光阻以移除該光阻之未曝光部份，形成一開口於該光阻中，其中該光阻包括一光活性化合物，且該光阻已曝光之部份將保留至顯影步驟後；電鍍一電性連接物於該開口中，其中該電性連接物的一底部橫向尺寸大於該電性連接物的一頂部橫向尺寸；在電鍍步驟後，移除該光阻以露出部份該凸塊下金屬化 層；以及移除露出的部份該凸塊下金屬化層，其中該曝光步驟中，到達該光阻之底部的光強度與到達該光阻之上表面的光強度比值小於5%。
  4. 如申請專利範圍第3項所述之電性連接物的形成方法，其中該電性連接物包括一非焊料材料，更包括將包含該電性連接物之一晶圓切割成個別的多個晶粒，且在切割步驟後的該電性連接物其底部橫向尺寸仍大於其頂部橫向尺寸。
  5. 如申請專利範圍第3項所述之電性連接物的形成方法中，其中該光活性化合物於該光阻中的重量百分比小於約5wt%。
  6. 如申請專利範圍第3項所述之電性連接物的形成方法中，其中該電性連接物包括一焊料層，且更包括再流動該焊料層。
  7. 一種電性連接物的形成方法，包括：塗佈一光阻於一凸塊下金屬化層上，其中該光阻包括一光活性化合物；以一微影光罩曝光該光阻，其中該光阻吸收一光以進行曝光，到達該光阻之下表面的該光具有一第一光強度，到達該光阻之上表面的該光具有一第二光強度，且該第一光強度與該第二光強度的比值小於約0.05；顯影該光阻以移除該光阻的未曝光部份，形成一開口於該光阻中； 電鍍一電性連接物於該開口中，其中該電性連接物包括一非焊料材料；在電鍍步驟後，移除該光阻以露出部份該凸塊下金屬化層；以及移除露出的部份該凸塊下金屬化層。
  8. 如申請專利範圍第7項所述之電性連接物的形成方法，其中該電性連接物之剖面形狀為鐘形，且鐘形底部之傾斜程度大於鐘形頂部之傾斜程度。
  9. 如申請專利範圍第7項所述之電性連接物的形成方法，其中該光阻包括重量百分比小於約40wt%的高分子、重量百分比小於約35wt%的溶劑、重量百分比小於約20wt%的交聯劑、與重量百分比小於約5wt%的光活性化合物。
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US9443813B1 (en) 2015-03-05 2016-09-13 Advanced Semiconductor Engineering, Inc. Semiconductor device and method for manufacturing the same
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CN104037091B (zh) 2019-04-26

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