TWI506323B - 光電模組 - Google Patents

光電模組 Download PDF

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TWI506323B
TWI506323B TW100145007A TW100145007A TWI506323B TW I506323 B TWI506323 B TW I506323B TW 100145007 A TW100145007 A TW 100145007A TW 100145007 A TW100145007 A TW 100145007A TW I506323 B TWI506323 B TW I506323B
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laser diode
lens unit
substrate
integrated circuit
light
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TW100145007A
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TW201323961A (zh
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kai wen Wu
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Hon Hai Prec Ind Co Ltd
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Priority to US13/446,246 priority patent/US8847147B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
    • H01L31/14—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the light source or sources being controlled by the semiconductor device sensitive to radiation, e.g. image converters, image amplifiers or image storage devices
    • H01L31/147—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the light source or sources being controlled by the semiconductor device sensitive to radiation, e.g. image converters, image amplifiers or image storage devices the light sources and the devices sensitive to radiation all being semiconductor devices characterised by potential barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/02208—Mountings; Housings characterised by the shape of the housings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0225—Out-coupling of light
    • H01S5/02253—Out-coupling of light using lenses

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)
  • Semiconductor Lasers (AREA)
  • Optical Couplings Of Light Guides (AREA)

Description

光電模組
本發明涉及一種光電模組,尤其涉及一種用於傳輸資料之光電模組。
光電模組（optical-electrical module）通常用於高頻傳輸,其包括鐳射二極體（laser diode，LD）、用於驅動鐳射二極體工作之積體電路（integrated circuit，IC）及用於耦合光路之鏡頭單元。由於光電模組傳輸速度快，其工作時易產生電磁波，特別係IC附近，因線路較多，大量之電磁波易對電子產品之其他電子元件產生電磁干擾（Electromagnetic Interference，EMI）。目前普遍採用一金屬殼體罩設於光電模組上方，金屬殼體藉由螺釘或膠黏劑固定於電路板上，以遮罩光電模組造成之電磁干擾，使得光電模組之結構更加複雜。
有鑒於此，有必要提供一種結構簡單、並能夠有效降低電磁干擾之光電模組。
一種光電模組，其包括基板，固定於該基板上之積體電路、鐳射二極體及鏡頭單元，該積體電路及鐳射二極體收容於該鏡頭單元內，該積體電路與該鐳射二極體電性連接，且該積體電路用於驅動該鐳射二極體發射光信號，該鏡頭單元之外面表設置有透光區域。該鏡頭單元之外表面除該透光區域以外形成有用於遮罩該光電模組之電磁干擾之金屬層。
所述光電模組在鏡頭單元之外表面形成金屬層以遮罩光電模組產生之電磁干擾，結構簡單。
下面以具體實施方式並結合附圖對本發明實施方式提供之光電模組作進一步詳細說明。
請參閱圖1及圖2，本發明實施方式之光電模組100用於接收、發射光信號以進行資料傳輸。光電模組100包括基板10，固定於基板10上之積體電路30、鐳射二極體40、跨阻放大器50（請參見圖2）、光電二極體60（請參見圖2）及鏡頭單元70。積體電路30、鐳射二極體40、跨阻放大器50及光電二極體60收容於鏡頭單元70與基板10所共同限定之收容空間75內。
本發明實施方式中，基板10為印刷電路板，基板10上形成有間隔分佈之銅層12。積體電路30與鐳射二極體40分別設置於間隔之銅層12上，並藉由導線14電性相連，積體電路30用於驅動鐳射二極體40發射光信號。鐳射二極體40遠離基板10之一端設置有發射視窗402，鐳射二極體40發射之光經發射視窗402發射出去，且經由發射視窗402發射出之光基本上垂直基板10。跨阻放大器50與光電二極體60分別設置於間隔之銅層12上，並藉由導線14電性相連，光電二極體60遠離基板10之一端設置有接收視窗602，傳輸至光電模組100之光信號經接收視窗602傳輸至光電二極體60，光電二極體60將該光信號轉換為電信號，該電信號經由跨阻放大器50放大後傳輸到其他介面。
鏡頭單元70用於傳導鐳射二極體40發射之光到其他介面，或將到其他介面傳輸至光電模組100之光信號傳導至光電二極體60。同時，鏡頭單元70還具有封裝光電模組100之作用，以防止灰塵等污染光電模組100之內部元件。本發明實施方式中，鏡頭單元70由透明有機玻璃一體成型而成，其包括大致呈矩形板狀之底壁71及由底壁71四周之周緣垂直延伸而成之周壁73。鏡頭單元70之周壁73藉由固定膠與基板10固定在一起。
底壁71與基板10大致平行，底壁71之內表面711正對發射視窗402及接收視窗602之位置設置有第一透光區域，該第一透光區域用於傳導鐳射二極體40發射之光及發射至光電二極體60之光。本發明實施方式中，該第一透光區域設有第一凸透鏡713及第二凸透鏡714。底壁71之內部設置有第一反射鏡715及第二反射鏡716。第一凸透鏡713正對鐳射二極體40之發射視窗402，第二凸透鏡714正對光電二極體60之接收視窗602。鐳射二極體40發射出之光垂直照射於第一凸透鏡713上，經第一凸透鏡713彙聚後照射在第一反射鏡715上，經第一反射鏡715反射後沿平行於基板10之方向在底壁71內傳播，並從底壁71之一端發射出去。底壁71之端面對應該第一透光區域設置有第二透光區域，該第二透光區域用於傳導鐳射二極體40發射之光及發射至光電二極體60之光。本發明實施方式中，該第二透光區域上設置有第三凸透鏡717及第四凸透鏡718，第三凸透鏡717用於進一步彙聚鐳射二極體40發射之光，第四凸透鏡718用於彙聚發射至光電二極體60之光。發射至光電二極體60之光經第四凸透鏡718彙聚後照射至第二反射鏡716上，經第二反射鏡716反射後照射至第二凸透鏡714上，並經接收視窗602傳輸至光電二極體60。
為避免光電模組100工作時產生之電磁波對光電模組100周圍之其他電子元件產生電磁干擾，本發明實施方式中，採用電鍍之方法於鏡頭單元70之外表面形成一金屬層77以遮罩光電模組100產生之電磁干擾。因第三凸透鏡717及第四凸透鏡718用於光之傳導，因此對鏡頭單元70進行電鍍處理之前需將第三凸透鏡717及第四凸透鏡718遮蔽起來以免金屬層77遮蔽第三凸透鏡717及第四凸透鏡718而影響光之傳輸；同時，為避免金屬層77與基板10電性連接，周壁73與基板10相接之位置處亦需要遮蔽起來。本發明實施方式中，金屬層77為由電鍍銅形成之銅層，可理解，金屬層77亦可為電鍍鎳、電鍍鋅、電鍍鋁等形成之鎳層、鋅層或鋁層。
可理解，金屬層77亦可為經由蒸鍍、濺鍍等真空鍍膜之方法形成。
可理解，若鐳射二極體40發射至其他介面之光與其他介面傳輸至光電二極體60之光在鏡頭單元70之傳輸方向相互平行，則，第一凸透鏡713及第二凸透鏡714可由一凸透鏡代替，同理，第一反射鏡715及第二反射鏡716可由一反射鏡代替，第三凸透鏡717及第四凸透鏡718可由一凸透鏡代替。
可理解，第三凸透鏡717及第四凸透鏡718可省略，形成金屬層77時，將第二透光區域遮蔽起來，以免第二透光區域被金屬層77覆蓋。
可理解，金屬層77亦可形成於鏡頭單元70之內表面上，形成金屬層77時，將第一凸透鏡713及第二凸透鏡714遮蔽起來，以免第一凸透鏡713及第二凸透鏡714被金屬層77覆蓋。相應地，第一凸透鏡713及第二凸透鏡714可省略，形成金屬層77時，將第一透光區域遮蔽起來，以免第一透光區域被金屬層77覆蓋。
可理解，光電模組100可包括二、三或複數鐳射二極體40及二、三或複數光電二極體60。
可理解，光電模組100亦可不包括光電二極體60，此時，光電模組100只用於發射光信號。
可理解，光電模組100亦可不包括鐳射二極體40，此時，光電模組100用於接收光信號，並將光信號轉換為電信號。
本發明之光電模組100在鏡頭單元70之外表面形成金屬層77以遮罩光電模組100產生之電磁干擾，不需要於光電模組100週邊加設金屬殼體，使得光電模組100之結構更加簡單，同時，由於鏡頭單元70之外表面形成有金屬層77，如此，鐳射二極體40發射之光無法從鏡頭單元70之形成有金屬層77之區域射出，提高了光電模組100之安全性。
綜上所述，本發明確已符合發明專利之要件，遂依法提出專利申請。惟，以上所述者僅為本發明之較佳實施方式，本發明之範圍並不以上述實施方式為限，舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化，皆應涵蓋於以下申請專利範圍內。
100．．．光電模組
10．．．基板
12．．．銅層
14．．．導線
30．．．積體電路
40．．．鐳射二極體
402．．．發射視窗
50．．．跨阻放大器
60．．．光電二極體
602．．．接收窗口
70．．．鏡頭單元
71．．．底壁
711．．．內表面
713．．．第一凸透鏡
714．．．第二凸透鏡
715．．．第一反射鏡
716．．．第二反射鏡
717．．．第三凸透鏡
718．．．第四凸透鏡
73．．．周壁
75．．．收容空間
77．．．金屬層
圖1係本發明實施方式之光電模組之剖視圖。
圖2係本發明實施方式之光電模組之另一剖視圖。
100．．．光電模組
10．．．基板
12．．．銅層
14．．．導線
30．．．積體電路
40．．．鐳射二極體
402．．．發射視窗
70．．．鏡頭單元
71．．．底壁
711．．．內表面
713．．．第一凸透鏡
715．．．第一反射鏡
717．．．第三凸透鏡
73．．．周壁
75．．．收容空間
77．．．金屬層

Claims (10)

  1. 一種光電模組，其包括基板，固定於該基板上之積體電路、鐳射二極體及鏡頭單元，該積體電路及鐳射二極體收容於該鏡頭單元內，該積體電路與該鐳射二極體電性連接，且該積體電路用於驅動該鐳射二極體發射光信號，該鏡頭單元之內表面上設置有第一透光區域，其改良在於：該鏡頭單元之內表面除該第一透光區域以外形成有用於遮罩該光電模組之電磁干擾之金屬層。
  2. 如申請專利範圍第1項所述之光電模組，其中該光電模組還包括固定於該基板上之跨阻放大器及光電二極體，該光電二極體用於將該光電二極體接收之光信號轉換為電信號，該跨阻放大器用於放大該電信號。
  3. 如申請專利範圍第1項所述之光電模組，其中該鐳射二極體遠離該基板之一端設置有發射視窗，該鐳射二極體發射之光垂直該基板。
  4. 如申請專利範圍第3項所述之光電模組，其中該鏡頭單元包括底壁及由該底壁之周緣延伸而成之周壁，該周壁與該基板相固定，該透鏡單元與該基板形成收容空間，該積體電路及鐳射二極體收容於該收容空間內。
  5. 如申請專利範圍第4項所述之光電模組，其中該底壁之內表面上形成有第二透光區域，該第二透光區域正對該發射視窗形成有用於彙聚該鐳射二極體發射之光之第一凸透鏡。
  6. 如申請專利範圍第1項所述之光電模組，其中該第一透光區域形成有用於彙聚該鐳射二極體發射出之光之第二凸透鏡。
  7. 如申請專利範圍第1項所述之光電模組，其中該金屬層未覆蓋該鏡頭單元之周壁之內表面與該基板相接之位置。
  8. 一種光電模組，其包括基板，固定於該基板上之積體電路、鐳射二極體及鏡頭單元，該積體電路及鐳射二極體收容於該鏡頭單元內，該積體電路與該鐳射二極體電性連接，且該積體電路用於驅動該鐳射二極體發射光信號，該鏡頭單元之外表面設置有第二透光區域，其改良在於：該鏡頭單元之外表面除該第二透光區域以外形成有用於遮罩該光電模組之電磁干擾之金屬層。
  9. 如申請專利範圍第8項所述之光電模組，其中該鏡頭單元包括底壁及由該底壁之周緣延伸而成之周壁，該周壁與該基板相固定，該透鏡單元與該基板共同形成收容空間，該積體電路及鐳射二極體收容於該收容空間內，該第二透光區域形成於該鐳射二極體發射之光與該底壁之端面相交之位置處。
  10. 如申請專利範圍第8項所述之光電模組，其中該第二透光區域形成有用於彙聚該鐳射二極體發射出之光之第二凸透鏡。
TW100145007A 2011-12-07 2011-12-07 光電模組 TWI506323B (zh)

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JP2016119375A (ja) * 2014-12-19 2016-06-30 ホシデン株式会社 光電変換モジュール及びアクティブ光ケーブル
US20170215305A1 (en) * 2016-01-27 2017-07-27 Raymond Kirk Price Emi shield for an electronic optical device
JP2021057440A (ja) * 2019-09-30 2021-04-08 ソニーセミコンダクタソリューションズ株式会社 半導体レーザ駆動装置、電子機器、および、半導体レーザ駆動装置の製造方法

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TW200737770A (en) * 2005-12-20 2007-10-01 Finisar Corp Modular transistor outline can with internal components

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US20030020986A1 (en) * 1999-05-27 2003-01-30 Pang Ron Cheng Chuan Method and apparatus for pluggable fiber optic modules
TW200737770A (en) * 2005-12-20 2007-10-01 Finisar Corp Modular transistor outline can with internal components

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