TWI503947B - Multiple die stacking for two or more die in microelectronic packages, modules, and systems - Google Patents

Description

Stacking composite grains of two or more grains in a microelectronic package, module, and system

The present invention is directed to stacked microelectronic assemblies and methods of making such assemblies and components useful in such assemblies.

Cross-references to related applications

This application is a continuation-in-part of U.S. Patent Application Serial No. 13/306,203, filed on Nov. 29, 2011, which is incorporated herein by reference. The benefits of the filing date are disclosed in this application. The following are commonly owned applications filed on Apr. 21, 2011, which are incorporated herein by reference in its entirety in the U.S. Provisional Patent Application Serial Nos. 61/477,877, 61/477,883, and 61/477,967.

Semiconductor wafers are typically provided in units that are individually packaged in advance. A standard wafer system has a flat rectangular body with a large front surface that has contacts that are connected to internal circuitry of the wafer. Each individual wafer is typically mounted in a package that is then mounted over a circuit board such as a printed circuit board and that connects the contacts of the wafer to the conductors of the circuit board. In many conventional designs, the area of the chip package that occupies the board is much larger than the area of the wafer itself.

Referring to a flat wafer having a front surface as disclosed herein As used herein, the "area of the wafer" should be understood to refer to the area of the front surface. In a "flip-chip" design, the front surface of the wafer faces the face of a package substrate (ie, the wafer carrier), and the contacts on the wafer are directly bonded by solder balls or other connecting elements. The junction to the wafer carrier. Thus, the wafer carrier can be bonded to a circuit board through terminals that cover the front surface of the wafer. The "flip-chip" design provides a relatively small configuration; each wafer occupies an area of the board equal to or slightly larger than the area of the front surface of the wafer, for example, as disclosed in commonly assigned U.S. Patent No. 5,148,265; The disclosures of the patents are hereby incorporated by reference.

Some innovative mounting techniques provide tightness that is close to or equal to the tightness of conventional flip chip bonding. A package that can accommodate a single wafer in an area of a board equal to or slightly larger than the area of the wafer itself is commonly referred to as a "wafer sized package."

In addition to minimizing the area of the plane of the board occupied by the microelectronic assembly, it is also desirable to create a wafer package that exhibits a low overall height or size perpendicular to the plane of the board. Such a thin microelectronic package allows a circuit board having the package to be mounted therein to be relatively close to the arrangement of adjacent structures, thereby reducing the overall size of the product incorporated into the board.

Various proposals have been made for arranging a plurality of wafers in a single package or module. In conventional "multi-chip modules", the wafers are mounted side-by-side on a single package substrate, which can then be mounted to a circuit board. This approach only provides a limited reduction in the area of the board occupied by the wafers. The assembly area is still greater than the total surface area of the individual wafers in the module.

It has also been proposed to package a plurality of wafers in a "stacked" configuration, That is, a configuration in which a plurality of wafer systems are disposed one on top of the other. In a stacked configuration, a plurality of wafers can be mounted within an area of the board that is less than the total area of the wafers. For example, some of the stacked wafer configurations are disclosed in the aforementioned U.S. Patent Nos. 5,679,977; 5,148,265; and U.S. Patent No. 5,347,159, the disclosure of which is incorporated herein by reference. U.S. Pat. Configuration.

Despite some advances in multi-chip packaging, there is still a need for improvements to minimize size and improve the performance of such packages. These attributes of the present invention are achieved by the structure of the microelectronic assembly as described below.

In accordance with a feature of the invention, a microelectronic package can include a substrate having first and second opposing surfaces, and first and second microelectronic components having a front surface facing the first surface of the substrate. The substrate can have a plurality of substrate contacts on the first surface and a plurality of terminals on the second surface, the terminals being configured to connect the microelectronic package to at least one component external to the package. Each microelectronic element can have a plurality of component contacts on its front surface. The component contacts of each of the microelectronic components can be coupled to corresponding ones of the substrate contacts. The front surface of the second microelectronic element can partially cover a rear surface of the first microelectronic element and can be attached to the back surface. The component contacts of the first microelectronic component can be configured with an array of regions and are flip-chip bonded to a first set of substrate contacts. The component contacts of the second microelectronic component can be coupled to a second set of substrate contacts by conductive pads.

In a particular example, the component contacts of the second microelectronic component can protrude beyond a lateral edge of the first microelectronic component. In an embodiment, at least one of the first and second microelectronic components can comprise a memory storage component. In an exemplary embodiment, the microelectronic package may also include a plurality of leads extending from at least some of the substrate contacts to the terminals. The leads may be usable to carry an address signal that may be used to address the memory storage element in at least one of the first and second microelectronic components. In an example, at least some of the terminals may be operable to carry at least one of a signal or a reference potential between the individual terminals and each of the first and second microelectronic components One.

In one embodiment, the microelectronic package can also include a plurality of third microelectronic components, each of the third microelectronic components being electrically connected to the substrate. In a specific example, the plurality of third microelectronic components can be configured in a stacked configuration, each of the third microelectronic components having a front or back surface facing the third microelectronics a front or back surface of an adjacent one of the elements. In one embodiment, the plurality of third microelectronic components can be configured in a planar configuration, each of the third microelectronic components having a peripheral surface facing the third microelectronic component a peripheral surface of an adjacent one.

In an exemplary embodiment, the second microelectronic component may include a volatile RAM, and the third microelectronic component may respectively include a non-volatile flash memory, and the first microelectronic component may include a configured A processor is provided that primarily controls an external component and data transfer between the second and third microelectronic components. In an example, the second microelectronic component can include a volatile frame buffer memory storage component, and the third microelectronic components can each include a non-volatile flash memory, and the first Microelectronic components can include A graphics processor.

In a particular embodiment, a system can include a plurality of microelectronic packages, a circuit board, and a processor as described above. The terminals of the microelectronic package can be electrically connected to the board contacts of the circuit board. Each microelectronic package can be configured to transmit a number N of data bits in parallel in a clock cycle. The processor can be configured to transmit a number M of data bits in parallel in a clock cycle, the M system being greater than or equal to N. In a particular example, a system can include a microelectronic package as described above and one or more other electronic components electrically coupled to the microelectronic package. In an embodiment, the system can also include a housing to which the microelectronic package and the other electronic components are mounted.

According to another feature of the invention, a module can include a module card having first and second surfaces and first and second microelectronic components having a front surface facing the first surface of the module card. The module card may have a plurality of parallel exposed edge contacts adjacent to an edge of at least one of the first and second surfaces for use when the module is inserted into a socket and the socket The corresponding contacts are mated. The module card can have a plurality of snap points on the first surface. Each microelectronic element can have a plurality of component contacts on its front surface. The component contacts of each of the microelectronic components can be coupled to corresponding ones of the card contacts. The front surface of the second microelectronic element can partially cover a rear surface of the first microelectronic element and can be attached to the back surface. The component contacts of the first microelectronic component can be configured with an array of regions and can be flip-chip bonded to a first set of snap contacts. The component contacts of the second microelectronic component can be coupled to a second set of snap contacts by conductive pads.

In an exemplary embodiment, the component contacts of the second microelectronic component can protrude beyond a lateral edge of the first microelectronic component. In an example, the edge contacts can be At least one of the first or second surfaces of the module card is exposed. In a particular embodiment, at least one of the first and second microelectronic components can comprise a memory storage component. In an embodiment, the module may also include a plurality of leads extending from at least some of the card contacts to the edge contacts. The leads may be usable to carry an address signal that may be used to address the memory storage element in at least one of the first and second microelectronic components. In a particular example, at least some of the edge contacts can be used to carry a signal or a signal between the individual edge contacts and each of the first and second microelectronic components. At least one of the reference potentials.

In a particular example, the module can also include a plurality of third microelectronic components, each of the third microelectronic components being electrically coupled to the module card. In one example, the plurality of third microelectronic components can be configured in a stacked configuration, each of the third microelectronic components having a front or back surface facing the third microelectronic component a front or back surface of one of the adjacent ones. In a particular embodiment, the plurality of third microelectronic components can be configured in a planar configuration, each of the third microelectronic components having a peripheral surface facing the third microelectronic component a peripheral surface of one of the adjacent ones.

In an embodiment, the second microelectronic component can include a volatile RAM, the third microelectronic component can each include a non-volatile flash memory, and the first microelectronic component can include a configured A processor that primarily controls an external component and data transfer between the second and third microelectronic components. In a specific example, the second microelectronic component can include a volatile frame buffer memory storage component, and the third microelectronic component can each include a non-volatile flash memory, and the first microelectronic The component can include a graphics processor.

In an exemplary embodiment, a system can include a plurality of modules as described above A group, a circuit board, and a processor. The exposed contacts of the module can be inserted into a mating receptacle that is electrically coupled to the circuit board. Each module can be configured to transmit a number N of data bits in parallel in a clock cycle. The processor can be configured to transmit a number M of data bits in parallel in a clock cycle, the M system being greater than or equal to N. In one example, a system can include a module as described above and one or more other electronic components electrically coupled to the module. In a particular embodiment, the system can also include a housing to which the module and the other electronic components are mounted.

10, 210, 310, 410, 510, 610, 710, 810, 910, 1010, 1010'‧‧‧ modules

12, 612, 912, 1512‧‧‧ spacers

14,914, 1314‧‧‧Adhesive layer

20, 220, 320, 420, 520, 620, 720, 820, 920, 1020, 1320, 1520‧‧‧ first microelectronic components

Front surface of 21, 321, 421, 721, 921, 1321‧‧

22, 322, 922, 1322‧‧‧ rear surface

23, 323, 423, 623, 723, 1523‧‧‧ lateral edges

24‧‧‧Electrical contacts (wafer contacts)

25, 325‧‧‧Central Area

30, 230, 330, 430, 530, 630, 730, 830, 930, 1030, 1330, 1430, 1530‧‧‧ second microelectronic components

Front surface of 31, 331, 431, 531, 631, 731, 931, 1331, 1531‧‧

32‧‧‧Back surface

33, 733‧‧‧ lateral edges

34, 234‧‧‧Electrical contacts (wafer contacts)

35, 435, 535, 635, 1535‧‧‧ central area

40, 240, 340, 440, 540, 640, 840, 1040, 1140‧‧‧ module cards

41, 241, 341, 441, 541, 641, 741, 1041, 1141, 1341‧‧‧ first surface

42, 242, 342, 442, 542, 642, 842, 1042, 1142, 1342, 1542‧‧‧ second surface

43,843, 1043, 1043a‧‧‧ insert edge

44, 244, 344, 444, 544, 844b, 1044‧‧‧ conductive contacts

45, 845, 845‧‧‧ first hole

46, 846‧‧‧ second hole

50, 850, 1050, 1150‧‧‧ edge joints

55, 855a, 855b‧‧‧ conductive lines

60‧‧‧First encapsulating material

65, 465‧‧‧Second encapsulation material

70, 570, 870, 970‧‧‧ leads

71, 72, 272, 371a, 371b, 372, 471, 472, 971, 972, 1072‧‧‧ wire bonding

224, 324, 324a, 324b, 424, 634, 734, 824, 924, 1024‧‧‧ conductive contacts (wafer contacts)

246, 446, 546, 1046, 1476‧‧ holes

247, 347, 547, 647, 747, 1047‧‧‧ conductive contacts

273, 675, 775, 1073, 1351, 1373, 1375, 1473, 1575‧‧‧ conductive blocks

434, 534, 534a, 534b, 834, 934, 1034, 1534‧‧‧ conductive contacts (wafer contacts)

574, 574a, 574b‧‧‧ wire bonding

719‧‧‧ axis

724, 724', 1324, 1334, 1434‧‧‧ component contacts

740‧‧‧Module card (substrate)

747a, 747b, 1347, 1347a, 1347b, 1447b, 1547b‧‧‧ substrate contacts

848‧‧‧ lateral edges

913‧‧‧ front surface

915‧‧‧Back surface

945‧‧‧First gap

946‧‧‧Second gap

950‧‧‧Modular contacts

960, 1460‧‧‧ encapsulation materials

961‧‧‧Insert part

Surface below 962‧‧

980‧‧‧ lead frame

981‧‧‧ first surface

982‧‧‧ second surface

983, 1143‧‧‧ insert edge

985‧‧‧Lead (conducting line part)

1090, 1090a, 1090b, 1090'‧‧‧ third microelectronic components

1100‧‧‧ components

1110a‧‧‧ first module

1110b‧‧‧ second module

1165‧‧ layer

1200‧‧‧ system

1201‧‧‧shell

1202‧‧‧Circuit board (main board)

1204‧‧‧Conductor

1205‧‧‧ socket

1206‧‧‧Modules (components)

1207‧‧‧Contacts

1208‧‧‧Electronic components (semiconductor wafers)

1210‧‧‧Electronic components (display screen)

1211‧‧ lens

1310, 1510‧‧‧Microelectronics package

1340, 1540‧‧‧ substrate

1350, 1550‧‧‧ terminals

1475‧‧‧conductive column

1477‧‧‧Frustum-shaped column

1478‧‧‧Frustum-shaped column

1479a, 1479b‧‧‧ conductive column

1480‧‧‧Slim solder connection

1600‧‧‧ system

1601‧‧‧shell

1602‧‧‧Circuit board (main board, riser)

1604‧‧‧Conductor

1606‧‧‧Modules (components)

1608‧‧‧Electronic components (semiconductor wafers)

1610‧‧‧Electronic components (display screen)

1611‧‧‧ lens

1A is a schematic cross-sectional view of a stacked microelectronic assembly in accordance with an embodiment of the present invention.

Figure 1B is a bottom cross-sectional view of the assembly of Figure 1A taken along line 1B-1B of Figure 1A.

1C is a side cross-sectional view of the assembly of FIG. 1B taken along line 1C-1C of FIG. 1B.

2 is a schematic cross-sectional view of a stacked microelectronic assembly in accordance with another embodiment of a flip chip bonded microelectronic component.

3 is a schematic cross-sectional view of a stacked microelectronic assembly in accordance with another embodiment of a microelectronic component having an upward facing surface.

4 is a cross-sectional view of a stacked microelectronic assembly in accordance with another embodiment having a single window in the module card with a wire bond system attached to two microelectronic elements extending through the window.

Figure 5 is a schematic cross-sectional view of a stacked microelectronic assembly in accordance with another embodiment having wire bonding.

Figure 6 is a schematic cross-sectional view of a stacked microelectronic assembly in accordance with another embodiment having an elongated solder joint.

7A is a cross-sectional view of a stack of microelectronic assemblies in accordance with another embodiment having a microelectronic component with the contacts tied near one of the edges.

Figure 7B is a bottom cross-sectional view of the stacked package of Figure 7A taken along line 7B-7B of Figure 7A.

Figure 7C is a fragmentary view showing a configuration alternative to one of the contacts of a portion of Figure 7B.

8 is a variation of a bottom cross-sectional view of the stacked assembly of FIG. 1B with a microelectronic component having a column of central contacts oriented substantially perpendicular to a column of central contacts of another microelectronic component.

Figure 9A is a schematic cross-sectional view of a microelectronic assembly stacked in accordance with another embodiment having a lead frame.

Figure 9B is a bottom cross-sectional view of the stacked assembly of Figure 9A taken along line 9B-9B of Figure 9A.

Figure 9C is a side cross-sectional view of the assembly of Figure 9B taken along line 9C-9C of Figure 9B.

10A is a diagrammatic top plan view of a stacked microelectronic assembly in accordance with another embodiment having a plurality of stacked microelectronic components without exhibiting encapsulation material.

Figure 10B is a side cross-sectional view of the stacked assembly of Figure 10A taken along line 10B-10B of Figure 10A.

Figure 10C is a top plan view of a microelectronic assembly stacked according to another embodiment having a plurality of microelectronic elements adjacent to each other.

Figure 11 is a schematic perspective view of a stacked microelectronic assembly in accordance with another embodiment including two module cards joined to each other.

Figure 12 is a drawing of an overview of a system in accordance with an embodiment comprising a plurality of modules.

Figure 13A is a diagrammatic cross-sectional view of a stacked microelectronic package in accordance with another embodiment.

Figure 13B is a bottom cross-sectional view of the stacked package of Figure 1A taken along line 13B-13B of Figure 13A.

14A-14E are fragmentary cross-sectional views of a portion of the microelectronic package of the stack of Fig. 13A as indicated by the region 14 of the dashed line of Fig. 13A.

15 is a schematic cross-sectional view of a stacked microelectronic package in accordance with another embodiment having an elongated solder joint.

16 is a drawing of an overview of a system in accordance with an embodiment of the present invention.

Referring to FIGS. 1A through 1C , a module 10 according to an embodiment of the invention may include a first microelectronic component 20 , a second microelectronic component 30 , and a module card 40 having an exposed edge contact 50 . A first encapsulating material 60 can cover the microelectronic components 20 and 30 and a portion of the module card 40.

In some embodiments, at least one of the first and second microelectronic components 20 and 30 can be a semiconductor wafer, a wafer, or the like. For example, one or both of the first microelectronic component 20 and the second microelectronic component 30 can comprise a memory storage component such as a DRAM. As used herein, a "memory storage element" refers to a plurality of memory units arranged in an array and circuitry that can be used to store data and retrieve data therefrom, such as for data transmission over an electrical interface. . In a particular example, the module 10 can be contained in a single row of embedded memory modules ("SIMM") or a dual row of embedded memory modules ("DIMMs").

The first microelectronic component 20 can have a front surface 21 away from the front surface The rear surface 22 of the 21 and the lateral edge 23 extending between the front and rear surfaces. Electrical contacts 24 are exposed on front surface 21 of first microelectronic element 20. As described herein, the electrical contacts 24 of the first microelectronic component 20 may also be referred to as "wafer contacts." As used in this disclosure, a statement that a conductive element is "exposed" on a surface of a structure means that the conductive element is available for contact from a structure in a direction perpendicular to the surface. The outer part moves toward the surface in a theoretical point. Thus, a terminal or other electrically conductive element that is exposed on a surface of a structure may protrude from such a surface; may be flush with such surface; or may be recessed relative to such surface and transmitted through A hole or recess in the structure is exposed. The contact 24 of the first microelectronic component 20 is exposed at a front surface 21 in a central region 25 of the first microelectronic component. For example, the contacts 24 can be configured with one or two parallel columns adjacent the center of the front surface 21.

The second microelectronic element 30 can have a front surface 31, a rear surface 32 remote from the front surface 31, and a lateral edge 33 extending between the front surface and the back surface. The electrical contacts 34 are exposed on the front surface 31 of the second microelectronic element 30. As described herein, the electrical contacts 34 of the second microelectronic component 30 may also be referred to as "wafer contacts." The contact 34 of the second microelectronic element 30 is exposed at a front surface 31 in a central region 35 of the second microelectronic element. For example, the contacts 34 can be configured with one or two parallel columns adjacent the center of the front surface 31.

As can be seen in Figures 1A and 1C, the first and second microelectronic elements 20 and 30 can be stacked relative to one another. In some embodiments, the front surface 31 of the second microelectronic element 30 and the back surface 22 of the first microelectronic element 20 can face each other. At least a portion of the front surface 31 of the second microelectronic element 30 can cover the first microelectronic element 20 At least a portion of the rear surface 22. At least a portion of the central region 35 of the second microelectronic element 30 can protrude beyond a lateral edge 23 of the first microelectronic element 20. Thus, the contact 34 of the second microelectronic element 30 can be disposed in a position that protrudes beyond the lateral edge 23 of the first microelectronic element 20.

The microelectronic assembly 10 can further include a module card 40 having first and second surfaces 41 and 42 facing away from each other. One or more conductive contacts 44 may be exposed at the second surface 42 of the module card 40. The module card 40 can further include one or more apertures, such as a first aperture 45 and a second aperture 46. As shown in FIGS. 1A and 1C, the front surfaces 21, 31 of the individual first and second microelectronic elements 20, 30 can face the first surface 41 of the module card 40.

The module card 40 can be made, in part or in whole, of any suitable dielectric material. For example, the module card 40 can comprise a relatively rigid plate-like material such as a thick fiber reinforced epoxy layer, such as a Fr-4 or Fr-5 plate. The module card 40 can comprise a single layer or multiple layers of dielectric material regardless of the material being used. In a particular embodiment, the module card 40 can be substantially comprised of a material having a coefficient of thermal expansion ("CTE") of less than 30 ppm/°C.

As can be seen in FIG. 1, the module card 40 can extend beyond a lateral edge 23 of the first microelectronic component 20 and a lateral edge 33 of the second microelectronic component 30. The first surface 41 of the module card 40 can be placed side by side with the front surface 21 of the first microelectronic component 20.

In the embodiment depicted in FIGS. 1A through 1C, the module card 40 includes a first aperture 45 substantially aligned with the central region 25 of the first microelectronic component 20 and a substantially associated with the second microelectronic component. The central region 35 of the 30 is aligned with the second aperture 46, thereby passing through the respective first and second apertures to provide access to the contacts 24 and 34. The first and second holes 45 and 46 can be extended Extending between the first and second surfaces 41 and 42 of the module card 40. As shown in FIG. 1B, the apertures 45 and 46 can be aligned with corresponding wafer contacts 24 or 34 of the respective first and second microelectronic components 20 and 30.

The module card 40 can also include conductive contacts 44 that are exposed at the second surface 42 thereof and conductive traces 55 that extend between the contacts 44 and the exposed edge contacts 50. The conductive lines 55 electrically couple the contacts 44 to the exposed edge contacts 50. In a particular embodiment, the contacts 44 can be individual end portions of the lines 55.

In a particular embodiment, the module card 40 can have a plurality of parallel exposed edge contacts 50 adjacent an insertion edge 43 of at least one of the first and second surfaces 41, 42 for use. When the module 10 is inserted into a socket (shown in FIG. 12), it is mated with a corresponding contact of the socket. As shown in FIG. 1B, the insertion edge 43 can be configured such that each of the apertures 45 and 46 has a long dimension L that extends in a direction away from the insertion edge of the module card 40. Some or all of the edge contacts 50 may be exposed at either or both of the first or second surfaces 41, 42 of the module card 40.

The exposed edge contacts 50 and the insertion edges 43 may be sized for insertion into a corresponding socket (Fig. 12) of one of the other connectors of a system, for example, may be disposed on a motherboard. Such exposed edge contacts 50 can be adapted for mating with a plurality of corresponding spring contacts (Fig. 12) within such receptacle connectors. Such spring contacts can be provided on one or more sides of each slot to mate with the corresponding ones of the exposed edge contacts 50. In an example, at least some of the edge contacts 50 can be used to carry a signal or between each of the individual edge contacts and each of the first and second microelectronic components 20, 30. Is at least one of a reference potential.

As can be seen in FIGS. 1A through 1C, electrical connections or leads 70 can electrically connect the contacts 24 of the first microelectronic component 20 and the contacts 34 of the second microelectronic component 30 to the exposed edge contacts 50. . The leads 70 can include wire bonds 71 and 72 and the conductive traces 55. In an embodiment, the leads 70 can be considered to electrically connect each of the microelectronic components 20, 30 to the module card 40. In a particular example, the leads 70 can be used to carry an address signal that can be used to address a memory in at least one of the first and second microelectronic components 20, 30. Store components.

As used herein, a "lead" is a portion or all of an electrical connection extending between two electrically conductive elements, for example, the lead 70 includes a wire bond 71 and a conductive trace 55 from which the first micro One of the contacts 24 of the electronic component 20 extends through the first aperture 45 to one of the exposed edge contacts 50.

In one example, the module 10 can include a plurality of leads 70 extending within the holes 45 and 46 from the wafer contacts 24 and 34 of at least one of the first and second microelectronic components 20 and 30 to The exposed edge contacts 50. In a particular embodiment, the leads 70 can include conductive traces 55 on the module card 40 and extend from the conductive traces to at least one of the first and second microelectronic components 20, 30. Wire bonds 71, 72 of wafer contacts 24, 34.

As shown in FIG. 1B, the conductive traces 55 of the leads 70 can extend along the second surface 42 of the module card 40. In a specific example, the conductive lines 55 of the leads 70 may extend along the first surface 41 of the module card 40, or the conductive lines of the leads may follow the first and the first of the module cards. Both surfaces 41, 42 extend. Portions of the conductive lines 55 may be along a surface 41 or 42 of the module card 40, substantially parallel to the aperture 45. And the length L of the 46 extends from the individual contacts 24 and 34 to the exposed edge contacts 50. In a particular embodiment, the conductive traces 55 are disposed along a surface 41 or 42 of the module card 40 in a pattern such that the individual contacts 24 and 34 are in contact with the exposed edges. The length of the lead 70 between 50 can be minimized.

Each of the wire bonds 71 and 72 can extend through the individual first or second holes 45 or 46 and can be electrically coupled to a corresponding contact 24 or 34 to a corresponding one of the module cards 40. Point 44. The process of forming the wire bonds 71 and 72 can include inserting a bonding tool through the holes 45, 46 to electrically connect the conductive contacts 24, 34 to corresponding conductive contacts 44 of the module card 40.

In a particular embodiment, each of the wire bonds 71 and 72 can be a plurality of wire bonds comprising a plurality of wire bonds that are oriented substantially parallel to each other. Such multiple wire bond structures comprising a plurality of wire bonds 71 or 72 can provide a parallel conductive path between a contact 24 or 34 and a corresponding contact 44 of one of the module cards 40.

A spacer 12 can be disposed between the front surface 31 of the second microelectronic component 30 and a portion of the first surface 41 of the module card 40. Such a spacer 12 may, for example, be made of a dielectric material such as cerium oxide, a semiconductor material such as ruthenium, or one or more layers of an adhesive. If the spacer 12 includes an adhesive, the adhesive can connect the second microelectronic component 30 to the module card 40. In an embodiment, the spacers 12 may have a front surface and a rear surface 21 of the first microelectronic component 20 in a direction V perpendicular to the first surface 41 of the module card 40. The thickness T2 between 22 is substantially the same thickness T1.

In a particular embodiment, the spacer 12 can be replaced by a buffer wafer having a surface facing the first surface 41 of the module card 40. In an example, such a buffer wafer The flip chip may be bonded to the contact where the first surface 41 of the module card 40 is exposed. Such a buffer wafer can be configured to help provide impedance isolation of each of the microelectronic components 20 and 30 relative to components external to the module 10.

One or more adhesive layers 14 may be disposed between the first microelectronic component 20 and the module card 40, between the first and second microelectronic components 20 and 30, and at the second microelectronic Between the component 30 and the spacer 12, and between the spacer 12 and the module card 40. Such an adhesive layer 14 can include an adhesive for bonding the aforementioned components of the module 10 to each other. In a particular embodiment, the one or more adhesive layers 14 can extend between the first surface 41 of the module card 40 and the front surface 21 of the first microelectronic element 20. In an embodiment, the one or more adhesive layers 14 can attach at least a portion of the front surface 31 of the second microelectronic element 30 to at least a portion of the back surface 22 of the first microelectronic element 20.

In one example, each of the adhesive layers 14 may be partially or wholly made of a die attach adhesive and may be made of a material having a low modulus of elasticity such as a polyoxyalkylene elastomer. Composition. In an embodiment, the die attach adhesive can be flexible. In another example, if the two microelectronic components 20 and 30 are conventional semiconductor wafers formed of the same material, each of the adhesive layers 14 may be wholly or partially covered by a thin layer. Elastomeric modulus adhesives or solders are formed because the microelectronic components will have a tendency to uniformly expand and contract in response to temperature changes. Each of the adhesive layers 14 may comprise a single layer or multiple layers therein, regardless of the material being employed. In a particular embodiment in which the spacer 12 is formed of an adhesive, the adhesive layer 14 disposed between the spacer 12 and the second microelectronic component 30 and the module card 40 can be omitted.

The module 10 can also include a first encapsulating material 60 and a second encapsulating material. 65. For example, the first encapsulating material 60 can cover the back surfaces 22 and 32 of the individual first and second microelectronic components 20 and 30 and a portion of the first surface 41 of the module card 40. In a particular embodiment, the first encapsulating material 60 can be an overmold. One or more second encapsulating materials 65 may cover portions of the front surfaces 21 and 31 of the individual microelectronic components 20 and 30 that are exposed within the individual apertures 45 and 46, and the second surface 42 of the module card 40. A portion of the contacts 24, 34, and 44, and wire bonds 71 and 72 extending between the respective contacts 24 and 34 and corresponding contacts 44. In a particular embodiment, a second encapsulating material 65 can cover portions of the leads 70 that extend between the wafer contacts 24 and 34 and the module card 40.

In a process according to a particular embodiment, the first encapsulation material 60 can be implanted onto the back surfaces 22 and 32 of the individual first and second microelectronic components 20 and 30, and injected into the mold. Above the first surface 41 of the set of cards 40. In a process according to an example, the second encapsulating material 65 can be injected into the first and second holes 45, 46 such that between the wafer contacts 24, 34 and the module card 40 The portion of lead 70 is covered by the second encapsulating material.

Figure 2 shows a variation of the embodiment described above in relation to Figures 1A through 1C. In this variation, a module 210 is the same as the module 10 described above, except that the first microelectronic component 220 is flip-chip bonded to the first surface 241 of the module card 240 instead of being wire bonded to the module. The second surface of the card.

The conductive contacts 224 are exposed at the front surface 221 of the first microelectronic element 220. The conductive contacts or wafer contacts 224 can be electrically connected, for example, by conductive bumps 273 to conductive contacts 247 that are exposed at the first surface 241 of the module card 240. The conductive blocks 273 may comprise a fusible metal having a relatively low melting temperature, such as solder, tin or a package. A eutectic mixture comprising a plurality of metals. Alternatively, the conductive blocks 273 may comprise a wettable metal having a melting temperature above the melting temperature of the solder or another fusible metal, such as copper, other precious metals or non-precious metals. In a specific embodiment, the conductive blocks 273 may comprise a conductive material dispersed in a medium, such as a conductive paste, a metal-filled paste, a solder-filled paste, or an isotropic conductive adhesive. Or an isotropic conductive adhesive.

Conductive lines (not shown in FIG. 2) may extend from the conductive contacts 247 along the first surface 241 of the module card 240 to an insertion edge of the module card (eg, in FIGS. 1B and 1C) The exposed edge joint of the illustrated insertion edge 43). As in the module 10 described above, the wafer contacts 234 of the second microelectronic component 230 can be electrically connected to the corresponding module card 240 by wire bonding 272 extending through a hole 246 of the module card. Conductive contacts 244. The conductive traces may also extend from the conductive contacts 244 along the second surface 242 of the module card 240 to an insertion edge of the module card (eg, the insertion edge 43 shown in FIGS. 1B and 1C). Exposed edge joints.

Figure 3 is a diagram showing another variation of the embodiment described above in relation to Figures 1A through 1C. In this variation, a module 310 is identical to the module 10 described above except that the first microelectronic component 320 faces the first surface 341 of the module card 340 with its rear surface 322 and its front surface 321 At least a portion is disposed to face and partially cover at least a portion of the front surface 331 of the second microelectronic element 330. The back surface 322 of the first microelectronic element 320 can be attached to the first surface 341 of the module card 340 by one or more adhesive layers such as the adhesive layer 14 shown in FIGS. 1A and 1C. . Conductive contacts 324a and 324b (collectively referred to as conductive contacts 324) may be exposed at the front surface 321 of the first microelectronic element 320. The wafer contacts 324 of the first microelectronic element 320 can include any configuration of conductive contacts 324a and/or 324b.

The conductive contact 324a of the first microelectronic element 320 can be exposed in a central region 325 of the first microelectronic component before the surface 321 is exposed. For example, the contacts 324a can be configured with one or two parallel columns adjacent the center of the front surface 321 . The conductive contacts 324a can be electrically connected to the conductive contacts 347 exposed on the first surface 341 of the module card 340, for example, by wire bonding 371a.

The conductive contact 324b of the first microelectronic element 320 can be exposed proximate the front surface 321 of a lateral edge 323 of the first microelectronic element. For example, the contacts 324b can be configured with one or two parallel columns adjacent the lateral edges 323 of the first microelectronic element 320. The conductive contacts 324b can be electrically connected to the conductive contacts 347 exposed on the first surface 341 of the module card 340, for example, by wire bonding 371b.

Similar to FIG. 2, conductive traces (not shown in FIG. 3) may extend from the conductive contacts 347 and 344 along the respective first and second surfaces 341, 342 of the module card 340 to the mold. The edge contacts of the insertion edge of the group card (e.g., the insertion edge 43 shown in Figures IB and 1C) are exposed.

Although the embodiment shown in FIG. 3 is shown with the second microelectronic component 330 electrically coupled to the module card 340 by wire bonds 372, in other embodiments, the second microelectronic component The module card can be electrically connected in various other ways, including, for example, a lead bond (as shown in Figure 5) or a flip chip bond using solder (as shown in Figures 6 and 7). )

Figure 4 is a diagram showing another variation of the embodiment described above in relation to Figures 1A through 1C. In this variation, a module 410 is identical to the module 10 described above, except that the first and second microelectronic components 420 and 430 extend through a first and second surface extending through the module card. The individual wire bonds 471 and 472 of the shared hole 446 between 441 and 442 are electrically connected to the module card 440 instead of having each microelectronic component extended through an individual separate aperture of the module card. A wire bond connects to the module card.

As shown in FIG. 4, the conductive contacts 424 of the first microelectronic element 420 can be exposed at a front surface 421 proximate a lateral edge 423 of the first microelectronic element. For example, the contacts 424 can be disposed in a column adjacent the lateral edges 423 of the first microelectronic element 420. The conductive contacts 424 can be electrically connected to the conductive contacts 444 exposed at the second surface 442 of the module card 440, for example, by wire bonds 471.

The conductive contact 434 of the second microelectronic element 430 can be exposed in a central region 435 of the second microelectronic element before the surface 431 is exposed. For example, the contacts 434 can be disposed in a column about the center of the front surface 431. The conductive contacts 434 can be electrically connected, for example, by wire bonds 472 to conductive contacts 444 that are exposed at the second surface 442 of the module card 440.

In the embodiment shown in FIG. 4, the module 410 can include a single second encapsulating material 465. For example, a second encapsulating material 465 can cover portions of the front surfaces 421 and 431 of the individual microelectronic components 420 and 430 that are exposed within the single common aperture 446, and the second surface 442 of the module card 440. A portion, the contacts 424, 434, and 444, and wire bonds 471 and 472 extending between the individual contacts 424 and 434 and the corresponding contacts 444.

Figure 5 is a diagram showing another variation of the embodiment described above in relation to Figures 1A through 1C. In this variation, a module 510 is the same as the module 10 described above, except that the first microelectronic component 520 is flip-chip bonded to the first surface 541 of the module card 540 (in the same manner as in FIG. 2). And the second microelectronic component 530 is extended by the conductive line to the wafer contacts 534 Wire bonds 574a and 574b (collectively referred to as wire bonds 574) are electrically connected to the module card 540 instead of being wire bonded.

As shown in FIG. 5, the conductive contacts 534a and 534b (collectively referred to as conductive contacts 534) of the second microelectronic component 530 can be exposed before a central region 535 of the second microelectronic component. . For example, the contacts 534 can be configured with one or two parallel columns adjacent the center of the front surface 531. Some of the conductive contacts 534a may be electrically connected, for example, by wire bonds 574a to conductive contacts 544 that are exposed at the second surface 542 of the module card 540. The other conductive contacts 534b can be electrically connected to the conductive contacts 547 exposed at the first surface 541 of the module card 540, for example, by wire bonding 574b. As shown in FIG. 5, the conductive contacts 544 and 547 can be conductive contact portions of the individual wire bonds 574a and 574b.

The process of forming the wire bonds 574 can be substantially as described in the commonly assigned U.S. Patent Nos. 5,915,752 and 5,489,749, the disclosures of each of each of each of each In the wire bonding process, each lead 570 can be displaced downwardly by a tool such as a thermal ultrasonic bonding tool to engage a corresponding conductive contact 534. Such a bonding tool can be inserted through the aperture 546 to electrically connect the lead 570 to the corresponding conductive contact 534. The frangible section of the lead 570 may break during this process.

Figure 6 is a diagram showing another variation of the embodiment described above in relation to Figures 1A through 1C. In this variation, a module 610 is identical to the module 10 described above except that the first microelectronic component 620 is flip-chip bonded to the first surface 641 of the module card 640 (in the same manner as in FIG. 2). And the second microelectronic component 630 is formed by a conductive block 675 extending between the conductive contact 634 of the second microelectronic component and the conductive contact 647 exposed at the first surface of the module card. cover The crystal is bonded to the first surface of the module card instead of being wire bonded. In a particular embodiment, the module card 640 can be a hole that has no leads extending through between the first and second surfaces 641, 642 thereof (eg, holes 45 and 46 shown in FIG. 1A). .

Similar to the module 10 described above, the conductive contacts 634 of the second microelectronic component 630 can be exposed before the front surface 631 in a central region 635 of the second microelectronic component. For example, the contacts 634 can be configured with one or two parallel columns adjacent the center of the front surface 631.

For example, the conductive bumps 675 can be elongated solder connections, solder balls, or any of the other materials described above with reference to the conductive bumps 273. Such a conductive block 675 can extend through the space between the spacer 612 and the lateral edge 623 of the first microelectronic element 620 to electrically connect the second microelectronic element 630 with the module card 640.

Figures 7A and 7B show another variation of the embodiment described above in relation to Figure 6. In this variation, a module 710 is identical to the module 610 described above except that the second microelectronic component 730 is extended by a conductive contact 734 located at a lateral edge 733 adjacent the second microelectronic component. And a conductive block 775 between the conductive contacts 747 exposed on the first surface of the module card is flip-chip bonded to the first surface 741 of the module card 740 instead of extending the conductive blocks The front surface of the second microelectronic component in a central region of the two microelectronic component is exposed between the conductive contacts.

The first microelectronic element 720 can have a plurality of component contacts 724 on the front surface 721 of the first microelectronic component. The component contacts 724 can be coupled to a first set of substrate contacts 747a such that the component contacts are flip-chip bonded to the substrate contacts. As shown in FIG. 7B, the component contacts 724 and the first set of substrate contacts 747a can each use a region. Domain array configuration to configure.

In a particular example, the contacts 734 at the front surface 731 of the second microelectronic element 730 can be disposed in a row adjacent the lateral edges 733 of the second microelectronic element such that the contacts 734 can Projecting beyond the lateral edge 723 of the first microelectronic element 720. The component contacts 734 can be coupled to a second set of substrate contacts 747b such that the component contacts are flip-chip bonded to the substrate contacts.

Although the contacts 724, 734, and 747 are shown as being configured with parallel row contacts, other contact configurations are also contemplated by the present invention. For example, although not shown in FIG. 7B, at least one of the contacts may be disposed between adjacent contact rows. In another example, such as seen in Figure 7C, the contacts can include a row of contacts, and a row of axes 719 extends through most of the contacts 724 of the row, i.e., the center of the row axis 719 It is relative to it. However, in this row, as in the case of contact 724', one or more of the contacts 724 may not be centered relative to the row axis 719. In this example, the one or more contacts 724' are considered to be part of a particular row, even though such contacts may not be centered relative to the axis 719 because they are more axes than any other row. Close to the axis 719 of the particular row. The row axis 719 can extend through the one or more contacts that are not centered relative to the row axis, or in some cases, the non-center contact may be further from the row axis, such that The row axis 719 may not even pass through these non-central contacts of the row. There may be one, several, or many contacts in a row, or even in more than one row, that are not centered relative to the row axis of the individual row.

Furthermore, it is also possible that the microelectronic elements 720, 730 and the substrate 740 comprise a combination of contacts 724, 734 and 747 of groups other than rows, for example having a shape like a ring, a polygon or even a disorder. The configuration of the contact distribution.

In one embodiment, similar to the module 610 described above, the module card 740 can extend through the aperture between its first and second surfaces 741, 742 without leads.

FIG. 8 is a diagram showing another variation of the embodiment described above in relation to FIG. 1B. In this variation, a module 810 is identical to the module 10 described above except that the columns of conductive contacts 824 of the first conductive component 820 can be substantially perpendicular to the columns of conductive contacts 834 of the second conductive component 830. In this embodiment, similar to the second aperture 46 shown in FIG. 1B, the second aperture 846 can have a length L that extends a distance away from the insertion edge 843 of the module card 840. The first aperture 845 can have a length L' extending in a direction substantially parallel to the insertion edge 843 of the module card 840 and substantially perpendicular to the length L of the second aperture 846.

The pattern of the leads 870 that may include the conductive traces 855a is the same as the pattern of the conductive traces 55 shown in FIG. 1B. The leads 870 can further include a pattern of one of the conductive traces 855b extending from the conductive contacts 844b exposed at the second surface 842 of the module card 840 to the exposed edge contacts. 850. In a particular embodiment, some of the conductive traces 855b may extend around the lateral edge 848 of the first aperture 845.

Figure 9 is a diagram showing another variation of the embodiment described above in relation to Figures 1A through 1C. In this variation, a module 910 is identical to the module 10 described above except that the first and second microelectronic components 920 and 930 are mounted to a lead frame 980 instead of being mounted to a For example, it is above the module card of the module card 40 shown in FIG. 1A. In a particular embodiment, the front surfaces 921, 931 of the first and second microelectronic components 920, 930 can face a first surface 981 of the lead frame 980, each microelectronic component being electrically connected to the Lead frame.

An example of a leadframe structure is shown and described in U.S. Patent No. 7,176,506 The disclosures of these patents are incorporated herein by reference. In general, a leadframe, such as the leadframe 980, is a structure formed from a piece of conductive metal, such as copper, that is patterned into segments that include a plurality of leads or conductive trace portions 985. In an exemplary embodiment, at least one of the first and second microelectronic elements 920, 930 can be mounted directly over the leads, and the leads can extend under the microelectronic elements. In this embodiment, the contacts 924, 934 on the microelectronic components can be electrically connected to individual leads by solder balls or the like. The leads can then be utilized to form electrical connections to various other conductive structures for carrying an electrical signal potential to and from the microelectronic components 920, 930. When the assembly of the structure including the encapsulation layer 960 is completed, a temporary component such as a frame can be removed from the leads of the lead frame 980 to facilitate the formation of individual leads or conductive trace portions 985.

The first microelectronic component 920 can be attached to the leadframe by one or more adhesive layers 914 extending between the front surface 921 of the first microelectronic component and a first surface 981 of the leadframe. 980. Such an adhesive layer 914 can be similar to the adhesive layer 14 described above with reference to Figures 1A through 1C. The spacer 912 can be attached to the lead frame 980 by one or more adhesive layers 914 extending between a front surface 913 of the spacer and the first surface 981 of the lead frame. At least a portion of the front surface 931 of the second microelectronic element 930 can partially cover the back surface 922 of the first microelectronic element 920 and a back surface 915 of the spacer 912. The front surface 931 of the second microelectronic element 930 can be attached to the back surface 922 of the first microelectronic element 920 and the back surface 915 of the spacer 912 by one or more adhesive layers 914.

As can be seen in Figures 9A through 9C, electrical connections or leads 970 can electrically connect the contacts 924 of the first microelectronic component 920 and the contacts 934 of the second microelectronic component 930. To the exposed module contacts 950. The leads 970 can include wire bonds 971 and 972 and conductive trace portions 985 of the lead frame 980. In a particular example, the leads 970 can be used to carry an address signal that can be used to address a memory in at least one of the first and second microelectronic components 920, 930. Store components.

In one example, the lead frame 980 can define a first gap 945 and a second gap extending between the first surface 981 of the lead frame and a second surface 982 of the lead frame opposite the first surface. 946. The first gap 945 can be aligned with the wafer contacts 924 of the first microelectronic component 920 such that the wire bonds 971 can extend through the first gaps over the wafer contacts 924 and the lead frame Between two surfaces 982. The second gap 946 can be aligned with the wafer contacts 934 of the second microelectronic component 930 such that the wire bonds 972 can extend through the second gaps over the die contacts 934 and the lead frame Between two surfaces 982.

The module 910 can also include an encapsulation material 960 that can cover the first and second microelectronic components 20, 30 and a portion of the lead frame 980 such that the exposed module contacts 950 can A lower surface 962 of an insertion portion 961 of the encapsulating material is exposed. The encapsulation material 960 can also cover the contacts 924, 934 and the wire bonds 971 and 972 extending between the individual contacts 924 and 934 and the lead frame 980. The insertion portion 961 of the encapsulation material 960 can have an appropriate size and shape for mating with a corresponding socket (shown in Figure 12) when the module 910 is inserted into the socket.

In a specific embodiment, the module 910 can have a plurality of parallel module contacts 950 with an insertion edge 983 adjacent to at least one of the first and second surfaces 981, 982 being exposed. When the module 910 is inserted into the socket and a socket (shown in Figure 12) The corresponding contact of the middle) is mated. Some or all of the module contacts 950 may be exposed at either or both of the first or second surfaces 981, 982 of the lead frame 980.

Figures 10A and 10B show a variation of the embodiment described above in relation to Figure 2. In this variation, a module 1010 is identical to the module 210 described above, except that the module 1010 also includes a stack of third microelectronic components 1090 mounted to the module card 1040.

Similar to FIG. 2, the first microelectronic component 1020 is flip-chip bonded to the first surface 1041 of the module card 1040. The conductive contacts or wafer contacts 1024 of the first microelectronic component 1020 can be electrically connected to the conductive contacts 1047 exposed at the first surface 1041 of the module card 1040, for example, by conductive pads 1073. The wafer contacts 1034 of the second microelectronic component 1030 can be electrically connected to the corresponding conductive contacts 1044 of the module card 1040 by wire bonding 1072 extending through a hole 1046 of the module card. Conductive lines (not shown in FIGS. 10A and 10B) may extend from the conductive contacts 1044 and 1047 along the first surface 1041 and/or the second surface 1042 of the module card 1040 to one of the module cards. The exposed edge contact 1050 is inserted into the edge (eg, the edge 1043 or edge 1043a). As shown in FIG. 10B, the edge contacts 1050 can be exposed at the first surface 1041, the second surface 1042, or both surfaces.

There may be any number of third microelectronic elements 1090 in the stack that include, for example, the two third microelectronic elements 1090a and 1090b shown in Figure 10B. The third microelectronic elements 1090 can be connected to each other and/or to the edge contacts 1050 by any interconnection configuration. For example, the underlying third microelectronic component 1090a can be connected to a exposed contact on a surface of the module card 1040 via flip chip bonding, wire bonding, wire bonding, or other interconnect configuration. One or more of the upper third microelectronic elements 1090b may pass through conductive vias extending through the underlying third microelectronic element 1090a, wire bonding, wire bonding, or It is interconnected to interface with the module card 1040.

In an exemplary embodiment, the module 1010 can be configured to function as a solid state memory drive. In this example, the first microelectronic component 1020 can include a semiconductor wafer configured to primarily perform a logic function, such as a solid state disk drive controller, and the second microelectronic component 1030 can include a For example, it is a memory storage element of a volatile RAM of DRAM. The third microelectronic component 1090 can each comprise a memory storage component, such as a non-volatile flash memory. The first microelectronic component 1020 can include a special purpose processor configured to mitigate a central processing unit, such as system 1200 (FIG. 12), from being supervised to and from the second microelectronics. Data transfer of the memory storage elements in component 1030 and third microelectronic component 1090. Such a first microelectronic component 1020 including a solid state disk drive controller can provide a data to and from a motherboard such as the system of system 1200 (e.g., circuit board 1202 shown in FIG. 12). Direct memory access to the bus.

In another embodiment, the module 1010 can be configured to function as a graphics module, for example, which can be inserted into a PCI express slot of a notebook PC. In this example, the first microelectronic component 1020 can include a semiconductor wafer configured to primarily perform a logic function, such as a graphics processor, and the second microelectronic component 1030 can include, for example, a volatile A memory storage element of RAM (eg, DRAM) that can act as a volatile frame buffer for graphics rendering of computations. The third microelectronic component 1090 can each comprise a memory storage component, such as a non-volatile flash memory.

Figure 10C shows a variation of the embodiment described above in relation to Figures 10A and 10B. In this variation, a module 1010' is identical to the module 1010 described above, except that the module 1010' includes a plurality of third microelectronic components mounted adjacent to the module card 1040 adjacent to each other. 1090', not a stacked configuration. Similar to the module 1010, the third microelectronic components 1090' can be connected to the module card 1040 by any interconnection configuration such as flip chip bonding, wire bonding, wire bonding, or other interconnection configuration. One surface is connected by exposed contacts. The module 1010' can be utilized in an example similar to the module 1010, such as a solid state memory disk drive or a graphics module.

Figure 11 depicts a component 1100 comprising first and second modules 1110a and 1110b (e.g., module 10 described with reference to Figures 1A through 1C) in accordance with any of the above-described embodiments. The first and second modules 1110a, 1110b can be joined to each other by using at least one layer 1165 such that the second surfaces 1142 of the individual module cards 1140 of the modules can face each other. In a particular embodiment, the at least one layer 1165 can be a single common encapsulating material, such as the second encapsulating material 65 shown in Figures 1A and 1B. In another example, the at least one layer 1165 can be one or more adhesive layers similar to the adhesive layer 14 described with reference to Figures 1A-1C.

The member 1100 can have parallel exposed edge contacts 1150 adjacent one or more columns of an insertion edge 1143 of the member. Each of the first and second modules 1110a, 1110b can have an array of edge contacts 1150 exposed on the first surface 1141 of the individual module card 1140 such that the edge contacts can be adapted for use in the When the component 1100 is inserted into a socket (similar to the socket shown in Figure 12), it is mated with a corresponding contact of the socket.

The modules and components described above with reference to Figures 1A through 10 can be utilized in the construction of a wide variety of electronic systems, such as system 1200 shown in Figure 12. For example, system 1200 in accordance with another embodiment of the present invention includes a plurality of modules or components 1206 as described above in conjunction with other electronic components 1208 and 1210.

The system 1200 can include a plurality of sockets 1205, each of which includes a complex A plurality of contacts 1207 at one or both sides of the socket, such that each socket 1205 can be adapted to be used to mate with a corresponding exposed edge contact or exposed module of a corresponding module or member 1206 point. In the illustrated system 1200, the system can include a circuit board or motherboard 1202, such as a flexible printed circuit board, and the circuit board can include a plurality of conductors 1204, of which only one conductor 1204 is depicted In Figure 12, the modules or members 1206 are interconnected to each other. However, this is merely exemplary; any suitable structure for making electrical connections between the modules or members 1206 can be utilized.

In a particular embodiment, the system 1200 can also include a processor, such as a semiconductor wafer 1208, such that each module or component 1206 can be configured to transmit a number N of data in parallel during a clock cycle. A bit, and the processor is configurable to transmit a number M of data bits in parallel in a clock cycle, the M system being greater than or equal to N.

In one example, the system 1200 can include a processor die 1208 configured to transmit thirty-two data bits in parallel in a clock cycle, and the system can also include four, for example, with reference to Figures 1A through 1C. The module 1206 of the module 10, each module 1206 is configured to transmit eight data bits in parallel in a clock cycle (ie, each module 1206 can include first and second microelectronics) An element, each of the two microelectronic elements being configured to transmit four data bits in parallel in a clock cycle).

In another example, the system 1200 can include a processor die 1208 configured to transmit sixty-four data bits in parallel in a clock cycle, and the system can also include four, for example, reference to FIG. The module 1206 of the component 1000, each module 1206 is configured to transmit sixteen data bits in parallel in a clock cycle (ie, each module 1206 can include two sets of first and second micros). Electronic components, each of the four microelectronic components being configured to Four data bits are transmitted in parallel in one clock cycle).

In the example depicted in FIG. 12, the member 1208 is a semiconductor wafer and the member 1210 is a display screen, but any other components may be utilized in the system 1200. Of course, although only two additional components 1208 and 1210 are depicted in FIG. 12 for clarity of depiction, the system 1200 can include any number of such components.

Module or member 1206 and members 1208 and 1210 can be mounted in a common housing 1201, generally depicted in dashed lines, and can be electrically interconnected to each other as necessary to form the desired circuitry. The housing 1201 is depicted as a portable housing of the type that can be used, for example, in a mobile phone or personal digital assistant, and the screen 1210 can be exposed at the surface of the housing. In embodiments where one of the structures 1206 includes a photosensitive element, such as an imaging wafer, a lens 1211 or other optical element can also be provided for directing light to the structure. Similarly, the simplified system shown in Figure 12 is merely exemplary; other systems including systems such as desktops, routers, and the like, which are generally considered to be fixed structures, may also utilize the structure discussed above. Come and make it.

Figures 13A and 13B show a variation of the embodiment described above in relation to Figures 7A and 7B. In this variation, a microelectronic package 1310 is the same as the module 710 described above, except that the microelectronic package 1310 includes microelectronic components 1320, 1330 mounted to a substrate 1340 instead of a module card, and the micro The electronic package 1310 has terminals 1350 that are configured for interconnection with another component, rather than edge contacts. In an embodiment, similar to the module 710 described above, the substrate 1340 can be a hole without leads extending through the substrate.

The first microelectronic element 1320 can have a front surface 1321 of the first surface 1341 of the substrate 1340. The first microelectronic component 1320 can have a plurality of first microelectronics The component contact 1324 of the front surface 1321 of the sub-element. The component contacts 1324 can be connected to a first set of substrate contacts 1347a such that the component contacts are flip-chip bonded to the substrate contacts. As shown in FIG. 13B, the component contacts 1324 and the first set of substrate contacts 1347a can each be configured in an area array configuration.

The second microelectronic element 1330 can have a front surface 1331 of the first surface 1341 of the substrate 1340. The front surface 1331 of the second microelectronic element 1330 can partially cover a rear surface 1322 of the first microelectronic element 1320 and can be attached to the back surface 1322, for example, by an adhesive layer 1314.

The second microelectronic element 1330 can have a plurality of component contacts 1334 on the front surface 1331 of the second microelectronic component. The component contacts 1334 can be coupled to a second set of substrate contacts 1347b such that the component contacts are flip-chip bonded to the substrate contacts. As shown in FIG. 13B, the component contacts 1334 and the first set of substrate contacts 1347b can each be configured in a row configuration.

Although the contacts 1324, 1334, and 1347 are shown as being arranged in parallel row contacts, other contact configurations are also contemplated by the present invention, i.e., as described above with reference to Figures 7A-7C.

The substrate 1340 can further include a plurality of terminals 1350 at the second surface 1342 that are configured to connect the microelectronic package 1310 to at least one component external to the package. A conductive block 1351 can be disposed on an exposed surface of one of the terminals 1350. Such a conductive block 1351 can be, for example, a solder ball, or any other material described above with reference to the conductive block 273. In one example, the external component can be a circuit board, such as the circuit board 1602 shown and described below with respect to FIG.

The contacts 1324 and 1334 can be electrically connected to the individual sets of substrate contacts 1347a and 1347b, for example, by individual conductive blocks 1373 and 1375. The conductive bumps 1373 can be, for example, solder balls or any of the other materials described above with reference to the conductive bumps 273. The conductive bumps 1375 can be, for example, elongated solder connections, solder balls, or any of the other materials described above with reference to the conductive bumps 273.

As shown in FIG. 14A, in a variation of the embodiment of FIGS. 13A and 13B, the conductive bumps 1375 and/or conductive bumps 1373 can be at least partially replaced by conductive pillars 1475. The conductive pillars may comprise deposited portions, such as being dispensed or plated into openings in which the contacts 1434 of the second microelectronic component are exposed. For example, the conductive pillars 1475 can be at least partially extended by depositing a metal or other conductive material (eg, a conductive matrix material) by a process such as that described in U.S. Patent Publication No. 2012/0126389. This is formed by the corresponding holes 1476 of the encapsulating material 1460, the disclosure of which is hereby incorporated by reference.

In another variation shown in FIG. 14B, the posts may include a plurality of frustoconical posts 1477 that protrude from the component contacts 1434 of the second microelectronic component 1430 toward the substrate contacts. Corresponding substrate contacts in 1447b. Each post 1477 can be essentially composed of a substantially rigid electrically conductive material, such as a metal such as copper or aluminum. In one embodiment, the posts 1477 can be formed by etching a structure such as a continuous or intermittent piece of metal attached to the contacts. A conductive block 1473 can be disposed between the posts 1477 and the substrate contacts 1447b to provide an electrical connection therebetween. As shown in FIG. 14B, the posts 1477 can have a tapered shape such that each post has a first width adjacent the component contact 1434 that is greater than a second adjacent the substrate contact 1447b. width.

Referring to FIG. 14C, in a variation of the embodiment of FIG. 14B, the posts may include a plurality of frustoconical posts 1478 protruding from the substrate contacts 1447b toward the components of the second microelectronic component 1430. Corresponding component contacts in contacts 1434. A conductive block 1473 can be disposed between the posts 1478 and the component contacts 1434 to provide an electrical connection therebetween. As shown in FIG. 14C, the posts 1478 can have a tapered shape such that each post has a first width adjacent the substrate contact 1447b that is greater than a second adjacent one of the component contacts 1434. width.

Referring to FIG. 14D, in another variation, at least some of the plurality of conductive bumps 1375 can be replaced by conductive pillars 1479a and 1479b extending from the component contacts 1434 of the second microelectronic component 1430. The corresponding substrate contacts of the substrate contacts 1447b are oriented, and the pillars 1479b extend from the substrate contacts toward the pillars 1479a. A conductive block 1473 can be disposed between the posts 1479a and 1479b to provide an electrical connection therebetween. As shown in FIG. 14D, the pillars 1479a and 1479b may each have a tapered shape such that each pillar has a first width adjacent to the component contact 1434 or the substrate contact 1447b that is greater than one adjacent. The second width of the conductive block 1473.

Referring to FIG. 14E, in another variation of the embodiment of FIG. 14B, an elongated solder joint 1480 can be disposed between the substrate contacts 1447b and the corresponding component contacts 1434 of the second microelectronic component 1430. Around 1477 to provide an electrical connection between the posts and the substrate contacts. The conductive block 1473 shown in any of the embodiments of Figures 14B, 14C, and 14D can be extended around the elongated solder of the individual posts 1477, 1478, and 1479 between the component contacts 1434 and the substrate contacts 1447b. Replaced by the connection 1480.

Figure 15 is a diagram showing a variation of the embodiment described above in relation to Figure 6. here In a variation, a microelectronic package 1510 is the same as the module 610 described above, except that the microelectronic package 1510 includes microelectronic components 1520 and 1530 mounted to a substrate 1540 instead of being mounted to a module card, and the micro The electronic package 1510 has terminals 1550 that are exposed at the second surface 1542 for interconnecting the package 1510 with another member, rather than an edge contact as in the embodiment depicted in relation to FIG. In an embodiment, similar to the module 610 described above, the substrate 1540 may have no leads extending through the holes of the substrate.

Similar to the module 10 described above, the conductive contacts 1534 of the second microelectronic component 1530 can be exposed before the front surface 1531 in a central region 1535 of the second microelectronic component. For example, the contacts 1534 can be configured with one or two parallel columns adjacent the center of the front surface 1531.

The conductive bumps 1575 can be, for example, elongated solder connections, solder balls, or any of the other materials described above with reference to the conductive bumps 273. Such a conductive bump 1575 can extend through the space between the spacer 1512 and the lateral edge 1523 of the first microelectronic component 1520 to electrically connect the second microelectronic component 1530 with the substrate 1540.

The conductive block 1575 in Figure 15 can be replaced by any of the alternative connections between the component contacts 1534 and the substrate contacts 1547b shown in Figures 14A-14E.

Any of the microelectronic packages described above with reference to Figures 13A through 15 may include additional microelectronic components, such as the third microelectronic components 1090a and 1090b shown in Figures 10A and 10B (collectively referred to as the first The three microelectronic component 1090) and the third microelectronic component 1090' shown in Figure 10C.

In a particular embodiment, the microelectronic package 1310 (or 1510) can include a stacked third microelectronic component 1090 that utilizes a microelectronic similar to that shown in Figure 10B. The configuration of the components is configured to be mounted over the first surface 1341 of the substrate 1340. In this embodiment, the third microelectronic components 1090a and 1090b may respectively have a first surface 1341 whose surface faces the substrate, which is faced by the front surfaces 1321 and 1331 of the microelectronic components 1320 and 1330. The same surface of the substrate. The substrate 1340 comprising the third microelectronic component 1090 can also have a terminal 1350 disposed on the second surface 1342 for interconnection with another member, rather than the edge contact shown in FIG. 10B. In this embodiment, there may be any number of third microelectronic elements 1090 in the stack that include, for example, two third microelectronic elements 1090a and 1090b as shown in the embodiment of FIG. 10B.

In one example, the microelectronic package 1310 (or 1510) can include a plurality of configurations mounted to the first surface 1341 of the substrate 1340 in a configuration similar to the configuration of the microelectronic elements shown in FIG. 10C. Adjacent third microelectronic element 1090', rather than a stacked configuration. In this embodiment, the third microelectronic components 1090' may respectively have a first surface 1341 whose surface faces the substrate, which is faced by the front surfaces 1321 and 1331 of the microelectronic components 1320 and 1330. The same surface of the substrate. The substrate 1340 comprising the third microelectronic element 1090' may also have a terminal 1350 disposed on the second surface 1342 for interconnection with another member, rather than the edge contact shown in FIG. 10C. . In this embodiment, there may be any number of third microelectronic elements 1090' that include, for example, four microelectronic elements 1090' as shown in the embodiment of Figure 10C.

The modules and microelectronic packages described above with reference to Figures 1A through 15 can be utilized in the construction of a wide variety of electronic systems, such as system 1600 shown in Figure 16. For example, system 1600 in accordance with another embodiment of the present invention includes one or more modules or components 1606, such as the microelectronic package 1310 described above, in conjunction with other electronic components 1608 and 1610.

In the illustrated example system 1600, the system can include a circuit board, such as a flexible printed circuit board, a motherboard, or a riser board 1602, and the circuit board can include a plurality of conductors 1604, wherein Only one conductor 1604 is depicted in Figure 16, which interconnects the modules or members 1606 with one another. The circuit board 1602 can transmit signals to and from each of the microelectronic packages and/or microelectronic components contained within the system 1600. However, this is merely exemplary; any suitable structure for making electrical connections between the modules or components 1606 can be utilized.

In a particular embodiment, the system 1600 can also include a processor, such as a semiconductor wafer 1608, such that each module or component 1606 can be configured to transmit a number N of data in parallel in a clock cycle. A bit, and the processor is configurable to transmit a number M of data bits in parallel in a clock cycle, the M system being greater than or equal to N.

In the example depicted in FIG. 16, the member 1608 is a semiconductor wafer and the member 1610 is a display screen, but any other components may be utilized in the system 1600. Of course, for clarity of illustration, although only two additional components 1608 and 1610 are depicted in FIG. 16, the system 1600 can include any number of such components.

The module or member 1606 and members 1608 and 1610 can be mounted in a common housing 1601, generally depicted in dashed lines, and can be electrically interconnected to each other as necessary to form the desired circuitry. The housing 1601 is depicted as a portable housing of the type that can be used, for example, in a mobile phone or personal digital assistant, and the screen 1610 can be exposed at the surface of the housing. In embodiments where one of the structures 1606 includes a photosensitive element, such as an imaging wafer, a lens 1611 or other optical element can also be provided for directing light to the structure. Similarly, the simplified system shown in Figure 16 is merely an example; other inclusions are generally considered fixed A system such as a desktop computer, a router, and the like can also be constructed using the structure discussed above.

A module or member according to the present invention (for example, the module 10 described above with reference to FIGS. 1A to 1C) whereby a surface of the first microelectronic element covers at least a rear surface of the second microelectronic element A possible benefit of a portion may be to provide an electrical connection to a particular exposed edge contact (eg, the exposed edge contact 50) and a particular microelectronic component (eg, the first microelectronic component 20) A front surface is exposed to a relatively short lead of a particular electrical contact (e.g., the electrical contact 24). The parasitic capacitance between adjacent leads can be quite large, especially in microelectronic assemblies with high junction density and fine pitch. In a microelectronic assembly, such as where the leads 70 can be relatively short, the parasitic capacitance can be reduced, especially between adjacent leads.

Another possible benefit of a module or component in accordance with the present invention as described above may be to provide leads of similar length, such as lead 70, which may, for example, electrically connect data input/output signal terminals (e.g., the exposed edges) Contact 50) and electrical contacts 24, 34 on the front surfaces of the individual first and second microelectronic elements 20, 30. In a system, such as system 1200, which may include a plurality of modules or components 1206, leads 70 of comparable lengths may allow data input/output signals between each microelectronic component and the exposed edge contacts. The delivery delay is fairly close to match.

Yet another possible benefit of a module or component according to the present invention as described above may be to provide a lead of similar length, such as lead 70, which may, for example, electrically connect a common clock signal terminal and/or a shared material. The strobe signal terminals (e.g., the exposed edge contacts 50) and the electrical contacts 24, 34 of the front surfaces of the individual first and second microelectronic components 20, 30. The The data strobe signal terminals or the clock signal terminals or both may have substantially the same load and electrical path length to the individual microelectronic components 20, 30, and the path length to each microelectronic component may be relatively short of.

In any or all of the previously described modules or components, the back surface of one or more of the first or second microelectronic components may be at least partially at one of the microelectronic components after fabrication is completed The outer surface is exposed. Thus, in the assembly described above with respect to FIGS. 1A through 1C, one or both of the back surfaces 22, 32 of the first and second microelectronic elements 20, 30 may be partially or in the completed module 10. All are exposed. The back surfaces 22, 32 may be partially or fully exposed, although for example an overmolding of the first encapsulating material 60 or other encapsulation or encapsulation structure may contact the microelectronic component or be configured to Adjacent to the microelectronic component.

In any of the above embodiments, the microelectronic assembly can comprise a heat sink made of metal, graphite or any other suitable thermally conductive material. In one embodiment, the heat sink comprises a metal layer disposed adjacent to the first microelectronic component. The metal layer can be exposed on the back surface of the first microelectronic element. Alternatively, the heat sink may comprise an overmold or encapsulation material covering at least the back surface of the first microelectronic component.

Although the present invention has been described herein with reference to the specific embodiments thereof, it is understood that these embodiments are merely illustrative of the principles and applications of the invention. Therefore, it is to be understood that a number of modifications may be made to the described embodiments, and other configurations may be devised without departing from the spirit and scope of the invention as defined by the appended claims.

It will be appreciated that the scope of the various patent applications and the features set forth therein may be combined in a manner different from that set forth in the scope of the original patent application. It will also be appreciated that the features described in the relevant individual embodiments can be described Other embodiments in the described embodiments are common.

1310‧‧‧Microelectronics package

1314‧‧‧Adhesive layer

1320‧‧‧First microelectronic components

1321‧‧‧ front surface

1322‧‧‧Back surface

1324‧‧‧Component contacts

1330‧‧‧Second microelectronic components

1331‧‧‧ front surface

1334‧‧‧Component contacts

1340‧‧‧Substrate

1341‧‧‧ first surface

1342‧‧‧ second surface

1347a‧‧‧Substrate contacts

1347b‧‧‧Substrate contacts

1350‧‧‧ Terminal

1351‧‧‧Electrical block

1373‧‧‧Electrical block

1375‧‧‧Electrical block

Claims (27)

A microelectronic package includes: a substrate having first and second opposing surfaces, a plurality of substrate contacts on the first surface, and a plurality of terminals on the second surface, the terminals being Configuring at least one component for connecting the microelectronic package to the exterior of the microelectronic package; and first and second microelectronic components having a first surface facing the first surface of the substrate, And a second surface opposite thereto, the first microelectronic element having a lateral edge extending between the first and second surfaces thereof and extending in a second direction, the second microelectronic assembly having a surface a front surface of the first surface of the substrate, each microelectronic component having a plurality of component contacts on a front surface thereof, the component contacts of each microelectronic component and the substrate contacts Corresponding substrate contacts are joined, the front surface of the second microelectronic component partially covering a rear surface of the first microelectronic component and attached to the rear surface, the front surface of the second microelectronic component Have one a central region, at least a portion of the central region of the front surface of the second microelectronic component protruding in a first direction beyond the lateral edge of the first microelectronic component, the components of the second microelectronic component The contacts are placed in two parallel columns in the central region, wherein the component contacts of the first microelectronic component are configured with an array of regions and are flipped with a first set of substrate contacts Bonding, and the component contacts of the second microelectronic component are coupled to a second set of substrate contacts by an elongated solder connection, each elongated solder connection having a width that is less than a distance between a corresponding component contact of the component contacts and a corresponding one of the substrate contacts. The microelectronic package of claim 1, wherein the second microelectronic component The component contacts protrude beyond a lateral edge of the first microelectronic component. The microelectronic package of claim 1, wherein at least one of the first and second microelectronic components comprises a memory storage component. The microelectronic package of claim 3, further comprising a plurality of leads extending from at least some of the substrate contacts to the terminals, wherein the leads are usable to carry an address signal, The address signal can be used to address the memory storage element of at least one of the first and second microelectronic components. The microelectronic package of claim 1, wherein at least some of the terminals are operable to carry a signal or between each of the individual terminals and each of the first and second microelectronic components Is at least one of a reference potential. The microelectronic package of claim 1, further comprising a plurality of third microelectronic components, each third microelectronic component being electrically connected to the substrate. The microelectronic package of claim 6, wherein the plurality of third microelectronic components are configured in a stacked configuration, each of the third microelectronic components having a front or back surface a front or back surface of one of the adjacent ones of the third microelectronic elements. The microelectronic package of claim 6, wherein the plurality of third microelectronic components are configured in a planar configuration, each of the third microelectronic components having a peripheral surface facing the a peripheral surface of one of the adjacent ones of the third microelectronic elements. The microelectronic package of claim 6, wherein the second microelectronic component comprises a volatile RAM, the third microelectronic component respectively comprises a non-volatile flash memory, and the first microelectronic component is Containing a component that is configured to primarily control an external component and the A processor for data transfer between the second and third microelectronic components. The microelectronic package of claim 6, wherein the second microelectronic component comprises a volatile frame buffer memory storage component, the third microelectronic component respectively comprising a non-volatile flash memory, and The first microelectronic component comprises a graphics processor. A microelectronic system comprising a plurality of microelectronic packages as claimed in claim 1, a circuit board, and a processor, the terminals of the microelectronic package being electrically connected to the board contacts of the circuit board, Each microelectronic package is configured to transmit a number N of data bits in parallel in a clock cycle, and the processor is configured to transmit a number M of data bits in parallel in a clock cycle , M system is greater than or equal to N. A microelectronic system comprising a microelectronic package as in claim 1 and one or more other electronic components electrically connected to the microelectronic package. The system of claim 12, further comprising a housing to which the microelectronic package and the other electronic components are mounted. A microelectronic module includes: a module card having a first surface, a second surface, and a plurality of parallel exposed edges of at least one of the first and second surfaces An edge contact, configured to match a corresponding contact of a socket, the module card having a plurality of card contacts on the first surface; and first and second microelectronic components, the first micro The electronic component has a first surface facing the first surface of the module card and a second surface opposite thereto, the first microelectronic component having between the first and second surfaces extending therethrough and Extending a lateral edge in the second direction, the second microelectronic element having a front surface facing the first surface of the module card, each micro The electronic component has a plurality of component contacts on a front surface thereof, and the component contacts of each microelectronic component are coupled to corresponding ones of the card contacts, the second microelectronic component The front surface partially covers a rear surface of the first microelectronic component and is attached to the rear surface, the front surface of the second microelectronic component having a central region, the front surface of the second microelectronic component At least a portion of the central region protrudes beyond the lateral edge of the first microelectronic element in a first direction, and the component contacts of the second microelectronic element are placed in two of the central regions In parallel columns, wherein the component contacts of the first microelectronic component are configured with an array of regions and are flip-chip bonded to a first set of card contacts, and the components of the second microelectronic component The contacts are connected to a second set of snap contacts by an elongated solder connection, each elongated solder joint having a width that is less than a corresponding component contact in the component contacts and the Pair of substrate contacts Is a distance between the substrate contacts connected. The module of claim 14, wherein the component contacts of the second microelectronic component protrude beyond a lateral edge of the first microelectronic component. The module of claim 14, wherein the edge contacts are exposed at least one of the first or second surfaces of the module card. The module of claim 14, wherein at least one of the first and second microelectronic components comprises a memory storage component. The module of claim 17, further comprising a plurality of leads extending from at least some of the card contacts to the edge contacts, wherein the leads are usable to carry an address signal The address signal can be used to address the memory storage element in at least one of the first and second microelectronic components. The module of claim 14, wherein at least some of the edge contacts are usable to carry between the individual edge contacts and each of the first and second microelectronic components The signal is either at least one of a reference potential. The module of claim 14, further comprising a plurality of third microelectronic components, each third microelectronic component being electrically connected to the module card. The module of claim 20, wherein the plurality of third microelectronic components are configured in a stacked configuration, each of the third microelectronic components having a front or back surface facing a front or back surface of an adjacent one of the third microelectronic elements. The module of claim 20, wherein the plurality of third microelectronic components are configured in a planar configuration, each of the third microelectronic components having a peripheral surface facing the plurality of A peripheral surface of one of the three microelectronic components. The module of claim 20, wherein the second microelectronic component comprises a volatile RAM, the third microelectronic component respectively comprises a non-volatile flash memory, and the first microelectronic component comprises A processor configured to primarily control an external component and data transfer between the second and third microelectronic components. The module of claim 20, wherein the second microelectronic component comprises a volatile frame buffer memory storage component, the third microelectronic component respectively comprising a non-volatile flash memory, and the The first microelectronic component includes a graphics processor. A microelectronic system comprising a plurality of modules, a circuit board and a processor as claimed in claim 14, wherein the exposed contacts of the module are inserted into a mating socket, The socket is electrically connected to the circuit board, and each module is configured to be flat in a clock cycle A number N of data bits are transmitted in a row, and the processor is configured to transmit a number M of data bits in parallel in a clock cycle, the M system being greater than or equal to N. A microelectronic system comprising a module as in claim 1 and one or more other electronic components electrically connected to the module. The system of claim 26, further comprising a housing to which the module and the other electronic components are mounted.