TWI498577B - Differential signal testing system and method thereof - Google Patents

Description

Differential signal test system and method thereof

The invention relates to a prompting system and a method thereof, in particular to a differential signal testing system and a method thereof using a boundary scan method.

In recent years, with the popularity and boom of connectors, the use of differential signal lines in connectors has become very popular. Therefore, how to accurately test differential signal lines has become one of the problems that various manufacturers are eager to solve.

In general, the differential signal line is usually tested by functional tests to check if the differential signal is working properly. However, the functional test only means that the differential signal can be normally received and transmitted. If a pin in the differential signal such as "Tx_p" or "Tx_n" has an open circuit or a capacitor is soldered or even short-circuited, the differential signal may still be transmitted as usual. That is to say, the functional test does not test each of the differential signal lines, so there is a problem that the test reliability is not good.

In view of this, some manufacturers have proposed a test method using the Joint Test Action Group (JTAG) to test differential signal lines by standard test access and boundary scan structures. However, due to the built-in standard test access and boundary scan structures, the differential signal line's edge speed requirements may not be met, so that the test signal cannot be successfully received, and thus each line in the differential signal line. carry out testing. Therefore, the above method still cannot effectively solve the problem of poor test credibility of the differential signal line.

In summary, it can be known that there has been a problem in the prior art that the test signal reliability of the differential signal line is not good, so it is necessary to propose an improved technical means to solve this problem.

The invention discloses a differential signal testing system and a method thereof.

First, the present invention discloses a differential signal testing system, which includes: a device to be tested, a testing device, and a control module. The device under test includes a set of first transmission pin bits (Tx_p, Tx_n) and a set of first receiving pin bits (Rx_p, Rx_n) differential signal lines, and the device under test is configured to receive a test command to generate a differential signal. And transmitting the differential signal by the first transmission pin of the group; the testing device comprises a set of second transmission pin (Txp, Txn) and a set of second receiving pin (Rxp, Rxn) differential signal lines, wherein the group The second transmission pin is electrically connected to the first receiving pin, the second receiving pin is electrically connected to the first transmitting pin, and the testing device is configured to receive a test command to generate a differential signal, and the second transmission is performed by the group The pin transmits a differential signal; transmits a test command to the device under test and the test device, and after the device to be tested and the test device transmit the differential signal, reads the received signals of the first receiving pin and the second receiving pin, when the differential signal When it is the same as the received signal, it is determined that the differential signal line is normal, and when the differential signal is different from the received signal, it is determined that the differential signal line is abnormal.

In addition, the present invention discloses a differential signal testing method, and an application thereof. In an environment having a device under test and a test device, the steps include: electrically connecting the differential signal line of the device to be tested to the differential signal line of the test device, wherein the differential signal line of the device under test includes a set of first transmissions Pins (Tx_p, Tx_n) and a set of first receive pins (Rx_p, Rx_n), the differential signal line of the test device includes a set of second transfer pins (Txp, Txn) and a set of second receive pins (Rxp) And Rxn); transmitting the test command to the device under test and the test device, so that the device under test and the test device receive the test command to generate a differential signal, and transmit the differential signal to each other by the first transfer pin and the second transfer pin; After transmitting the differential signal, the measuring device and the testing device read the receiving signals of the first receiving pin and the second receiving pin. When the differential signal is the same as the received signal, it is determined that the differential signal line is normal, and when the differential signal and the received signal are not When they are the same, it is judged that the differential signal line is abnormal.

The system and method disclosed by the present invention are as above, and prior art The difference lies in that the invention electrically connects the test device and the device to be tested with the differential signal line through the edge scanning method, and transmits the test command to cause the test device and the device under test to generate a differential signal, so as to effectively judge the differential signal according to the difference before and after the differential signal transmission. The line is in a normal, open, and shorted state.

Through the above technical means, the present invention can achieve the technical effect of improving the testability of the differential signal line.

110‧‧‧Device under test

111‧‧‧First transmission pin

112‧‧‧First receiving position

120‧‧‧Testing device

121‧‧‧second transmission pin

122‧‧‧second receiving position

130‧‧‧Control Module

300‧‧‧ capacitor

Step 210‧‧‧ electrically connecting the differential signal line of the device under test to the differential signal line of the test device, wherein the differential signal line of the device under test includes a set of first transmission pins (Tx_p, Tx_n) and A set of first receiving pins (Rx_p, Rx_n), the differential signal line of the testing device includes a set of second transmitting pins (Txp, Txn) and a set of second receiving pins (Rxp, Rxn)

Step 220 ‧ ‧ transmits a test command to the device under test and the test device, so that the device under test and the test device receive the test command to generate a differential signal, and the set of first transmission pins and the group The second transmission pin transmits the differential signal to each other

After the differential signal is transmitted by the device under test and the test device, reading a received signal of the first receiving pin and the second receiving pin of the group, when the differential signal and the receiving signal are When the same, it is determined that the differential signal line is normal, and when the differential signal is different from the received signal, it is determined that the differential signal line is abnormal.

Figure 1 is a block diagram of a system of a differential signal test system of the present invention.

2 is a flow chart of a method for testing a differential signal according to the present invention.

Figure 3 is a schematic diagram of a first embodiment of differential signal testing using the present invention.

Figure 4 is a schematic diagram of a second embodiment of differential signal testing using the present invention.

The embodiments of the present invention will be described in detail below with reference to the drawings and embodiments, so that the application of the technical means to solve the technical problems and achieve the technical effects can be fully understood and implemented.

Before describing the differential signal testing system and method thereof disclosed in the present invention, the application environment of the present invention is described. The present invention uses a Boundary Scan technology to implement differential signal testing. In practical implementation, the device under test And the test devices all have boundary scan elements conforming to the "IEEE 1149.1" and "IEEE 1149.6" standards for boundary scan, and the boundary scan elements of the two are electrically connected to each other by differential signal lines. In addition, the set of first transmission pins of the present invention may include a pin labeled "Tx_p" and a pin labeled "Tx_n"; a set of first receiving pins may include a flag. The pin of "Rx_p" and a foot labeled "Rx_n" A set of second transfer pins may include a pin labeled "Txp" and a pin labeled "Txn"; a set of second receive pins may contain a flag labeled "Rxp". The foot and a foot marked "Rxn". The electrical connection of the device under test and the test device will be described in detail later with reference to the drawings.

The differential signal testing system of the present invention and the following For further explanation, please refer to "FIG. 1", which is a system block diagram of a differential signal test system of the present invention. The system includes: a device under test 110, a test device 120, and a control module 130. The device under test 110 includes a set of first transmission pin bits (Tx_p, Tx_n) and a set of first receiving pin bits (Rx_p, Rx_n) differential signal lines, and the device under test 110 is configured to receive test commands to generate a difference. The signal is transmitted with the first transmission pin. Since the manner of generating the differential signal is a conventional technique, no further details are provided herein. In particular, when the first transmission pin includes a set of capacitors, the control module 130 transmits a "1149.6 AC command" as a test command to determine whether the capacitor is in an open state or whether the differential signal line is shorted. For example, when the capacitor is in an open state, the receiving signal of the second receiving pin of the testing device 120 is fixed, and when the capacitor is in the non-open state, the receiving signal of the second receiving pin is to be tested. The differential signal transmitted by the first transmission pin of device 110 is the same. In practical implementation, the control module 130 transmits the test command to make the differential signal transmitted by the first transmission pin of the device under test 110 after the capacitor passes through the capacitor, and the edge transition time can generally reach “4 ns to 12 ns” (the voltage variation is 300 mV). The time is 4ns~12ns). Therefore, the boundary scan component of the test device 120 detects the edge transition time to cover "4 ns to 12 ns" (can detect a transition edge with a voltage variation of 300 mV and a time consumption of 4 ns to 12 ns), for example, a wafer. The model "EP4CGX15BF14" ensures that the signal of the first transmission pin can be detected normally. As for judging whether the differential signal line is open or short, it can be achieved by using the "1149.1 command".

The test device 120 includes a set of second transmission pin bits (Txp, Txn) and a set of second receiving pin bits (Rxp, Rxn) differential signal lines, wherein The second transmission pin is electrically connected to the first receiving pin, the second receiving pin is electrically connected to the first transmitting pin, and the testing device 120 is configured to receive a test command to generate a differential signal, and The transfer pin transmits a differential signal. In particular, when the first receiving pin of the device under test 110 includes a set of capacitors, the control module 130 also transmits a "1149.6 AC command" as a test command to determine whether the capacitor is in an open state or a differential signal line. Whether it is open or shorted. Assuming that the capacitor is in an open state, the received signal of the first receiving pin will remain unchanged, whereas when the capacitor is in the non-open state, the received signal of the first receiving pin is the same as the differential signal transmitted by the second transmitting pin. In addition, assuming that the device under test 110 is a slot (PCI-E), the test device 120 may be a test circuit board mounted on the slot, and the difference from the conventional place is that the test circuit board does not only have a loop. Moreover, the boundary scan component with fast edge speed and short transition time is included, so that the device under test 110 stably detects the signal (since the test device 120 sends the differential signal, the edge of the differential signal is faster, Therefore, the device under test 110 needs to select a boundary scan component with a relatively fast edge speed, so that the device under test 110 can stably detect the signal). The electrical connection mode of the device under test 110 and the test device 120 and the electrical signals of the differential signal and the received signal in various different situations will be described later in conjunction with the drawings.

The control module 130 is configured to transmit a test command to the device under test 110 And the testing device 120, and after the differential signal is transmitted by the device under test 110 and the testing device 120, the receiving signals of the first receiving pin and the second receiving pin are read, and when the differential signal is the same as the received signal, the differential signal is determined. The line is normal. When the differential signal is different from the received signal, it is determined that the differential signal line is abnormal. For example, suppose the differential signal of the first transmission pin (Tx_p, Tx_n) is “0, 1”, and the received signal of the second receiving pin (Rxp, Rxn) is also “0, 1”, when the differential signal changes. When it is "1,0", the received signal also becomes "1,0", which means that the differential signal line is normal; otherwise, it means the differential signal line is abnormal.

Next, please refer to "Figure 2", "Figure 2" is the difference of the present invention. The sub-signal test method is applied to the device under test 110 and the test device 120 The step of the method includes: electrically connecting the differential signal line of the device under test 110 to the differential signal line of the testing device 120, wherein the differential signal line of the device under test 110 includes a set of first transmission pins (Tx_p, Tx_n) and a set of first receiving pins (Rx_p, Rx_n), the differential signal line of the test device 120 includes a set of second transfer pins (Txp, Txn) and a set of second receive pins (Rxp, Rxn) ( Step 210): transmitting a test command to the device under test 110 and the testing device 120, so that the device under test 110 and the testing device 120 receive the test command to generate a differential signal, and transmit the difference between the first transmission pin and the second transmission pin. a signal (step 220); after the differential signal is transmitted by the device under test 110 and the testing device 120, the receiving signals of the first receiving pin and the second receiving pin are read, and when the differential signal is the same as the received signal, the differential signal is determined. The line is normal, and when the differential signal is different from the received signal, it is determined that the differential signal line is abnormal (step 230). Through the above steps, the test device and the device under test can be electrically connected to the differential signal line through the edge scanning method, and the test command is transmitted to generate a differential signal between the test device and the device under test, so as to effectively judge the difference according to the difference before and after the differential signal transmission. The signal line is in a normal, open, and shorted state.

The following is the case for the "Example 3" and "Figure 4". The following description is made. Please refer to "3rd figure" first, and "3rd figure" is a schematic diagram of the first embodiment of the differential signal test using the present invention. In actual implementation, the electrical connection manner of the device under test 110 and the test device 120 can be as shown in FIG. 3, and the first transmission pin 111 is electrically connected to the second receiving pin 121 through the capacitor 300; The receiving pin 112 is directly electrically connected to the second transmitting pin 122. In this case, since the capacitor 300 is present on the line of the first transmission pin 111, the control module 130 tests the first transmission pin 111 (Tx_p, Tx_n) using the "1149.6 AC command" as a test command, and compares the differential signal. And receiving a signal to determine whether the differential signal line is normal. Assuming that the line is normal, the differential signal transmitted by the first transmission pin 111 will be the same as the received signal received by the second receiving pin 121, and the received signal will have the same change with the differential signal; "Tx_p in a transmission pin 111" "The capacitor connected to the pin is open, then the corresponding "Rxp" pin in the second receive pin 121 will be fixed at high potential (indicated by "0") or low (in "1"), not It will change with the change of the "Tx_p" pin; in addition, when the "Tx_p" pin and the "Tx_n" pin in the first transfer pin 111 are short-circuited, the "Rxp" pin in the second receive pin 121 The bit and the "Rxn" pin will also be either high or low (depending on the potential at that time). In particular, since the first transfer pin 111 carries a differential signal, the "Tx_p" pin is " The potential of the Tx_n" pin is reversed, that is, when the "Tx_p" pin is high, the "Tx_n" pin is low. Because of the capacitor coupling in the line, the edge will be transferred to the second through the capacitor. The pin 121 is received to detect the edge of the second receiving pin 121 to know the state of the first transmitting pin 111.

As for the part of the first receiving pin 112, since there is no line There is a capacitor, so the control module 130 uses the "1149.1 command" as the test command to control the second transfer pin 122 to transmit the differential signal, and detects the received signal of the first receive pin 112 to determine whether the differential signal circuit is normal. At this point, the first receive pin 112 will operate in a voltage sensitive mode. Assume that the "Txp" pin in the second transfer pin 122 is high and the "Txn" pin is low. When the differential signal line is normal, the "Rx_p" pin in the first receive pin 112 is High potential, "Rx_n" pin is low; conversely, when the "Txp" pin is low and the "Txn" pin is high, the "Rx_p" pin will be low and the "Rx_n" pin will be high. Potential. If the differential signal circuit is open, the first receiving pin 112 will not receive the differential signal of the "Txp" pin or the "Txn" pin, so the pin receiving the signal in the first receiving pin 112 will be maintained. Constant potential. In addition, assuming that the differential signal circuit is short-circuited, the "Rx_p" pin and the "Rx_n" pin in the first receive pin 112 will receive the same potential, and the generated differential signal cannot be correctly obtained.

As shown in Figure 4, "Figure 4" is the application of the present invention. A schematic diagram of a second embodiment of differential signal testing. This second embodiment is The first embodiment is similar, except that the capacitor 300 is located at the first receiving pin 112. However, since the capacitor 300 is located at the first receiving pin 112, the control module 130 controls the second transfer pin 122 to transmit the differential signal using the "1149.6 AC command". As for the line of the first transfer pin 111, the capacitor 300 is not present. Therefore, the "114x instruction" is used to control the "Tx_p" pin and the "Tx_n" pin of the device under test 110 to directly transmit the differential signal. As for the method of determining whether the capacitor is open or the differential signal line is normal or open or short, as shown in the first embodiment, no further details are provided herein.

In summary, it can be seen that the difference between the present invention and the prior art is The test device and the device to be tested are electrically connected to the differential signal line through the edge scan mode, and the test command is transmitted to generate a differential signal between the test device and the device under test, so as to effectively judge the differential signal line as normal according to the difference before and after the differential signal transmission. The state of the open circuit and the short circuit can solve the problems of the prior art by using a technical means, thereby achieving the technical effect of improving the test reliability of the differential signal line.

While the present invention has been described above in the foregoing embodiments, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of patent protection shall be subject to the definition of the scope of the patent application attached to this specification.

110‧‧‧Device under test

120‧‧‧Testing device

130‧‧‧Control Module

Claims (6)

A differential signal testing system, comprising: a device to be tested, the device to be tested comprising a set of first transmission pin bits (Tx_p, Tx_n) and a set of first receiving pin bits (Rx_p, Rx_n) differential signal lines, The device under test is configured to receive a test command to generate a differential signal, and transmit the differential signal with the set of first transmission pin bits, wherein the set of first transmission pin bits or the group of first receiving pin bits comprises a group Capacitor, and the test command is "1149.6 AC command"; a test device comprising a set of second transfer pin bits (Txp, Txn) and a set of second receive pin (Rxp, Rxn) differential signal lines The second transmission pin of the group is electrically connected to the first receiving pin of the group, the second receiving pin is electrically connected to the first transmitting pin of the group, and the testing device is configured to receive the test command. Generating the differential signal and transmitting the differential signal with the set of second transmission pins; and a control module for transmitting the test command to the device under test and the testing device, and at the device to be tested and the test The device transmits the differential signal After reading a received signal of the first receiving pin of the group and the second receiving pin of the group, when the differential signal is the same as the receiving signal, determining that the differential signal line is normal, when the differential signal and the receiving signal When they are different, it is determined that the differential signal line is abnormal, and it is determined whether the group of capacitors is in an open state or whether the differential signal line is short-circuited. According to the differential signal test system of claim 1, wherein the group of capacitors is in an open state, the received signals of the second receiving pin of the group are maintained. Unchanged, when the group of capacitors is in an open state, the received signal of the second receiving pin of the group is the same as the differential signal transmitted by the first transmitting pin of the group. According to the differential signal test system of claim 1, wherein the set of capacitors is in an open state, the received signal of the first receiving pin of the group remains unchanged, and when the set of capacitors is in an open state, the first receiving leg of the group The received signal of the bit is the same as the differential signal transmitted by the second set of transfer pins. A differential signal test method is applied in an environment having a device to be tested and a test device, the method comprising: electrically connecting the differential signal line of the device to be tested to a differential signal line of the test device, wherein the The differential signal line of the measuring device comprises a set of first transmission pins (Tx_p, Tx_n) and a set of first receiving pins (Rx_p, Rx_n), and the differential signal line of the testing device comprises a set of second transmission pins (Txp) And Txn) and a set of second receiving pins (Rxp, Rxn), and the set of first transmitting pins or the set of first receiving pins comprises a set of capacitors; transmitting a test command to the device under test and the test The device, the test device and the test device receive the test command to generate a differential signal, and transmit the differential signal to each other by the set of the first transfer pin and the set of the second transfer pin, wherein the test command is "1149.6 AC command; and after the device under test and the test device transmit the differential signal, reading a received signal of the first receiving pin of the group and the second receiving pin of the group, when the differential signal and the receiving letter The same, it is determined that the differential signal line is normal, when the differential signal and the received signal is not the same, the difference signal is determined The line is abnormal, and it is judged whether the group of capacitors is in an open state or whether the differential signal line is short-circuited. According to the differential signal test method of claim 4, wherein when the capacitor is in an open state, the received signal of the second receiving pin of the group remains unchanged, and when the capacitor is in an open state, the second receiving leg of the group The received signal of the bit is the same as the differential signal transmitted by the first transmission pin of the group. According to the differential signal test method of claim 4, wherein when the group of capacitors is in an open state, the received signal of the first receiving pin of the group remains unchanged, and when the group of capacitors is in an open state, the first receiving leg of the group The received signal of the bit is the same as the differential signal transmitted by the second set of transfer pins.