TWI495022B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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TWI495022B
TWI495022B TW097131453A TW97131453A TWI495022B TW I495022 B TWI495022 B TW I495022B TW 097131453 A TW097131453 A TW 097131453A TW 97131453 A TW97131453 A TW 97131453A TW I495022 B TWI495022 B TW I495022B
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wiring
resin
semiconductor substrate
electrode
width
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TW200929404A (en
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Yuzo Neishi
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Seiko Epson Corp
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Description

半導體裝置及其製造方法
本發明係關於半導體裝置及其製造方法。
在專利文獻1中,揭示由電極墊之表面至樹脂突起之表面形成布線而構成突起電極之技術。由於樹脂突起具有透濕性,故在其上有布線之耐遷移較差之問題。
[專利文獻1]日本特開2005-353983號公報
本發明之目的係謀求在樹脂突起上彼此相鄰之布線之絕緣性。
(1)本發明之半導體裝置係包含:半導體基板,其係形成有積體電路;複數電極,其係形成於前述半導體基板,電性連接於前述積體電路;鈍化膜,其係包含使前述複數電極之各至少一部分露出之開口而形成於前述半導體基板上;樹脂突起,其係配置於前述鈍化膜上;及複數布線,其係由前述複數電極上延伸至前述樹脂突起上,在前述樹脂突起上,相互隔著間隔被配置;前述複數布線係分別以位於前述樹脂突起之最上端上之部分之寬度細於由任一前述電極至前述最上端之前面之部分之方式形成。依據本發明,在樹脂突起之最上端,布線之寬度變細,故可增大彼此相鄰之布線之間隔,可謀求彼此相鄰之布線之絕緣性。
(2)在本半導體裝置中,前述複數布線也可分別以寬度隨著由位於前述樹脂突起之下端部上之部分向位於前述最上端上之部分徐徐變細之方式形成。
(3)在本半導體裝置中,前述複數布線也可分別包含寬度與位於前述最上端上之部分之前述寬度相同,且由前述樹脂突起之最上端向與前述電極相反方向延伸之部分。
(4)本發明之半導體裝置係包含:半導體基板,其係形成有積體電路;第1電極,其係設於前述半導體基板上,電性連接於前述積體電路;第2電極,其係設於前述半導體基板上,電性連接於前述積體電路;絕緣膜,其係設於前述半導體基板上,且包含位於前述第1電極上之第1開口、與位於前述第2電極上之第2開口;樹脂突起,其係設於前述絕緣膜上;第1布線,其係連接於前述第1電極,且前述第1布線之第1部分設於前述樹脂突起之最上端上;第2布線,其係連接於前述第2電極,且前述第2布線之第1部分設於前述樹脂突起之最上端上,並與前述第1布線相互隔著間隔而設置;前述第1布線之前述第1部分之寬度係細於前述第1布線之前述第1電極與前述第1布線之前述第1部分之間之任一部分之寬度;前述第2布線之前述第1部分之寬度係細於前述第2布線之前述第2電極與前述第2布線之前述第1部分之間之任一部分之寬度。依據本發明,在樹脂突起之最上端,第1布線及第2布線之寬度變細,故可增大第1布線及第2布線之間之間隔,可謀求第1布線及第2布線之間之絕緣性。
(5)本發明之半導體裝置之製造方法係包含:下述步驟:準備半導體基板之步驟,前述半導體基板係形成有積體電路者,並形成有電性連接於前述積體電路之複數電極,且形成有包含使前述複數電極之各至少一部分露出之開口之鈍化膜;在前述鈍化膜上形成樹脂突起之步驟;藉由電漿,使前述樹脂突起之表面粗糙化之步驟;在前述樹脂突起之經粗糙化之前述表面形成導電膜之步驟;及以在前述導電膜上設有由前述複數電極至前述樹脂突起上之均一寬度之複數遮罩之狀態,濕式蝕刻前述導電膜而形成複數布線之步驟;且在使前述樹脂突起之前述表面粗糙化之步驟中,使前述樹脂突起之上端最大粗糙化。依據本發明,可藉由側蝕刻,在樹脂突起之上端使布線之寬度變細。藉此,在樹脂突起之最上端,可增大彼此相鄰之布線之間隔,可謀求彼此相鄰之布線之絕緣性。
(6)在本半導體裝置之製造方法中,使前述樹脂突起之前述表面粗糙化之步驟也可由前述半導體基板之形成有前述鈍化膜之面之上方向前述半導體基板,將前述電漿一面挪移一面施行。
[發明之效果]
圖1係表示本發明之實施型態之半導體裝置之平面圖。圖2係圖1所示之半導體裝置之II-II線剖面圖,圖3係圖1所示之半導體裝置之III-III線剖面圖。
半導體裝置具有半導體基板10。半導體基板10係在其為半導體晶片時,具有矩形之面,其為半導體晶圓時,作為半導體晶片之各區域為矩形之面。在半導體基板10(1個半導體晶片或作為半導體晶片之各區域)形成有積體電路12(電晶體等)。在半導體基板10,以電性連接於積體電路12之方式形成有電極14。電極14係排列成1行或複數行(平行之複數行)。電極14係沿著半導體基板10之矩形之面之邊(平行地)排列。電極14係經由內部布線(未圖示)電性連接於積體電路12。
在半導體基板10,以露出電極14之至少一部分之方式形成作為保護膜之鈍化膜16。鈍化膜16例如也可僅由SiO2 及SiN等無機材料形成。又,鈍化膜16係以絕緣材料構成之絕緣膜形成。鈍化膜16係形成於積體電路12之上方。
在半導體基板10(鈍化膜16),設有樹脂突起18。在圖1中,表示沿著半導體基板10之矩形之面之邊(平行地)延伸之樹脂突起18,複數之樹脂突起18排列成平行。作為樹脂突起18之材料,例如也可使用聚醯亞胺樹脂、矽改性聚醯亞胺樹脂、環氧樹脂、矽改性環氧樹脂、苯并環丁烯(BCB;benzocyclobutene)、聚苯并噁唑(PBO;polybenzoxazole)、丙烯酸樹脂、矽樹脂、酚醛樹脂等之樹脂。
樹脂突起18呈長條形狀。樹脂突起18之表面(朝向與半導體基板10相反側之面)形成凸曲面。詳言之,樹脂突起18之表面係以樹脂突起18之長側軸或與此平行之直線作為旋轉軸,使平行地位於長側軸之周圍之直線旋轉所畫出之旋轉面。樹脂突起18之表面形成在平行於中心軸之平面切斷圓柱所得之形狀之曲面(圓柱之旋轉面之一部分)之形狀。樹脂突起18係以上部比下部(換言之,上部比接近於半導體基板之部分)寬之方式,形成末端擴大之形狀。
在半導體基板10形成複數布線20。複數布線20係隔著彼此相鄰之間隔形成於樹脂突起18之表面上。複數布線20係以與樹脂突起18之長側軸交差之方式延伸。布線20係由電極14上通過鈍化膜16而到達樹脂突起18上。布線20與電極14既可直接接觸,也可在兩者間介設導電膜(未圖示)。布線20係以超越樹脂突起18之與電極14相反側之端部而到達鈍化膜16上之方式形成。換言之,布線20係具有位於鈍化膜16上之第1部分及第2部分,且以使樹脂突起18位於第1部分與第2部分之間之方式形成。
布線20係以位於樹脂突起18之最上端21之部分之寬度細於由任一電極14至最上端21之前面之部分之方式形成。布線係在樹脂突起18之表面上,以寬度隨著由位於樹脂突起18之下端部19向最上端21徐徐變細之方式形成。依據本實施型態,在樹脂突起18之最上端21,布線20之寬度最細,故可增大彼此相鄰之布線20之間隔,提高彼此相鄰之布線20之絕緣性。尤其,如後所述,在一面向布線基板30施加推壓力,一面安裝半導體裝置之際,位於最上端21上之布線20之部分雖會向布線20之部分中最寬方向延伸,但使位於此最上端21上之布線20之部分之寬度細化時,即使在一面施加推壓力,一面將半導體裝置安裝於布線基板30之情形,也可發揮可確保彼此相鄰之布線20之絕緣性之效果。
如圖3所示,樹脂突起18之上面係將彼此相鄰之布線20之間之區域形成比布線20之正下方之區域更接近於半導體基板10。即,樹脂突起18之上面係將不與此等重疊之區域形成低於與布線20重疊之區域。如此,可提高成為布線20之外部端子之部分而容易謀求電性的連接。
在半導體裝置之製造中,為獲得上述之構造,可適用明顯之方法。例如,在樹脂突起18之形成中,藉由旋轉塗佈等在鈍化膜16上形成感光性之樹脂前驅體層,利用遮照將樹脂前驅體層曝光,顯影而圖案化,進一步利用熱使其熔化而藉由表面張力使其成為具有曲率之表面形狀而再硬化。接著,在鈍化膜16、電極14及樹脂突起18上,利用濺鍍法等形成金屬膜,適用利用在樹脂突起18之最上端21中間細化之形狀之遮罩之微影技術將金屬膜圖案化。如此,可形成上述形狀之布線20。或也可適用下列之方法。
圖4(A)~圖4(C)係本發明之實施型態之半導體裝置之製造方法之說明圖。在本實施型態中,在布線20之形成前,利用電漿使樹脂突起18之表面粗糙化(參照圖4(A))。詳言之,係施行灰化。在此步驟中,一面使電漿(例如O2 電漿)向半導體基板10之方向挪移,一面施行灰化,使樹脂突起18之上端17之表面在樹脂突起18之表面中呈現最大粗糙化。尤其,也可一面由半導體基板10之設有樹脂突起18之面(或設有鈍化膜16之面)之上方向半導體基板10之方向使電漿(例如O2 電漿)挪移,一面施行灰化,使樹脂突起18之上端17之表面在樹脂突起18之表面中呈現最大粗糙化。如此,一面由半導體基板10之設有樹脂突起18之面之上方向半導體基板10之方向使電漿挪移,一面施行灰化時,不必施行一面在樹脂突起18之下端部19設置遮罩,一面施行複數次電漿處理等複雜之處理,即可發揮在樹脂突起18之上端17與下端部19設置不同之粗度之效果。又,樹脂突起18之下端部19之表面之粗度既可形成比上端17之表面小,也可形成完全不粗糙之狀態。
而,在樹脂突起18(含粗糙之表面)、鈍化膜16及由鈍化膜16露出之電極14上形成導電膜22,經由自電極14至樹脂突起18上之均一寬度之複數遮罩24,濕式蝕刻導電膜22(參照圖4(B))。由於遮罩24之寬度均一,若導電膜22之底層表面(樹脂突起18之表面)呈現均一之粗糙程度時,布線20會形成具有均一寬度,但在本實施型態中,樹脂突起18之表面之粗糙程度不同。在濕式蝕刻中,在大粗糙之底層表面上,蝕刻液會利用毛細管現象進入,故可大幅進行導電膜22之側蝕刻。利用此現象,在樹脂突起18之最大粗糙上端,可最大幅度地進行側蝕刻而以該部分變細之方式形成布線20(參照圖4(C))。依據本實施型態,可藉由側蝕刻,在樹脂突起18之上端使布線20之寬度變細。藉此,在樹脂突起18之最上端,可增大彼此相鄰之布線20之間隔,可謀求彼此相鄰之布線20之絕緣性。又,作為遮罩24,也可使用光阻,但也可使用異於構成導電膜22之材料構成之導電膜22。例如作為遮罩24,也可使用Au,作為導電膜,也可使用TiW及Ti。
在樹脂突起18形成布線20後,蝕刻樹脂突起18之相鄰之布線20間之部分。藉此,可將蝕刻樹脂突起18之上面形成使相鄰之布線20間之區域比布線20之正下方之區域更接近於半導體基板10。
圖5(A)~圖5(B)係使用本發明之實施型態之半導體裝置之電子元件之製造方法之說明圖。在本實施型態中,經由熱硬化性之接著樹脂前驅體26將上述之半導體裝置配置於具有布線圖案28之布線基板30上。半導體裝置係將樹脂突起18之布線20配置成與布線圖案28對向。布線基板30也可為液晶面板或有機EL(Electrical Luminescence;電致發光)面板之一部分。布線基板30也可使用玻璃、陶瓷或樹脂中之任何材料。也可在接著樹脂前驅體26使用分散導電粒子而形成之各向異性導電材料。而,將推壓力及熱施加至半導體裝置及布線基板30。而,利用熱使接著樹脂前驅體26硬化收縮。一直維持施加推壓力直到接著樹脂前驅體26硬化為止。接著樹脂前驅體26硬化後,解除推壓力。如此,製造電子元件。
圖6(A)~圖6(B)係本發明之實施型態之電子元件之製造方法之說明圖。電子元件具有上述之半導體裝置、與形成布線圖案28之布線基板30。半導體裝置係以使樹脂突起18上之布線20與布線圖案28對向之方式裝載於布線基板30。複數布線20與布線基板30電性連接。
樹脂突起18係以被壓縮於半導體裝置及布線圖案28之對向方向之狀態配置。樹脂突起18之彼此相鄰之布線20間之區域不接觸於布線基板30。在半導體基板10與布線基板30之間,介設有硬化之接著劑32。接著劑32也可使用分散導電粒子而形成之各向異性導電材料。接著劑32硬化收縮。接著劑32內部存在著硬化時之收縮所產生之殘存應力。接著劑32之一部分配置於樹脂突起18上之彼此相鄰之布線20間之部分與布線基板30之間。
圖7係表示本發明之實施型態之半導體裝置之變形例之圖。在此變形例中,異於上述之半導體裝置之點在於布線120係包含寬度與在最上端上之寬度相同,且由樹脂突起18之最上端21向與電極14相反方向延伸之部分。其他之構成符合上述之內容,有關製造方法,也符合上述之內容。
電子元件也可為顯示元件(面板模組)。顯示元件例如也可為液晶面板或EL(Electrical Luminescence;電致發光)顯示元件。圖8中表示構成作為顯示元件之電子元件1000。使用於電子元件1000之半導體裝置1係控制顯示元件之驅動器IC。作為具有電子元件1000之電子機器,在圖9中表示筆記型個人電腦2000,在圖10中表示行動電話3000。
本發明並不限定於上述之實施型態,可施行種種之變形。例如,本發明包含實質上與實施型態所說明之構成同一之構成(例如,功能、方法及結果同一之構成、或目的及結果同一之構成)。又,本發明包含置換非為實施型態所說明之構成之本質的部分之構成。又,本發明包含發揮與實施型態所說明之構成同一作用效果之構成或可達成同一目的之構成。又,本發明包含在實施型態所說明之構成中附加習知技術之構成。
10...半導體基板
12...積體電路
14...電極
16...鈍化膜
18...樹脂突起
20...布線
22...導電膜
24...遮罩
26...接著樹脂前驅體
28...布線圖案
30...布線基板
32...接著劑
120...布線
圖1係表示本發明之實施型態之半導體裝置之平面圖。
圖2係圖1所示之半導體裝置之II-II線剖面圖。
圖3係圖1所示之半導體裝置之III-III線剖面圖。
圖4(A)~圖4(C)係本發明之實施型態之半導體裝置之製造方法之說明圖。
圖5(A)~圖5(B)係使用本發明之實施型態之半導體裝置之電子元件之製造方法之說明圖。
圖6(A)~圖6(B)係本發明之實施型態之電子元件之說明圖。
圖7係表示本發明之實施型態之半導體裝置之變形例之圖。
圖8係使用本發明之實施型態之半導體裝置之電子元件之說明圖。
圖9係具有電子元件之電子機器之說明圖。
圖10係具有電子元件之電子機器之說明圖。
10...半導體基板
12...積體電路
14...電極
16...鈍化膜
18...樹脂突起
20...布線

Claims (6)

  1. 一種半導體裝置,其特徵在於包含:半導體基板,其係形成有積體電路;複數電極,其係形成於前述半導體基板,電性連接於前述積體電路;鈍化膜,其係包含使前述複數電極之各至少一部分露出之開口而形成於前述半導體基板上;樹脂突起,其係配置於前述鈍化膜上;及複數布線,其係由前述複數電極上延伸至前述樹脂突起上,在前述樹脂突起上,相互隔著間隔被配置;前述複數布線係分別以位於前述樹脂突起之最上端上之部分之寬度細於由任一前述電極至前述最上端之前面之部分之方式形成。
  2. 如請求項1之半導體裝置,其中前述複數布線係分別以寬度隨著由位於前述樹脂突起之下端部上之部分向位於前述最上端上之部分徐徐變細之方式形成。
  3. 如請求項1或2之半導體裝置,其中前述複數布線係分別包含寬度與位於前述最上端上之部分之前述寬度相同,且由前述樹脂突起之最上端向與前述電極相反方向延伸之部分。
  4. 一種半導體裝置,其特徵在於包含:半導體基板,其係形成有積體電路;第1電極,其係設於前述半導體基板上,電性連接於前述積體電路;第2電極,其係設於前述半導體基板上,電性連接於前述積體電路;絕緣膜,其係設於前述半導體基板上,且包含位於前述第1電極上之第1開口、與位於前述第2電極上之第2開口;樹脂突起,其係設於前述絕緣膜上;第1布線,其係連接於前述第1電極,且前述第1布線之第1部分設於前述樹脂突起之最上端上;第2布線,其係連接於前述第2電極,且前述第2布線之第1部分設於前述樹脂突起之最上端上,並與前述第1布線相互隔著間隔而設置;前述第1布線之前述第1部分之寬度係細於前述第1布線之前述第1電極與前述第1布線之前述第1部分之間之任一部分之寬度;前述第2布線之前述第1部分之寬度係細於前述第2布線之前述第2電極與前述第2布線之前述第1部分之間之任一部分之寬度。
  5. 一種半導體裝置之製造方法,其特徵在於包含下述步驟:準備半導體基板之步驟,前述半導體基板係形成有積體電路者,並形成有電性連接於前述積體電路之複數電極,且形成有包含使前述複數電極之各至少一部分露出之開口之鈍化膜;在前述鈍化膜上形成樹脂突起之步驟;藉由電漿,使前述樹脂突起之表面粗糙化之步驟;在前述樹脂突起之經粗糙化之前述表面形成導電膜之步驟;及以在前述導電膜上設有由前述複數電極至前述樹脂突起上之均一寬度之複數遮罩之狀態,濕式蝕刻前述導電膜而形成複數布線之步驟;且在使前述樹脂突起之前述表面粗糙化之步驟中,使前述樹脂突起之上端最大粗糙化。
  6. 如請求項5之半導體裝置之製造方法,其中使前述樹脂突起之前述表面粗糙化之步驟係由前述半導體基板之形成有前述鈍化膜之面之上方向前述半導體基板,將前述電漿一面挪移一面施行。
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US7573140B2 (en) 2009-08-11

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