TWI477062B - Power amplifier circuit - Google Patents

Description

Power amplifier circuit

The present invention relates to a power amplifier circuit, and more particularly to a low power consumption power amplifier circuit.

With the rapid development of the wireless communication industry, the demand for wireless communication equipment is growing. The power amplifier circuit is a key component in the RF circuit system of wireless communication equipment, and its role is very important. In fact, the power amplifier circuit's output power gain, noise, linearity and other indicators will directly affect the performance of the transmitter in the entire wireless transmission system.

In the RF circuit system, the power amplifier circuit is located at the last stage of the microwave wireless transmitting end. The basic consideration of the design is output power and efficiency. The output power affects the communication distance of the communication device, and the efficiency determines the wireless communication device. Battery life and call standby time. However, most of the conventional power amplifier circuits have large power consumption. After integration with the system on chip (SOC), there is also a problem of large overall consumption. In use, the power consumption and use of the entire transmitting circuit system are also increased. cost.

In view of this, it is necessary to provide a power amplifier circuit with low power consumption.

A power amplifier circuit for amplifying an RF signal, the power amplifier circuit comprising a first-stage amplifying unit, a signal coupling unit and a second-stage amplifying unit electrically connected in sequence; the first-stage amplifying unit is an AB The power amplifier architecture receives an RF signal and amplifies the RF signal to the signal coupling unit. The signal coupling unit couples the RF signal to the second stage amplifying unit, and the second level signal is amplified. The unit is a class D power amplifier architecture, and the RF signal is outputted as an output stage for secondary amplification.

Compared with the prior art, the first stage amplifying unit of the power amplifier circuit is used as a signal input stage, which adopts an efficient class AB power amplifier circuit structure, and the second stage amplifying unit serves as a signal output stage, which adopts low power. Class D power amplifier architecture consumed. Therefore, the power amplifier circuit as a whole achieves low power consumption and stable output power.

Referring to FIG. 1, a preferred embodiment of the present invention provides a power amplifier circuit 100 that can be used in a communication device such as a mobile phone. The power amplifier circuit 100 includes a signal input terminal 20, a matching circuit 40, a first-stage amplifying unit 50, a signal coupling unit 60, a second-stage amplifying unit 70, and a signal output terminal 80. .

Referring to FIG. 2 together, the signal input terminal 20 can be a conventional connector for inputting an RF signal to the power amplifier circuit 100.

The matching circuit 40 includes two capacitors C1 and C2 and two inductors L1 and L2. The capacitor C1 is connected in parallel with the inductor L1. Both ends are grounded at one end and electrically connected to the signal input terminal 20 and the inductor L2 at the other end. Between one end. The other end of the inductor L2 is electrically connected to one end of the capacitor C2, and the other end of the capacitor C2 is electrically connected to the first-stage amplifying unit 50. The matching circuit 40 allows the power amplifier circuit 100 to have a wide input return loss (Return Loss) so that the RF signal is transmitted to the first stage amplifying unit 50 without being reflected back. It can be understood that the capacitor C1 is connected in parallel with the inductor L1 and the inductor L2 and the capacitor C2 are connected in series to form a filter circuit, and a part of the noise from the signal input terminal 20 can be filtered out.

The first stage amplifying unit 50 serves as an input stage RF signal amplifying circuit, and includes a first voltage source V1, an inductor L3, two resistors R1 and R2, and two transistors M1 and M2. The first voltage source V1 provides a voltage source for the first stage amplification unit 50. One end of the inductor L3 is electrically connected to the first voltage source V1, and the other end thereof is electrically connected to the drain of the transistor M2. One end of the resistor R1 is electrically connected to the first voltage source V1, and the other end thereof is electrically connected to a gate of the transistor M1. The resistor R1 provides a bias voltage for the transistor M1. One end of the resistor R2 is electrically connected to the first voltage source V1, and the other end thereof is electrically connected to the gate of the transistor M2. The resistor R2 and the inductor L3 provide a bias voltage for the transistor M2. The transistors M1 and M2 are P-channel complementary metal oxide transistors (CMOS). The source of the transistor M1 is grounded, and the gate is electrically connected to the capacitor C2 at the same time. The drain is electrically connected to the source of the transistor M2 to form a Class AB Power Amplifier architecture. This avoids crossover distortion, eliminates harmonic distortion, and has a high input. Efficiency and low power consumption.

The signal coupling unit 60 includes a capacitor C3, one end of which is electrically connected between the inductors L3 and M2, and the other end of which is electrically connected to the second stage amplifying unit 70. The first stage amplifying unit 50 and the second stage amplifying unit 70 are directly coupled by the capacitor C3 for blocking the DC signal, so that the RF signal is transmitted from the first stage amplifying unit 50 to the second amplifying unit 70, and The work of the people does not affect each other.

The second stage amplifying unit 70 serves as an output stage RF signal amplifying circuit, and includes a second voltage source V2, a transistor circuit 72, and a filter circuit 74. The second voltage source V2 is used to provide power support for the second stage amplifying unit 70.

The transistor circuit 72 includes a transistor M3, a resistor R3, and an inductor L4. The transistor M3 is a P-channel CMOS, the source of which is grounded, and the gate thereof is electrically connected to one end of the capacitor C3. One end of the resistor R3 is electrically connected to the second voltage source V2, and the other end thereof is electrically connected between the gate of the transistor M3 and the capacitor C3. One end of the inductor L4 is electrically connected to the second voltage source V2, the other end of which is electrically connected to the anode of the transistor M3, and the resistor R3 and the inductor L4 provide a bias voltage for the transistor M3, thereby forming a class D power amplifier architecture. . As such, the transistor circuit 72 has high signal amplification efficiency, low distortion, and low power consumption.

The filter circuit 74 is used for filtering the RF signal, and outputs the filtered RF signal to the signal output terminal 80. The filter circuit 74 includes an inductor L5 and a capacitor C4. The inductor L5 is electrically connected between the transistor M3 and the inductor L4, and the other end of the capacitor is electrically connected to one end of the capacitor C4. The signal output terminal 80 is electrically connected.

The power amplifier circuit 100 of the preferred embodiment of the present invention operates in a frequency band of 6 GHz to 10.6 GHz, making the power amplifier applicable to an Ultra Wide Band system. When the power amplifier circuit 100 is in operation, the RF signal operating in the frequency band enters the power amplifier circuit 100 from the signal input terminal 20, and the RF signal filters the noise in the RF signal through the matching circuit 40, so that the RF signal is completely transmitted to the RF signal. The first stage amplification unit 50 reduces reflection loss. After that, the RF signal enters the first-stage amplifying unit 50 for amplification, and the amplified RF signal is coupled into the second-stage amplifying unit 70 via the capacitor C3, so that the first-stage amplifying unit 50 and the second-stage amplifying unit 70 work with each other. Does not affect, avoiding signal distortion. After the RF signal is amplified by the transistor circuit 72, the second amplified RF signal is filtered by the filter circuit 74 and transmitted to the signal output terminal 80, and output to the next-stage circuit system.

The first stage amplifying unit 50 of the power amplifier circuit 100 of the present invention is amplified as a signal input stage, which adopts an efficient class AB power amplifier circuit architecture, and the second stage amplifying unit 70 is used as a signal output stage to amplify, which adopts low The power consumption class D power amplifier architecture, which constitutes a two-stage serial connection circuit architecture, realizes two-stage amplification of the RF signal. Therefore, the power amplifier circuit 100 as a whole achieves low power consumption, stable output power, and an output power of up to 8 dBm (decibel millwatt), which can effectively expand the application range of the power amplifier circuit 100 in practical applications.

In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and equivalent modifications or variations made by those skilled in the art in light of the spirit of the present invention are It should be covered by the following patent application.

100. . . Power amplifier circuit

20. . . Signal input

40. . . Matching circuit

50. . . First stage amplification unit

60. . . Signal coupling unit

70. . . Second stage amplification unit

72. . . Transistor circuit

74. . . Filter circuit

80. . . Signal output

V1. . . First voltage source

V2. . . Second voltage source

M1, M2, M3. . . Transistor

R1, R2, R3. . . resistance

C1, C2, C3, C4,. . . capacitance

L1, L2, L3, L4, L5. . . inductance

1 is a functional block diagram of a power amplifier circuit in accordance with a preferred embodiment of the present invention.

2 is a circuit diagram of a power amplifier circuit in accordance with a preferred embodiment of the present invention.

100. . . Power amplifier circuit

20. . . Signal input

40. . . Matching circuit

50. . . First stage amplification unit

60. . . Signal coupling unit

72. . . Transistor circuit

74. . . Filter circuit

80. . . Signal output

V1. . . First voltage source

V2. . . Second voltage source

M1, M2, M3. . . Transistor

R1, R2, R3. . . resistance

C1, C2, C3, C4,. . . capacitance

L1, L2, L3, L4, L5. . . inductance

Claims (15)

A power amplifier circuit includes a first stage amplifying unit, a signal coupling unit and a second stage amplifying unit electrically connected in sequence; the first stage amplifying unit is a class AB power amplifier architecture, and receives an RF signal And transmitting the RF signal to the signal coupling unit once, and the signal coupling unit couples the RF signal to the second-stage amplifying unit, and the second-stage signal amplifying unit is a class D power amplifier architecture, The RF signal is output as a secondary amplification of the output stage. The power amplifier circuit of claim 1, wherein the power amplifier circuit further comprises a signal input end for inputting the RF signal to the first stage amplifying unit. The power amplifier circuit of claim 2, wherein the power amplifier circuit further comprises a matching circuit electrically connected to the first stage amplifying unit, wherein the matching circuit is configured to filter the RF signal from the signal input end. Noise to reduce reflection losses. The power amplifier circuit of claim 3, wherein the matching circuit comprises a capacitor C1 and an inductor L1, the capacitor C1 is connected in parallel with the inductor L1, and the two ends are grounded at one end, and the other end is connected to the signal input end. Electrical connection. The power amplifier circuit of claim 4, wherein the matching circuit further comprises a capacitor C2 and an inductor L2. The capacitor C2 is connected in series with the inductor L2. The inductor L2 has a signal input terminal and a capacitor C1 and an inductor. One end of the L1 is electrically connected, and the other end is electrically connected to one end of the capacitor C2, and the other end of the capacitor C2 is electrically connected to the first-stage amplifying unit. The power amplifier circuit of claim 5, wherein the first stage amplifying unit functions as an input stage RF signal amplifying circuit, and includes a first voltage source V1, wherein the first voltage source V1 is the first The level amplification unit provides power support. The power amplifier circuit of claim 6, wherein the first stage amplifying unit further comprises an inductor L3, two resistors R1, R2 and two transistors M1, M2; one end of the inductor L3 and the first voltage source V1 The other end of the resistor R1 is electrically connected to the first voltage source V1, and the other end of the resistor R1 is electrically connected to the gate of the transistor M1. The resistor R2 is electrically connected. One end is electrically connected to the first voltage source V1, and the other end is electrically connected to the gate of the transistor M2. The source of the transistor M1 is grounded, and the gate thereof is electrically connected to the capacitor C2 at the same time, and the drain is The source of the transistor M2 is electrically connected. The power amplifier circuit of claim 7, wherein the resistor R1 provides a bias voltage for the transistor M1, and the resistor R2 and the inductor L3 provide a bias voltage for the transistor M2. The power amplifier circuit of claim 7, wherein the signal coupling unit comprises a capacitor C3, one end of which is electrically connected between the inductor L3 and the M2 drain, and the other end of which is electrically connected to the second stage amplifying unit. For the connection, the first-stage amplification unit and the second-stage amplification unit are directly coupled by the capacitor C3 to reduce signal interference. The power amplifier circuit of claim 9, wherein the second stage amplifying unit is an output stage RF signal amplifying circuit, and includes a second voltage source V2, wherein the second voltage source V2 is used for the first The secondary amplification unit provides electrical energy support. The power amplifier circuit of claim 10, wherein the second stage amplifying unit further comprises a transistor circuit for amplifying the RF signal, the transistor circuit comprising a transistor M3, a resistor R3 and an inductor L4; the source of the transistor M3 is used for grounding, and the gate is electrically connected to the capacitor C3. One end of the resistor R3 is electrically connected to the second voltage source V2, and the other end thereof is electrically connected. Connected to the gate of the transistor M3 and the capacitor C3, the inductor L4 is electrically connected to the second voltage source V2, and the other end is electrically connected to the gate of the transistor M3. The resistor R3 and the inductor L4 are electrically connected. A bias voltage is supplied to the transistor M3. The power amplifier circuit of claim 11, wherein the second stage amplifying unit further comprises a filter circuit for RF signal filtering, the filter circuit comprising an inductor L5 and a capacitor C4, the inductor L5 One end is electrically connected between the drain of the transistor M3 and the inductor L3, and the other end thereof is electrically connected to one end of the capacitor C4. The power amplifier circuit of claim 12, wherein the power amplifier circuit further includes a signal output end, and one end of the capacitor C4 is electrically connected to the signal output end, thereby filtering the filtered RF signal The signal output is output. The power amplifier circuit of claim 11, wherein the transistor M1, the transistor M2, and the transistor M3 are CMOS transistors. The power amplifier circuit of claim 11, wherein the power amplifier circuit is applied to an ultra-wideband system.