TWI476844B - Method for fabricating conductive bump and circuit board structure with the same - Google Patents

Description

Method for manufacturing conductive bump and circuit board structure with conductive bump

The present invention relates to a circuit board structure, and more particularly to a circuit board structure having conductive bumps and a method of fabricating the same.

In recent years, with the rapid development of electronic technology and the advent of high-tech electronics industry, electronic products with more humanization and better functions have been continuously introduced, and they are moving towards a trend of light, thin, short and small. Under this trend, because the circuit board has the advantages of fine wiring, compact assembly, and good performance, the circuit board becomes one of the main media for carrying a plurality of electronic components (for example, a wafer) and electrically connecting the electronic components to each other. .

A flip chip package is one way of wafer and board packaging. The circuit board has a plurality of pads, and the circuit board can be electrically connected to the wafer by solder soldering on the pads. In recent years, due to the increasing number of signals that need to be transmitted between electronic components (such as wafers), the number of pads required for a circuit board is also increasing. However, the space on the circuit board is limited, so the spacing between the pads. Developed towards fine pitch.

1 is a schematic cross-sectional view showing a conventional circuit board structure. Referring to FIG. 1, in the prior art, the circuit board structure 10A includes a circuit board 10, a plurality of pads 14 (only two are schematically shown in FIG. 1), a solder mask layer 16 and a plurality of solder bumps. 18. The circuit board 10 has a surface 12, and these pads 14 is disposed on surface 12 of circuit board 10. The solder mask 16 covers the surface 12 of the circuit board 10 and has a plurality of Solder Mask Defined (SMD) openings 17 (only two are schematically depicted in Figure 1), wherein the openings 17 respectively expose these Pad 14. These solder bumps 18 (only two are schematically shown in FIG. 1) respectively cover the pads 14 and protrude outside the openings 17, respectively.

In the subsequent process, the circuit board structure 10A and the wafer (not shown) are electrically and structurally connected by the solder bumps 18 disposed therebetween. . In addition, the opening 17 of the solder resist layer 16 has a reduced aperture above the micro-pitch pads 14, resulting in an increase in the aspect ratio of the opening 17, which is more detrimental to printing or implanting the large-sized solder bumps 18. Meanwhile, when the large-sized solder bumps 18 are disposed on the pads 14 and are soldered to the wafers, the solder bumps 18 are heated by the reflow soldering, since the pads 14 are The micro-pitch is arranged on the surface of the circuit board 10, so that the solder bumps 18 in the molten state during the reflow process are easily bridged (as shown in FIG. 1) and the short-circuit problem, and the micro-pitch electrical connection cannot be provided. structure.

The invention provides a method for manufacturing a conductive bump, which uses an electroless plating process to form a thick metal layer on a pad to relatively reduce the aspect ratio (opening depth/opening aperture ratio) of the opening of the solder resist layer, thereby avoiding reflow soldering A solder bridging short circuit occurs during soldering, which in turn increases production yield.

The present invention provides a circuit board structure having conductive bumps by The height of the thick metal layer on the pad can relatively reduce the aspect ratio of the opening of the solder resist layer, thereby reducing the amount of solder used.

The invention provides a method of manufacturing a conductive bump. First, a circuit board is provided. The circuit board has a surface with a plurality of spaced-apart pads disposed on the surface. Next, a solder mask is formed on the circuit board. The solder mask covers the surface and has a plurality of openings, wherein the openings expose the pads, respectively. Then, an electroless plating process is performed to form a thick metal layer on the surfaces of the pads, wherein the thickness of the thick metal layer is greater than 4 micrometers or 1/5 of the height of the solder resist layer and less than the height of the solder resist layer, and then formed A protective layer is on the thick metal layer.

In an embodiment of the invention, the manufacturing method further forms a plurality of solder bumps on each of the protective layers by ball or printing, wherein each solder bump covers each thick metal layer and protrudes from each Outside the opening, these solder bumps are reflowed, causing the solder to melt and coalesce.

In an embodiment of the invention, the material of the thick metal layer comprises copper.

In an embodiment of the invention, when the solder bumps are formed by ball bumping or printing, the solder ball bumping and pressing process is further performed to press the solder bumps into a coin shape. And covered on a thick metal layer.

In an embodiment of the invention, the material of the protective layer comprises tin, gold or silver.

In an embodiment of the invention, the openings of the solder resist layer are Solder Mask Defined (SMD) openings, and the openings are These pads exposed by the mouth are solder mask-defined pads.

The invention provides a method of manufacturing a conductive bump. First, a circuit board is provided. The circuit board has a surface with a plurality of spaced-apart pads disposed on the surface. Next, an electroless plating process is performed to form a thick metal layer on the surfaces of the pads, respectively. Forming at least one solder mask on the circuit board. The solder resist layer covers the surface of the circuit board and the thick metal layer protrudes beyond the solder resist layer, wherein the thick metal layer is a columnar bump having a thickness greater than the solder resist layer and less than twice the height of the solder resist layer. Then, a protective layer is formed on the thick metal layer.

In an embodiment of the invention, the material of the thick metal layer comprises copper.

In an embodiment of the invention, the above method of forming a protective layer comprises electroless plating.

In an embodiment of the present invention, the solder resist layer includes a first solder resist layer and a second solder resist layer, and the step of forming a solder resist layer. First, forming a first solder resist layer on the circuit board. The first solder mask covers the surface of the circuit board. Thereafter, a second solder resist layer is formed on the first solder resist layer, wherein the second solder resist layer covers the first solder resist layer.

In an embodiment of the invention, after forming the first solder mask on the circuit board, the method includes performing a planarization process, and irradiating the first solder mask with a laser beam to remove the local and thick metal layers. The first solder mask at the junction.

In an embodiment of the invention, the material of the protective layer comprises tin, gold or silver.

The invention provides a circuit board structure with conductive bumps, which comprises A circuit board, a solder mask, a thick metal layer, and a protective layer. The circuit board has a pad with a surface and a plurality of pitches. These pads are disposed on the surface. The solder resist layer is disposed on the circuit board and covers the surface. The solder mask has a plurality of openings, and the openings expose the pads, respectively. Thick metal layers are respectively disposed on these pads. The thickness of the thick metal layer is greater than 4 microns or 1/5 of the height of the solder mask and less than the height of the solder mask, and the protective layer covers the thick metal layers, respectively.

In one embodiment of the invention, a plurality of solder bumps respectively cover each of the protective layers and protrude beyond each of the openings.

In an embodiment of the invention, the material of the thick metal layer comprises copper.

In an embodiment of the invention, the material of the protective layer comprises tin, gold or silver.

In an embodiment of the invention, the openings of the solder resist layer are solder mask defining openings, and the pads exposed by the openings are solder mask defining pads.

The invention provides a circuit board structure with conductive bumps, which comprises a circuit board, a solder mask, a thick metal layer and a protective layer. The circuit board has a pad with a surface and a plurality of pitches. These pads are disposed on the surface. The solder resist layer is disposed on the circuit board and covers the surface. The solder mask has a plurality of openings, and the openings expose the pads, respectively. Thick metal layers are respectively disposed on these pads. The thick metal layer protrudes beyond the solder resist layer, and the thick metal layer is a columnar bump having a thickness greater than the solder resist layer and less than twice the height of the solder resist layer. The protective layer covers the surface on which the thick metal layer protrudes.

In an embodiment of the invention, the material of the thick metal layer comprises copper.

In an embodiment of the invention, the material of the protective layer comprises tin, gold or silver.

In an embodiment of the invention, the openings of the solder resist layer are non-solder mask defined (NSMD) openings, and the pads exposed by the openings are non-weld mask type Pads.

In summary, since the method for manufacturing the conductive bump of the present invention can adopt an electroless plating process, a vapor deposition method, or a sputtering method to form a thick metal layer on the surface of the pad, the solder resist layer can be relatively reduced. The aspect ratio of the opening (the ratio of the opening depth to the opening aperture) is low in the aspect ratio, so that the amount of solder used can be reduced, thereby avoiding the phenomenon of bridging short-circuiting of the solder during solder reflow, thereby improving the process of the conductive bumps. Yield and reliability of the board structure.

The above and other objects, features, and advantages of the present invention will become more apparent from the understanding of the appended claims.

2 is a schematic diagram of a circuit board structure having conductive bumps according to an embodiment of the present invention. Referring to FIG. 2 , in the embodiment, the circuit board structure 100A having conductive bumps includes a circuit board 100 , a solder resist layer 120A , a thick metal layer 130A , a protective layer 132 , and a plurality of solder bumps 140 . .

In detail, the circuit board 100 has a surface 102 and a plurality of pitch rows The pads 110 of the column (only two are schematically shown in FIG. 2), wherein the pads 110 are disposed on the surface 102 of the circuit board 100, and the spacing between any two adjacent pads 110 is 50 micrometers ( Between μm) and 150 microns (μm). In this embodiment, the material of the pads 110 includes copper, and the circuit board 100 is, for example, a printed circuit board (PCB) or an IC carrier.

The solder resist layer 120A is disposed on the circuit board 100 and covers the surface 102 of the circuit board 100, wherein the solder resist layer 120A has a plurality of openings 122A (only two are schematically shown in FIG. 2), and the openings 122A respectively expose these Pad 110. It should be noted that the size of the pads 110 exposed by the openings 122A of the solder resist layer 120A can be divided into two types: the solder mask defining type opening and the non-welding mask defining type opening. In the present embodiment, the openings 122A of the solder resist layer 120A are solder mask defining openings, and the pads 110 exposed by the openings 122A are respectively solder mask defining pads.

The thick metal layers 130A are respectively disposed on the pads 110, and the thickness of the thick metal layer 130A is greater than 4 micrometers (μm) or 1/5 of the height of the solder resist layer 120A and less than the height of the solder resist layer 120A, wherein the thick metal layer 130A is, for example, copper formed by electroless plating. In the present embodiment, the thickness design of the thick metal layer 130A has a proportional relationship with the height of the solder resist layer 120A. Taking the height of the general solder resist layer 120A (about 5 micrometers to 20 micrometers) as an example, when the height of the solder resist layer 120A is 20 micrometers (μm), the thickness of the thick metal layer 130A is 1 of the height of the solder resist layer 120A. /5 or higher, that is, the thickness of the thick metal layer 130A is, for example, greater than 4 micrometers (μm), And the upper limit of the thickness of the thick metal layer 130A is smaller than the height of the solder resist layer 120A.

The solder bumps 140 (only two are schematically shown in FIG. 2) respectively cover each of the protective layers 132, and the solder bumps 140 respectively protrude outside each of the openings 122A. In this embodiment, the material of the solder bumps 140 includes tin-lead alloy or tin-silver-copper alloy (lead-free alloy). The protective layer 132 covers the top of the thick metal layer 130A, wherein the material of the protective layer 160 includes tin, gold or silver.

Since the solder bumps 140 are respectively located on each of the protective layers 132, and the thickness of each of the thick metal layers 130A can relatively reduce the aspect ratio (the ratio of the opening depth/opening aperture) of each opening 122A of the solder resist layer 120A, That is, the thick metal layer 130A can reduce the depth at which the solder bumps 140 fill the openings 122A. In particular, the high aspect ratio opening 122A does not have a thick metal layer 130A to reduce its aspect ratio. The printing or ball-planting method is sufficiently filled in the bottom corner of the opening, and when the amount of solder filled in the opening is obviously insufficient, it is easy to create a hole at the bottom thereof (the joint of the solder bump 18 and the pad 14) or Defects reduce the reliability of the solder bumps 18.

In short, in the circuit board structure 100A having the conductive bumps of the embodiment, the thickness of the thick metal layer 130A is increased (preferably, the height of the solder resist layer 120A is 1/5 or higher), and the solder resist layer can be relatively lowered. The aspect ratio of these openings 122A of 120A. In addition, when the solder bumps 140 cover each of the protective layers 132, the thickness of the thick metal layer 130A can reduce the depth of the solder bumps 140 filling the openings 122A, facilitating the user to quickly form by printing or ball-planting. Height of solder bumps 140, can form a micro-room Electrical connection structure. Therefore, the present embodiment can improve the reliability of these solder bumps 140.

Only the circuit board structure 100A with conductive bumps of the present invention will be described above, and the method of fabricating the conductive bumps of the present invention is not described. In this regard, the circuit board structure 100A with conductive bumps in FIG. 2 will be exemplified below, and the manufacturing method of the conductive bumps of the present invention will be described in detail with reference to FIGS. 3A to 3E.

3A to 3E are schematic flow charts of a method of manufacturing the conductive bump of FIG. 2. Referring to FIG. 3A first, according to the manufacturing method of the conductive bump of the embodiment, first, a circuit board 100 is provided. The circuit board 100 has a surface 102, and a plurality of spaced-apart pads 110 (only two are schematically shown in FIG. 3A) are disposed on the surface 102 of the circuit board 100, and any two adjacent pads 110 are disposed. The spacing is between 50 micrometers (μm) and 150 micrometers (μm).

Referring to FIG. 3B, a solder resist layer 120A is formed on the circuit board 100. In detail, the solder resist layer 120A covers a surface 102 of the circuit board 100 and a portion of the pads 110, and the solder resist layer 120A has a plurality of openings 122A (only two are schematically shown in FIG. 3B), wherein these The openings 122A expose the pads 110, respectively. According to the opening 122A of the solder resist layer 120A, the area of the pads 110 is exposed, and can be divided into two types: a solder mask defined opening and a non-welded cover defined opening. In the present embodiment, the openings 122A of the solder resist layer 120A are solder mask defining openings, and the pads 110 exposed by the openings 122A are respectively solder mask defining pads.

Referring to FIG. 3C, an electroless plating process is performed to form a thick metal layer 130A on the surface of the pads 110, wherein the thickness of the thick metal layer 130A is about 1/5 or higher of the height of the solder resist layer 120A. . In detail, the electroless plating process performed in this embodiment utilizes the added reducing agent to reduce metal ions to metal and deposit on the surface of the pads 110, thereby forming a so-called thick metal layer 130A, wherein the thick metal The material of layer 130A includes copper. In short, the thick metal layer 130A of the present embodiment is formed on the surface of these pads 110 by chemical deposition.

Referring to FIG. 3D, a protective layer 132 is formed on the thick metal layer 130A, and is externally soldered or printed to form a plurality of solder bumps 140 on each of the protective layers 132, wherein each solder bump is formed. Block 140 covers each of the protective layers 132 and protrudes beyond each opening 122A. Referring to FIG. 3E, when the solder bumps 140 are formed by ball or printing, a solder ball bonding process may be further performed to more closely press the solder bumps 140 onto the protective layer 132. To form a coin solder bump 140, and fill the solder bumps 140 with the openings 122A of the solder resist layer 120A, respectively, as a subsequent circuit board structure 100A and a wafer (not shown). Electrical connection structure.

Since the solder bumps 140 are located on the thick metal layer 130A, and the thickness of the thick metal layer 130A is, for example, greater than 4 μm, which is about 1/5 or higher of the height of the solder resist layer 120A, the solder bumps 140 are lowered to fill these The depth of the opening 122A is convenient for the user to quickly form a solder bump having a predetermined height by printing or ball-planting. Therefore, the embodiment can form an electrical connection structure on the pads 110 arranged on the fine pitch. In this embodiment, these solders The material of the bump 140 includes a tin-lead alloy or a tin-silver-copper alloy. So far, the fabrication of the conductive bumps has been completed on the circuit board structure 100A.

In short, since the manufacturing method of the conductive bumps of the embodiment adopts an electroless plating process, it is not necessary to use a highly polluting and costly electroplating process to form a thick metal layer 130A on the surface of the pad 110, wherein the thick metal layer is formed. Since the thickness of 130A is increased, the aspect ratio (the ratio of the opening depth/opening aperture ratio) of the opening 122A of the solder resist layer 120A can be relatively lowered. In addition, in the case where the wiring board structure 100A is entirely predetermined in height, since the solder bumps 140 are overlaid on the thick metal layer 130A, the amount of the solder bumps 140 can be reduced by increasing the thickness of the thick metal layer 130A. Moreover, it is possible to avoid bridging and short-circuiting of the solder bumps 118 which are in a molten state when the solder reflow soldering 18 is known (refer to FIG. 1), thereby improving the process yield of the conductive bumps and the reliability of the board structure 100A.

4A is a schematic diagram of a circuit board structure having conductive bumps according to another embodiment of the present invention. Referring to FIG. 4A, in the embodiment, the circuit board structure 100B having conductive bumps includes a circuit board 100, a solder resist layer 120B, a thick metal layer 130B, and a protective layer 150.

In detail, the circuit board 100 has a surface 102 and a plurality of spaced-apart pads 110 (only two are schematically shown in FIG. 4), wherein the pads 110 are disposed on the surface 102 of the circuit board 100, and The spacing between the two adjacent pads 110 is between 50 micrometers (μm) and 150 micrometers (μm). In this embodiment, the material of the pads 110 includes copper, and the circuit board 100 is, for example, a printed circuit board or an IC carrier.

The solder resist layer 120B is disposed on the circuit board 100 and covers the circuit board 100 The surface 102, wherein the solder resist layer 120B has a plurality of openings 122B (only two are schematically shown in FIG. 4), and the openings 122B expose the pads 110, respectively. It should be noted that the size of the pads 110 exposed by the openings 122B of the solder resist layer 120B can be divided into two types: the solder mask defining type opening and the non-welding mask defining type opening. In the present embodiment, the openings 122B of the solder resist layer 120B are non-weld cap defining openings, and the pads 110 exposed by the openings 122B are respectively non-weld cap defining pads.

The thick metal layers 130B are respectively disposed on the pads 110, wherein the thick metal layer 130B protrudes beyond the solder resist layer 120B, and the thick metal layer 130B may have a thickness greater than the solder resist layer 120B and less than twice the height of the solder resist layer 120B. Columnar bumps, but not limited to this. In the present embodiment, the design of the thickness of the thick metal layer 130B has a proportional relationship with the height of the solder resist layer 120B, and the height of the solder resist layer 120B (about 5 micrometers to 20 micrometers) is taken as an example, when the solder resist layer When the height of 120B is 10 micrometers (μm), the thickness of the thick metal layer 130B is less than twice the height of the solder resist layer 120B, that is, the thickness of the thick metal layer 130B is 20 μm or less. The thick metal layer 130B is, for example, copper formed by electroless plating.

The protective layer 150 covers the surface on which the thick metal layer 130B protrudes. In the present embodiment, the material of the protective layer 150 is, for example, tin formed by electroless plating. In another embodiment, the protective layer 150 may also be replaced by a protective layer such as nickel gold or an organic solder resist, which also prevents oxidation of the thick metal layer 130B. Since the protective layer 150 is on the surface of the thick metal layer 130B and the thick metal layer 130B protrudes beyond the solder resist layer 120B, the present embodiment There is no problem of the aspect ratio of the opening 122B of the solder and the solder resist layer 120B, that is, in the present embodiment, it is possible to form electricity on the pitch-arranged pads 110 without depositing a large amount of solder on the thick metal layer 130B. Sexual connection structure.

4B is a schematic diagram of a circuit board structure having conductive bumps according to another embodiment of the present invention. Referring to FIG. 4A and FIG. 4B simultaneously, the circuit board structure 100C of FIG. 4B is similar to the circuit board structure 100B of FIG. 4A, but the main difference is that the solder resist layer 120C of the circuit board structure 100C of FIG. 4B includes a first A solder mask layer 124 and a second solder mask layer 126, wherein the first solder resist layer 124 covers the surface 102 of the circuit board 100, and the second solder resist layer 126 covers the first solder resist layer 124. In the embodiment, the materials of the first solder resist layer 124 and the second solder resist layer 126 are substantially the same.

In short, in the circuit board structure 100B, 100C having the conductive bumps of the embodiment, the thick metal layer 130B protrudes beyond the solder resist layers 120B, 120C, and the thick metal layer 130B may have a thickness greater than the solder resist layer 120B, 120C and less than twice the height of the solder resist layers 120B, 120C, wherein the solder resist layer has a thickness of about 5 micrometers to 20 micrometers, and preferably has a columnar bump having a predetermined height by electroless plating. The electrical connection structure can be formed on the pitch-arranged pads 110 without using a highly polluting and costly electroplating process.

Only the circuit board structure 100B with conductive bumps of the present invention will be described above, and the method of fabricating the conductive bumps of the present invention is not described. In this regard, the circuit board structure 100C with conductive bumps in FIG. 4B will be exemplified below, and the fabrication of the conductive bumps of the present invention will be described with reference to FIGS. 5A to 5G. The method is described in detail.

5A to 5G are schematic flow charts of a method of manufacturing the conductive bump of FIG. 4B. Referring first to FIG. 5A, in accordance with the method of fabricating a conductive bump of the present embodiment, first, a circuit board 100 is provided. The circuit board 100 has a surface 102, and a plurality of spaced-apart pads 110 (only two are schematically shown in FIG. 5A) are disposed on the surface 102 of the circuit board 100, and any two adjacent pads 110 are disposed. The spacing is between 50 micrometers (μm) and 150 micrometers (μm).

Next, a photoresist layer 170 is formed on the surface 102 of the circuit board 100. The photoresist layer 170 is higher than the pads 110 and does not cover the pads 110 for the purpose of limiting the subsequent thick metal layer 130B to be formed. form.

Referring to FIG. 5B, an electroless plating process is then performed to form a thick metal layer 130B on the surfaces of the pads 110, respectively. In detail, the electroless plating process performed in this embodiment utilizes the added reducing agent to reduce metal ions to metal and deposit on the surface of the pads 110, thereby forming a so-called thick metal layer 130B, wherein the thick metal The material of layer 130B includes copper. In short, the thick metal layer 130B of the present embodiment is formed on the surface of the pads 110 by chemical deposition.

Referring to FIG. 5C, the photoresist layer 170 is removed and at least one solder resist layer 120C is formed on the circuit board 100. The following is an embodiment for forming the solder resist layer 120C on the circuit board 100, but is not limited thereto. In this embodiment, the solder resist layer 120C includes a first solder resist layer 124 and a second solder resist layer 126, and the step of forming the solder resist layer 120C, firstly, forming the first anti-solder layer The solder layer 124 is on the circuit board 100 with the first solder mask layer 124 covering the surface 102 of the circuit board 100. In the present embodiment, the manner in which the first solder resist layer 124 is formed on the circuit board 100 includes an inkjet method or a screen printing method or a roll to roll.

Referring to FIGS. 5D and 5E simultaneously, a planarization process is performed to irradiate the first solder mask layer 124 with a laser beam L to remove the first solder resist layer 124 where the portion is joined to the thick metal layer 130B. In detail, when the first solder resist layer 124 is formed on the circuit board 100, since the pads 110 are arranged at a pitch and due to the surface tension, the thick metal layer on any two adjacent pads 110 is formed. The junction of 130B with the first solder resist layer 124 is not parallel to the surface 102 of the circuit board 100, thereby illuminating the laser beam L to remove the first solder mask layer 124 where the portion is joined to the thick metal layer 130B, except In addition to flattening the surface of the first solder resist layer 124, it is also possible to increase the bonding area between the protective layer 150 and the thick metal layer 130B in the subsequent process and have a cleaning function to facilitate subsequent processes.

Referring to FIG. 5F , a second solder resist layer 126 is formed on the first solder resist layer 124 , and the second solder resist layer 126 covers the first solder resist layer 124 . In detail, in the embodiment, the first solder resist layer 124 covers the surface 102 of the circuit board 100, and the thick metal layer 130B protrudes beyond the second solder resist layer 126, wherein the thick metal layer 130B is thicker than the solder resist The layer 120C is smaller than the columnar bumps twice the height of the solder resist layer 120C, and the solder resist layer 120C has a thickness of between about 5 micrometers and 20 micrometers. Further, in the present embodiment, the manner in which the second solder resist layer 126 and the first solder resist layer 124 are formed includes an ink jet method or a screen printing method or a roll to roll.

It is worth mentioning that in other embodiments, the solder resist layer 120C may also be only a single layer, that is, the solder resist layer 120C may be like the solder resist layer 120B of FIG. 4A. Therefore, the formation of the solder resist layer 120C on the circuit board 100 in FIGS. 5C to 5F is only an embodiment of the present invention, and is not intended to limit the present invention.

Referring to FIG. 5G, next, finally, a protective layer 150 is formed on the surface of the thick metal layer 130B. In the present embodiment, the method of forming the protective layer 150 includes electroless plating, using the added reducing agent to reduce metal ions to metal, and depositing on the surface of the thick metal layer 130B, and the material of the protective layer 150 includes Tin, silver, gold or tin alloys. In addition, the solder 150 of the embodiment may also be other protective layers, and the material thereof includes nickel gold or an organic soldering flux. So far, the fabrication of the conductive bumps has been completed on the circuit board structure 100C.

In short, since the method for manufacturing the conductive bump of the embodiment is an electroless plating process, a thick metal layer 130B is formed on the surface of the pad 110, and the thick metal layer 130B protrudes beyond the solder resist layer 120C, and is thick. The metal layer 130B is a columnar bump having a thickness larger than the solder resist layer 120C and less than twice the height of the solder resist layer 120C, so that it is possible to form electricity on the pitch-arranged pads 110 without using a highly polluting and costly electroplating process. Sexual connection structure. In addition, when the method of reflowing is used, the bridging phenomenon and the short circuit problem of the solder which is melted by heat can be avoided, thereby improving the process yield of the conductive bump and the reliability of the circuit board structure 100C.

In summary, since the method for manufacturing the conductive bump of the present invention uses an electroless plating process to form a thick metal layer on the surface of the pad, the aspect ratio of the opening of the solder resist layer can be relatively reduced (opening depth/opening) Aperture ratio The value of the solder is used to reduce the amount of solder used, thereby avoiding bridging and short-circuiting of the solder which is heated by the reflow solder, thereby improving the process yield of the conductive bump and the reliability of the board structure. Further, in the case where the wiring board structure 100A is entirely predetermined in height, since the solder bumps or solder are overlaid on the thick metal layer, the amount of solder bumps or solder used can be reduced by the thickness of the thick metal layer.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10A‧‧‧Circuit board structure

10‧‧‧ boards

12‧‧‧ surface

14‧‧‧ pads

16‧‧‧ solder mask

17‧‧‧ openings

18‧‧‧ solder bumps

19‧‧‧Electroplating seed layer

100A, 100B, 100C‧‧‧ circuit board structure

100‧‧‧ boards

102‧‧‧ surface

110‧‧‧ pads

120A, 120B, 120C‧‧‧ solder mask

122A, 122B‧‧‧ openings

124‧‧‧First solder mask

126‧‧‧Second solder mask

130A, 130B‧‧‧ thick metal layer

140‧‧‧ solder bumps

132, 150‧‧ ‧ protective layer

170‧‧‧ photoresist layer

L‧‧‧Laser beam

P‧‧‧Bridge

1 is a schematic cross-sectional view showing a conventional circuit board structure.

2 is a schematic diagram of a circuit board structure having conductive bumps according to an embodiment of the present invention.

3A to 3E are schematic flow charts of a method of manufacturing the conductive bump of FIG. 2.

4A is a schematic diagram of a circuit board structure having conductive bumps according to another embodiment of the present invention.

4B is a schematic diagram of a circuit board structure having conductive bumps according to another embodiment of the present invention.

5A to 5G are schematic flow charts of a method of manufacturing the conductive bump of FIG. 4B.

100A‧‧‧Circuit board structure

100‧‧‧ boards

102‧‧‧ surface

110‧‧‧ pads

120A‧‧‧ solder mask

122A‧‧‧ openings

130A‧‧‧thick metal layer

140‧‧‧ solder bumps

132‧‧‧Protective layer

Claims (9)

A method for manufacturing a conductive bump, comprising: providing a circuit board having a surface, wherein the surface is provided with a plurality of spacers arranged in a pitch, wherein the pads are non-weld mask defining pads; Performing an electroless plating process to form a thick metal layer on the surfaces of the pads; forming at least one solder mask on the circuit board, the solder resist layer covering the surface of the circuit board and the thick metal layer protruding In addition to the solder resist layer, the thick metal layer is a columnar bump having a thickness greater than the solder resist layer and less than twice the height of the solder resist layer; and a protective layer is formed on each of the thick metal layers. The method for manufacturing a conductive bump according to claim 1, wherein the material of the thick metal layer comprises copper. The method of manufacturing a conductive bump according to claim 1, wherein the method of forming the protective layer comprises electroless plating. The method for manufacturing a conductive bump according to claim 1, wherein the solder resist layer comprises a first solder resist layer and a second solder resist layer, and the step of forming the solder resist layer comprises: forming the solder bump a first solder resist layer on the circuit board, wherein the first solder resist layer covers the surface of the circuit board; and the second solder resist layer is formed on the first solder resist layer, wherein the second solder resist layer Covering the first solder mask. The manufacturer of the conductive bumps as described in claim 4 of the patent application scope The method, after forming the first solder resist layer on the circuit board, comprises: performing a planarization process, irradiating a laser beam to the first solder resist layer to remove a portion of the joint with the thick metal layer The first solder mask. The method for manufacturing a conductive bump according to claim 1, wherein the material of the protective layer comprises tin, gold or silver. A circuit board structure having a conductive bump, comprising: a circuit board having a surface and a plurality of spaced-apart pads, wherein the pads are disposed on the surface; a solder resist layer disposed on the circuit board Covering the surface, the solder resist layer has a plurality of openings, and the openings respectively expose the pads, wherein the openings of the solder resist layer are non-weld mask-defined openings, and the openings are exposed The pads are non-welded cap-type pads; a thick metal layer is respectively disposed on the pads, the thick metal layer protrudes beyond the solder resist layer, and the thick metal layer has a thickness greater than the solder resist a layer of pillars having a height less than twice the height of the solder resist layer; and a protective layer covering the thick metal layer, respectively. The circuit board structure with conductive bumps according to claim 7, wherein the material of the thick metal layer comprises copper. The circuit board structure with conductive bumps as described in claim 7 , wherein the material of the protective layer comprises tin, silver, and gold.