TWI461129B - Method of manufacturing a wiring substrate - Google Patents

Description

Wiring substrate manufacturing method

The present invention relates to a method of manufacturing a wiring board in which a dielectric layer and a conductor layer are alternately laminated.

In general, a wiring board on which various components such as electronic components are placed includes a wiring layered portion in which a resin insulating layer and a conductor layer are alternately laminated, and a metal pad formed on a conductor layer on the front surface side thereof, for example, a terminal for connecting components Or mount the solder balls for BGA. In general, in the case of forming a metal pad using Cu, it is desirable to ensure good solder wettability when a solder paste is applied on the surface of a metal pad. In recent years, so-called Pb-free solder has been gradually used, but the Pb-free solder has a disadvantage that the reflow temperature is high and the wettability of the metal pad composed of Cu is poor. Therefore, a wiring board having a structure in which a surface of a metal pad is coated with a Sn plating layer and a solder paste is applied to the surface of the Sn plating layer is proposed (for example, see Patent Document 1). In general, the Sn-plated layer is excellent in wettability with Pb-free solder, so that the terminals of various parts can be surely connected to the metal pad.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2006-173143

In the above-described manufacturing process of the wiring substrate, generally, a plurality of metal pads which have been coated with the Sn-plated layer are subjected to a reflow process after the solder is supplied to the surface of the Sn-plated layer. However, the solder is supplied Since the timing to the metal pad differs depending on the component to be connected, it is assumed that the above-described reflow process is applied to a part of the metal pad, and the other metal pad is in a state in which the Sn-plated layer is peeled off. Therefore, as the manufacturing process progresses, the surface of the stripped Sn layer is contaminated with various impurities. As a result of the analysis by the inventors, as the impurities present on the surface of the Sn-plated Sn-plated layer, it was confirmed that the Sn-containing oxide film, the metal pad of the reflow target, the impurity of the self-flux, and the impurity from the solder resist. , dissolved in the flux cleaning solution, etc. Therefore, in the case of such a metal pad, in the case of connecting, for example, a wafer component in a subsequent process, the solder wettability is deteriorated due to the influence of the impurity in the Sn-plated layer which is present in the stripped state, so that the wafer of the wafer component is warped. Bad problem

The present invention has been made to solve the above problems, and an object of the invention is to provide a method for producing a wiring board which reliably removes impurities of a Sn-plated layer adhering to a surface of a metal pad, thereby improving wettability to solder. It can prevent the occurrence of defects.

In order to solve the problem, the present invention provides a method of manufacturing a wiring board including a wiring layered portion in which a dielectric layer and a conductor layer are alternately laminated, and a plurality of metal pads formed on the surface of the wiring layered portion. a dielectric layer; and a solder resist layer covering a surface of the wiring layer portion and having a plurality of openings for exposing the plurality of metal pads; and the wiring substrate is formed by forming the plurality of openings After the solder resist layer is formed, the Sn plating process is performed by coating a surface of each of the metal pads with a Sn plating layer; the heating process is to heat the metal pad covered by the Sn plating layer; and the alkali cleaning process, The surface of the Sn-plated layer after heating is washed with an alkaline cleaning solution containing an amine.

According to the method of manufacturing a wiring board of the present invention, a plurality of metal pad surfaces formed on the wiring layer portion are coated with a Sn plating layer, and after heating a predetermined metal pad, the surface of the Sn plating layer is washed with an alkaline cleaning liquid. When manufacturing the wiring substrate, during the process from the Sn plating process to the alkali cleaning process, it is possible to form a Sn oxide film on the surface of the Sn-plated layer, or an impurity derived from each process adheres to the surface of the Sn-plated layer. However, the Sn oxide film or various impurities can be removed from the surface of the Sn-plated layer by the action of the alkaline cleaning solution. Thereby, the wettability of the surface of the Sn-plated layer to the solder can be improved in the subsequent process, so that the problem of occurrence of warpage of the wafer on the metal pad can be reliably prevented.

In the alkali washing process described above, various treatment methods can be selected. For example, as the alkaline cleaning solution containing an amine, an alkaline cleaning solution containing ethanolamine can be used. The ethanolamine contained in the alkaline cleaning solution may, for example, be monoethanolamine, diethanolamine or triethanolamine. They may be used alone or in combination of two or more. When the total alkali cleaning solution is 100% by mass, the content of the ethanolamine is preferably at least 1% by mass or more, and may be 100% by mass. The washing time of the alkali washing process is preferably, for example, 3 minutes or longer. However, the washing time can be set within a range in which the sufficient effect of the alkali washing process can be ensured and the efficiency of the manufacturing process is not hindered.

The plurality of metal pads may include a main component connection pad that is connected to a main component such as a semiconductor wafer, and a sub-component connection pad that is connected to a sub-part such as a wafer capacitor. In the case of such a configuration, the solder supply process for supplying the solder to the Sn plating layer of the main component connection pad can be further performed, and after the solder supply process, the reflow process of melting the solder is regarded as the heating. The process is implemented. In this case, in the case of the sub-component connection pad, the solder is not supplied to the surface of the Sn-plated layer at this time, but the solder is supplied when the sub-component is connected, so that the surface of the Sn-plated layer is kept peeled off. Therefore, formation of a Sn oxide film or adhesion of impurities is likely to occur in the surface of the sub-component connection pad, and in order to remove them, it is preferable to wash the surface of the Sn-plated layer of the sub-component connection pad in the alkali cleaning process. net.

Further, as an example of the method of the solder supply process, a solder paste may be applied to the Sn-plated layer of the main component connection pad. Further, as another example of the method of the solder supply process, a solder ball may be placed on the Sn plating layer of the main component connection pad.

Further, the flux supply process for supplying the flux to the surface of the Sn plating layer may be further performed for the main component connection pad. In this case, the solder supply process may be performed by supplying the solder to the Sn-plated layer to which the flux is supplied. Thereby, in the main component connection pad, the impurities of the self-flux adhered to the surface of the Sn-plated layer can be removed by the alkali cleaning process. Further, the supply of the flux may be performed before the solder supply process, and for example, a method of applying a solder paste containing a flux component may be employed. Furthermore, the flux cleaning process for cleaning the flux may be further performed after the reflow process described above. In this case, the alkali cleaning process may be carried out after the flux cleaning process.

The material of the plurality of metal pads is not particularly limited, but for example, in the case where a Pb-free solder is used for a metal pad made of Cu, the effect of applying the present invention is large. That is, when the metal pad is coated with the Sn-plated layer so as to be suitable for the Pb-free solder, the wettability to the Pb-free solder can be sufficiently improved by washing the surface with an alkali cleaning process.

As described above, according to the present invention, in the manufacturing process of the wiring substrate, even after the metal pads are coated with the Sn layer, the metal pads in the state in which the Sn-plated layer is peeled off remain. The alkali cleaning process can still be used to more reliably remove impurities attached to the surface of the Sn-plated layer during the heating process or other processes. Thereby, it is possible to prevent deterioration of solder wettability due to impurities on the surface of the Sn plating layer, and it is possible to improve the reliability of the wiring substrate without causing occurrence of wafer warpage failure or the like when the wafer component is connected to the metal pad.

[Formation for carrying out the invention]

Hereinafter, a preferred embodiment of the present invention will be described with reference to the drawings. However, the embodiment described below is an example of a form in which the technical idea of the present invention is applied, and the present invention is not limited by the contents of the embodiment.

Fig. 1 is a partial cross-sectional structural view of a wiring board 10 to which the present invention is applied. The cross-sectional structural view of Fig. 1 shows a wiring board 10 in a state in which a metal pad is coated with a Sn plating layer as will be described later. The wiring board 10 shown in FIG. 1 is composed of a core substrate 20 and wiring layer portions L1 and L2 which are laminated on the upper surface side and the lower surface side of the core substrate 20, respectively. The core substrate 20 is made of an epoxy resin which is impregnated with, for example, glass fibers, and has a function as a highly rigid support for supporting the wiring laminate portions L1 and L2. Core conductor layers 30 are formed on the surfaces on both sides of the core substrate 20, respectively. Further, in the core substrate 20, a through-hole conductor 21 is formed on the inner wall surface of the through hole penetrating through a predetermined portion in the lamination direction, and the inside of the through-hole conductor 21 is made of, for example, an epoxy resin. The constituent filler 22 is embedded. Then, the core conductor layers 30 on the upper and lower sides of the core substrate 20 are connected to each other through the via hole conductors 21 to be electrically connected.

The wiring layer portions L1 and L2 on both sides of the core substrate 20 each include resin insulating layers 40 and 41 and conductor layers 31 and 32 which are alternately laminated. The core conductor layer 30 and the conductor layer 31 are electrically connected to each other through a via conductor 50 formed at a predetermined position of the resin insulating layer 40. Further, the conductor layers 31 and 32 are electrically connected to each other through the conduction conductor 51 formed at a predetermined position of the resin insulating layer 41. In the example of the first embodiment, the wiring laminated portions L1 and L2 have a two-layer structure (the resin insulating layers 40 and 41 and the conductor layers 31 and 32). However, the present invention is not limited thereto, and the resin insulating layer and the resin insulating layer may be further formed. The conductor laminated layer is formed in a multilayer structure of the wiring layer portions L1 and L2.

A solder resist layer 42 made of, for example, a photosensitive epoxy resin is formed on each surface side of the upper and lower resin insulating layers 41. A plurality of openings for exposing the partial conductor layers 32 are provided in the respective solder resist layers 42, and a plurality of metal pads P1 and P2 are formed at positions where a plurality of openings of the conductor layer 32 are exposed. The upper metal pad P1 includes a metal pad P1a (a main component connection pad) for connecting to a pad of a main component such as a semiconductor wafer, and a metal pad P1b (a sub-part connection pad) for It is connected to an electrode terminal of a sub-part such as a wafer capacitor. Further, in the example of Fig. 1, although one metal pad P1a and one metal pad P1b are shown, a plurality of them are actually arranged. The lower metal pad P2 is, for example, a pad for connecting a solder ball for a BGA of an external substrate, and is formed to have a larger size than the upper metal pad P1.

Fig. 2 is a plan view showing the arrangement of a plurality of metal pads P1 when the entire wiring substrate 10 of Fig. 1 is viewed from above. As shown in FIG. 2, a plurality of metal pads P1a as the main component connection pads are formed in the central region Ra of the wiring board 10. Further, a plurality of metal pads P1b as the sub-component connection pads are formed in the outer peripheral region of the surrounding region Ra. The plurality of metal pads P1a are arranged in a lattice shape in accordance with the arrangement of the pads of the main components such as the semiconductor wafer. Two of the plurality of metal pads P1b are one set, and are arranged regularly in correspondence with the electrode terminals of the sub-components such as the chip capacitor. Further, the example of Fig. 2 shows a circular metal pad P1a and a square metal pad P1b. However, the shape is not limited, and the number and arrangement of the metal pads P1a and P1b are not limited. In the present embodiment, when the wiring board 10 is manufactured, different processing is applied to the two types of metal pads P1a and P1b, and details will be described later.

Next, a method of manufacturing the wiring board 10 of the present embodiment will be described. Fig. 3 is a flow chart showing the flow of the flow of the method of manufacturing the wiring board 10 of the present embodiment. First, as shown in FIG. 3, the wiring board 10 having the cross-sectional structure of Fig. 1 is prepared (step S10). Here, a well-known technique can be applied to each process for achieving the cross-sectional structure of Fig. 1, and the details of each process are omitted. Further, the process flow chart of Fig. 3 mainly focuses on the process associated with the metal pad P1 formed on the upper conductor layer 32, and the other processes are omitted.

Next, with respect to the wiring substrate 10 obtained in the step S10, the exposed surface of the plurality of metal pads P1 is coated with the Sn plating layer 60 (Fig. 4) (step S11: plating Sn process). In other words, since the metal pad P1 is made of, for example, Cu as a main component, in order to improve the wettability with the solder containing Sn as a main component, the surface of the metal pad P1 is coated with the Sn-plated layer 60 having the same composition as the solder. By. In step S11, for example, the Sn plating layer 60 can be formed by applying electroless plating Sn or electrolytic plating Sn on the surface of the metal pad P1. The thickness of the Sn-plated layer 60 is set to be, for example, in the range of 1 to 2 μm.

Next, the solder paste 61 (FIG. 4) is applied to the surface of the Sn-plated layer 60 of the metal pad P1a in the central region Ra (step S12: solder supply process). On the other hand, the solder paste 61 is not applied to the metal pad P1b in the outer peripheral region. As the solder paste 61, as described above, for example, a high-temperature solder containing Sn as a main component can be used. Further, in order to promote the cleaning action of the surface of the Sn plating layer 60 or the wettability of the solder, the solder paste 61 preferably contains a flux component. Alternatively, the application of the solder paste 61 containing no flux component may be performed first, and the flux may be supplied to the surface of the Sn-plated layer 60.

Fig. 4 shows the respective states of the two types of metal pads P1a, P1b at the end of step S12. In the case of the metal pad P1a shown on the right side of Fig. 4, the surface is covered with the Sn-plated layer 60, and the solder paste 61 is applied to the upper half thereof. On the other hand, in the metal pad P1b shown on the left side of FIG. 4, the surface is covered with the Sn layer 60 and peeled off. As a result, the timing of supplying the solder to the metal pad P1a for connecting the main parts and the metal pad P1b for connecting the sub-parts is different.

Next, the solder paste 61 which has been applied to the surface of the Sn-plated layer 60 of the metal pad P1a in step S12 is reflowed by applying heat treatment at a predetermined temperature (step S13: reflow process). As a result, the coating layer of the solder paste 61 is melted together with the Sn-plated layer 60, and the coating spreads on the surface of the metal pad P1a. At this time, in the metal pad P1a, a large part of the flux component contained in the solder paste 61 is removed. On the other hand, the metal pad P1b in the outer peripheral region is kept in a state in which the Sn-plated layer 60 is peeled off as shown in Fig. 4 .

Next, the flux component remaining on the entire wiring substrate 10 is washed and removed using the flux cleaning solution (step S14: flux cleaning process). As the flux cleaning liquid in the step S14, for example, a flux cleaning solution containing a mineral acid such as phosphoric acid or sulfuric acid can be used.

Next, in the wiring substrate 10 in the state of step S14, at least the surface of each metal pad P1b in the outer peripheral region is washed using an alkaline cleaning solution containing an amine (step S15: alkali cleaning process). In step S15, for example, the wiring board 10 may be immersed in an alkaline cleaning liquid containing about 30% by weight of monoethanolamine. The alkali washing time in this case is preferably about 3 minutes or more. By the alkali cleaning process of the step S15, the Sn oxide film 70 on the surface of the Sn-plated layer 60 on the metal pad P1b or the impurities from the respective processes can be removed, and the wettability to the solder can be improved. Further, the effects of the alkali washing process will be described later.

Thereafter, as shown in FIG. 3, a post process of the metal pad P1b in the outer peripheral region is performed (step S16). Although a plurality of processes can be applied in step S16, for example, similarly to the metal pad P1a of the region Ra, solder paste can be applied to the surface of the Sn-plated layer 60 of the metal pad P1b for reflow soldering. A sub-part such as a wafer capacitor is connected. At this time, when the metal pad P1b is reflowed, the solder is spread and spread on the surface of the Sn-plated layer 60 to which the alkali cleaning process has been applied. Therefore, it is possible to prevent wafer warpage defects of wafer components such as a wafer capacitor.

Further, although the description of the lower metal pad P2 is omitted, the solder supply process may be applied to the lower metal pad P2 in the same manner as the metal pad P1 of the region Ra. In this case, after the surface of the metal pad P2 is coated with the Sn plating layer, solder balls are placed on the surface thereof and reflow is applied. Moreover, in the step S12 of FIG. 3, the process of applying the solder paste 61 to the surface of the Sn plating layer 60 to the metal pad P1a has been described, but the process of placing the solder ball on the surface of the Sn plating layer 60 may be applied instead. .

Here, the necessity and effect of the alkali washing process of step S15 will be described using Figs. 5 and 6 . In the fifth and sixth drawings, the state of the metal pad P1b coated with the Sn-plated layer 60 is changed as the process flow of the wiring substrate 10 progresses. First, as shown in Fig. 5(A), the metal pad P1b which is shortly after the Sn plating process (step S11) of Fig. 3 exists in a state in which the surface is peeled off only by the Sn plating layer 60, at which point The surface of the Sn-plated layer 60 has almost no impurities present.

However, as shown in FIG. 5(B), in the metal pad P1b after the process flow progressing, the solder supply process of the third drawing (step S12), and the reflow process (step S13), the plating is performed. A state in which the Sn oxide film 70 is formed on the surface of the Sn layer 60 is obtained. Further, on the surface of the Sn-plated layer 60, the impurities 71 from the solder resist and the impurities 72 from the self-flux adhere to each other. These impurities are due to the return process. The flux gas atmosphere in the soldering furnace and the gas atmosphere of the gas generated from the solder resist layer 42 adhere to the surface of the Sn-plated layer 60.

Thereafter, in the flux cleaning process of FIG. 3 (step S14), for example, as shown in FIG. 5(C), the copper phosphate 81 or copper sulfate 82 which is dissolved in the flux cleaning solution 80 of the container 100 is adsorbed. The metal pad P1b is in a state of being attached to the metal pad P1b by a substitution reaction. These copper phosphate 81 or copper sulfate 82 are produced by dissolving Cu in the cutting dust generated when the wiring substrate 10 (not shown) is cut, into the flux cleaning liquid 80.

As a result, as shown in Fig. 6(A), in the metal pad P1b immediately before the alkali cleaning process (step S15) of Fig. 3, the surface of the Sn plating layer 60 is mainly the following four types. The state in which various impurities (a, b, c, d) are mixed together.

(a) an Sn oxide film 70 formed on the surface of the Sn-plated layer 60

(b) Impurities from solder resists 71

(c) Impurities from self-flux 72

(d) Copper phosphate 81 and copper sulfate 82 dissolved in the flux cleaning solution

Therefore, in the metal pad P1b in the state of FIG. 6(A), the wettability of the solder on the surface of the Sn-plated layer 60 is deteriorated due to the impurities. On the other hand, as shown in FIG. 6(B), in the alkali cleaning process (step S15), the surface of the Sn-plated layer 60 coated with the metal pad P1b is coated with the alkaline cleaning liquid 90 of the container 101. Wash. As a result, as shown in Fig. 6(C), the above various kinds of impurities (a, b, c, and d) can be removed from the surface of the Sn-plated layer 60. That is, the effect of removing the organic impurities is obtained by the action of the amine-based alkaline cleaning solution, and the effect of removing the Sn oxide film is obtained by reduction of the alkali, and further by the error of the amine Cooperate to etch the effect of Cu plating the surface of the Sn layer 60.

Further, with reference to Fig. 7, the effect of improving the solder wettability of the metal pad P1b in the post-process of step S16 of Fig. 3 will be described. Fig. 7 is a micrograph image of a state in which a solder ball is placed on the surface of the Sn plating layer 60 after the flux is applied, and the metal pad P1b is placed in a row. Fig. 7(A) shows an image in which the alkali washing process was not performed for comparison, and Fig. 7(B) shows an image in which the alkali washing process was carried out by setting the washing time to 3 minutes.

In the case of Fig. 7(A), in a row of metal pads P1b, the solder fluidized by reflow is not spread over the entire long side of each metal pad P1b. On the other hand, in the case of Fig. 7(B), in the metal pad P1b disposed in the same manner as in Fig. 7(A), the solder fluidized by the reflow is spread to the entire length of each metal pad P1b. side. In general, the larger the ratio of the coating spread area of the solder to the area of the metal pad P1b, the better the wettability, and it is confirmed that the seventh figure (B) is improved by about 50% than the seventh figure (A). In this manner, by carrying out the alkali cleaning process in the present embodiment, the wettability of the Sn-plated layer 60 in the metal pad P1b to the solder is improved, whereby the occurrence of wafer warpage failure can be suppressed.

The present invention has been described in detail with reference to the embodiments of the present invention. However, the invention is not limited thereto, and various modifications can be made without departing from the spirit and scope of the invention. For example, although the manufacturing flowchart of the third embodiment is shown in the manufacturing method of the present embodiment, for example, even if the solder supply process (step S12) of FIG. 3 or the flux cleaning process (step S14) is not performed, The invention can be applied. Further, although the case where the metal pad P1 has Cu as a main component has been described, the present invention can be applied to the metal pad P1 having a metal material other than Cu as a main component. In the wiring board of the first embodiment, the structure, material, and formation method of the core substrate 20 or the wiring layer portions L1 and L2 are not limited to those disclosed in the embodiment.

10. . . Wiring substrate

20. . . Core substrate

twenty one. . . Through-hole conductor

twenty two. . . Filler

30. . . Core conductor layer

31, 32‧‧‧ conductor layer

40, 41‧‧‧ resin insulation

42‧‧‧ solder resist layer

50, 51‧‧‧ conduction conductor

60‧‧‧Sn coating

61‧‧‧ solder paste

70‧‧‧Sn oxide film

71‧‧‧Impair from solder resist

72‧‧‧Infrared self-flux

80‧‧‧ Flux cleaning solution

81‧‧‧ copper phosphate

82‧‧‧copper sulfate

90‧‧‧Alkaline cleaning solution

L1, L2‧‧‧ wiring layer

P1 (P1a, P1b), P2‧‧‧ metal mat

Fig. 1 is a partial cross-sectional structural view showing a wiring board to which the present invention is applied.

Fig. 2 is a plan view showing the arrangement of a plurality of metal pads P1 when the entire wiring board of Fig. 1 is viewed from above.

Fig. 3 is a flow chart showing the process of the wiring board process of the embodiment.

Fig. 4 is a view showing the respective states of the two types of metal pads P1a and P1b at the time point S12 of Fig. 3.

Fig. 5 (A) to (C) are the first figures for explaining the necessity and effect of the alkali washing process.

Fig. 6 (A) to (C) are the second figures for explaining the necessity and effect of the alkali washing process.

Fig. 7 (A) and Fig. 7(B) are photograph images showing the effect of improving the solder wettability of the metal pad P1b.

Claims (7)

A method of manufacturing a wiring board comprising: a wiring layered portion in which a dielectric layer and a conductor layer are alternately laminated; a plurality of metal pads formed on the surface of the wiring layered portion; and a solder resist The agent layer covers a surface of the wiring layered portion and has a plurality of openings for exposing the plurality of metal pads; and the method of manufacturing the wiring substrate is characterized in that the plurality of openings are formed in the solder resist layer After the implementation: the Sn plating process is performed by coating the surface of each of the metal pads with a Sn plating layer; the heating process is to heat the metal pad coated by the Sn plating layer; and the alkali cleaning process is to use an alkali containing amine The washing liquid is used to wash the surface of the Sn-plated layer after heating. The method for producing a wiring board according to claim 1, wherein the alkaline cleaning solution containing ethanolamine is used in the alkali cleaning process. The method of manufacturing a wiring board according to the first or second aspect of the invention, wherein the plurality of metal pads comprise a main component connection pad and a sub component connection pad, and further supplying solder to the main component connection a solder supply process on the Sn-plated layer of the pad, after the solder supply process, performing a reflow process of melting the solder as the heating process, before the sub-part connection pad is used in the alkali cleaning process The surface of the Sn plating layer is washed. The method of manufacturing a wiring board according to claim 3, wherein a flux supply process for supplying a flux to the surface of the Sn-plated layer of the main component connection pad is further performed, and the solder supply process system is The solder is supplied onto the aforementioned Sn-plated layer to which the flux is supplied. The method for manufacturing a wiring board according to the third aspect of the invention, wherein after the reflowing process, a flux cleaning process for cleaning the flux is further performed, and after the flux cleaning process, the alkali cleaning is performed. Process. The method of manufacturing a wiring board according to the fourth aspect of the invention, wherein after the reflow process, a flux cleaning process for cleaning the flux is further performed, and after the flux cleaning process, the alkali cleaning is performed. Process. The method of manufacturing a wiring board according to claim 1 or 2, wherein the plurality of metal pads are made of Cu.