TWI446846B - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereof Download PDFInfo
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本發明是有關於一種線路板及其製造方法,且特別是有關於一種同時具有導電膠(conductive paste)通孔與金屬通孔的線路板及其製造方法。 The present invention relates to a circuit board and a method of fabricating the same, and more particularly to a circuit board having a conductive paste through hole and a metal through hole and a method of manufacturing the same.
近年來,隨著電子技術的日新月異,高科技電子產業的相繼問世,使得更人性化、功能更佳的電子產品不斷地推陳出新,並朝向輕、薄、短、小的趨勢設計。在這些電子產品內通常會配置用來安裝電子元件於其上的線路板。 In recent years, with the rapid development of electronic technology, the high-tech electronics industry has come out one after another, making more humanized and better-functioning electronic products constantly innovating and designing towards light, thin, short and small trends. In these electronic products, a circuit board on which electronic components are mounted is usually disposed.
一般來說,線路板是由多層線路結構所構成,每一層的線路層會藉由金屬導通孔(via)來彼此電性連接。在以壓合(lamination)方式來形成多層線路結構時,由於受到壓應力的影響,這些金屬導通孔與線路層之間的界面可能會因此而產生缺陷(如破裂、接合不完全)。此外,這些金屬導通孔在高溫製程中也可能會因熱應力的影響而產生變形,因此容易導致這些金屬導通孔之間的線路層產生損壞。 Generally, the circuit board is composed of a multi-layer circuit structure, and the circuit layers of each layer are electrically connected to each other by metal vias. When the multilayer wiring structure is formed by lamination, the interface between the metal via holes and the wiring layer may cause defects (such as cracking and incomplete bonding) due to the influence of compressive stress. In addition, these metal via holes may also be deformed by the influence of thermal stress in a high-temperature process, and thus easily cause damage to the wiring layer between the metal via holes.
中華民國專利申請案第200614898號提出了一種多層印刷配線版的製造方法,其揭露了於絕緣層上形成PET離型層、藉由雷射加工形成介層孔以及利用網版印刷的方式對介層孔填充導電膏。 The method of manufacturing a multilayer printed wiring board is disclosed in the Patent Application No. 200614898 of the Republic of China, which discloses the formation of a PET release layer on an insulating layer, the formation of via holes by laser processing, and the use of screen printing. The layer holes are filled with a conductive paste.
本發明提供一種線路板的製造方法,可製造同時具有導電膠通孔與金屬通孔的線路板。 The invention provides a method for manufacturing a circuit board, which can manufacture a circuit board having a conductive glue through hole and a metal through hole at the same time.
本發明又提供一種線路板,其同時具有導電膠通孔與金屬通孔。 The invention further provides a circuit board having a conductive adhesive through hole and a metal through hole at the same time.
本發明提出一種線路板的製造方法,此方法是先提供線路結構。此線路結構包括第一介電層、第一線路材料層、第二線路材料層以及導電膠導通孔。第一介電層具有第一表面以及與第一表面相對的第二表面。第一線路材料層配置於第一表面上。第二線路材料層配置於第二表面上。導電膠導通孔配置於第一介電層中,且電性連接第一線路材料層與第二線路材料層。然後,將第一線路材料層圖案化,以形成第一線路層。接著,於第一表面上形成第二介電層,且第二介電層覆蓋第一線路層。之後,於第二介電層中形成金屬導通孔,且於第二介電層上形成第三線路材料層,其中金屬導通孔與第一線路層以及第三線路材料層連接,且金屬導通孔與第一線路層以及第三線路材料層電性連接。 The invention provides a method for manufacturing a circuit board, which first provides a line structure. The wiring structure includes a first dielectric layer, a first wiring material layer, a second wiring material layer, and a conductive paste via. The first dielectric layer has a first surface and a second surface opposite the first surface. The first line material layer is disposed on the first surface. The second line material layer is disposed on the second surface. The conductive adhesive via is disposed in the first dielectric layer and electrically connected to the first wiring material layer and the second wiring material layer. The first line of material layer is then patterned to form a first wiring layer. Next, a second dielectric layer is formed on the first surface, and the second dielectric layer covers the first wiring layer. Thereafter, a metal via hole is formed in the second dielectric layer, and a third circuit material layer is formed on the second dielectric layer, wherein the metal via hole is connected to the first circuit layer and the third circuit material layer, and the metal via hole Electrically connected to the first circuit layer and the third circuit material layer.
本發明另提出一種線路板的製造方法,此方法是先提供線路結構。此線路結構包括第一介電層、第一線路材料層、第二線路材料層以及金屬導通孔。第一介電層具有第一表面以及與第一表面相對的第二表面。第一線路材料層配置於第一表面上。第二線路材料層配置於第二表面上。金屬導通孔配置於第一介電層中,且電性連接第一線路材料層與第二線路材料層。然後,將第一線路材料層圖案化, 以形成第一線路層。接著,於第一表面上形成第二介電層,且第二介電層覆蓋第一線路層。而後,於第二介電層中形成第一通孔,且第一通孔暴露出部分第一線路層。繼之,於第一通孔中形成導電膠導通孔。之後,於第二介電層與導電膠導通孔上形成第三線路材料層。 The invention further provides a method of manufacturing a circuit board, which first provides a line structure. The wiring structure includes a first dielectric layer, a first wiring material layer, a second wiring material layer, and a metal via. The first dielectric layer has a first surface and a second surface opposite the first surface. The first line material layer is disposed on the first surface. The second line material layer is disposed on the second surface. The metal via is disposed in the first dielectric layer and electrically connected to the first circuit material layer and the second circuit material layer. Then, patterning the first line material layer, To form a first circuit layer. Next, a second dielectric layer is formed on the first surface, and the second dielectric layer covers the first wiring layer. Then, a first via hole is formed in the second dielectric layer, and the first via hole exposes a portion of the first wiring layer. Then, a conductive rubber via hole is formed in the first via hole. Thereafter, a third line material layer is formed on the second dielectric layer and the conductive paste via.
本發明再提出一種線路板,其包括第一線路結構與第二線路結構。第一線路結構包括第一介電層、第一線路層、第二線路層以及金屬導通孔。第一介電層具有第一表面以及與第一表面相對的第二表面。第一線路層配置於第一表面上。第二線路層配置於第二表面上。金屬導通孔配置於第一介電層中,且電性連接第一線路層與第二線路層,其中金屬導通孔連接第一線路層與第二線路層。第二線路結構配置於第一表面上。第二線路結構包括第三線路層、第二介電層以及導電膠導通孔。第三線路層配置於第一線路層上。第二介電層配置於第一線路層與第三線路層之間。導電膠導通孔配置於第二介電層中,且電性連接第一線路層與第三線路層。 The invention further provides a circuit board comprising a first line structure and a second line structure. The first line structure includes a first dielectric layer, a first circuit layer, a second circuit layer, and a metal via. The first dielectric layer has a first surface and a second surface opposite the first surface. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The metal vias are disposed in the first dielectric layer and electrically connected to the first circuit layer and the second circuit layer, wherein the metal vias connect the first circuit layer and the second circuit layer. The second line structure is disposed on the first surface. The second line structure includes a third circuit layer, a second dielectric layer, and a conductive paste via. The third circuit layer is disposed on the first circuit layer. The second dielectric layer is disposed between the first circuit layer and the third circuit layer. The conductive adhesive via is disposed in the second dielectric layer and electrically connected to the first circuit layer and the third circuit layer.
基於上述,由於本發明的線路板中具有相對配置的導電膠導通孔與金屬導通孔,因此當線路板在進行後續的壓合製程以形成具有更多層線路結構的線路板時,導電膠導通孔可作為緩衝結構,因此可以避免金屬導通孔與線路層之間的界面因壓應力的影響而產生缺陷(如破裂、接合不完全)。 Based on the above, since the circuit board of the present invention has oppositely disposed conductive rubber vias and metal vias, when the circuit board is subjected to a subsequent pressing process to form a circuit board having a more layer wiring structure, the conductive adhesive is turned on. The hole can serve as a buffer structure, so that the interface between the metal via hole and the wiring layer can be prevented from being defective due to the influence of compressive stress (such as cracking and incomplete bonding).
此外,在本發明的線路板中,由於導電膠導通孔可以 作為緩衝結構,因此當金屬導通孔因製程溫度過高而產生變形時,可以有效地避免金屬導通孔擠壓線路層而導致線路層產生損壞。 In addition, in the circuit board of the present invention, the conductive via hole can be As the buffer structure, when the metal via hole is deformed due to the process temperature being too high, the metal via hole can be effectively prevented from being pressed against the circuit layer to cause damage to the circuit layer.
為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the present invention will be more apparent from the following description.
圖1A至圖1E為依照本發明一實施例所繪示的線路板的製造方法之剖面圖。首先,請參照圖1A,提供第一介電層101。第一介電層101具有第一表面101a以及與第一表面101a相對的第二表面101b。然後,於第一表面101a上形成第一線路材料層102。第一線路材料層102例如為銅層。形成第一線路材料層102的步驟例如是進行電鍍製程。之後,於第二表面101b上形成絕緣薄膜103。絕緣薄膜103的材料例如為聚對苯二甲酸乙二酯(polyethylene terephthalate,PET)。形成絕緣薄膜103的步驟例如是進行壓合製程。然而,在另一實施例中,第一線路材料層102與絕緣薄膜103也可以皆利用壓合的方式分別形成於第一表面101a與第二表面101b上。 1A-1E are cross-sectional views showing a method of fabricating a circuit board according to an embodiment of the invention. First, referring to FIG. 1A, a first dielectric layer 101 is provided. The first dielectric layer 101 has a first surface 101a and a second surface 101b opposite the first surface 101a. Then, a first wiring material layer 102 is formed on the first surface 101a. The first line material layer 102 is, for example, a copper layer. The step of forming the first line material layer 102 is, for example, an electroplating process. Thereafter, an insulating film 103 is formed on the second surface 101b. The material of the insulating film 103 is, for example, polyethylene terephthalate (PET). The step of forming the insulating film 103 is, for example, a press-bonding process. However, in another embodiment, the first circuit material layer 102 and the insulating film 103 may also be formed on the first surface 101a and the second surface 101b by press-bonding, respectively.
然後,請參照圖1B,於絕緣薄膜103與第一介電層101中形成通孔104,且通孔104暴露出部分第一線路材料層102。形成通孔104的步驟例如是進行雷射鑽孔製程。接著,於通孔104中形成導電膠導通孔105。形成導電膠導通孔105的步驟例如是進行印刷製程,以將導電膠(如銀 膠、銅膠等)填入通孔104中。 Then, referring to FIG. 1B, a via hole 104 is formed in the insulating film 103 and the first dielectric layer 101, and the via hole 104 exposes a portion of the first circuit material layer 102. The step of forming the via 104 is, for example, a laser drilling process. Next, a conductive paste via 105 is formed in the via 104. The step of forming the conductive paste via 105 is, for example, a printing process to transfer a conductive paste (such as silver) Glue, copper glue, etc.) are filled into the through holes 104.
接著,請參照圖1C,移除絕緣薄膜103。然後,於第二表面101b與導電膠導通孔105上形成第二線路材料層106,以形成線路結構100。第二線路材料層106例如為銅層。形成第二線路材料層106的步驟例如是進行壓合製程。導電膠導通孔105將第一線路材料層102與第二線路材料層106電性連接。特別一提的是,在此壓合製程中,因導電膠尚未硬化,故會同時將通孔104外的導電膠導通孔105壓至通孔104中,經過高溫高壓壓合後,而形成平整的壓合表面。此時,導電膠導通孔105具有頂部105a與底部105b,底部105b鄰近第一表面101a,而頂部105a鄰近第二表面101b,且頂部105a的外徑大於底部105b的外徑。在本實施例中,底部105b與第一表面101a齊平(flush),而頂部105a與第二表面101b齊平。 Next, referring to FIG. 1C, the insulating film 103 is removed. Then, a second circuit material layer 106 is formed on the second surface 101b and the conductive paste via 105 to form the wiring structure 100. The second line material layer 106 is, for example, a copper layer. The step of forming the second line material layer 106 is, for example, a embossing process. The conductive paste vias 105 electrically connect the first line material layer 102 and the second line material layer 106. In particular, in the press-bonding process, since the conductive adhesive has not been hardened, the conductive adhesive via 105 outside the through hole 104 is simultaneously pressed into the through hole 104, and is formed by flattening after high temperature and high pressure. Pressing the surface. At this time, the conductive paste via 105 has a top portion 105a and a bottom portion 105b, the bottom portion 105b is adjacent to the first surface 101a, and the top portion 105a is adjacent to the second surface 101b, and the outer diameter of the top portion 105a is larger than the outer diameter of the bottom portion 105b. In the present embodiment, the bottom portion 105b is flush with the first surface 101a, and the top portion 105a is flush with the second surface 101b.
而後,請參照圖1D,將線路結構100中的第一線路材料層102與第二線路材料層106圖案化,以分別形成第一線路層102a與第二線路層106a。在另一實施例中,也可以是僅將第一線路材料層102圖案化,而視實際需求再於後續其他步驟中將第二線路材料層106圖案化。然後,於第一表面101a上形成第二介電層111,且第二介電層111覆蓋第一線路層102a。接著,於第二介電層111中形成金屬導通孔113,且於第二介電層111上形成第三線路材料層114。金屬導通孔113與第一線路層102a以及第三線路層114連接,且金屬導通孔113與第一線路層102a以及第 三線路層114電性連接。形成金屬導通孔113與第三線路材料層114的步驟例如是先於第二介電層111中形成通孔112。形成通孔112的步驟例如是進行雷射鑽孔。通孔112暴露出部分第一線路層102a。之後,進行電鍍製程,以於通孔112中形成金屬導通孔113,以及於第二介電層111上形成第三線路材料層114。金屬導通孔113具有頂部113a與底部113b,底部113b鄰近第一表面101a而頂部113a遠離第一表面101a,且頂部113a的外徑大於底部113b的外徑。 Then, referring to FIG. 1D, the first circuit material layer 102 and the second wiring material layer 106 in the circuit structure 100 are patterned to form a first wiring layer 102a and a second wiring layer 106a, respectively. In another embodiment, it is also possible to pattern only the first line material layer 102, and then pattern the second line material layer 106 in subsequent steps, depending on actual needs. Then, a second dielectric layer 111 is formed on the first surface 101a, and the second dielectric layer 111 covers the first wiring layer 102a. Next, a metal via hole 113 is formed in the second dielectric layer 111, and a third wiring material layer 114 is formed on the second dielectric layer 111. The metal via hole 113 is connected to the first wiring layer 102a and the third wiring layer 114, and the metal via hole 113 and the first wiring layer 102a and the The three circuit layers 114 are electrically connected. The step of forming the metal vias 113 and the third wiring material layer 114 is, for example, forming the vias 112 in the second dielectric layer 111. The step of forming the through holes 112 is, for example, performing laser drilling. The through hole 112 exposes a portion of the first wiring layer 102a. Thereafter, an electroplating process is performed to form a metal via hole 113 in the via hole 112 and a third wiring material layer 114 on the second dielectric layer 111. The metal via 113 has a top portion 113a adjacent to the first surface 101a and a top portion 113a away from the first surface 101a, and the outer diameter of the top portion 113a is larger than the outer diameter of the bottom portion 113b.
之後,請參照圖1E,將第三線路材料層114圖案化,以形成第三電路層114a,以完成本實施例的線路板10的製造。 Thereafter, referring to FIG. 1E, the third wiring material layer 114 is patterned to form a third circuit layer 114a to complete the fabrication of the wiring board 10 of the present embodiment.
圖2A至圖2E為依照本發明另一實施例所繪示的線路板的製造方法之剖面圖。在本實施例中,所形成的線路板與線路板10具有相同的結構。首先,請參照圖2A,提供第一介電層201。第一介電層201具有第一表面201a以及與第一表面201a相對的第二表面201b。然後,於第一表面201a上形成第一線路材料層202。第一線路材料層202例如為銅層。形成第一線路材料層202的步驟例如是進行電鍍製程。 2A-2E are cross-sectional views showing a method of fabricating a circuit board according to another embodiment of the present invention. In the present embodiment, the formed wiring board has the same structure as the wiring board 10. First, referring to FIG. 2A, a first dielectric layer 201 is provided. The first dielectric layer 201 has a first surface 201a and a second surface 201b opposite the first surface 201a. Then, a first wiring material layer 202 is formed on the first surface 201a. The first line material layer 202 is, for example, a copper layer. The step of forming the first line material layer 202 is, for example, an electroplating process.
然後,請參照圖2B,於第一介電層201中形成金屬導通孔204,且於第二表面201b上形成第二線路材料層205,以形成線路結構200。形成金屬導通孔204與第二線路材料層205的步驟例如是先於第一介電層201中形成通 孔203。形成通孔203的步驟例如是進行雷射鑽孔。通孔203暴露出部分第一線路材料層202。之後,進行電鍍製程,以於通孔203中形成金屬導通孔204,以及於第一介電層201上形成第二線路材料層205。金屬導通孔204電性連接第一線路材料層202與第二線路材料層205。金屬導通孔204具有頂部204a與底部204b,底部204b鄰近第一表面201a,而頂部204a鄰近第二表面201b,且頂部204a的外徑大於底部204b的外徑。在本實施例中,底部204b與第一表面201a齊平,而頂部204a與第二表面201b齊平。 Then, referring to FIG. 2B, a metal via hole 204 is formed in the first dielectric layer 201, and a second circuit material layer 205 is formed on the second surface 201b to form the wiring structure 200. The step of forming the metal via 204 and the second wiring material layer 205 is, for example, forming a pass before the first dielectric layer 201. Hole 203. The step of forming the through holes 203 is, for example, performing laser drilling. The via 203 exposes a portion of the first line material layer 202. Thereafter, an electroplating process is performed to form a metal via hole 204 in the via hole 203 and a second wiring material layer 205 on the first dielectric layer 201. The metal vias 204 are electrically connected to the first wiring material layer 202 and the second wiring material layer 205. The metal via 204 has a top 204a and a bottom 204b, the bottom 204b is adjacent to the first surface 201a, and the top 204a is adjacent to the second surface 201b, and the outer diameter of the top 204a is greater than the outer diameter of the bottom 204b. In the present embodiment, the bottom portion 204b is flush with the first surface 201a, and the top portion 204a is flush with the second surface 201b.
接著,請參照圖2C,將線路結構200中的第一線路材料層202圖案化,以形成第一線路層202a。在另一實施例中,也可以視實際需求而同時將第一線路材料層202與第二線路材料層205圖案化。然後,於第一表面201a上形成第二介電層211,且第二介電層211覆蓋第一線路層202a。而後,選擇性地於第二介電層211上形成絕緣薄膜212。絕緣薄膜212的材料例如為聚對苯二甲酸乙二酯(PET)。形成絕緣薄膜212的步驟例如是進行壓合製程。 Next, referring to FIG. 2C, the first line material layer 202 in the line structure 200 is patterned to form a first circuit layer 202a. In another embodiment, the first line material layer 202 and the second line material layer 205 may also be patterned simultaneously according to actual needs. Then, a second dielectric layer 211 is formed on the first surface 201a, and the second dielectric layer 211 covers the first wiring layer 202a. Then, an insulating film 212 is selectively formed on the second dielectric layer 211. The material of the insulating film 212 is, for example, polyethylene terephthalate (PET). The step of forming the insulating film 212 is, for example, a press-bonding process.
而後,請參照圖2D,於絕緣薄膜212與第二介電層211中形成通孔213,且通孔213暴露出部分第一線路層202a。形成通孔213的步驟例如是進行雷射鑽孔製程。接著,於通孔213中形成導電膠導通孔214。形成導電膠導通孔214的步驟例如是進行印刷製程,以將導電膠(如銀膠、銅膠等)填入通孔213中。 Then, referring to FIG. 2D, a through hole 213 is formed in the insulating film 212 and the second dielectric layer 211, and the through hole 213 exposes a portion of the first wiring layer 202a. The step of forming the through holes 213 is, for example, a laser drilling process. Next, a conductive paste via 214 is formed in the via hole 213. The step of forming the conductive paste via 214 is, for example, a printing process to fill a conductive paste (such as silver paste, copper paste, etc.) into the through hole 213.
之後,請參照圖2E,移除絕緣薄膜212。然後,於第 二介電層211與導電膠導通孔214上形成第三線路材料層(未繪示)。第三線路材料層例如為銅層。形成第三線路材料層的步驟例如是進行壓合製程。導電膠導通孔214將第一線路層202a與第三線路層215電性連接。特別一提的是,在此壓合製程中,會同時將通孔213外的導電膠導通孔214壓至通孔213中。導電膠導通孔214具有頂部214a與底部214b,底部214b鄰近第一表面201a,而頂部214a遠離第一表面201a,且頂部214a的外徑大於底部214b的外徑。 Thereafter, referring to FIG. 2E, the insulating film 212 is removed. Then, in the first A third circuit material layer (not shown) is formed on the second dielectric layer 211 and the conductive paste vias 214. The third line material layer is, for example, a copper layer. The step of forming the third line material layer is, for example, a press-bonding process. The conductive paste via 214 electrically connects the first circuit layer 202a and the third circuit layer 215. In particular, in the press-bonding process, the conductive adhesive vias 214 outside the vias 213 are simultaneously pressed into the vias 213. The conductive adhesive via 214 has a top portion 214a adjacent to the first surface 201a and a bottom portion 214b away from the first surface 201a, and the outer diameter of the top portion 214a is greater than the outer diameter of the bottom portion 214b.
之後,將第三線路材料層圖案化,以形成第三線路層215,以完成本實施例的線路板20的製造。 Thereafter, the third wiring material layer is patterned to form a third wiring layer 215 to complete the manufacture of the wiring board 20 of the present embodiment.
如圖1E與圖2E所示,線路板10、20中皆具有相對配置的導電膠導通孔與金屬導通孔,因此當線路板10、20在進行後續的壓合製程以形成具有更多層線路結構的線路板時,導電膠導通孔105、214可以作為緩衝結構,因此可以避免受到壓應力的影響而導致金屬導通孔113、204與第一線路層102a、202a之間的界面產生缺陷(如破裂、接合不完全)的問題。 As shown in FIG. 1E and FIG. 2E, the circuit boards 10 and 20 have opposite conductive conductive vias and metal vias, so that the circuit boards 10 and 20 are subjected to a subsequent pressing process to form a plurality of layers. When the circuit board of the structure is used, the conductive adhesive vias 105, 214 can serve as a buffer structure, thereby avoiding the influence of compressive stress and causing defects in the interface between the metal vias 113, 204 and the first circuit layers 102a, 202a (eg, The problem of cracking and incomplete bonding.
此外,在線路板10、20中,由於導電膠導通孔105、214可以作為緩衝結構,因此當金屬導通孔113、204因製程溫度過高而產生變形時,可以有效地避免金屬導通孔113、204擠壓第一線路層102a、202a而導致第一線路層102a、202a產生損壞。 In addition, in the circuit boards 10 and 20, since the conductive vias 105 and 214 can serve as a buffer structure, when the metal vias 113 and 204 are deformed due to excessive process temperature, the metal vias 113 can be effectively avoided. The pressing of the first wiring layers 102a, 202a causes the first wiring layers 102a, 202a to be damaged.
對於進行後續的壓合製程來形成具有更多層線路結 構的線路板,以下將以線路板10為例作說明。 For subsequent embossing processes to form more layers of line junctions The circuit board of the structure will be described below by taking the circuit board 10 as an example.
圖3A至圖3B為依照本發明再一實施例所繪示的線路板的製造方法之剖面圖。首先,請參照圖3A,提供線路板10、10’。線路板10與線路板10’具有相同的結構。然後,於線路板10與線路板10’之間提供介電層300,以及於鄰近線路板10的導電膠導通孔105的一側提供介電層302與線路材料層304。此外,於鄰近線路板10’的導電膠導通孔105的一側提供介電層306與線路材料層308,以及於線路板10’的第三電路層114a上形成錐狀導電膠30。 3A-3B are cross-sectional views showing a method of fabricating a circuit board according to still another embodiment of the present invention. First, referring to Fig. 3A, wiring boards 10, 10' are provided. The wiring board 10 has the same structure as the wiring board 10'. Then, a dielectric layer 300 is provided between the wiring board 10 and the wiring board 10', and a dielectric layer 302 and a wiring material layer 304 are provided on a side of the conductive adhesive via 105 adjacent to the wiring board 10. Further, a dielectric layer 306 and a wiring material layer 308 are provided on one side of the conductive paste via 105 adjacent to the wiring board 10', and a tapered conductive paste 30 is formed on the third circuit layer 114a of the wiring board 10'.
然後,請參照圖3B,壓合線路材料層304、介電層302、線路板10、介電層300、線路板10’、介電層306與線路材料層308。在壓合過程中,錐狀導電膠30會穿過介電層300而形成導電膠導通孔30a。接著,於線路材料層304與介電層302中形成通孔並進行電鍍製程以形成金屬導通孔312與增層線路材料層314,以及於線路材料層308與介電層306中形成通孔並進行電鍍製程以形成金屬導通孔316與增層線路材料層318。之後,可對線路材料層314、304進行圖案化製程,以及對線路材料層318、308進行圖案化製程,以形成所需的線路層。 Then, referring to FIG. 3B, the line material layer 304, the dielectric layer 302, the wiring board 10, the dielectric layer 300, the wiring board 10', the dielectric layer 306, and the wiring material layer 308 are laminated. During the pressing process, the tapered conductive paste 30 passes through the dielectric layer 300 to form a conductive adhesive via 30a. Next, a via hole is formed in the wiring material layer 304 and the dielectric layer 302 and an electroplating process is performed to form the metal via hole 312 and the build-up wiring material layer 314, and a via hole is formed in the wiring material layer 308 and the dielectric layer 306. An electroplating process is performed to form metal vias 316 and build-up wiring material layers 318. Thereafter, the wiring material layers 314, 304 can be patterned and the wiring material layers 318, 308 patterned to form the desired wiring layer.
圖4A至圖4B為依照本發明又一實施例所繪示的線路板的製造方法之剖面圖。首先,請參照圖4A,提供線路板10、10’。線路板10與線路板10’具有相同的結構。然後,於線路板10上形成介電層400、金屬導通孔402與線路層404,以及於線路板10’上形成介電層410、金屬導通孔 412、線路層414與錐狀導電膠40。接著,於線路板10的一側提供介電層406與線路材料層408,以及於線路板10、10’之間提供介電層409。此外,於線路板10’的相對於錐狀導電膠40的一側提供介電層416與線路材料層418。 4A-4B are cross-sectional views showing a method of fabricating a circuit board according to still another embodiment of the present invention. First, referring to Fig. 4A, wiring boards 10, 10' are provided. The wiring board 10 has the same structure as the wiring board 10'. Then, a dielectric layer 400, a metal via 402 and a wiring layer 404 are formed on the wiring board 10, and a dielectric layer 410 and a metal via hole are formed on the wiring board 10'. 412, the circuit layer 414 and the tapered conductive paste 40. Next, a dielectric layer 406 and a wiring material layer 408 are provided on one side of the wiring board 10, and a dielectric layer 409 is provided between the wiring boards 10, 10'. Further, a dielectric layer 416 and a wiring material layer 418 are provided on a side of the wiring board 10' opposite to the tapered conductive paste 40.
然後,請參照圖4B,壓合線路材料層408、介電層406、線路板10、介電層409、線路板10’、介電層416與線路材料層418。在壓合過程中,錐狀導電膠40會穿過介電層409而形成導電膠導通孔40a。接著,於線路材料層408與介電層406中形成通孔並進行電鍍製程以形成金屬導通孔420與線路材料層422,以及於線路材料層418與介電層416中形成通孔並進行電鍍製程以形成金屬導通孔424與線路材料層426。之後,可對線路材料層422、408進行圖案化製程,以及對線路材料層426、418進行圖案化製程,以形成所需的線路層。 Then, referring to FIG. 4B, the wiring material layer 408, the dielectric layer 406, the wiring board 10, the dielectric layer 409, the wiring board 10', the dielectric layer 416, and the wiring material layer 418 are laminated. During the pressing process, the tapered conductive paste 40 passes through the dielectric layer 409 to form a conductive adhesive via 40a. Next, a via hole is formed in the wiring material layer 408 and the dielectric layer 406 and an electroplating process is performed to form the metal via hole 420 and the wiring material layer 422, and a via hole is formed in the wiring material layer 418 and the dielectric layer 416 and is plated. The process is to form metal vias 424 and trace material layer 426. Thereafter, the wiring material layers 422, 408 can be patterned and the wiring material layers 426, 418 patterned to form the desired wiring layer.
綜上所述,由於本發明的線路板中具有相對配置的導電膠導通孔與金屬導通孔,因此當線路板在進行後續的壓合製程以形成具有更多層線路結構的線路板時,導電膠導通孔可作為緩衝結構,因此可以避免金屬導通孔與線路層之間的界面因壓應力的影響而產生缺陷(如破裂、接合不完全)。 In summary, since the circuit board of the present invention has oppositely disposed conductive rubber vias and metal vias, when the circuit board is subjected to a subsequent pressing process to form a circuit board having a more layer wiring structure, the conductive layer is electrically conductive. The through hole can be used as a buffer structure, so that the interface between the metal via and the circuit layer can be prevented from being defective due to the influence of compressive stress (such as cracking and incomplete bonding).
此外,在本發明的線路板中,由於導電膠導通孔可以作為緩衝結構,因此當金屬導通孔因製程溫度過高而產生變形時,可以有效地避免金屬導通孔擠壓線路層而導致線路層產生損壞。 In addition, in the circuit board of the present invention, since the conductive paste via hole can serve as a buffer structure, when the metal via hole is deformed due to excessive process temperature, the metal via hole can be effectively prevented from being pressed to the circuit layer to cause the circuit layer. Damage occurred.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
10、20、10’‧‧‧線路板 10, 20, 10’‧‧‧ boards
30、40‧‧‧錐狀導電膠 30, 40‧‧‧Conical conductive adhesive
100、200‧‧‧線路結構 100, 200‧‧‧ line structure
101、201‧‧‧第一介電層 101, 201‧‧‧ first dielectric layer
101a、201a‧‧‧第一表面 101a, 201a‧‧‧ first surface
101b、201b‧‧‧第二表面 101b, 201b‧‧‧ second surface
102、202‧‧‧第一線路材料層 102, 202‧‧‧First line material layer
102a、202a‧‧‧第一線路層 102a, 202a‧‧‧ first line layer
103、212‧‧‧絕緣薄膜 103, 212‧‧‧Insulation film
104、112、203、213‧‧‧通孔 104, 112, 203, 213‧‧‧ through holes
105、214、30a、40a‧‧‧導電膠導通孔 105, 214, 30a, 40a‧‧‧ conductive rubber vias
105a、113a、204a、214a‧‧‧頂部 105a, 113a, 204a, 214a‧‧‧ top
105b、113b、204b、214b‧‧‧底部 105b, 113b, 204b, 214b‧‧‧ bottom
106、205‧‧‧第二線路材料層 106, 205‧‧‧ second line material layer
106a‧‧‧第二線路層 106a‧‧‧Second circuit layer
111‧‧‧第二介電層 111‧‧‧Second dielectric layer
113、204、312、316、402、412、420、424‧‧‧金屬導通孔 113, 204, 312, 316, 402, 412, 420, 424‧‧‧ metal vias
114‧‧‧第三線路材料層 114‧‧‧ Third line material layer
114a‧‧‧第三電路層 114a‧‧‧ third circuit layer
215‧‧‧第三線路層 215‧‧‧ third circuit layer
302、306、400、406、409、410、416‧‧‧介電層 302, 306, 400, 406, 409, 410, 416‧‧ dielectric layers
304、308、314、318、408、418、422、426‧‧‧線路材料層 304, 308, 314, 318, 408, 418, 422, 426‧‧‧ line material layer
404、414‧‧‧線路層 404, 414‧‧‧ circuit layer
圖1A至圖1E為依照本發明一實施例所繪示的線路板的製造方法之剖面圖。 1A-1E are cross-sectional views showing a method of fabricating a circuit board according to an embodiment of the invention.
圖2A至圖2E為依照本發明另一實施例所繪示的線路板的製造方法之剖面圖。 2A-2E are cross-sectional views showing a method of fabricating a circuit board according to another embodiment of the present invention.
圖3A至圖3B為依照本發明再一實施例所繪示的線路板的製造方法之剖面圖。 3A-3B are cross-sectional views showing a method of fabricating a circuit board according to still another embodiment of the present invention.
圖4A至圖4B為依照本發明又一實施例所繪示的線路板的製造方法之剖面圖。 4A-4B are cross-sectional views showing a method of fabricating a circuit board according to still another embodiment of the present invention.
10‧‧‧線路板 10‧‧‧ circuit board
101‧‧‧第一介電層 101‧‧‧First dielectric layer
102a‧‧‧第一線路層 102a‧‧‧First circuit layer
105‧‧‧導電膠導通孔 105‧‧‧conductive rubber vias
106a‧‧‧第二線路層 106a‧‧‧Second circuit layer
111‧‧‧第二介電層 111‧‧‧Second dielectric layer
113‧‧‧金屬導通孔 113‧‧‧Metal vias
114a‧‧‧第三電路層 114a‧‧‧ third circuit layer
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