TWI427684B - 用於現場基底處理之方法及裝置 - Google Patents
用於現場基底處理之方法及裝置 Download PDFInfo
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- TWI427684B TWI427684B TW095146283A TW95146283A TWI427684B TW I427684 B TWI427684 B TW I427684B TW 095146283 A TW095146283 A TW 095146283A TW 95146283 A TW95146283 A TW 95146283A TW I427684 B TWI427684 B TW I427684B
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- 239000011261 inert gas Substances 0.000 claims description 9
- 239000000203 mixture Substances 0.000 claims description 5
- 239000002002 slurry Substances 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 31
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- 239000004020 conductor Substances 0.000 description 12
- 239000000356 contaminant Substances 0.000 description 10
- 239000010949 copper Substances 0.000 description 8
- 239000001301 oxygen Substances 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 8
- 230000008021 deposition Effects 0.000 description 7
- 238000011160 research Methods 0.000 description 7
- 239000002470 thermal conductor Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
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- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 239000010432 diamond Substances 0.000 description 4
- 229910052734 helium Inorganic materials 0.000 description 4
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- 239000001307 helium Substances 0.000 description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 3
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- -1 oxygen ions Chemical class 0.000 description 3
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 235000014653 Carica parviflora Nutrition 0.000 description 2
- 241000243321 Cnidaria Species 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
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- 229910052799 carbon Inorganic materials 0.000 description 2
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- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
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- 239000002253 acid Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
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- 239000000908 ammonium hydroxide Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
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- 125000001820 oxy group Chemical group [*:1]O[*:2] 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
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- 229910001220 stainless steel Inorganic materials 0.000 description 1
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- 229920003002 synthetic resin Polymers 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
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- 229910052724 xenon Inorganic materials 0.000 description 1
Classifications
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3244—Gas supply means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
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- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3244—Gas supply means
- H01J37/32449—Gas control, e.g. control of the gas flow
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32458—Vessel
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- H—ELECTRICITY
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
- H01J37/32853—Hygiene
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/6708—Apparatus for fluid treatment for etching for wet etching using mainly spraying means, e.g. nozzles
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Description
本發明係有關用於現場基底處理之方法及裝置。
在處理如使用於平面顯示器製造中的半導體基底或玻璃板之基底之過程中,經常利用電漿。例如,作為基底處理過程的一部份,將基底分成數個晶粒,或矩形區域,其之每一個將變成一個積體電路。接著於一連串的步驟中處理基底,其中選擇性地移除(蝕刻)及/或沉積(沉積方法)材料以在基底上形成電性構件。
在範例電將程序中,將基底在蝕刻前塗覆上一層薄的硬化乳膠(亦即例如光阻遮罩)。接著將硬化的乳膠區域選擇性移除,使下層的構件變成暴露在外。接著將基底放置在電漿處理室中之包含單極或雙極電極的基底支承結構上,其稱為夾頭或托架。接著將適當的蝕刻劑流入室內並且產生電擊形成電漿以蝕刻基底的暴露區域。
茲參照第1圖,其顯示電容性耦合之電漿處理系統之簡化圖。在一般的組態中,電漿處理室可包含位在下層室中的底件150,以及位在上層室中的可拆式頂件152。第一RF產生器134(來源RF產生器134)產生電漿110並且控制電漿密度,同時產生偏壓RF的第二RF產生器138(偏壓RF產生器)常用來控制DC偏壓以及離子撞擊能量。
匹配網路136可進一步耦合至來源RF產生器134以及偏壓RF產生器138,以試著將RF電力來源的阻抗匹配至電漿110的阻抗。此外,泵111常用來將電漿處理室102(由底件150以及可拆式頂件152形成)的環境空氣抽空,以達成維持電漿110所需要之壓力。
通常,使來自氣體分佈系統122至位在下層室中的關閉閥123之適當的一組氣體(輸入氣體)流入室102內。通常,為了在基底整個表面上達成實質上均勻的蝕刻劑氣體分佈,通常會使用具有孔洞或多孔平坦表面之噴灑頭/接地電極109。氣體分佈系統122通常包含含有電漿處理氣體(如C4
F8
、C4
F6
、CH2
F3
、CF4
、HBr、CH3
F、C2
F4
、N2
、O2
、Ar、Xe、He、H2
、NH3
、SF6
、BCl3
、Cl2
、WF6
等等)之壓縮氣瓶。可隨後離子化這些氣體以形成電漿110,以處理(亦即蝕刻或沉積)位於靜電夾頭116上具有邊環115之諸如半導體基底或玻璃板之基底114的暴露區域,該夾頭亦作為有電之電極。
此外,某類型的冷卻系統140可耦合至夾頭以一旦點燃電漿時便達成熱平衡。冷卻系統140通常包含冷卻器,其將冷卻劑抽入夾頭內的空腔,並且氦氣加壓夾頭116與基底114之間的小間隔。除了移除產生的熱,氦氣亦允許冷卻系統140快速控制熱的消散。亦即,隨後增加氦壓力亦增加熱轉換率。大多數的電漿處理系統亦由包含軟體程式之複雜的電腦控制。於典型的運作環境中,製造程序參數(如電壓、氣流混合、氣流速率、壓力等等)通常針對特定電漿處理系統以及特定製法所組態。
在一般的基底製造方法,稱為雙金屬鑲嵌法,電介質層由填補通孔洞之導電栓塞電性連接。通常,在電介質層中形成開口,通常與阻障材料(如SiCN、SiC、SiON、Si3
N4
等等)呈一直線,並接著隨後以允許兩組導電圖案電性接觸之導電材料填補(如鋁(Al)、銅(Cu)等等),藉此在基底上的兩個主動區域(如源極/汲極區域)之間建立電性接觸。典型由化學機械研磨(CMP)移除電介質層的表面上多餘的導電材料。接著沉積氮化矽覆蓋層以覆蓋銅。
製造雙金屬鑲嵌基底的兩種常用的方法為:先通孔以及先溝槽。於先通孔法的一範例中,先以光阻覆蓋基底,並接著微影式圖案化通孔。接下來,非等向性蝕刻刻化通過表面覆蓋的材料、向下蝕刻到基底的低k層、並止於阻障材料,剛好在下層的金屬層之上。接下來,剝除通孔光阻,提供並且微影式圖案化溝槽光阻。典型地,某些光阻會留在通孔底部,或者通孔會被有機ARC栓塞覆蓋,以防止在溝槽蝕刻程序期間過度蝕刻較低部分的通孔。第二非等向性蝕刻接著刻化通過表面覆蓋材料並向下蝕刻低k材料直到希望的深度。第二非等向性蝕刻形成溝槽。接著剝除光阻,並且以不會使下層的銅噴濺到通孔內之非常輕微低能量的蝕刻使通孔底部的阻障材料打開。如上述,以導電材料填補並且由化學機械研磨(CMP)磨光溝槽與通孔(如鋁(Al)、銅(Cu)等等)。
另一種替代方法為先溝槽。於一範例中,以光阻覆蓋基底,並且提供溝槽微影圖案。非等向性蝕刻乾蝕刻接著刻過表面硬遮罩(如SiCN、SiC、SiON、Si3
N4
等等),接著剝除光阻。接著塗敷另一光阻於溝槽硬遮罩上,並接著微影式圖案化通孔。第二非等向性蝕刻接著刻過覆蓋層並且向下部分蝕刻至低k材料。第二非等向性蝕刻形成部份通孔。接著剝除光阻以利用溝槽硬遮罩在通孔上進行溝槽蝕刻。溝槽蝕刻接著刻過覆蓋層並且部分蝕刻低k材料直到希望的深度。第二非等向性蝕刻亦同時清除通孔孔洞,止於位在通孔底部之最終阻障材料。接著以特別的蝕刻打開最終阻障材料。
例如,常見的先通孔程序通常會涉及於在不同的電漿處理系統上蝕刻與沉積程序之間交替。為了利於討論,第2圖描繪一組部分簡化之先前技術雙金屬鑲嵌程序步驟,其中顯示層堆疊之理想的剖面圖。於下列討論中,「之上」與「之下」的用語,其在此用來討論層之間的空間關係,可以但不需總是指示有關之層之間的直接接觸。應注意到顯示之層之上、之下、或之間亦可有其他額外的層。此外,並非所有顯示的層都絕對必須存在,並且以其他不同的層替代一些或所有顯示的層。
步驟(a)顯示部分蝕刻的基底。在層堆疊的底部顯示通常為鋁或銅之金屬層210。在第一金屬層上通常為金屬阻障層212(如SiCN、SiC、SiON、Si3
N4
等等),其之厚度通常約為500Å。當蝕刻金屬阻障層212上一層的低k材料時,金屬阻障層212通常提供止蝕刻。在金屬阻障層212之上,可設有由低k材料形成的中間電介質(IMD)層214,該低k材料係如由應用
材料公司(Applied Materials,Inc.)(www.appliedmaterials.com
)提供之SiCN、SiOC、BLACK DIAMONDTM
之一、由諾發系統公司(Novellus Systems,inc)(www.novellus.com
)提供之CORALTM
、TEOS等等,其之厚度通常約為3.2Å。IMD層214之上,可有通常約500Å厚之覆蓋層216(如SiCN、SiC、BLACK DIAMONDTM
、TEOS等等)。在覆蓋層216之上,設置有通常約為300Å的溝槽遮罩層218(如TiN、SiN、TaN等等)。溝槽遮罩層218之上有通常約為300Å的另一阻障層220(如PEOX等等)。阻障層220之上為通常約為1.1kÅ的BARC層222。最後在BARC層222上為通常約為2.8kÅ的光阻層224,圖案化而有通孔226。
將基底運送至電漿處理蝕刻室202(如Lam Research 2300ExelanTM
等等)。在步驟(b),蝕刻通孔226下至金屬阻障層212。在步驟(c),將光阻層224以及BARC層222移除(剝除)。接著將基底運送至清理室(未圖示)並接著至光阻沉積室204。通常,在製造站之間運送基底時必需清理基底。
在蝕刻程序期間,聚合物副產物形成於基底頂部與底部並非不常見。通常形成在蝕刻程序期間形成於基底上之聚合物為有機的並且由碳(C)、氧(O)、氮(N)、及/或氟(F)構成。然而,隨著因許多不同蝕刻程序而沉積接續的聚合層,通常為堅固且具黏性的有機鍵最終將變弱並脫落或龜裂,通常在運送期間會掉落至另一基底上。例如,通常透過實質上乾淨的容器,常稱為卡匣,在電漿處理系統之間成組地移動基底。當位處較高的基底重定位於容器中,聚合物的一部份可能落到較低的基底之有晶粒的地方,潛在影響裝置的產率。因此,較佳能最小化基底運輸的次數。
通常,使用溼與乾程序的結合來化學清理基底。溼程序通常涉及放置基底於槽(如石英、塑膠等等)中或於旋轉轉台上,加上溶劑及酸之結合(如H2
SO4
、H2
O2
、NH4
OH、HF等等),以分別移除有機及無機污染殘留物,並且隨後通常進行去離子(DI)水沖洗以及旋乾程序。經常利用百萬週波超音波來增進溼清理程序的清潔效率。百萬週波超音波係指安裝在槽底部上可產生高功率聲音能量波之轉換器。此額外的能量通常能輔助自基底表面移除粒子。具有百萬週波超音波功能之基底旋轉程序平台的常見範例包含由SEZ持股有限公司(www.sez.com)、Akrion公司(www.akrion.com[YT1])、以及Semitool公司(www.semitool.com)提供之產品。
例如,稱為SC-1(標準清理解決方案#1)之常見的清理方法包含放置基底於具有氫氧化氨(NH4
OH)、過氧化氫(H2
O2
)、以及DI水(H2
O)的槽(如石英、塑膠等等)中或於旋轉轉台上。該混合物之NH4
OH:H2
O2
:H2
O之典型的濃度比例為1:1:5,雖然近來有利用低如0.05:1:5的比例來達成更佳清理效能。SC-1能從基底表面有效移除有機污染物,藉由持續氧化並接著蝕刻基底表面,藉此使污染物溶解到溶液中。典型在50-70℃的溫度範圍中操作。
稱為SC-2(標準清理解決方案#2)之另一種常用的清理方法包含放置基底於具有氫氯酸(HCl)、過氧化氫(H2
O2
)、以及DI水(H2
O)的石英或塑膠槽中。該混合物之HCl:H2
O2
:H2
O之典型的濃度比例為1:1:5。通常,SC-2解決方案從基底表面最能有效移除金屬污染物,並經常隨後進行SC-1。如同SC-1,移除金屬係藉由持續氧化並接著蝕刻晶圓的表面,藉此使污染物溶解到溶液中。典型在50-70℃的溫度範圍中操作。
此外,亦可利用乾清理法。通常,乾洗為在氣相中自基底表面移除污染物。藉由將汙染物透過化學作用變換成揮發性化合物、經由動量移轉將汙染物自基底表面「敲落」、或在輕微蝕刻受污染的表面時帶走污染物來造就污染物的移除。
在清理基底之後,將基底運送至光阻沉積室204。通常,將基底放置在具有能在高速旋轉時固定基底之真空夾頭的軸上。將液體光阻塗敷在基底表面上,並且來自基底旋轉之離心力則將液體散佈於整個表面上。光阻厚度與滯度以及轉速有關。亦即,滯度越大,光阻層越厚;而轉速越大,光阻層越薄。接著烘烤光阻層,並將之暴露於UV輻射下,以將其轉變成基底表面上之堅硬的黏性薄膜。
接著將基底移轉至另一電漿處理蝕刻室206。通常,部份蝕刻光阻,僅留一部份在通孔226中以備基底供後續金屬阻障層212蝕刻。在常稱為PREB(光阻回蝕刻)的程序中,常利用O2
化學來回蝕刻光阻至特定高度。在此,那個高度為在通孔的頂部與底部之間的一點。因此,為了防止移除所有的光阻,這通常係典型蝕刻程序完成時的情況,通常須減弱光阻移除程序。
減弱O2
化學的一種方法,並因而控制蝕刻率,為添加大量的惰性氣體至氣體混合物。亦即,當電漿處理室中如氬之惰性氣體之體積增加時,越多的氧離子與惰性氣體分子碰撞並交換能量,從基底表面吸走熱量,並因而降低光阻蝕刻率。
減弱O2
化學的另一種方法可為以材料預先覆蓋電漿處理室,該材料對蝕刻劑有親和性,以降低電漿中蝕刻劑基的有效量,因而最佳化光阻蝕刻率。例如,以Cl2
預先覆蓋電漿處理室可降低電漿中可供蝕刻光阻的氧基之有效量。通常,預先覆蓋的材料量越大,可供蝕刻程序用之氧基量越少。
然而,PREB用之電漿處理室對於需要不同程序化學與室的狀況之多個連續的程序步驟(如PREB、溝槽蝕刻、光阻剝除等)可能並非為最佳者。例如,於典型蝕刻室中,結合惰性氣體,可能難以最佳化在基底的整個表面上之O2
的分佈。然而,當電漿蝕刻掉光阻,基底上具有較高地形的區域比具有較低地形者花更長蝕刻,在可能的溝槽或通孔間造成非均勻的光阻輪廓。此外,基底的外邊緣比中央收集更多電子(因而增加對應的蝕刻率),因為邊緣離電漿的電位較近。因此,較佳能將O2
非對稱性地分佈於基底表面上,以確保實質上均勻的蝕刻率。
另外,維持實質上乾淨的室狀況以最小化室記憶效應並在接續的基底間維持可重複的結果為很重要者。由於在許多電漿處理系統中,完全移除PREB污染沉積物非常耗時,通常只當粒子污染程度到達不可接受的程度時清理電漿處理室。然而,常難以判斷確切何時程序狀況超過建立之參數時會改變。若不先處理接著測試部分製造的基底,則通常沒有有效的方法來判斷電漿程序是否已經移動至現場建立之參數外。亦即,在處理過一批次的基底後,自該批次移除一樣本基底作測試。因此,為了最大化需要清理之間的時間長度,PREB程序通常最好能有專用的電漿處理室。經常,為了最大化資本投資,較老舊的機器可專用於特定工作或程序,如PREB。
在PREB程序完成後,如前述般再次清理(未圖示)基底,接著將之運送至電漿蝕刻室208,其中將移除阻障層220(如PEOX等等),並且將蝕刻金屬阻障層212。首先,在步驟(f),移除阻障層220。通常,在先前PREB步驟後剩餘的光阻228在移除阻障220時遮蔽阻障層212不受到電漿影響。亦即,蝕刻光阻228的一部份而非蝕刻金屬阻障層212。接下來,在步驟(g)中,如前述般移除(剝除)剩下的光阻。最後,蝕刻金屬阻障層212。通常使用襯墊移除程序(LRM)來蝕刻金屬阻障層212。
然而,在處理基底的程序中於單一處理期(亦即現場)中最好能結合越多的步驟,以最小化每一個基底的處置,因而增進產率,增進整體產量、幫助最小化所需之電漿處理室的量、並且最小化因基底運送時造成之基板的缺陷。
本發明之一實施例有關於用於處理基底之電漿處理系統。電漿處理系統可包含氣體分佈系統。電漿處理系統亦可包含耦合至氣體分佈系統之氣體流動控制組件,其組態成控制由氣體分佈系統提供的一組輸入氣體。電漿處理系統可進一步包含耦合至氣體流動控制組件之第一組噴嘴,其組態成供應處理基底的第一部分用之第一組氣體。電漿處理系統可進一步包含耦合至氣體流動控制組件之第二組噴嘴,其組態成供應處理基底的第二部分用之第二組氣體。第一組氣體可代表該組輸入氣體的第一部份。第二組氣體可代表該組輸入氣體的第二部份。第一組氣體之流速可與第二組氣體之流速不同。
上述的發明內容僅有關於在此揭露的本發明之許多實施例之一,並不應視為本發明的範疇之限制,本發明之範疇在於此之申請專利範圍中提出。將於下列實施方式中以更多細節並連同附圖描述本發明之這些與其他的特徵。
茲參照附圖中圖解之數個本發明的較佳實施例來詳細描述本發明。於下列說明中,提出各種特定細節以提供本發明之更詳盡的了解。然而,對熟悉該項技藝者很明顯地,本發明可不以這些特定細節的一些或全部來實施本發明。於其他實例中,未詳細描述熟知的程序步驟及/或結構,以不必要地模糊本發明。
儘管不希望被理論所困,本發明人相信在改良的電漿處理室中PREB處理步驟可與金屬層阻障蝕刻處理步驟結合。於一實施例中,改良的電漿處理室可為由蘭姆研究公司(Lam Research Corporation)(www.lamrc.com)提供之Lam Research 2300 ExelanTM
Flex電漿處理系統的一部份。
如前述,PREB處理通常使用減弱的O2
化學,以回蝕刻光阻至特定高度。例如,可添加大量的惰性氣體至氣體混合物以降低蝕刻率。另外,可以對蝕刻劑有親和性之材料預先覆蓋電漿處理室,以降低電漿中蝕刻劑基的有效量,因而最佳化光阻蝕刻率。例如,以與氧有親和性之材料預先覆蓋電漿處理室,如Cl2
,將可降低電漿中可供蝕刻光阻的氧基之有效量。一般而言,預先覆蓋的材料量越大,可供蝕刻程序用之氧基的量越少。傳統上,因污染或程序控制的考量通常使用專門的電漿處理室。
於一有利的方式中,改良的電漿處理系統可組態有頂部電極溫度控制系統以及差動電漿氣體注入的至少一者,以減弱O2
蝕刻程序及將污染減至最小。
於一實施例中,改良的電漿處理系統可執行無晶圓自動清理程序,以實質上移除PREB污染,在基底接續的處理步驟中允許程序狀況維持在建立的參數內。此外,由於改良的電漿處理系統實質上移除大部分的PREB污染,可實質上維持或改善室清理間所需的時間。
本發明之一或更多實施例涉及處理基底用之電漿處理系統。電漿處理系統包含氣體分佈系統(亦即氣體供應)。電漿處理系統亦可包含耦合至氣體分佈系統之氣體流動控制組件,其組態成控制由氣體分佈系統提供的一組輸入氣體。電漿處理系統可進一步包含耦合至氣體流動控制組件之第一組噴嘴,其組態成供應處理基底的第一部分用之第一組氣體。電漿處理系統可進一步包含耦合至氣體流動控制組件之第二組噴嘴,其組態成供應處理基底的第二部分用之第二組氣體。第一組氣體可代表該組輸入氣體的第一部份。第二組氣體可代表該組輸入氣體的第二部份。第一組氣體之流速可與第二組氣體之流速不同。
於一或更多實施例中,基底的第一部分可代表基底的中央區域、基底的第二部分可代表基底的邊緣區域、第一組氣體之流速可高於第二組氣體之流速。
於一或更多實施例中,電漿處理系統可進一步包含耦合至電漿處理系統之上層室之溫度控制系統。溫度控制系統包含加熱單元,其組態成加熱設置在上層室內的電極。
當在處理基底時加熱電極後,可有效降低附著至電漿處理系統之基底、電極、牆壁之污染(如聚合物副產物),可因而有效增加由泵所抽離之污染。因此,可降低位在基底下之基底的污染,並因而降低與清理基底有關之時間、努力、及成本。此外,可降低電極的污染,並因而降低替換或清理電極的頻率以及有關的成本。電極可代表噴灑頭。此外,可降低電漿處理系統的污染,並因而可在相同的電漿處理室中以更多程序步驟處理基底,而無需移至不同的電漿處理室。有利地,可增進產量與效能,並降低處理基底之成本。
本發明之一或更多實施例涉及處理包含阻障層以及沉積之光阻的基底的方法。該方法可包含供應並離子化第一組氣體,以在電漿處理室中部份蝕刻在基底之第一部份的沉積之光阻。該方法亦可包含供應並離子化第二組氣體,以在電漿處理室中部份蝕刻在基底之第二部份的沉積之光阻。該方法可進一步包含在相同的電漿處理室中移除阻障層。
於一或更多實施例中,該方法可進一步包含加熱電漿處理系統的電極。電極代表將第一組氣體以及第二組氣體的至少一者傳送至電漿處理室中之噴灑頭。
本發明之一或更多實施例涉及於電漿處理系統中處理基底的方法。該方法包含加熱電漿處理系統的電極以降低基底的處理率。
參照圖示與下列之討論可更佳明瞭本發明之特徵與優點。
茲參照第3圖,顯示一組部分簡化之雙金屬鑲嵌程序步驟,其中在改良的電漿處理室內結合PREB處理步驟以及金屬阻障層蝕刻處理步驟。
步驟(a)顯示部分蝕刻的基底。在層堆疊的底部顯示通常為鋁或銅之金屬層310。在第一金屬層上通常為金屬阻障層312(如SiCN、SiC、SiON、Si3
N4
等等),其之厚度通常約為500Å。在金屬阻障層312之上,可設有由低k材料形成的中間電介質(IMD)層314,該低k材料係如由應用材料公司(Applied Materials,Inc.)(www.appliedmaterials.com
)提供之SiCN、SiOC、BLACK DIAMONDTM
之一、由諾發系統公司(Novellus Systems,inc)(www.novellus.com
)提供之CORALTM
、TEOS等等,其之厚度通常約為3.2Å。IMD層314之上,可設有通常約500Å厚之覆蓋層316(如SiCN、SiC、BLACK DIAMONDTM
、TEOS等等)。在覆蓋層316之上,設置有通常約為300Å的溝槽遮罩層318(如TiN、SiN、TaN等等)。溝槽遮罩層318之上有通常約為300Å的另一阻障層320(如PEOX等等)。阻障層320之上為通常約為1.1kÅ的BARC層322。最後在BARC層322上為通常約為2.8kÅ的光阻層324,圖案化而有通孔326。
將基底運送至電漿處理蝕刻室302(如由蘭姆研究公司供應之Lam Research 2300ExelanTM
等等)。在步驟(b),蝕刻通孔326下至金屬阻障層312。在步驟(c),將光阻層324以及BARC層322移除。接著將基底運送至清理室(未圖示)並接著至光阻沉積室304。在製造站之間運送基底時必需清理基底。通常,使用一或更多溼與乾程序(如SC-1、SC-2、百萬週波超音波、乾洗等等)或其結合來化學清理基底。在清理基底後,將之運送至光阻沉積室304。
然而,於先前技術不同地,接著將基底移轉至改良的電漿處理室308,以步驟(e)之執行PREB處理步驟以及步驟(f)的金屬層阻障蝕刻處理步驟,而沒有在步驟(f)前的清理步驟。在步驟(e),PREB程序,部份蝕刻光阻328,僅留一部份在通孔226中以備基底在後續金屬阻障層212用。於一或更多實施例中,在步驟(e),加熱改良的電漿處理室308,使得在步驟(e)產生之大部份的污染(聚合物副產物)可由耦合至電漿處理室308之泵抽離,而不會污染電漿處理室308。因此,電漿處理室308可處於步驟(f)之所希望的狀況中。完成PREB程序後,在步驟(f)於相同的電漿處理室308中移除阻障層320。接下來,於步驟(g)中,如前述般移除剩餘的光阻。最後,在步驟(h)蝕刻金屬阻障層312。
茲參照第4圖,其顯示根據本發明的一或更多實施例之具有頂部電極溫度控制系統與差動電漿氣體注入之改良的電容性耦合之電漿處理系統之簡化圖。改良的電容性耦合之電漿處理系統可包含位在下層室中的底件450,以及可拆式頂件452與至少部份位在該頂件452中的溫度控制系統453。
於一或更多實施例中,溫度控制系統453可包含加熱單元以及冷卻單元(或加熱與冷卻單元)並且可耦合至電漿處理系統的上層室482。加熱與冷卻單元可用來傳遞熱至上層室482以及透過相同的熱介面自上層室482傳遞熱出去。於一或更多實施例中,溫度控制系統453可包含透過閂鎖機制耦合至上層室482之外表面的加熱與冷卻單元。於一或更多實施例中,該閂鎖機制可包含夾固組件。於一或更多實施例中,該夾固組件可直接整合至加熱與冷卻單元。
於一或更多實施例中,第一RF產生器434(來源RF產生器434)產生電漿並控制電漿密度,而第二RF產生器438(偏壓RF產生器438)產生偏壓RF並常用來控制DC偏壓以及離子撞擊能量。匹配網路436耦合至來源RF產生器434以及偏壓RF產生器438,並且組態成將RF電力來源的阻抗匹配至電漿440的阻抗。此外,泵411可用來將電漿處理室402的環境空氣抽空,以達成維持電漿440所需要之壓力。泵411亦可組態成將電漿處理室402的汙染物抽空。
於一或更多實施例中,使來自氣體分佈系統422至位在下層室中的關閉閥423之適當的一組氣體流入室402內。與常見組態之電漿處理室不同,噴灑頭/接地電極409可包括不同組或區域之獨立控制的噴嘴(如以最佳化基底之均勻性)。噴灑頭/接地電極409可連接至氣體流動控制組件425,其可位於上層室482附近並且其耦合至關閉閥423。
於一或更多實施例中,多區域噴灑頭/接地電極的區域包含中央組的噴嘴以及邊緣組的噴嘴,中央組的噴嘴主要引進第一組電漿氣體(程序氣體)至電漿中央以蝕刻基底444的第一區域(中央區域),而邊緣組噴嘴主要注入第二組電漿氣體(程序氣體)至電漿的其餘部份以蝕刻基底444的第二區域(邊緣區域)。有利地,可控制第一組電漿氣體的流速以及第二組電漿氣體的流速,使基底444可以均勻的方式蝕刻。流速可有所不同。於一或更多實施例中,第一組電漿氣體的流速高於第二組電漿氣體的流速。
於一或更多實施例中,氣體流動控制組件425,包含一或更多不銹鋼管、閥、旁通管、節流器,以在噴灑頭/接地電極409提供需要的氣體流動調整。之後可將這些電漿氣體離子化以形成電漿440,以處理(如蝕刻或沉積)位於靜電夾頭416上具有邊環415之諸如半導體基底或玻璃板之基底444之暴露的區域。
第一組電漿氣體以及第二組電漿氣體之一或更多可包含氧及惰性氣體的一或更多。以有利的方式,加熱頂部電極(噴灑頭/接地電極409)可刺激電漿氣體,增加氧離子與惰性氣體分子的相撞次數,可能降低光阻的蝕刻率。替代或額外地,參照第4圖,加熱噴灑頭/接地電極409可降低附著至基底444、噴灑頭/接地電極409、頂件452、底件450、以及靜電夾頭416的一或更多之污染量。因此,可由泵411自電漿處理系統402抽離之大量的污染。
茲參照第5圖,其顯示根據本發明的一或更多實施例之第4圖的溫度控制系統453之簡化剖面圖。於導熱體506中形成冷卻通道502以容置冷卻管504。冷卻管504為單一近行的通道,其具有回繞本身之路徑,以平均導熱體506上的熱負載。依照此方式,可降低導熱體506之翹曲。冷卻管504可運送選擇用來自上層室有效導離熱能之流體媒介。根據本發明可使用任何數量的冷卻管。冷卻管504可以此技藝中已知的多種方式的任一附接至導熱體506。於某些實施例中,當需要更有效率的冷卻時,可以例如聚合樹脂的導熱材料將冷卻管504固定至冷卻通道502。
茲參照第6圖,其顯示根據本發明的一或更多實施例之第5圖的溫度控制系統453之部分放大的剖面圖。於本發明的一或更多實施例中,導熱材料644包含一或更多熱介面層。導熱材料644可用來改善表面間之金屬對金屬之接觸-於此範例中,上層室側壁612以及散逸條648。於一或更多實施例中,導熱材料644可包含熱墊。於一或更多實施例中,導熱材料644可包含熱油脂。散逸條648可包含一或更多熱介面層。通常,散逸條648用來均勻分散熱負載於導熱體506的整個表面上。散逸條648之熱負載的散逸與由導熱材料644之熱負載的傳導不同,其中散逸相對於介面層的表面實質上為徑向,而傳導相對於介面層的表面實質上為垂直。可從選自此技藝中熟知的數種適當散熱材料的任一之材料來形成散逸條648。於一或更多實施例中,導熱材料644由6000系列的鋁製成。
加熱器層650亦可包含一或更多熱介面層。於一實施例中,加熱器層650可為KAPTON蝕刻箔加熱器。依照程序需求參數選擇加熱器的能力。熱阻障層652亦可包含一或更多熱介面層。一最終層(未圖示)可接合至導熱體506之外表面。此最終層,於一些實施例中,為制熱器(thermal arrestor)。制熱器可將環境溫度改變與熱控制裝置隔離,促成裝置之較佳的程序控制。可使用此技藝中熟知的任何導熱黏接劑將所述的每一層互相接合。於某些實施例中,可使用諸如來自丘美利克斯(Chomerics)(www.chomerics.com,此為派克海尼芬(Parker Hannifin)公司的一個分部)之THERMATTACH® T412的雙面熱膠帶。熟悉該項技藝者可理解所示的層並非以實際實施例的尺寸描繪。確切地,這些層僅為例示性。材料選擇以及設計限制會指定層的大小。
茲參照第7圖,其顯示根據本發明的一或更多實施例之溫度控制系統453的例示性上視圖。於本發明的一或更多實施例中,控制系統453之特徵在於其環形組態。安裝塊732可附接至熱導體506之各端。安裝塊732可有多種功能。首先,安裝塊732可作為夾固系統728之附接點,以固定溫度控制系統453至電漿處理裝置之上層室。可以此技藝中任何已知的方式完成夾固。
於一或更多實施例中,安裝塊732可作為冷卻管504(顯示於第5圖中)之入口720與出口724之一或更多的附接點。至少一入口720以及一出口724可安裝於安裝塊732之任一者上。可使用此技藝中熟知的任何數量之適當的接頭做為冷卻管的附接點。可設置把手716以協助溫度控制系統453的把持。把手716可與溫度控制系統453熱隔離以降低或避免系統中之熱雜訊。如有需要可增加額外的把手,這並不背離本發明。溫度感應裝置顯示於704。溫度感應裝置704在溫度超過的情況時可用來與電漿控制系統連結。於一實施例中,電阻溫度偵測器(RTD)可用來感應溫度。加熱器附接點708可與熱導體506連接。加熱器附接點708可釋放加熱器層之壓力,並便於取得嵌入在溫度控制裝置453中的加熱器。理想上,加熱器附接點708與溫度控制系統453熱隔離以不將熱雜訊引入系統中。
加熱頂部電極之優點包含增加氧離子以及惰性氣體分子間之碰撞次數,以潛在降低光阻蝕刻率。
茲參照第8圖,其顯示根據本發明的一或更多實施例之電漿處理系統中之多區域噴灑頭/接地電極的氣體流動控制組件425(如第4圖中所示)之簡化圖。以有利的方式,電漿氣體的流動可在基底的中央與邊緣間調整。通常,適當組的氣體自氣體分佈系統422經由氣體流動控制組件425至位於頂件452中的噴灑頭/接地電極409而流入電漿處理室(未圖示)中。噴灑頭/接地電極409可包含一組獨立控制的噴嘴,第一組於中央區域中以及第二組於周圍或邊緣區域。可接著離子化這些電漿處理氣體以形成電漿(未圖示),以處理基底的暴露區域(未圖示)。
氣體分佈系統422可於接合點A耦合至位於下層室中的主關閉閥802,其則於接合點B經由導管808a耦合至下層至上層室介面807。下層至上層室介面807使頂件450(位在上層室中)可自底件452(位在下層室中)安全地移除,以供清理及維修而不會損壞氣體流動控制組件425及氣體分佈系統422。
下層至上層室介面807可耦合至接合點C,該點分岔成導管816、於接合點F耦合至邊緣控制閥806(第二控制閥806)之旁通管810、以及於接合點D耦合至中央控制閥804(第一控制閥804)之旁通管812。導管816進一步於接合點耦合至限流管880以及限流管822。
若邊緣控制閥806以及中央控制閥804皆關閉,可實質上限制流至噴灑頭/接地電極409的兩區域之電漿氣體。打該其中一閥傾向於增加電漿氣體流至對應區域,而兩閥皆打開則傾向於實質上相等化在兩區域間之電漿氣體流動。
邊緣控制閥806可於接合點G耦合至可變流管818,其則可於接合點J耦合至先前所述的限流管880。同樣地,中央控制閥804可於接合點E耦合至可變流管814,其則可於接合點H耦合至先前所述的限流管822。
邊緣管884可於接合點K耦合至噴灑頭/接地電極409,而中央管886可於接合點L耦合至噴灑頭/接地電極409,其饋送氣體至電漿處理室(未圖示)內。
氣體流動控制組件之優點包含將O2
非對稱地分佈於基底表面上,以確保實質上均勻的蝕刻率。
可從上述認知到,本發明的實施例可改善處理基底時的均勻性,藉此有利地增加產率。此外,本發明的實施例可降低基底與電漿處理室之清理需求及頻率,藉此增加產量並降低成本。此外,於一或更多實施例中,可於相同的電漿處理室內執行更多處理步驟,如PREB及阻障層之移除,而無須運送基底至不同的電漿處理室。因此,可降低基底之運送頻率。故,基底污染的可能性大幅降低,並可大幅簡化處理。有利地,可進一步增加產率、可進一步增加產量,以及進一步降低成本。
雖藉由數個較佳實施例描述本發明,仍有落入本發明之修改、變更、及等效者。例如,雖然本發明藉由來自蘭姆研究公司(如EXELANTM
、EXELANTM
、HP EXELANTM
HPT、2300 VERSYSTM
STAR等等)之電漿處理系統來描述本發明,可利用其他的電漿處理系統。本發明可與具有各種尺寸(如200 mm、300mm等等)的基底一起使用。並且,可使用包含氧以外之氣體的光阻電漿蝕刻劑。亦應注意到有許多實施本發明之方法的替代方式。此外,本發明之實施例可用於其他應用中。例如,雖以蝕刻程序做為範例來討論,本發明之實施例可應用於沉積程序中。在此為了方便而提供發明摘要,但由於字數之限制,僅為了便於閱讀而撰寫,並且不應用來限制申請專利範圍的範疇。因此所附之申請專利範圍應解釋為包含落入本發明之真實精伸與範疇內的所有此種修改、變更、及等效者。
102...電漿處理室
109...噴灑頭/接地電極
110...電漿
111...泵
114...基底
115...邊環
116...靜電夾頭
122...氣體分佈系統
123...關閉閥
134...第一RF產生器
136...匹配網路
138...第二RF產生器
150...底件
152...頂件
202...電漿處理蝕刻室
204...光阻沉積室
206...電漿處理蝕刻室
208...電漿蝕刻室
210...金屬層
212...金屬阻障層
214...中間電介質(IMD)層
216...覆蓋層
218...溝槽遮罩層
220...阻障層
222...BARC層
224...光阻層
226...通孔
228...光阻
302...電漿處理蝕刻室
304...光阻沉積室
308...改良的電漿處理室
310...金屬層
312...金屬阻障層
314...中間電介質(IMD)層
316...覆蓋層
318...溝槽遮罩層
320...阻障層
322...BARC層
324...光阻層
326...通孔
328...光阻
402...電漿處理室
409...噴灑頭/接地電極
411...泵
415...邊環
416...靜電夾頭
422...氣體分佈系統
423...關閉閥
425...氣體流動控制組件
434...第一RF產生器
436...匹配網路
438...第二RF產生器
440...電漿
444...基底
450...底件
452...頂件
453...溫度控制系統
482...上層室
502...冷卻通道
504...冷卻管
506...導熱體
612...上層室側壁
644...導熱材料
648...散逸條
650...加熱器層
652...熱阻障層
704...溫度感應裝置
708...加熱器附接點
716...把手
720...入口
724...出口
732...安裝塊
802...主關閉閥
804...中央控制閥(第一控制閥)
806...邊緣控制閥(第二控制閥)
807...下層至上層室介面
808a...導管
810...旁通管
812...旁通管
816...導管
814、818...可變流管
822、880...限流管
884...邊緣管
886...中央管
例示性而非限制性地以附圖中的圖示描述本發明,圖中類似的元件符號表示類似的元件,以及圖中:第1圖顯示電容性耦合之電漿處理系統之簡化圖。
第2圖描繪一組部分簡化之先前技術雙金屬鑲嵌程序步驟,其中顯示層堆疊之理想的剖面圖。
第3圖描繪根據本發明的一或更多實施例之一組部分簡化之雙金屬鑲嵌程序步驟,其中在改良的電漿處理室內結合PREB處理步驟以及金屬阻障層蝕刻處理步驟。
第4圖顯示根據本發明的一或更多實施例之具有頂部電極溫度控制系統與差動電漿氣體注入之改良的電容性耦合之電漿處理系統之簡化圖。
第5圖顯示根據本發明的一或更多實施例之第4圖的溫度控制系統之簡化剖面圖。
第6圖顯示根據本發明的一或更多實施例之第5圖的溫度控制系統之部分放大的剖面圖。
第7圖顯示根據本發明的一或更多實施例之溫度控制系統的例示性上視圖。
第8圖顯示根據本發明的一或更多實施例之電漿處理系統中多區域噴灑頭/接地電極的氣體流動控制組件之簡化圖。
402...電漿處理室
409...噴灑頭/接地電極
411...泵
416...靜電夾頭
422...氣體分佈系統
423...關閉閥
425...氣體流動控制組件
434...第一RF產生器
436...匹配網路
438...第二RF產生器
440...電漿
444...基底
450...底件
452...頂件
453...溫度控制系統
482...上層室
Claims (9)
- 一種在電漿處理室中處理基底之方法,該電漿處理室具有上電極以及圍繞該上電極之溫度控制系統,該基底包含阻障層以及已沉積之光阻,該方法包含:a)供應及離子化第一組氣體,以當該上電極加熱時,在該電漿處理室中的該基底之第一部份部份地蝕刻該已沉積之光阻;b)供應及離子化第二組氣體,以當該上電極加熱時,在該電漿處理室中的該基底之第二部份部份地蝕刻該已沉積之光阻,其中該第一組氣體及該第二組氣體具有相同的成分,且其中該第一組氣體的流速與該第二組氣體的流速不同;以及c)在用以於該等步驟a)及b)中蝕刻該已沉積之光阻的該同一電漿處理室中移除該阻障層。
- 如申請專利範圍第1項之方法,其中該基底的該第一部分代表該基底的中央區域,且該基底的該第二部分代表該基底的邊緣區域。
- 如申請專利範圍第1項之方法,其中該第一組氣體以及該第二組氣體為同時供應至該電漿處理室中。
- 如申請專利範圍第1項之方法,其中該第一組氣體經由第一組噴嘴供應,該第二組氣體經由第二組噴嘴供應,以及該第一組噴嘴以及該第二組噴嘴的至少一者代表該電漿處理系統的電極之一部分。
- 如申請專利範圍第1項之方法,進一步包含:在該 等步驟a)及b)之後且在該步驟c)中移除該阻障層之前,執行無晶圓自動清理程序。
- 如申請專利範圍第1項之方法,其中該已沉積之光阻為沉積於該基底的通孔特徵以及溝槽特徵的至少一者中。
- 如申請專利範圍第1項之方法,進一步包含加熱該電漿處理室的至少一部份,以降低附著至該電漿處理室的污染量。
- 如申請專利範圍第1項之方法,其中該電極組態成供應該第一組氣體以及該第二組氣體之至少一者。
- 如申請專利範圍第1項之方法,進一步包含供應惰性氣體,以與從該第一組氣體以及該第二組氣體的至少一者所產生的電漿碰撞,藉此降低該處理之處理速率。
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Also Published As
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CN101031181A (zh) | 2007-09-05 |
US7662723B2 (en) | 2010-02-16 |
US20100108262A1 (en) | 2010-05-06 |
CN101031181B (zh) | 2011-07-06 |
KR101385346B1 (ko) | 2014-04-14 |
US20070175861A1 (en) | 2007-08-02 |
TW200739697A (en) | 2007-10-16 |
KR20070062943A (ko) | 2007-06-18 |
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