TWI427596B - Display apparatus - Google Patents

Description

Display device

The present invention relates to a display device, and more particularly to an Organic Light-Emitting Diode (OLED) display device.

In recent years, organic light-emitting diodes (OLEDs) have many advantages such as high brightness, full color, wide viewing angle, self-luminous, high response speed, flexibility, easy process and low cost, compared with liquid crystal display technology. Meet the characteristics of flat display devices.

1 is a schematic diagram of a pixel circuit of a conventional organic light emitting diode display device. Referring to FIG. 1 , the pixel circuit 10 is connected to the scanning line S and the data line D which are staggered in a matrix, and has an n-type thin film transistor 11 , a p-type thin film transistor 12 , a capacitor 13 and an organic Light-emitting diode 14. The gate of the n-type thin film transistor 11 is connected to the scanning line S, the drain is connected to the data line D, and the source is connected to the p-type thin film transistor 12 and the capacitor 13. Therefore, in a frame time, when the scan line S outputs a scan signal to turn on the n-type thin film transistor 11, the image data is input from the data line D through the n-type thin film transistor 11 to the capacitor 13, and at this time, The p-type thin film transistor 12 is turned off. Next, the n-type thin film transistor 11 is turned off, and the p-type thin film transistor 12 is turned on according to the image data stored in the capacitor 13 so that the current input from the power source Vdd drives the organic light emitting diode 14 to illuminate.

The memory 15 stores image data that should be written to the pixel circuit 10, and the gate driver 16 controls the pixel circuit 10 to receive image data from the source driver 17, so that the source driver 17 writes the image data stored in the memory 15. Into the pixel circuit 10.

In terms of QVGA resolution, a total of 320 columns of pixels are connected to the data line D. The analog voltage corresponding to the image data is sequentially transmitted to each pixel by the data line D. Before the next frame time, each pixel must maintain the brightness corresponding to the analog voltage level of the input. Since the luminance of each pixel is a function of the gate voltage of the p-type thin film transistor 12, the gate voltage of the p-type thin film transistor 12 must be maintained constant by the capacitor 13 at a frame time (about 16.6 microseconds).

However, neither the n-type thin film transistor 11 nor the p-type thin film transistor 12 has a problem of leakage current, and thus the electric energy stored in the capacitor 13 is consumed, and the voltage level of the image data is changed. . After a period of time (for example, longer than one frame time), the gate voltage of the p-type thin film transistor 12 cannot be maintained. As such, it is also possible that the p-type thin film transistor 12 cannot be turned on or off according to the correct image data in one frame time unless the new image data is supplied, but this also increases the power consumption of the organic light emitting diode display device.

In view of the above problems, an object of the present invention is to provide a display device with low power consumption.

To achieve the above object, a display device according to the present invention includes a plurality of pixels, each pixel having a light emitting unit, a memory circuit, and a driving circuit. The memory circuit stores an image data, and the driving circuit is coupled to the light emitting unit and the memory circuit, and drives the light emitting unit according to the image data.

As described above, in the display device of the present invention, each pixel can have a memory circuit for storing image data in a frame time. Therefore, the image data in the memory circuit can be maintained without continuously receiving the characteristics of the image data from the data line. In this way, the source driver does not need to continuously store the pixel data and write it to the corresponding pixel, so that no additional power is needed to the source driver in this case, thereby reducing power consumption. This type of drive is especially useful for slightly darker displays.

Furthermore, the display device of the present invention may further include a mode switching circuit for switching between the normal mode or the pixel internal memory mode. Therefore, the display device may utilize the above-described low power consumption driving or utilize a conventional driving method, thereby further The scope of application of the invention is increased.

Hereinafter, a display device according to a preferred embodiment of the present invention will be described with reference to the related drawings.

2 is a block diagram of a circuit of a display device in accordance with an embodiment of the present invention. Referring to FIG. 2, a display device 2 includes a plurality of pixels 20, and each pixel 20 has a light emitting unit 21, a memory circuit 22, and a driving circuit 23.

The memory circuit 22 stores an image data 221. The driving circuit 23 is coupled to the light emitting unit 21 and the memory circuit 22 and drives the light emitting unit 21 according to the image data 221 .

The pixels 20 are arranged in a matrix. For example, the three pixels 20 can collectively constitute a pixel unit. However, the pixels 20 may also be arranged in a polygonal shape or other shapes, and the number of pixels required to form the pixel unit may also be different. The arrangement of the pixels 20 is, for example, a stripe arrangement or a mosaic arrangement.

The light emitting unit 21 is, for example, an organic light emitting diode, and the display device 2 is an organic light emitting diode display device in this example. The organic light emitting diode may be, for example, a red organic light emitting diode, a green organic light emitting diode, a blue organic light emitting diode, a yellow organic light emitting diode, or a white light organic light emitting diode. limit. That is, the display device has an organic electroluminescence element.

The memory circuit 22 can be implemented by a static random access memory (SRAM-like) of FIG. 3A or FIG. 3B, whereby the logic state of the memory circuit 22 is similar to that of the static random access memory ( SRAM). As shown in FIG. 3A, for example, the memory circuit 22 has a transistor 222 and an impedance 223. When the switch circuit 24 is turned off, the transistor 222 and the impedance 223 can latch the logic state of the memory circuit 22. . As shown in FIG. 3B, the memory circuit 22a has two inverters, whereby the logic state of the memory circuit 22 can be locked when the switch circuit 24 is turned off, and each inverter has two transistors 224, 225. The details of Figures 3A and 3B will be described later.

As shown in FIG. 2 and FIG. 3A, the driving circuit 23 has a transistor 231 which may be a p-type thin film transistor or an n-type thin film transistor.

In this embodiment, each of the pixels 20 further includes a switch circuit 24 coupled to the memory circuit 22. The switch circuit 24 is coupled to one of the scan lines S and one of the data lines D, respectively.

The display device 2 further includes a plurality of scan lines S and data lines D respectively coupled to the pixels 20. A gate driver 41 is used to control the timing of writing data to the pixels 20 through the scan line S. A source driver 42 is used to write the image data 221 to the pixels 20 through the data line D.

The switch circuit 24 controls the memory circuit 22 to be periodically written into the image data. For example, when the switch circuit 24 is turned on according to the control of the gate driver 41, the source driver 42 writes the image data 221 through the data line D to Memory circuit 22.

Hereinafter, please refer to FIG. 3A to explain the operation of the pixel of the embodiment. FIG. 3A is a schematic diagram of the circuit of each pixel 20 of the display device 2 of the embodiment. The light emitting unit 21 may be an organic light emitting diode, and the display device 2 is an organic light emitting diode display device. It should be noted that in FIG. 3A, for the sake of clarity, only the driver circuit of one pixel is shown, but it is not intended to limit the present invention. Moreover, by way of example and not limitation, the memory circuit includes a transistor 222 (eg, an n-type thin film transistor) and an impedance 223.

Therefore, in a frame time, when a scan signal S1 on the scan line S turns on the transistor 241 of the switch circuit 24, the image data 221 is input from the data line D through the transistor 241 of the switch circuit 24 to the memory circuit. The image data 221 stored in the memory circuit 22 controls the degree of opening of the transistor 231 of the driving circuit 23, thereby controlling the current input from the power source Vdd to the light emitting unit 21, thereby controlling the degree of light emission of the light emitting unit 21. .

Since the conventional organic light-emitting diode display device of FIG. 1 must have an external memory 15 for storing the data of each pixel, the source driver 17 must periodically output the data to the pixels through the data line. In contrast, since each pixel 20 of the display device of the present embodiment has the memory circuit 22, the memory circuit 22 only needs to be refreshed without continuously receiving the image data 221 from the data line D. In other words, the image data in the memory circuit 22 can be maintained by the mechanism that can be updated by the memory circuit 22. In this way, the source driver does not need to continuously store the pixel data and write it to the corresponding pixel, so that no additional power is needed to the source driver in this case, thereby reducing power consumption.

It should be noted that the memory circuit 22 can also have different design manners. For example, as shown in FIG. 3B, the memory circuit 22a is composed of two inverters, each of which includes a p-type thin film transistor. 224 and an n-type thin film transistor 225, which are not limiting. Specifically, the inverter has a certain driving capability, so that the driving circuit 23 can be integrated into the inverter of the memory circuit 22a.

4A is a schematic diagram showing a power consumption representative curve of a conventional organic light-emitting diode display device having no memory, and FIG. 4B is a schematic diagram showing a power consumption representative curve of the display device 2 having a memory circuit in FIG. 3A according to the present embodiment. In FIGS. 4A and 4B, the X axis represents the number of scanning lines of the display device, and the Y axis represents power consumption, wherein the solid line represents the total power consumption of the light emitting unit, and the broken line represents the power consumption of the driving integrated circuit (IC).

As shown in FIG. 4A, the conventional source driver must continuously write data to pixels. When the display device has more scan lines, the power consumption of the source driver must be transmitted by the source driver to different scans. The pixels on the line are increased, and when the display device only displays a part of the image or the display device becomes dark, the source driver cannot be stopped, and it still frequently accesses the memory, and therefore, the source driver The power accounts for the total power consumption of most of the display device 2.

Compared with FIG. 4A, as shown in FIG. 4B, since the pixel 20 has the memory circuit 22 for storing image data, the image of the image is maintained. Therefore, the source driver 42 does not need to continuously provide image data to the pixels 20, and the source driver 42 can stop providing the image data to the pixels 20, so that the power consumption of the display device 2 does not increase when the number of scanning lines of the display device 2 increases.

As can be seen from FIG. 4A and FIG. 4B, in the display device 2 of the present embodiment, the power consumption of the driving integrated circuit does not increase as the size of the display device 2 increases, and the power consumption of the entire display device is also lower than conventionally. .

In the present embodiment, the memory circuit 22 is configured to store image data such that it is not necessary to provide additional power to the source driver to store image data for the pixels 20. Therefore, the power consumption of the display device 2 can be further reduced.

However, the memory circuits 22, 22a of FIG. 3A or FIG. 3B can only memorize one bit of data. Therefore, in order to increase the capacity of the stored data, each pixel 20a of FIG. 5 has a complex memory circuit 226. ~229, the driving circuit 23a has a plurality of transistors 231, the switching circuit 24a has a plurality of transistors 241, and the transistors 231 and 241 are coupled to the corresponding memory circuits 226-229, respectively. Thereby, the organic light-emitting diodes 21 of the respective pixels 20a can be made to have different gray-scale changes.

For example, memory circuits 226-229 can represent different bits to rightmost bits, respectively. Each of the transistors 231 can be designed to have different driving capabilities, and the transistor 231 corresponding to the leftmost bit has a strong driving capability. Among them, the driving ability of the transistor 231 is related to the equivalent group resistance of the transistor 231.

Please refer to FIG. 6, which is a block diagram of a circuit of a display device 3 according to another embodiment of the present invention. The display device 3 includes a plurality of scanning lines S, a data line D, a mode control line C, a power line (not shown), and a plurality of pixels 30. Each pixel 30 has a light emitting unit 31, a memory circuit 32, and a driving circuit. 33 and a mode switching circuit 35.

The memory circuit 32 stores an image data 321 , and the driving circuit 33 is coupled to the organic light emitting diode 31 and the memory circuit 32 , and drives the light emitting unit 31 according to the image data 321 .

The arrangement and variation of the pixels 30 are similar to those of the pixel 20 of the previous embodiment. The type and variation of the light-emitting unit 31 are similar to those of the light-emitting unit 21 of the foregoing embodiment, and thus will not be described again.

The data lines D are vertically arranged alternately with the scanning lines S, and are respectively coupled to the pixels 30, and the mode control lines C are disposed in parallel with the scanning lines S.

In the present embodiment, the memory circuit 32 may be a volatile or non-volatile memory circuit as described in the foregoing embodiments. In addition, the memory circuit 32 is a discrete component that stores values in the form of digits. In addition, the memory circuit 32 can also be a capacitor that can store data in a digital manner, and the capacitor can present its recorded data in a digital mode or an analog mode.

The mode switching circuit 35 is coupled to the memory circuit 32, which is controlled by the mode control line C, thereby enabling the pixel 30 to operate in a Memory-In-Pixel Mode (MIP Mode). The mode switching circuit 35 is coupled to the memory circuit 32 and the driving circuit 33 to control the memory circuit 32 to present the stored data in a digital mode or an analog mode. The driving circuit 33 drives the light emitting unit 31 according to the image data 321 of the memory circuit 32.

Hereinafter, please refer to FIG. 7 to FIG. 11 to explain the operation of the pixel 30 of the present embodiment. FIG. 7 is a schematic diagram of the circuit of each pixel of the display device 3 in FIG. 6 according to the embodiment. It should be noted that in FIG. 7, for the sake of clarity, only a pixel of one pixel is shown, but it is not intended to limit the present invention. Moreover, in the present embodiment, the memory circuit 32 has a capacitor 322 as an example, and the mode switching circuit 35 has an enable switch 351 and a feedback switch 352 as an example, but it is not intended to limit the present invention.

As shown in FIG. 7, the enable switch 351 is coupled to the drive circuit 33 and the memory circuit 32 to control the drive circuit 33 to drive the light-emitting unit 31 in the normal mode or the pixel internal memory mode according to the image data of the memory circuit 32. The feedback switch 352 is coupled to the enable switch 351 and the light emitting unit 31. The light emitting unit 31 has a cathode and an anode, and the cathode of the light emitting unit 31 is coupled to the gate of the feedback switch 352 and the drain of the transistor 331 of the drive circuit 33. The anode of the light emitting unit 31 is coupled to a power source line (power source Vss).

The transistor 331 of the driving circuit 33 is a p-type thin film transistor, and the source of the transistor 331 is connected to a power supply line (power supply Vdd), wherein the power supply line extends along a corresponding column of the pixel 30, and the gate and memory of the transistor 331 One end of the capacitor 322 of the bulk circuit 32, the drain of the transistor 341 of the switch circuit 34, and the drain of the enable switch 351 are connected. In this example, the capacitor 322 is poled and the drain of the enable switch 351 is connected. In this example, the other end of the capacitor 322 is connected to a power supply line (power supply Vdd).

The transistor 341 is an n-type thin film transistor, the source of the transistor 341 is coupled to a corresponding data line D, and the gate of the transistor 341 is coupled to the scan line S. The scan line S extends along a row corresponding to the pixel 30.

The enable switch 351 is an n-type thin film transistor, and the gate of the enable switch 351 is coupled to the mode control line C, wherein the mode control line C extends along a corresponding column of the pixels 30. The drain of the enable switch 351 is coupled to the drain of the feedback switch 352.

The feedback switch 352 is an n-type thin film transistor, and the source of the feedback switch 352 is coupled to a biasing wire L, wherein the biasing wire L extends along a corresponding row of the pixels 30. For example, the biasing wire is a low potential wire.

If the enable switch 351 is turned off, the image data 321 stored in the capacitor 322 is interpreted in an analogy manner, and the voltage level of the image data 321 controls the current flowing through the transistor 331; if the enable switch 351 is turned on, the image data stored in the capacitor 322 is 321 It will be interpreted in digital mode. This is the pixel internal memory mode. This mode of operation can be used as a low power mode.

As shown in FIG. 8, in the normal mode, the memory circuit 32 is periodically written to the image data 321, the memory circuit 32 presents the stored data in an analog mode, and the drive circuit 33 drives the light emitting unit 31 in accordance with the image data 321 .

When the enable switch 351 is turned off, the pixel 30 operates in the normal mode. The switch circuit 34 controls the memory circuit 32 to be periodically written to the image data 321 . During a frame time, the scan line S outputs a scan signal S1 to turn on the transistor 341, and the image data 321 is input from the data line D to the capacitor 322 via the transistor 341. After the pixel 30 has been scanned by the scanning line S, the transistor 341 is turned off, the voltage level of the capacitor 322 controls the current flowing through the transistor 331, and the current flowing through the transistor 331 drives the light-emitting unit 31 to emit light, thereby The luminance of the light emitted from the light emitting unit 31 reaches a desired target.

Referring to FIG. 9 and FIG. 10, when the enable switch 351 is turned on, the pixel 30 operates in the pixel internal memory mode. In this mode, there is no scan signal on scan line S such that transistor 341 is off.

In the pixel internal memory mode, the image data 321 stored in the memory circuit 32 is held by the unbalanced leakage current. For example, an unbalanced leakage current occurs because the leakage current of the switching circuit 34 is greater than the leakage current of the mode switching circuit 35. The unbalanced leakage current is as shown in FIG. 10. Since the leakage current of the transistor 341 and the feedback switch 352 depends on their gate voltage, the transistor 341 and the transistor that activates the switch 351 and the feedback switch 352 are controlled. The gate voltage can effectively control the leakage current of the transistors, so the leakage current through the transistor 341 can be larger than the leakage current through the transistor of the enable switch 351 and the feedback switch 352, so that the memory circuit 32 leaks. The current is compensated and the stored data is maintained.

The memory circuit 32 stores image data held by the unbalanced leakage current, and presents the stored data in a digital mode, and the drive circuit 33 drives the light-emitting unit 31 in accordance with the image data.

If the node N is at a high level, the driving circuit 33 is turned off and the light emitting unit 31 does not emit light. Therefore, the transistor of the feedback switch 352 is turned off and the feedback path is not activated, and the leakage current through the switching circuit 34 is greater than that via the enable switch 351 and The leakage current of the transistor of the switch 352 is returned to hold the image data. In this example, the node N will remain at a high level, thereby ensuring that the drive circuit 33 is in the off state, so that the light emitting unit 31 still does not emit light.

In order to ensure that the charge stored in the capacitor 322 does not escape through the transistor, the data line D can be maintained at a high voltage level. Since the leakage current through the transistor 341 is higher than the leakage current of the transistor that activates the switch 351 and the feedback switch 352, the voltage of the node N may become a high level or be maintained at a high level. This ensures that when the node N is at a high voltage level, the feedback path is not turned on so that the voltage can still be maintained.

Further, as shown in FIG. 11, in the pixel internal memory mode, when the node N is at the low level, the driving transistor 331 is turned on, so that the current through the driving circuit 33 drives the light emitting unit 31. When the light emitting unit 31 emits light, the feedback switch 352 is turned on, and the memory circuit 32 is connected to the bias wire L through the enable switch 351 and the feedback switch 352. The bias wire L may be an additional wire (as shown in FIGS. 7 to 9) or a wire connected to the light emitting unit 31. In another embodiment, the biasing wire L can be integrated with the power line Vss. In this example, the gate voltage of the transistor of the feedback switch 352 is about the forward voltage drop of the light-emitting unit 31, so that the transistor of the feedback switch 352 is turned on, thereby starting the feedback path, so that the node N is still in the low position. The light-emitting unit maintains illumination.

In other words, the pixel 30 has two display modes: a first mode and a second mode.

The first mode is a general mode in which the analog data is written to the capacitor 322 of the pixel 30 as before, and the driving transistor 331 controls the current flowing through the light emitting unit 31 in accordance with the analog voltage level stored in the capacitor 322.

The second mode is a pixel internal memory mode in which the pixel memory circuit 32 is isolated from the scan line, and the data of the memory circuit 32 is not changed or rewritten. In the second mode, the gate driver does not output a scan signal to the pixel 30. This type of drive is especially useful for slightly darker displays.

In this mode, the light-emitting unit 31 can exhibit a gray-scale varying brightness. In addition, the feedback switch 352 is inactive regardless of whether or not the light emitting unit 31 emits light.

In summary, in the display device of the present invention, each pixel may have a memory circuit for storing image data in a frame time. Therefore, the image data in the memory circuit can be maintained without continuously receiving the characteristics of the image data from the data line. In this way, the source driver does not need to continuously store the pixel data and write it to the corresponding pixel, so that no additional power is needed to the source driver in this case, thereby reducing power consumption. This type of drive is especially useful for slightly darker displays.

The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.

10. . . Pixel circuit

11. . . N-type thin film transistor

12. . . P-type thin film transistor

13. . . Capacitor

14. . . Organic light-emitting diode

15. . . Memory

16. . . Gate driver

17. . . Source driver

2, 3. . . Display device

20, 20a, 30. . . Pixel

21, 31. . . Light unit

22, 22a, 226~229, 32. . . Memory circuit

221, 321. . . video material

222, 224, 225. . . Transistor

223. . . impedance

23, 23a, 33. . . Drive circuit

231, 331. . . Transistor

24, 24a, 34. . . Switch circuit

241, 341. . . Transistor

322. . . Capacitor

35. . . Mode switching circuit

351. . . Enable switch

352. . . Feedback switch

41. . . Gate driver

42. . . Source driver

C. . . Mode control line

D. . . Data line

L. . . Bias wire

N. . . node

P. . . Pixel

S. . . Scanning line

S1. . . Scanning signal

Vdd, Vss. . . power supply

1 is a schematic diagram of a pixel circuit of a conventional organic light emitting diode display device;

2 is a block diagram of a circuit of a display device according to an embodiment of the present invention;

3A and 3B are schematic diagrams showing circuits of respective pixels of a display device according to an embodiment of the present invention;

4A is a schematic diagram showing a power consumption representative curve of a conventional display device without a memory circuit;

4B is a schematic diagram showing a power consumption representative curve of a display device having a memory circuit according to the embodiment;

FIG. 5 is a schematic diagram of a circuit of each pixel of a display device according to an embodiment of the invention; FIG.

6 is a block diagram of a circuit of a display device according to another embodiment of the present invention;

7 is a schematic diagram of a circuit of each pixel of the display device of FIG. 6;

8 to 11 are schematic views of the circuit of Fig. 7 in operation.

2. . . Display device

20. . . Pixel

twenty one. . . Light unit

twenty two. . . Memory circuit

221. . . video material

twenty three. . . Drive circuit

twenty four. . . Switch circuit

41. . . Gate driver

42. . . Source driver

D. . . Data line

S. . . Scanning line

Claims (6)

A display device includes: a plurality of scan lines; a plurality of data lines; and a plurality of pixels coupled to the scan lines and the data lines, each pixel having: an illumination unit; and a memory circuit for storing an image data a driving circuit coupled to the light emitting unit and the memory circuit, and driving the light emitting unit according to the image data; a mode switching circuit coupled to the memory circuit and a mode control line to control the driving circuit The image data stored in the memory circuit drives the light emitting unit in a normal mode or a pixel internal memory mode; and a switch circuit coupled to the memory circuit, one of the scan lines, and One of the data lines, wherein the leakage current of the switching circuit is greater than the leakage current of the mode switching circuit, so that the image data stored in the memory circuit is maintained by the unbalanced leakage current. The display device of claim 1, wherein the light emitting unit is an organic light emitting diode. The display device of claim 1, wherein the memory circuit is a static random access memory or a capacitor capable of storing data in a digital manner. The display device of claim 1, wherein the mode switching circuit comprises: an enable switch coupled to the drive circuit and the memory circuit, and the drive circuit is controlled to be stored in the memory circuit The image data drives the light emitting unit in the normal mode or the pixel internal memory mode; and a feedback switch coupled to the enable switch and the light emitting unit, and when the light emitting unit emits light, the feedback is turned on The relationship is turned on to connect the enable switch and a biasing wire. The display device of claim 1, wherein in the normal mode, the scan line outputs a scan signal to enable the switch circuit to be turned on, and the data line writes the image data to the memory circuit. The display device of claim 1, wherein in the pixel internal memory mode, a high voltage level is provided on the data lines, and no scan signal is provided on the scan lines.