TWI407374B - 依據一非對稱之多處理器設備執行診斷操作 - Google Patents
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Description
本發明是有關於資料處理系統。更特別地,本發明是有關於提供診斷機構以運用於非對稱多處理器設備。
像是除錯機構,追蹤機構及側寫(profiling)機構之診斷機構在資料處理系統開發的領域裡日益顯著地重要。隨著資料處理系統變得愈來愈複雜,並且其開發與測試的時間亦愈來愈短,從而更加需要功能強大且易於使用的診斷機構,可用以識別出相關於資料處理系統的問題,並且藉由調整其設計和組態來改善這些資料處理系統的效能。
在資料處理系統裡的另一趨勢為愈來愈多地採行多處理器系統。這些是藉由讓處理程序能夠按平行方式所執行,而通常是藉由一程式或任務之不同執行緒,以利提供更高的效能。此多處理器系統之一形式是稱為一對稱多處理器系統。此對稱系統通常含有複數個等同的處理器核心,其每一擁有一等同的程式與資料記憶體相干觀點,並且作業系統軟體負責將待予執行之任務/執行緒配置予個別的處理器所執行,同時負責在多個處理器之間進行任務/執行緒轉移作業。亦即,一程式指令執行之單一執行緒係在作業系統控制下於複數個處理器之間經時間多工化。在這種對稱系統裡,可利用該作業系統以決定在何處執行個別的任務/執行緒,並且向一程式設計者提供以在一單一處理器上執行單一執行緒的外觀,即使是當該作業系統排程將執行作業自一處理器轉移至另一處理器時亦然。此一方式受限於該等處理器為等同,並且是由該作業系統來進行該轉移作業,亦即並非由該程式本身觸發。
對稱多處理器系統雖可改善處理效能,然該等在某一程度並無效率。即如一範例,若該待予進行之處理要求一些最佳地由一DSP類型核心所執行的作業(即如具有高度的數值密集性及重複性),並且其他任務是較佳地由一普通目的處理器進行(即如流程控制、使用者輸入等等),則一對稱多處理器會是實作此等處理之一相當無效率的方式。此點既經認知,並已知提供非對稱多處理器(AMP)系統。此一系統之範例可為由Texas Instruments公司所設計的OMAP平台。在此等平台裡供置有多個不同處理器,而該等之每一者具有多項令其優於他者而較佳地適合於一些任務的特徵。即如一範例,一非對稱多處理器可含有一DSP核心,及一普通目的微處理器核心。此等非對稱多處理器雖就以該等能夠提供之處理效能而具相對低成本及低耗電量來說擁有強大的優點,然該等會因其異質本性而較難以程式設計及開發。為令良好利用此非對稱多處理器系統,正常情況下是令以由該程式本身,而非在一作業系統的控制下,來進行執行緒之間的任務轉移作業。此外,不同處理器的不同處理架構意味著顯著互異的診斷機構或會適合於該等處理器之每一者。在AMP系統內的同步遠端程序呼叫可被視為是自一處理器至另一者之經程式控制的執行緒轉移,即類比於SMP系統裡之經作業系統控制的執行緒轉移,然此一簡單系統觀點並未獲現有診斷機構所支援,這些機構是根據哪一處理器執行該等作業來分割該系統。其結果為,即使程式設計此等非對稱處理系統的複雜度和困難度意味著診斷機構更為重要,然相關於對稱多處理器系統之相當簡易診斷技術仍無法隨即地運用在非對稱多處理器系統。在一傳統AMP系統裡,在各處理器上運行的程式碼係經分別地處置。各個處理器的程式碼是按如該者為一分別程式般所除錯,而此個別程式可與在其他處理器上的分別程式進行通訊。
自一特點而觀察,本發明提供一種非對稱多處理器設備,其中包含:複數個執行機構,其回應於個別程式指令以執行資料處理作業,一程式指令執行之執行緒係於該等複數個執行機構之間而經時間多工化;複數個附屬診斷單元,其每一關聯於一個別執行機構,藉此依據於此以執行診斷作業;一主要診斷單元,其經耦接於該等複數個附屬診斷單元,並且回應於一給定執行緒在執行機構之間的執行作業轉移以令一相對應變化,其中該附屬診斷單元目前係作用中,藉以進行對於該給定執行緒的診斷作業,使得該主要診斷單元能夠追蹤變化,而其中執行機構正執行該給定執行緒。
本技術提供一種結構,其中在該非對稱多處理器內之個別執行機構係經供置有其本身的附屬診斷單元。這些附屬診斷單元係經耦接於一主要診斷單元,而其負有追蹤執行緒在執行單元間之轉移作業的責任,並藉以提供一給定執行緒的單一執行觀點,即使是當此係在該非對稱多處理器系統中跨於不同的執行機構所劃分時亦然。這可顯著地簡化識別並瞭解肇因於程式設計組態之問題的任務,原因在於可跨於此一異質性環境以追蹤個別的執行緒,即如在一AMP系統內跨於處理器所劃分的程式碼可按如一單一個體以進行除錯。
在含有一非對稱記憶體階層之系統裡,瞭解此一非對稱多處理器系統之操作方面的複雜度及困難度係經協解,並因而強化本發明之優點,使得該等複數個執行機構並不共享一共同記憶體映圖。在具有此一非對稱記憶體階層的系統裡,對於一程式設計者而言,由不同執行機構所使用之不同記憶體映圖的複雜度會使得利用相關於個別執行機構之個別診斷單元更加難以理解,因為相同的資料項目可由不同的執行機構按不同方式所參照。本技術之主要診斷單元能夠追蹤執行緒變化,並能夠代表該程式設計者以負責處理這些記憶體對映的差異,藉此顯著地減輕該程式設計者的任務。
一非對稱多處理器雖可藉由具有一非對稱記憶體階層而為非對稱,然這亦可藉由至少一些在其處理架構上有所差異之執行機構而為非對稱。通常為此一情況,而使得能夠在不同類型之任務處標定不同的處理器,並且本技術適用於協助程式設計者處置此複雜度。
即如前述,本技術能夠處置其中是由該程式本身控制執行機構間之任務轉移作業的系統。一種達此目的之特為有效率方式,這在診斷而言若無本技術則或將難以處置,即為其中一自一執行機構至另一執行機構的同步遠端程序呼叫啟動一執行緒執行轉移作業。在此情況下,該轉移作業顯明地是由該程式所進行,並且可由一副程式貯池中之其一者來執行該等遠端程序呼叫,其可在該受呼方執行機構上執行,並且標定於不同的目的地執行機構。
當該主要診斷單元由一執行機構而自一給定執行緒之執行作業提供一診斷輸出,並且回應於該執行緒之執行機構內的變化以令在該診斷輸出之內一相對應變化,使得該程式設計者能夠認知到出現一執行機構轉移時,可強化本技術的可用性。常見情況係問題是與轉移作業相關聯,並因此此項資訊對程式設計者確有助益。
相關於該等不同執行機構之附屬診斷單元可要求程式設計以對特定的執行作業執行緒進行診斷操作。該主要診斷單元既已在當執行緒被不同執行機構所執行時即對執行緒進行追蹤,且能夠在該相關時間將對於一給定執行緒之診斷命令導引至與該給定執行緒相關聯的附屬診斷單元。
該等診斷單元可採行廣泛各種形式。例如,該等可為中斷點單元、觀察點單元、追蹤單元及/或側寫單元。這些診斷單元可為由純粹硬體、硬體及軟體混合方式或純粹軟體所提供。一些診斷單元為較佳地適於按硬體所實作,像是追蹤單元,其要求特別高的帶寬以利追蹤處理器的即時操作。
將可瞭解該等執行機構可如前述採行廣泛各種不同形式。例如,該等執行機構可包含一或更多的普通目的處理器、一直接記憶體單元、一共同處理器、一VLIW處理器、一數位信號處理器及/或一硬體加速器單元。這些除該普通目的處理器以外之各種執行機構形式可被視為是各種不同形式的特殊目的處理器。
可按各種不同方式類似地構成前述的非對稱記憶體階層。所提供的記憶體可為快取記憶體、私有記憶體、共享記憶體或整體記憶體。這些將按非對稱方式所混同合一,而這對於最終實作和非對稱多處理器設備的使用上具有效率,然這在根據該系統以執行診斷操作方面會產生較高的困難程度。將能瞭解一平行系統通常含有多個執行緒,而該等之每一者可為跨於複數個執行機構所時間多工化。
自另一特點而觀察,本發明提供一種根據一非對稱多處理器設備以執行診斷操作的方法,該方法包含如下步驟:回應於個別程式指令,藉複數個執行機構進行資料處理操作,而一程式指令執行作業之執行緒係於該等複數個執行機構之間所時間多工化;根據該等複數個執行機構以執行診斷操作,而個別附屬診斷單元係與其等執行機構相關聯;利用一主要診斷單元,其係經耦接於該等複數個附屬診斷單元並回應於一給定執行緒於該等執行機構間之執行作業轉移,藉以令在該等附屬診斷單元裡之一為目前作用中者內產生一相對應變化,俾對於該給定執行緒進行診斷操作,使得該主要診斷單元能夠追蹤該等變化,而其中執行機構正在執行該給定執行緒。
自後載示範性具體實施例之詳細說明,且應併同於隨附圖式而閱讀,將即能顯知本發明之上述及其他目的、特性與優點。
第1圖略圖說明一非對稱多處理器設備2,其係經連接於一普通目的電腦4。該普通目的電腦是用以程式設計並控制診斷操作。該非對稱多處理器設備2含有複數個執行機構,該等係採取一普通目的處理器6、一數位信號處理器8、一加速器10以及一直接記憶體存取(DMA)單元12之形式。將能瞭解可在該非對稱多處理器設備內提供不同的執行機構組合,像是一VLIW處理器及/或一共同處理器。並且,此一非對構多處理器設備可含有多個具一給定類型之執行機構,這些可為等同者;以及一或更多具有不同類型的執行機構,即如一具多個DSP單元的單一普通目的處理器。
第1圖之非對稱多處理器設備2具有一非對稱記憶體階層,其中含有一快取記憶體14,其係位於該普通目的處理器6的本地處;一共享記憶體16,其可由該加速器10、該普通目的處理器6及該DMA單元12存取;以及一私有記憶體18。該私有記憶體18僅可由該DSP單元8及該DMA單元12存取。該DMA單元12是由該普通目的處理器6所控制,其可設定待由該DMA單元12執行的DMA操作。這些通常將包含在該私有記憶體18與該共享記憶體16之間傳送資料。將能瞭解藉此一排置,可將一輸入資料區塊自在該普通目的處理器6控制下之共享記憶體16傳送至該私有記憶體18內,於此該者在由該普通目的處理器6將處理結果自該私有記憶體18復原回到該共享記憶體16內之前,會先受於該DSP單元8的密集數值處理。由該DSP單元8所執行的處理為該同一程式執行緒的一部分,其亦至少部分地運行於該普通目的處理器6上,並且當觸及到在該執行緒內要求該DSP單元8之處理的點處時,即接著進行一自該普通目的處理器6至該DSP單元8的同步遠端程序呼叫,藉以依據該DSP單元8啟動處理。在該DSP單元8之處理結束處,可對另處進行一進一步的同步遠端程序呼叫,或可自該遠端程序呼叫簡單地回返。
即如可自第1圖觀察到,該等執行機構6、8及10之每一者含有個別的附屬診斷單元20、22及24。而該DMA單元12由於是僅在該普通目的處理器6之控制下運作,因此並不擁有其本身的附屬診斷單元。將能瞭解由不同執行機構6、8、10所提供之不同處理器架構將意味著該等附屬診斷單元20、22及24具有不同的形式與功能性,並且要求不同類型程式設計,同時產生不同形式的輸出。此項跨於一非對稱多處理器設備2的分散性在傳統上是對嘗試瞭解一在不同執行機構6、8、10間轉移之給定執行緒執行情況的程式設計者而言呈現難題。
除該等複數個附屬診斷單元20、22、24以外,在此提供有一主要診斷單元26,其係經耦接該等附屬診斷單元20、22、24之每一者。透過該等附屬診斷單元20、22、24,該主要診斷單元可像是藉由識別同步遠端程序呼叫並且回返,以監視程式執行緒轉移作業。該主要診斷單元26係經連接於該普通目的電腦4,其是用來程式設計待予執行的診斷操作,並且監視該診斷輸出,同時對一程式設計者顯示該診斷輸出。該主要診斷單元26可為按一硬體元件、按一混合硬體及軟體元件,或是按一在該普通目的電腦4上執行之純粹軟體元件的方式所提供。
該等附屬診斷單元20、22、24係經說明如供置在其個別執行機構6、8、10之每一者之內,然將能瞭解該等附屬診斷單元20、22、24可為分別地供置於該等所涉及之執行機構6、8、10的外部。可在多個執行機構之間共享一附屬診斷單元,即如一監視向該共享記憶體16寫入或讀取資料的追蹤單元將執行對該等執行機構6、8、10之一者以上的追蹤處理。然而,此一追蹤處理單元會被關聯於該等執行機構的至少一者,原因在於該者對該等執行機構的至少一者執行追蹤處理。
第2圖係一略圖圖式,其中說明一程式執行作業之給定執行緒在不同執行機構間的轉移作業。在此說明裡,有三個不同執行機構。這些可被視為是對應於第1圖的普通目的處理器6、DSP單元8及加速器10,然亦可等同地為其他對映於不同執行機構的方式。即如所述,該程式執行緒在該執行機構1開始執行,然後透過一同步遠端程序呼叫而受以轉移至該執行機構2。在於該執行機構2上執行一段時間之後,即令以回返至該執行機構1。可如圖所述令以後續地轉移至該等執行機構2及3。在此時段的所有過程中,該主要診斷單元26監視是否出現於不同執行機構間切換該程式執行緒之執行作業的同步遠端程序呼叫,並且從而追蹤在處理該程式執行緒的過程裡哪一執行機構目前為作用中。此為在第2圖左端處所所述的追蹤資訊。此追蹤資訊是由該主要診斷單元26用以將該診斷資訊通道化,而該診斷資訊係自不同的附屬診斷單元20、22、24所復原,藉以在當該診斷資訊應於該普通目的電腦4上顯示且受於該程式設計者之互動時,可關聯於適當的程式執行緒而顯示。該診斷資訊顯示包含該目前作用中執行機構對於在該所涉及程式內之點處的識別資料。即如一範例,若當一執行緒係於該執行機構2上執行,而該程式設計者想要暫止該執行緒時,則該暫止命令將被導引到該執行機構2,因為該主要診斷單元26決定在處理該執行緒上現係該執行機構2為目前作用中。
第3圖係一流程圖,其中略圖說明由該主要診斷單元26所進行之執行緒追蹤處理的類型。在步驟28,啟動在執行機構6、8、10上之不同執行緒的處理,並且相關附屬診斷單元20、22、24係經程式設計以其診斷參數(即如中斷點、觀察點、側寫參數、追蹤參數等等)。在步驟30處,該主要診斷單元26識別出哪些執行緒是在哪些執行機構上執行,同時由該主要診斷單元26收集此項資料並保留在像是一執行緒資料表內。將能瞭解哪一執行機構執行哪一特定執行緒可能無法由該程式本身預先決定,因為這可為根據負載及其他因素而在執行時間以習知方式所決定。
在步驟32,該主要診斷單元26監視以檢查是否進行任何執行緒轉移,像是藉由發出一同步遠端程序呼叫者。當偵測到執行緒轉移時,則處理程序前進到步驟34,在此可更新表示哪一執行緒正在哪一執行機構上執行的資料,藉以將不再執行一執行緒的呼叫方以及刻正執行該執行緒的受呼方納入考量。
在步驟36,(若有必要)可更改該等附屬診斷單元20、22及24的程式設計,以將既已發生之轉移作業納入考量。例如,若該呼叫方執行單元過去是對於該執行緒監視一特定中斷點或觀察點,則在當該執行機構已不再執行該執行緒時,繼續監視這些中斷點和觀察點即成為不適當,因為這可能會提供偽誤結果,原因是回應於一不同程式執行緒所出現之執行作業而該等中斷點或觀察點異名所致。
第4圖略圖說明在第1圖之系統內的診斷操作設定作業。在步驟38,一程式設計者利用該普通目的電腦4以指示一應予執行之給定診斷命令,並且在步驟38將該命令發送至應接收該命令的主要診斷單元26。步驟40是對應於該主要診斷單元26決定,對於該應予執行之診斷命令,哪一執行機構(或在一觀察點之情況下為記憶體)係關聯於該執行緒。然後該步驟42係對於既經收訖之命令,為該執行緒程式設計/啟動相關的附屬診斷單元。
在此雖既已參照於隨附圖式以詳細描述本發明之示範性具體實施例,然應瞭解本發明並不受限於該等精確具體實施例,同時可由熟諳本項技藝之人士在此進行各種變化與修改,而不致悖離如後載申請專利範圍中所定義的本發明範圍及精神。
2...非對稱多處理器設備
4...普通目的電腦
6...普通目的處理器
8...DSP單元
10...加速器
12...DMA單元
14...快取記憶體
16...共享記憶體
18...私有記憶體
20...附屬診斷單元
22...附屬診斷單元
24...附屬診斷單元
26...主要診斷單元
第1圖略圖說明一根據本發明之一範例的非對稱多處理器設備;第2圖略圖說明一在一程式內之給定執行緒於不同執行機構間的執行作業轉移,並且由該主要診斷單元對此轉移進行追蹤;第3圖係一流程圖,其中略圖說明該執行緒轉移之診斷操作及追蹤處理的初始化作業;以及第4圖係一流程圖,其中略圖說明根據一示範性具體實施例,本技術之診斷機構的初始程式設計。
2...非對稱多處理器設備
4...普通目的電腦
6...普通目的處理器
8...DSP單元
10...加速器
12...DMA單元
14...快取記憶體
16...共享記憶體
18...私有記憶體
20...附屬診斷單元
22...附屬診斷單元
24...附屬診斷單元
26...主要診斷單元
Claims (33)
- 一種非對稱多處理器設備,該非對稱多處理器設備包含:複數個執行機構,該複數個執行機構回應個別程式指令以執行資料處理作業,其中一程式指令執行之執行緒係在該複數個執行機構之間時間多工(time-multiplexed);複數個附屬診斷單元,該複數個附屬診斷單元之每一者係關聯於一個別執行機構,以藉此執行診斷作業;一主要診斷單元,該主要診斷單元係耦接至該複數個附屬診斷單元,並且回應一給定執行緒在執行機構之間的一執行作業轉移,以產生一相對應變化,其中該等附屬診斷單元目前係作用中,藉以進行對於該給定執行緒的診斷作業,使得該主要診斷單元能夠追蹤變化,而其中執行機構正執行該給定執行緒。
- 如申請專利範圍第1項所述之非對稱多處理器設備,該非對稱多處理器設備包含一非對稱記憶體階層,使得該複數個執行機構不共享一共同記憶體映圖。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該複數個執行機構之至少一者具有一異於其他該複數個執行機構之一或多者的處理架構。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該執行作業轉移係由自一執行機構至另一執行機構之一同步遠端程序呼叫所啟動。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該主要診斷單元自一執行機構提供診斷輸出,並且回應一在針對該給定執行緒之執行機構上的變化,以在該診斷輸出中產生一相對應變化。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該主要診斷單元對於該給定執行緒將診斷命令導引至一附屬診斷單元,該附屬診斷單元係與一目前正執行該給定執行緒之執行機構相關聯。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該主要診斷單元在該等執行機構之每一者上,對於該給定執行緒之一部分設定一中斷點,其中該給定執行緒之該部分可在該等執行機構上執行。
- 如申請專利範圍第7項所述之非對稱多處理器設備,其中該中斷點係藉一記憶體位址所設定,該記憶體位址匹配於一由個別執行機構運用在該給定執行緒之該部分的記憶體位址。
- 如申請專利範圍第7項所述之非對稱多處理器設備,其中當該中斷點係經觸發時,則該主要診斷單元決定哪一執行緒已觸發該中斷點。
- 如申請專利範圍第1項所述之非對稱多處理器設備,該非對稱多處理器設備包含複數個記憶體,並且其中該主要診斷單元對於該複數個能夠儲存一資料項目之記憶體之每一者設定用於該資料項目的一觀察點(watchpoint)。
- 如申請專利範圍第10項所述之非對稱多處理器設備,其中該觀察點係藉一記憶體位址所設定,該記憶體位址係匹配於一在個別記憶體中用於該資料項目之記憶體位址。
- 如申請專利範圍第10項所述之非對稱多處理器設備,其中當該觀察點係經觸發時,則該主要診斷單元決定哪一執行緒已觸發該觀察點。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該等附屬診斷單元係為附屬追蹤單元,該主要診斷單元係為一主要追蹤單元,並且該主要追蹤單元在當對該給定執行緒構成一追蹤輸出時,追蹤該給定執行緒之執行作 業在不同執行機構間的轉移。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該等附屬診斷單元係為附屬側寫單元(slave profiling units),該主要診斷單元係為一主要側寫單元,並且該主要側寫單元在當對該給定執行緒構成一側寫輸出時,追蹤該給定執行緒之執行作業在不同執行機構間的轉移。
- 如申請專利範圍第1項所述之非對稱多處理器設備,其中該複數個執行機構包含如下之一或多者:一普通目的處理器;一直接記憶體存取單元;一共同處理器;一VLIW處理器;一數位信號處理器;以及一硬體加速器單元。
- 如申請專利範圍第4項所述之非對稱多處理器設備,其中該非對稱記憶體階層包含如下二者或更多者:一整體共享記憶體,該等整體共享記憶體可由全部該等執行機構存取;一共享記憶體,該共享記憶體可由該等執行機構之至少兩者存取;以及 一私有記憶體,該私有記憶體可由該等執行機構之一者存取。
- 一種根據一非對稱多處理器設備以執行診斷操作的方法,該方法包含如下步驟:回應個別程式指令,藉複數個執行機構進行資料處理操作,其中一程式指令執行作業之執行緒係於該複數個執行機構之間時間多工;根據該複數個執行機構以執行診斷操作,而個別附屬診斷單元係與該複數個執行機構相關聯;利用一主要診斷單元,該主要診斷單元係耦接該複數個附屬診斷單元並回應一給定執行緒於該等執行機構間之一執行作業轉移,藉以產生一相對應變化,其中該等附屬診斷單元係目前作用中,以對於該給定執行緒進行診斷操作,使得該主要診斷單元能夠追蹤該等變化,而其中執行機構正在執行該給定執行緒。
- 如申請專利範圍第17項所述之方法,其中該非對稱多處理器設備包含一非對稱記憶體階層,使得該複數個執行機構不共享一共同記憶體映圖。
- 如申請專利範圍第17項所述之方法,其中該複數個執行機構之至少一者具有一異於該複數個執行機構之一或更 多其他者的不同處理架構。
- 如申請專利範圍第17項所述之方法,其中該執行作業轉移係由自一執行機構至另一執行機構之一同步遠端程序呼叫所啟動。
- 如申請專利範圍第17項所述之方法,其中該主要診斷單元自一執行機構提供診斷輸出,並且回應一在針對該給定執行緒之執行機構上的變化,以在該診斷輸出中產生一相對應變化。
- 如申請專利範圍第17項所述之方法,其中該主要診斷單元對於該給定執行緒將診斷命令導引至一附屬診斷單元,該附屬診斷單元係與一目前正執行該給定執行緒之執行機構相關聯。
- 如申請專利範圍第17項所述之方法,其中該主要診斷單元在該等執行機構之每一者上對於該給定執行緒之一部分設定一中斷點,而該給定執行緒之該部分可在該等執行機構上執行。
- 如申請專利範圍第23項所述之方法,其中該中斷點係藉一記憶體位址所設定,該記憶體位址係匹配於一由個別 執行機構運用在該給定執行緒之該部分的記憶體位址。
- 如申請專利範圍第23項所述之方法,其中當該中斷點係經觸發時,則該主要診斷單元決定哪一執行緒已觸發該中斷點。
- 如申請專利範圍第17項所述之方法,其中該非對稱多處理器設備包含複數個記憶體,並且其中該主要診斷單元對於該複數個能夠儲存一資料項目之記憶體的每一者設定該資料項目的一觀察點。
- 如申請專利範圍第26項所述之方法,其中該觀察點係藉一記憶體位址所設定,該記憶體位址係匹配於一在個別記憶體中用於該資料項目之記憶體位址。
- 如申請專利範圍第26項所述之方法,其中當該觀察點係經觸發時,則該主要診斷單元決定哪一執行緒已觸發該觀察點。
- 如申請專利範圍第17項所述之方法,其中該等附屬診斷單元係為附屬追蹤單元,該主要診斷單元係為一主要追蹤單元,並且該主要追蹤單元在當對該給定執行緒構成一追蹤輸出時,追蹤該給定執行緒之執行作業在不同執行機 構間的轉移。
- 如申請專利範圍第17項所述之方法,其中該等附屬診斷單元係為附屬側寫單元,該主要診斷單元係為一主要側寫單元,並且該主要側寫單元在當對該給定執行緒構成一側寫輸出時,追蹤該給定執行緒之執行作業在不同執行機構間的轉移。
- 如申請專利範圍第17項所述之方法,其中該複數個執行機構包含如下之一或多者:一普通目的處理器;一直接記憶體存取單元;一共同處理器;一VLIW處理器;一數位信號處理器;以及一硬體加速器單元。
- 如申請專利範圍第20項所述之方法,其中該非對稱記憶體階層包含如下二者或更多者:一整體共享記憶體,該整體共享記憶體係可由該等全部執行機構存取;一共享記憶體,該共享記憶體係可由該等執行機構之至少兩者存取;以及 一私有記憶體,該私有記憶體係可由該等執行機構之一者存取。
- 一種載有一用以控制一電腦之電腦程式的電腦程式產品,以根據如申請專利範圍第17項所述之方法控制一主要診斷單元以及複數個附屬診斷單元。
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- 2007-08-24 EP EP07789311A patent/EP2076837B1/en active Active
- 2007-08-24 WO PCT/GB2007/003223 patent/WO2008050076A1/en active Application Filing
- 2007-08-24 KR KR1020097010591A patent/KR101325229B1/ko active IP Right Grant
- 2007-08-24 JP JP2009533925A patent/JP5054115B2/ja not_active Expired - Fee Related
- 2007-08-24 CN CN2007800396948A patent/CN101529391B/zh active Active
- 2007-08-24 MY MYPI20091066A patent/MY144449A/en unknown
- 2007-09-06 TW TW096133294A patent/TWI407374B/zh active
- 2007-09-11 US US11/898,360 patent/US20080098208A1/en not_active Abandoned
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- 2007-10-18 US US11/907,881 patent/US7809989B2/en active Active
- 2007-10-23 US US11/976,315 patent/US8190807B2/en active Active
- 2007-10-23 US US11/976,314 patent/US8250549B2/en active Active
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US20080098262A1 (en) | 2008-04-24 |
US20080114937A1 (en) | 2008-05-15 |
US7809989B2 (en) | 2010-10-05 |
EP2076837B1 (en) | 2010-10-13 |
GB2443277B (en) | 2011-05-18 |
US20080215768A1 (en) | 2008-09-04 |
MY144449A (en) | 2011-09-30 |
CN101529391B (zh) | 2011-06-15 |
DE602007009857D1 (de) | 2010-11-25 |
IL197314A0 (en) | 2009-12-24 |
US8190807B2 (en) | 2012-05-29 |
JP2010507855A (ja) | 2010-03-11 |
WO2008050076A1 (en) | 2008-05-02 |
US20080098208A1 (en) | 2008-04-24 |
KR20090082254A (ko) | 2009-07-29 |
US8250549B2 (en) | 2012-08-21 |
US20080098207A1 (en) | 2008-04-24 |
GB0709182D0 (en) | 2007-06-20 |
TW200821938A (en) | 2008-05-16 |
EP2076837A1 (en) | 2009-07-08 |
JP5054115B2 (ja) | 2012-10-24 |
CN101529391A (zh) | 2009-09-09 |
IL197314A (en) | 2012-12-31 |
GB2443277A (en) | 2008-04-30 |
KR101325229B1 (ko) | 2013-11-04 |
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