TWI404814B - Deposition of perovskite and other compound ceramic films for dielectric applications - Google Patents

Abstract

In accordance with the present invention, deposition of perovskite material, for example barium strontium titanite (BST) film, by a pulsed-dc physical vapor deposition process or by an RF sputtering process is presented. Such a deposition can provide a high deposition rate deposition of a layer of perovskite. Some embodiments of the deposition address the need for high rate deposition of perovskite films, which can be utilized as a dielectric layer in capacitors, other energy storing devices and micro-electronic applications. Embodiments of the process according to the present invention can eliminate the high temperature (>700° C.) anneal step that is conventionally needed to crystallize the BST layer.

Description

Deposition method for perovskite and other composite ceramic membranes used in dielectric work

The present invention relates to the fabrication and use of dielectric films, and more particularly to the deposition of perovskite materials such as barium titanate (BST) films for dielectric applications and other ceramic oxides.

Since a perovskite film, such as a barium titanate (BST) film, has a relatively high dielectric constant, a low leakage current density, a high dielectric strength, and a ferroelectric perovskite phase that does not cause fatigue, Therefore, it is used for high-density device application capacitors. However, the electrical properties of the perovskite film depend to a large extent on the deposition process, the substrate, the post-treatment and the associated film structure. For all possibilities, it is rarely used for mainstream manufacturing because it is difficult to control the crystallization and amorphous phase physical and chemical properties of the thin film perovskite material and it interacts with the metal and the conductive electrode.

Solid-state thin film devices are typically formed by stacking a thin film of metal and dielectric on a substrate. The films typically comprise two layers of metal electrodes with a dielectric layer therebetween. The films can be deposited using a number of deposition methods including sputtering, electroplating, chemical vapor deposition sol gelation or oxidation. Previously suitable substrates for such applications are high temperature materials that can withstand at least one high temperature annealing treatment of at least 650-750 ° C, such that the perovskite dielectric film is crystallized to increase its dielectric constant. Such a substrate can be any suitable material having suitable structural and material properties, such as semiconductor wafers, refractory metal sheets (eg, titanium, zirconium or stainless steel), ceramics, such as alumina, or other materials that can withstand subsequent high temperature processing. .

However, conventional materials and manufacturing methods limit the types of materials that can be used in the manufacture of the device. Typically, the dielectric material is deposited as an amorphous phase and then heated in an annealing process to form a crystalline material. Conventional formation of a perovskite layer requires an annealing action of, for example, 650 ° C or higher to convert the deposited amorphous phase film into a crystalline form. However, such high temperature annealing severely limits the usefulness as a material for the substrate, and it is often desirable to protect the substrate from reaction with the electrode material using expensive precious metals such as platinum. Such high heat treatment temperatures are incompatible with standard semiconductor or MEM device processes and limit the selectivity of the substrate material on which the layer can be formed, increase cost, and reduce the yield of devices formed using such layers.

Therefore, there is a need for a low temperature process for depositing crystalline materials such as perovskites and other ceramic oxides on substrates.

According to the present invention, a deposition method for deposition from a conductive ceramic sputtering target by pulsed direct current physical vapor deposition is proposed. In some embodiments, the deposition process provides low temperature, deposition of a dense amorphous phase BST at a high deposition rate from a BST splash target, which can be annealed at a relatively low temperature to produce crystalline BST. Some specific examples of the deposition method suggest a need for a low temperature, high rate deposition of a perovskite film, such as a BST film, which can be used as a high specific capacitance device, such as a decoupling capacitor, an energy storage device, A voltage regulating capacitor or dielectric layer in other microelectronic devices.

A method of depositing a perovskite or ceramic oxide layer according to some embodiments of the present invention comprises: placing a substrate in a reactor; flowing a gaseous mixture (such as argon and oxygen) through the reactor; A pulsed DC power source is applied to the sputtering target formed by the conductive perovskite or ceramic oxide material (such as BST) opposite the material.

In some embodiments, the perovskite layer can be formed using radio frequency (RF) sputtering. The perovskite is deposited by RF sputtering of a large-area splash target in the presence of a sputtering gas under conditions of uniform sputtering target erosion. The substrate is positioned opposite the planar splash target formed by the perovskite material (eg, BST), the sputtering target area being greater than the substrate area. The splash center area of the same size as the substrate and located on the substrate is exposed to uniform plasma conditions that provide conditions for uniform erosion of the target. Uniform plasma conditions can be produced without magnetic enhancement, timing diode sputtering, or by providing a time-averaged uniform magnetic field through the magnets of the sputtering target in a plane parallel to the sputtering target plane.

The deposition rate of a film produced by a pulsed DC bias PVD method using a conductive ceramic sputtering target can be much higher than that of an insulating ceramic method requiring RF sputtering. In addition, deposition occurs under the presence of relatively little oxygen in the gas stream to provide a fully oxidized film opposite the metal splash target. The resulting film density is much higher than the low rate film. The films can be stoichiometric, uniform, extremely dense, use low sintering temperatures, and form films of high dielectric properties.

In some embodiments, the substrate is preheated. During deposition, the substrate can be heated to a temperature of about 400 ° C or below for deposition of low temperature perovskites, or heated to a higher temperature for deposition of calcium and titanium on substrates that can withstand the temperature range used. Minerals. Substrates suitable for depositing low temperature perovskites include glass, plastic, metal foil, stainless steel and copper. Although a layer of any thickness can be formed, the thickness of the perovskite layer can be deposited up to several microns.

In some embodiments, the perovskite layer formed on the substrate is annealed later. For low temperature annealing, the annealing temperature can be as low as 400 ° C, and can be annealed to a higher temperature in the case of depositing perovskite on a substrate that can withstand the temperature range used. In some embodiments, the perovskite splash target can be doped with a transition metal dopant such as manganese, a transition element, a lanthanide (including rare earth ions), and/or an amphoteric element.

In some embodiments, a stacked capacitor structure can be formed. The stacked capacitor structure includes one or more capacitor stacks deposited on a thin substrate, wherein each capacitor stack includes: a bottom electrode layer, a perovskite (eg, BST), a dielectric layer deposited on the bottom electrode layer; A top electrode layer deposited on the dielectric layer. An upper conductive layer can be deposited over the capacitor stack.

In some embodiments, a capacitor structure can be formed in a manifold machine. An exemplary method of fabricating a capacitor in a concentrating machine includes: loading a substrate into the concentrating machine; depositing an electrode layer on the substrate in a first chamber of the concentrating machine; at the assembly machine A perovskite dielectric layer is deposited over the electrode layer in the second chamber of the stage; a second electrode layer is deposited over the dielectric layer in the third chamber. In some embodiments, the first and second electrode layers can be deposited in the same chamber.

The fixture for securing the thin substrate can include a top portion and a bottom portion, wherein the thin substrate is secured when the top portion is joined to the bottom portion.

In some embodiments, the ceramic layer can be deposited on a substrate coated with tantalum or other refractory conductive material to provide a low temperature annealed capacitor structure.

These and other specific examples of the invention are discussed further below with reference to the following drawings. It is to be understood that the following general description and the following detailed description are intended to be illustrative and not restrictive. In addition, the specific explanations or other theories relating to the properties of the deposition methods or materials of the present invention are for illustrative purposes only and should be considered as limiting the scope of the disclosure or claims.

In accordance with an embodiment of the invention, a dielectric perovskite film or other ceramic oxide film is deposited on a substrate by a pulsed direct current physical vapor deposition (PVD) process using a conductive ceramic sputtering target. In some embodiments, the film can be deposited by RF sputtering.

In some embodiments, a dielectric perovskite layer (e.g., a BST material) is deposited directly onto the substrate by low temperature annealing, eliminating the need for subsequent high temperature annealing to crystallize the film. The removal of high temperature annealing allows capacitor structures to be formed on lightweight, low temperature and low cost substrates such as copper foil and plastic sheets, while reducing weight and capacitor cost while maintaining high-density dielectric properties of the perovskite (eg BST) The high dielectric constant of the film.

The invention is described in U.S. Patent Application Serial No. 10/101,863, the entire disclosure of which is incorporated herein by reference. Biased Pulse DC Reactive Sputtering of Oxide Films. The method of preparing a splash target is described in U.S. Patent Application Serial No. 10/101,341, filed on Mar. 6, 2002, to the name of the <RTI ID=0.0>> Rare-Earth Pre-Alloyed PVD Targets for Dielectric Planar Applications), U.S. Patent Application Serial No. 10/101,863, and U.S. Patent Application Serial No. 10/101,341, the disclosure of which is incorporated herein by reference. The full text is incorporated herein by reference. A method of depositing an oxide material by RF sputtering is also described in U.S. Patent No. 6,506,289, the disclosure of which is incorporated herein in its entirety. The transition oxide film can be deposited using methods similar to those described in U.S. Patent No. 6,506,289 and U.S. Patent Application Serial No. 10/101,863.

Figure 1A shows a schematic diagram of a reactor apparatus 10 for sputtering a sputtering target 12 of the present invention. In some embodiments, device 10 may be modified from an AKT-1600 PVD (400 X 500 mm substrate size) system from Applied Komatsu, Santa Clara, Calif., or an AKT-4300 (600 X 720 mm substrate size) system from Applied Komatsu. For example, the AKT-1600 reactor has three deposition chambers connected by a vacuum transfer chamber. These AKT reactors can be modified to supply a pulsed DC power source to the sputtering target during deposition of the material film and to supply RF power to the substrate.

Apparatus 10 includes a splash target 12 that is electrically coupled to pulsed DC power source 14 via filter 15. In some embodiments, the splash target 12 is a large area sputtering source splash target that provides material to be deposited on the substrate 16. The substrate 16 is positioned parallel to the splash target 12 and is located opposite the splash target 12. When the pulsed DC power source 14 supplies power to the splash target 12, it functions as a cathode and is also referred to as a cathode. Applying electricity to the splash target 12 produces a plasma 53. The substrate 16 is capacitively coupled to the electrode 17 via an insulator 54. Electrode 17 can be coupled to RF power source 18. The magnet 20 is scanned through the top of the splash target 12.

For pulse reactive DC magnetron sputtering, the polarity of the power supplied to the splash target 12 by the power source 14 oscillates between positive and negative potentials when performed by the device 10. During the positive potential, the insulating layer on the surface of the sputtering target 12 is discharged. To achieve arc-free deposition, the pulse frequency can exceed the critical frequency depending on the target material, cathode current, and reverse time. High quality films can be made using reactive pulsed DC magnetron sputtering as shown by apparatus 10.

The pulsed DC power source 14 can be any pulsed DC power source such as the AE Pinnacle plus 10K manufactured by Advanced Energy, Inc. With this DC power supply, pulsed DC power between 0 and 350 kHz can be supplied up to 10 kW. The reverse voltage can be 10% of the negative sputtering target voltage. Using other power supplies can result in different power characteristics, frequency characteristics, and percentage of reverse voltage. The reverse time of this power supply 14 specific example can be adjusted between 0 and 5 μs.

Filter 15 prevents RF bias power from power source 18 from being coupled to pulsed DC power source 14. In some embodiments, the power supply 18 can be a 2 MHz RF power source, such as the Nova-25 power supply manufactured by ENI of Corollado Springs, Colorado.

In some embodiments, filter 15 can be a 2 MHz sinusoidal rejection filter. In some embodiments, the filter has a bandwidth of approximately 100 kHz. Thus, the filter 15 prevents the 2 MHz power from the bias to the substrate 16 from damaging the power supply 14 while allowing the full bandwidth of the pulsed DC power supply to pass through the filter 15.

The pulsed DC deposited film is not completely dense and may have a columnar structure. Due to the boundary between the cylinders, the columnar structure is detrimental to high-density film applications such as barrier films and dielectric films. These columns reduce the dielectric strength of the material, but may provide a diffusion path for the transport or diffusion of current, ion current, gas or other chemicals such as water.

In the AKT-1600 based system, for example, the splash target 12 can have a magnitude of about 675.70 X 582.48 X 4 mm to deposit a film on the substrate 16 having a size of about 400 X 500 mm. The temperature of the substrate 16 can be adjusted between -50 ° C and 500 ° C. The distance between the splash target 12 and the substrate 16 can be between about 3 and about 9 cm. Process gas can be injected into the chamber of apparatus 10 at rates up to about 200 sccm while the pressure in the chamber of apparatus 10 can be maintained between about 0.7 and 6 mTorr. The magnet 20 provides a magnetic field that is directed into the plane of the splash target 12 and has an intensity between about 400 and about 600 Gauss, and moves through the splash target 12 at a rate of less than about 20-30 seconds per scan. In some specific examples of using an AKT 1600 reactor, the magnet 20 can be a track-shaped magnet having a size of about 150 mm X 600 mm.

In some embodiments of the invention, the perovskite layer is deposited by RF sputtering using a large area splash target and uniform sputtering target erosion conditions. An example device 30 for RF sputtering is illustrated in Figure 1C. Apparatus 30 includes an RF power source 60 coupled to a large area sputtering source sputtering target 12, wherein the sputtering target 12 provides material to be deposited on substrate 16. The substrate 16 is positioned parallel to the splash target 12 and opposite the splash target 12. When the sputtering target 12 is supplied with RF power, it functions as a cathode and is also referred to as a cathode. In the present disclosure, the splash target 12 may be formed of a perovskite material (eg, BST) for depositing a dielectric perovskite film. Substrate 16 is a solid smooth surface. Substrate 16 is typically supported on a holder or slide 17 that may be larger than substrate 16.

In some specific examples, the RF sputtering method is characterized in that the area of the large-area sputtering target 12 is larger than the area on the carrier, and physical and chemical uniform deposition is performed on the carrier. Second, the splash target 12 can be provided at a central portion above the substrate 16 with relatively uniform splash material sputter erosion conditions. Uniform splash target erosion is the result of uniform plasma conditions. In the following discussion, all of the sputter target erosion uniformities mentioned are considered equivalent to uniform plasma conditions. The evidence of uniform splash target erosion continues to maintain film uniformity over the long-term splash target life. When measured at several representative points on the overall surface of the substrate wafer, the uniformly deposited film is defined as having a thickness non-uniformity of less than about 5%. Conventionally, thickness non-uniformity is defined as the difference between the minimum thickness and the maximum thickness divided by twice the average thickness. If, under fixed processing conditions, a film that has been removed by more than 20% by weight of the splash target continues to exhibit thickness uniformity, the sputtering is determined to be that all of the films deposited during the lifetime of the splash are in a uniform splash target condition. .

Thus, uniform plasma conditions can be created in the region above the substrate between the splash target and the substrate. The uniform plasma condition zone is indicated by the exploded view of Figure 1B. The plasma is created in the area labeled 51 which extends below the entire splash target 12. The central region of the splash target 52 experiences a uniform sputter erosion condition. As discussed further below, the substrate deposited at any of the locations below the central region 52 has a uniform film thickness.

Furthermore, a deposition area that provides a uniform film thickness is larger than a deposition range that provides a film having uniform physical or optical properties such as chemical composition or refractive index. In the present invention, the splash target may be planar or nearly planar to form a film on a planar substrate to which the splash target material is to be coated. In practice, the planarity of the splash target means that all portions of the splash target surface in the region 52 are within a few millimeters of the ideal planar surface, typically within 0.5 mm.

FIG. 2 illustrates an example of a splash target 12. The film deposited on the substrate positioned on the slide 17 directly opposite the region 52 of the splash target 12 has good thickness uniformity. Zone 52 is the area exposed to uniform plasma conditions as shown in Figure 1B. In some embodiments, the carrier 17 can be coextensive with the region 52. Region 24, shown in Figure 2, indicates that physical and chemical uniform deposition can be achieved simultaneously below the region, such as physical and chemical uniformity to provide refractive index uniformity. 2 shows a splash target 12 region 52 that provides thickness uniformity that is generally greater than the splash target 12 region 24 that provides the deposited film thickness and chemical uniformity. However, in the optimization method, regions 52 and 24 can be coextensive.

In some embodiments, the magnet 20 extends beyond the region 52 in one direction (e.g., the Y direction of Figure 2) such that only one direction must be scanned (e.g., the X direction) to provide a time average uniform magnetic field. As shown in Figures 1A and 1B, the magnet 20 can be scanned over a range of splash targets 12 that are greater than the area 52 of uniform splash erosion. The magnet 20 moves in a plane parallel to the plane of the splash target 12.

The uniform splash target 12 is combined with a splash target area 52 that is larger than the area of the substrate 16 to provide a film of a highly uniform thickness. In addition, the deposited film has highly uniform material properties. Sputtering on the splash target over a range greater than or equal to the area of the uniform film thickness to be coated, such as erosion uniformity, average plasma temperature of the splash target surface, and equilibrium of the splash target surface and the treated gas phase environment The surface conditions are uniform. Further, the uniform film thickness region is greater than or equal to a region of the film having a highly uniform optical property such as refractive index, density, transmittance, or absorbance.

In the present disclosure, the splash target 12 may be formed of a perovskite material such as BST to deposit a dielectric perovskite film. In some embodiments of the invention, the perovskite splash target is doped with a transition metal dopant such as manganese, a transition metal element, a lanthanide (including rare earth ions), and/or an amphoteric element. In some embodiments of the invention, the percentage of dopant in the perovskite splash target is from 0.1 to several percent.

In some embodiments of the invention, material blocks are formed. These blocks are mounted on a support plate to form a splash target for device 10. A large area sputtered cathode splash target can be formed by a dense array of smaller squares. Thus, splash target 12 can include any number of squares, such as between 2 and 20 individual squares. The squares may be finally processed to a size to provide a non-contact margin of the squares and squares that is less than about 0.010" to about 0.020", or less than half mils, to avoid plasma processing between adjacent squares 30. In FIG. 1B, the block and dark area anode or ground shield 19 between the splash target 12 may be slightly larger to provide a non-contact margin combination or to provide thermal expansion tolerance during processing or operation of the process chamber.

As shown in FIG. 1B, uniform plasma conditions can be created in the region above the substrate 16 between the splash target 12 and the substrate 16. A plasma 53 is created in region 51 that extends below the overall splash target 12. The central region 52 of the splash target 12 experiences a uniform splash target erosion condition. As discussed further below, the layer deposited on the substrate disposed anywhere in the central region 52 has a uniform thickness and other properties (i.e., dielectric, optical index, or material concentration). Moreover, in region 52, the deposition provides uniformity to the deposited film, and the area of the deposited film can be greater than the deposited area of the film having uniform physical or optical properties such as chemical composition or refractive index. In some embodiments, the splash target 12 is substantially planar to provide uniformity in the film deposited by the substrate 16. In fact, the planarity of the splash target 12 can mean that all portions of the splash target surface in region 52 are flat surfaces within a few millimeters, and are typically flat surfaces within 0.5 mm.

A fixed supply of oxygen can be provided to maintain the reactive gas that has oxidized the splash target surface to expand the processing window. Gases that can be used to control surface oxidation Some examples of gases are O ₂ , water vapor, hydrogen, N ₂ O, fluorine, ruthenium and osmium. Additionally, a feedback control system can be incorporated to control the oxygen bias in the reaction chamber. Thus, a wide range of oxygen flow rates can be controlled to maintain a stable oxygen bias in the formed plasma. Other types of control systems, such as splash target voltage control and optical plasma injection control systems, can also be used to control the oxidation of the splash target surface. In some embodiments, the power supplied to the splash target 12 can be controlled within the feedback loop of the power source 14. Additionally, the oxygen bias controller 20 can control the oxygen or helium bias in the plasma 53. In some embodiments of the invention, an oxygen flow or bias can be used to maintain the discharge of the splash target 12 at a fixed voltage.

3A and 3B show capacitor structures having a dielectric perovskite layer deposited in accordance with certain embodiments of the present invention. As shown in FIG. 3A, a dielectric perovskite layer 302 is deposited on a substrate 301. In some embodiments, the dielectric layer 302 can be patterned in various ways prior to deposition of the substrate 301. In some embodiments, a first electrode layer 303 is deposited on the substrate, and a dielectric layer 302 is deposited on the first electrode layer. A second electrode layer 304 is then deposited over the dielectric layer 302. In some embodiments of the invention, the dielectric perovskite layer 302 is crystalline and has a sufficiently high dielectric constant without the need for high temperature annealing. Thus, substrate 301 can be a germanium wafer, titanium metal, aluminum oxide, or other conventional high temperature substrate, but can also be a low temperature material such as plastic, glass, or other materials susceptible to high temperature annealing damage. This feature has the important advantage of reducing the cost and weight of the capacitor structure formed by the present invention. The low temperature deposition of perovskite allows continuous deposition of perovskite and electrode layers one after the other. Such an approach may have the advantage of not requiring a substrate layer to obtain a continuous layer of capacitor structures in a stacked state. The stacked bulk capacitor provides higher capacitance and higher energy storage than a single layer device with a smaller surface area. In addition, a capacitor with a lower inductance can be produced.

In accordance with the present invention, a perovskite film can be deposited on substrate 302 using the pulsed DC bias PVD system described above. In particular, the AKT 1600 PVD can be changed to provide RF bias, and the AE Pinnacle plus 10K pulsed DC power supply can be used to power the splash target. The pulse frequency of the power supply can range from about 0 to about 350 KHz. The power output of the power supply is between 0 and about 10 kW.

Barium titanate sputtering targets having a resistivity in the range of less than about one million ohms can be used in conjunction with high rate pulsed DC sputtering. As described above, the splash target can be mounted on a single support plate, as described in the U.S. Provisional Application (Attorney Docket No. 09140.6013) filed on August 26, 2005, the entire disclosure of which is incorporated herein by reference. in.

Typically, the sputtering target 12 can be a dielectric material having a resistivity of less than about one million ohms and thus can be described in a conductive ceramic sputtering target. The splash target 12 formed of a dielectric perovskite material that may otherwise be non-conductive may be made conductive by being formulated to contain an excess of metal composition or by adding a dopant that provides sufficient conductivity. Examples of suitable dopants include boron, antimony, arsenic, phosphorus or other dopants. In the BST splash target example, the sintering process can be performed in the presence of a reducing environment to complete a fully conductive splash target material. The use of conductive ceramic sputtering target materials can be performed at high speed sputtering using reactive pulsed direct current techniques to form dense stoichiometric dielectric films.

A gas stream containing oxygen and argon can be used. In some embodiments, the ratio of oxygen to argon is from 0 to about 50% at a total gas flow rate of from about 60 to about 80 sccm. The pulse frequency is from about 200 kHz to about 350 kHz during deposition. An RF bias can also be applied to the substrate. In many tests, depending on the O ₂ /Ar ratio and substrate bias, the deposition rate is from about 2 angstroms per second (kW seconds) to about 1 angstroms per second (kW seconds).

FIG. 3A illustrates a perovskite layer 302 deposited on a thin substrate 301 in accordance with certain embodiments of the present invention. Substrate 301 may be formed from a thin sheet of metal (e.g., copper, titanium, stainless steel, or other suitable sheet metal), may be formed from a high temperature plastic, or formed from a ceramic, glass, or polymeric material.

Depositing the material on a thin substrate includes fixing and positioning the substrate during deposition. 4A, 4B, 4C and 4D illustrate a reusable fixture 400 for securing a film substrate. As shown in FIG. 4A, the reusable fixture 400 includes a top portion 401 and a bottom portion 402 that are fastened together to secure the substrate. The thin substrate 301 is positioned between the top portion 401 and the bottom portion 402. As shown in FIG. 7B, the top portion 701 and the bottom portion 702 cause the substrate 301 to form a planar state, and then clamp when the top portion 401 is enclosed in the bottom portion 402. The substrate 301 is easily fixed by the fixture 400, so that the substrate 301 can be processed and positioned. In some specific examples, when the bottom portion 402 is enclosed in the top portion 401, the corners (regions 403) of the substrate 301 are removed by avoiding the clamping effect of the corners "returning", so that the substrate 301 is easier to pull. Stretch.

As shown in FIG. 4C, the mask 412 is attached to the fixture 400. In some embodiments, the fixture 400 includes a guide to align the fixture 400 with the mask 412. In some embodiments, the mask 412 can be attached to the fixture 400 and move with the fixture 400. The mask 412 can be placed at any height of the fixture 400 that is higher than the substrate 301. Thus, the mask 412 can act as a contact or in close proximity to the mask. In some embodiments, the mask 412 is formed from other thin substrates that are mounted to a fixture similar to the fixture 400.

As shown in Figures 4C and 4D, the fixture 400 and the mask 412 can be positioned relative to the seat 410. Seat 410 can be an electrostatic clip such as a pedestal, a seat or a processing chamber, such as shown in Figures 1A and 1B. The fixture 400 and the mask 412 can have features that allow for easy alignment with one another and alignment with the seat 410. The mask 412 is located in the processing chamber and is aligned with the fixture 400 during positioning of the fixture 400 to the seat 410, as shown in Figure 4D.

The fixture 400 is used to process the film substrate in the processing chamber as in Figures 4A, 4B, 4C and 4D. In some embodiments, the film substrate can be about 1 [mu]m or more. Further, after the film substrate 301 is fixed in the fixture 400, it can be processed and moved from the processing chamber to the processing chamber. Thus, a multi-chamber system can be used to form a stack of layers comprising one or more layers of perovskite film deposited in accordance with embodiments of the present invention.

Figure 5 illustrates a build-up machine 500 for processing a film substrate. The concentrating machine 500 can include, for example, a preload chamber 502 and a preload chamber 503, loaded into the film substrate 301 via the preload chamber, and removed from the concentrating machine 500 to form the device. Chambers 504, 505, 506, 507, and 508 are processing chambers for deposition materials, heat treatment, etching, or other processing. One or more of chambers 504, 505, 506, 507, and 508 can be pulsed DC or RF PVD chambers discussed above with respect to Figures 1A, 1B, and 1C, and dielectrics can be deposited in such chambers in accordance with embodiments of the present invention. Perovskite film.

The processing chambers 504, 505, 506, 507 and 508 and the preload chambers 502 and 503 are coupled by a transport chamber 501. The transfer chamber 501 includes a substrate transport robot to transport individual wafers back and forth between the process chambers 504, 505, 506, 507 and 508 and the preload chambers 502 and 503.

In the method of manufacturing a film capacitor, the substrate is loaded into the preload chamber 503. An electrode layer can be deposited at chamber 504 and then deposited at chamber 505 for perovskite. The substrate can then be removed via the preload chamber 503 for heat treatment in air outside of the assembly machine 500. The processed wafer is then reloaded into the assembly machine 500 via the preload chamber 502. The wafer can then be removed again from the manifold 500 to deposit a second electrode layer, or the second electrode layer can sometimes be deposited using a chamber 506. This method can be repeated to form a capacitor stack. The completed capacitor structure is then removed from the preload chamber 502 of the manifold 500. The wafer is transported back and forth between the chamber and the chamber by a robot arm in the transfer chamber 501.

A capacitor structure fabricated in accordance with the present invention may use a film substrate carried in a fixture such as fixture 400. The fixture 400 is then loaded into the preload chamber 503. Chamber 504 still includes depositing the electrode layer. Chamber 505 then includes a layer of perovskite depositing a specific embodiment of the invention. A second electrode layer can then be deposited at chamber 506. In this method, only low temperature annealing is used to increase the crystallinity and dielectric constant of the perovskite layer.

Other advantages of the film capacitor method are the ability to stack capacitor structures. In other words, the substrate loaded into the manifold 500 can pass through the processing chambers 504, 505, 506, 507, and 508 several times to create a multi-stack capacitor structure. Figures 6A and 6B illustrate such a structure.

Figure 6A illustrates the stacking effect of parallel bonding. As shown in FIG. 6A, a substrate 301 (which may be, for example, a high temperature plastic substrate such as polyimide) is loaded into the preload chamber 503. For example, an electrode layer 303 can be deposited in the chamber 504. A dielectric perovskite layer 302 is then deposited on the electrode layer 303. The perovskite layer 302 can be from about 0.1 to 1 [mu]m and can be deposited in chamber 505 according to specific examples of the invention. The wafer can then be moved to chamber 506 where an electrode layer 304 having a thickness of about 0.1 [mu]m or more is deposited. Then, a second capacitor stack may be deposited on the first capacitor stack formed by the first electrode layer 303, the perovskite layer 302, and the second perovskite layer 304. This capacitor stack includes a first perovskite layer 305 and a third electrode layer 306. In some embodiments, other stacks can be formed. In some embodiments, the metal layers 303, 304, and 306 differ in the mask used for deposition, thus forming a label for electrical coupling of the layers.

As discussed above, any number of individual capacitor stacks can be formed, thus forming a parallel capacitor. Such a parallel configuration of the capacitor stack structure may be formed by a staggered electrode layer and a perovskite dielectric layer, and may have any number of dielectric layers.

To form the structure shown in Figure 6, the substrate is again rotated via the processing chamber of the manifold 500 to deposit an array capacitor. Typically, a stack of any number of capacitors can be deposited in this manner.

Tables I and II illustrate some examples of the deposition of perovskite materials (such as BST) of the present invention. In these examples, the BST film was deposited using an AKT-1600 PVD (400 X 400 mm substrate size) system from Applied Komatsu. The power supply is an ENI 13.56MHz RF power supply with an ENI matcher. The sputtering target material is a BST having a resistivity in the range of several kΩ or less. The splash target material may, for example, be sintered. The initial experiment used a germanium wafer. A 0.1-1 micron BST film is deposited on a Si wafer having various bottom electrode materials such as: n++Si, Ir, Pt, IrO ₂ and Ti ₄ O ₇ , Ti ₃ O ₅ , Nb, Os . The ratio of oxygen to argon is from 0 to 50%. The treatment pressure is from 3-10mT. Some examples apply an RF bias to a substrate. The dielectric constant of the as-deposited film is from 13 to 123 and is increased above 1000 after annealing after deposition.

Variations and modifications of the examples discussed in detail in this disclosure will be recognized by those skilled in the art. It is intended that such changes and modifications be within the scope and spirit of the disclosure. As such, the scope is limited only by the scope of the following claims.

10. . . Reactor equipment

12. . . Splash target

14. . . Pulsed DC power supply

15. . . filter

16. . . Substrate

17. . . Holder/slide

18. . . RF power supply

20. . . magnet

53. . . Plasma

54. . . Insulator

19. . . shield

51. . . region

52. . . Central area

30. . . device

60. . . RF power supply

twenty four. . . region

301. . . Substrate

302. . . Dielectric layer

303. . . First electrode layer

304. . . Second electrode layer

400. . . Reusable fixture

401. . . Top part

402. . . Bottom part

403. . . region

410. . . seat

412. . . Mask

500. . . Assembly machine

501. . . Conveying room

502. . . Preload chamber

503. . . Preload chamber

504. . . room

505. . . room

506. . . room

507. . . room

508. . . room

701. . . Top part

702. . . Bottom part

17. . . electrode

30. . . Square

1A and 1B illustrate a pulsed DC bias reactive deposition apparatus that can be used in the deposition method of the present invention.

Figure 1C illustrates an RF sputter deposition apparatus.

Figure 2 shows an example of a splash target that can be used in the reactors shown in Figures 1A, 1B and 1C.

3A and 3B illustrate a film capacitor design in accordance with some embodiments of the present invention.

4A, 4B, 4C, and 4D illustrate a thin substrate mount and top mask configuration that can be used to deposit a dielectric perovskite layer (e.g., a BST film deposited in accordance with certain embodiments of the present invention).

Figure 5 illustrates a build-up machine that can form a battery pack using a dielectric perovskite layer deposited in accordance with certain embodiments of the present invention.

Figure 6 illustrates an example of a stacked capacitor structure having a dielectric perovskite layer deposited in accordance with certain embodiments of the present invention.

301. . . Substrate

302. . . Dielectric layer

Claims (26)

A method of depositing a crystalline perovskite on a substrate, comprising: placing the substrate into a reactor; flowing a gaseous mixture through the reactor; and passing a narrow band rejection filter to the conductive ceramic sputtering target in the reactor Providing pulsed DC power such that a voltage across the conductive ceramic splash target alternates between positive and negative pressures, wherein the conductive ceramic splash target is formed of a perovskite material and is opposite the substrate; A narrow band reject filter RF bias power is applied, wherein the crystalline perovskite layer is formed on the substrate without high temperature annealing. The method of claim 1, further comprising filtering the pulsed DC power to prevent the pulsed DC power from contacting the pulsed DC power source to generate bias power when passing through the filter. The method of claim 1, wherein providing power to the electrically conductive splash target comprises applying an RF bias to the electrically conductive ceramic splash target. The method of claim 1, wherein the crystalline perovskite layer is a barium titanate (BST) layer. The method of claim 1, wherein the formed crystalline perovskite layer is greater than about 0.1 microns thick. Such as the method of claim 1, wherein the crystal of formation The perovskite layer is less than about 1 micron thick. The method of claim 1, further comprising annealing the layer of crystalline perovskite formed on the substrate. The method of claim 7, wherein the annealing of the crystalline perovskite layer comprises heating the crystalline perovskite layer to an annealing temperature between about 500 ° C and about 800 ° C. The method of claim 1, further comprising preheating the substrate prior to applying power to the electrically conductive splash target. The method of claim 9, wherein preheating the substrate comprises heating the substrate to a temperature of about 400 ° C for cryogenic crystallization of the perovskite. The method of claim 1, wherein the substrate is a low temperature substrate. The method of claim 11, wherein the low temperature substrate comprises one of a substrate of glass, plastic, metal foil, copper and stainless steel. The method of claim 1, wherein the conductive sputtering target is doped with one or more of a transition metal dopant, a transition metal, a lanthanide, and/or an amphoteric element. The method of claim 13, wherein the sputtering target is doped with manganese. The method of claim 14, wherein the content of manganese in the splash target is at least 0.1%. The method of claim 1, wherein the conductive ceramic Splash target resistance is less than one million ohms of perovskite splash target. A capacitor structure comprising: a first conductive electrode layer; a crystalline dielectric perovskite layer deposited on the first conductive electrode layer, wherein the crystalline dielectric perovskite layer is not under high temperature annealing Formed by a pulsed DC reactive ion method and substrate biased by depositing a crystalline perovskite film, wherein the conductive ceramic sputtering target receives alternating negative pressure from a narrow band rejection filter based on a frequency associated with substrate bias and a positive pressure; and a second conductive electrode layer deposited on the crystalline dielectric perovskite layer. The capacitor structure of claim 17, wherein the first conductive electrode layer is a copper sheet. A stacked capacitor structure comprising: one or a plurality of capacitor stacks deposited on a substrate, wherein each capacitor stack comprises: a bottom electrode layer; a crystalline dielectric perovskite layer deposited on the bottom without annealing Above the electrode layer, wherein the crystalline dielectric perovskite layer is formed by pulsed DC reactive ion method and substrate biasing by depositing a crystalline perovskite film, wherein the conductive ceramic splash target accepts from narrow band rejection filtering An alternating negative and positive pressure based on a frequency associated with substrate biasing; and a top electrode layer deposited on the one or more capacitor stacks. The stacked capacitor structure of claim 19, wherein the capacitor stack forms a parallel stacked capacitor structure. The stacked capacitor structure of claim 19, wherein the capacitor stack forms a continuous stacked capacitor structure. A method of manufacturing a capacitor, comprising: loading a substrate into a collecting machine; and depositing a layer of crystalline dielectric perovskite on the substrate without annealing in a chamber of the collecting machine, wherein The crystalline dielectric perovskite layer is formed by a pulsed DC reactive ion method and a substrate bias by depositing a crystalline perovskite film, wherein the conductive ceramic splash target is subjected to a narrow band rejection filter based on the substrate bias The alternating negative and positive pressures of the voltage-related frequencies. The method of claim 22, wherein the depositing of the crystalline dielectric perovskite layer comprises depositing a crystalline perovskite film by RF sputtering PVD. The method of claim 22, wherein the depositing of the crystalline dielectric perovskite layer comprises depositing the crystalline perovskite material via a mask. The method of claim 22, further comprising: depositing a bottom electrode layer on the substrate, wherein the crystalline dielectric perovskite layer is deposited over the bottom electrode layer. The method of claim 22, further comprising depositing a top electrode layer on the crystalline dielectric perovskite layer.