TWI401543B - Coating-developing apparatus, coating-developing method and storage medium - Google Patents
Coating-developing apparatus, coating-developing method and storage medium Download PDFInfo
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- 238000010438 heat treatment Methods 0.000 claims description 96
- 239000011248 coating agent Substances 0.000 claims description 62
- 238000000576 coating method Methods 0.000 claims description 62
- 230000006641 stabilisation Effects 0.000 claims description 57
- 238000011105 stabilization Methods 0.000 claims description 57
- 238000012546 transfer Methods 0.000 claims description 54
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- 239000007788 liquid Substances 0.000 claims description 22
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- 235000012431 wafers Nutrition 0.000 description 146
- 101150034399 CPH1 gene Proteins 0.000 description 18
- 101100222708 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) CPR1 gene Proteins 0.000 description 18
- 101150096424 CPH2 gene Proteins 0.000 description 10
- 230000003111 delayed effect Effects 0.000 description 8
- 238000001816 cooling Methods 0.000 description 7
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- 102100026437 Branched-chain-amino-acid aminotransferase, cytosolic Human genes 0.000 description 5
- 101000766268 Homo sapiens Branched-chain-amino-acid aminotransferase, cytosolic Proteins 0.000 description 5
- 238000002360 preparation method Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000004364 calculation method Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 102100026413 Branched-chain-amino-acid aminotransferase, mitochondrial Human genes 0.000 description 2
- 101000766294 Homo sapiens Branched-chain-amino-acid aminotransferase, mitochondrial Proteins 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 101100496169 Arabidopsis thaliana CLH1 gene Proteins 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 238000011867 re-evaluation Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/41815—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by the cooperation between machine tools, manipulators and conveyor or other workpiece supply system, workcell
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/4189—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by the transport system
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67276—Production flow monitoring, e.g. for increasing throughput
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/31—From computer integrated manufacturing till monitoring
- G05B2219/31002—Computer controlled agv conveys workpieces between buffer and cell
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/45—Nc applications
- G05B2219/45031—Manufacturing semiconductor wafers
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Description
本發明係關於對半導體晶圓或LCD基板(液晶顯示器用玻璃基板)等基板進行抗蝕劑液之塗佈處理、或曝光後之顯影處理等的塗佈、顯影裝置及方法,與儲存著用以實施塗佈、顯影方法之程式的記憶媒體。The present invention relates to a coating and developing apparatus and method for applying a resist liquid to a substrate such as a semiconductor wafer or an LCD substrate (a glass substrate for liquid crystal display), or a development process after exposure, and the like. A memory medium that implements a program of coating and development methods.
半導體裝置或LCD基板之製造製程中,藉著所謂光微影技術對基板進行抗蝕劑圖案的形成。該技術以如下的一連串步驟進行:於例如半導體晶圓(以下稱晶圓)等之基板塗佈抗蝕劑液,以在該晶圓的表面形成液膜,並利用光罩將該抗蝕劑膜曝光後,藉由進行顯影處理以得到所希望之圖案。In the manufacturing process of a semiconductor device or an LCD substrate, a resist pattern is formed on a substrate by a so-called photolithography technique. The technique is carried out in a series of steps of applying a resist liquid to a substrate such as a semiconductor wafer (hereinafter referred to as a wafer) to form a liquid film on the surface of the wafer, and using the mask to expose the resist After the film is exposed, development processing is carried out to obtain a desired pattern.
此種處理一般使用進行抗蝕劑液之塗佈及顯影的塗佈、顯影裝置上連接有曝光裝置的抗蝕劑圖案形成裝置而進行。該裝置中,如圖7所示,將收納有多數片晶圓的載具10送入載具載置部1A的運送平台11,載具10內之晶圓由傳遞臂12傳遞至處理部1B。然後於處理部1B內,進行抗反射膜形成模組(未圖示)之抗反射膜的形成,及塗佈模組13之抗蝕劑膜的形成後,經由介面部1C輸送至曝光裝置1D。另一方面,曝光處理後的晶圓再被送回處理部1B,於顯影模組14進行顯影處理,然後送回原來的載具10內。於該抗反射膜或抗蝕劑膜之形成處理前後或者顯影處理前後,進行晶圓的加熱處理或冷卻處理,而進行該等加熱處理的加熱模組或進行冷卻處理的冷卻模組等多段配置於棚架模組15(15a~15c),晶圓由處理部1B所設置的主臂16(16A、16B)輸送於各模組之間。在此,晶圓施行上述處理時係如專利文獻1所記載,對於預定處理的全部晶圓,依據已事先決定各個晶圓以何時間點輸送至何模組的運送計劃加以輸送。Such a treatment is generally performed by using a resist pattern forming apparatus to which an exposure apparatus is attached to a coating or developing apparatus that performs coating and development of a resist liquid. In this apparatus, as shown in FIG. 7, the carrier 10 in which a plurality of wafers are accommodated is fed to the transport platform 11 of the carrier mounting portion 1A, and the wafer in the carrier 10 is transferred to the processing unit 1B by the transfer arm 12. . Then, in the processing unit 1B, an anti-reflection film forming module (not shown) is formed, and the resist film of the coating module 13 is formed, and then transported to the exposure device 1D via the dielectric surface 1C. . On the other hand, the exposed wafer is returned to the processing unit 1B, developed by the developing module 14, and returned to the original carrier 10. The heat treatment or cooling treatment of the wafer before and after the formation of the anti-reflection film or the resist film, and the heating module for performing the heat treatment or the cooling module for performing the cooling treatment are arranged in multiple stages. In the scaffolding module 15 (15a to 15c), the wafer is transported between the modules by the main arms 16 (16A, 16B) provided in the processing unit 1B. Here, when the wafer is subjected to the above-described processing, as described in Patent Document 1, all of the wafers to be processed are transported in accordance with a transportation plan in which the respective wafers are transported to which module at a predetermined time.
然而,上述裝置中,將從一個載具所移出的複數之同種晶圓的集合,即先行批次A之晶圓A與後續批次B之晶圓B從載具載置部1A連續移出至處理部1B以進行處理,於批次A與批次B之間使用相同加熱模組時,批次A與批次B之間該加熱模組的加熱溫度有時會變更。However, in the above apparatus, the plurality of wafers of the same type of wafers removed from one carrier, that is, the wafer A of the preceding batch A and the wafer B of the subsequent batch B are continuously removed from the carrier mounting portion 1A to When the processing unit 1B performs processing, when the same heating module is used between the batch A and the batch B, the heating temperature of the heating module between the batch A and the batch B may be changed.
此時,以往預測該加熱模組之溫度穩定時間(溫度變化所需時間),對於後續批次B從載具載置部1A移出的時間點進行定時控制。以圖8所示之運送計劃為例,說明該定時控制。該運送計劃之縱軸表示循環,橫軸表示所輸送的模組。又,FOUP為載具,M1~M6為模組,此例係於模組M4進行溫度穩定處理。At this time, the temperature stabilization time (time required for temperature change) of the heating module is conventionally predicted, and timing control is performed for the time point when the subsequent batch B is removed from the carrier mounting portion 1A. The timing control will be described by taking the transportation plan shown in FIG. 8 as an example. The vertical axis of the transport plan represents the cycle, and the horizontal axis represents the module being transported. Moreover, the FOUP is a carrier, and the M1 to M6 are modules. In this example, the module M4 is subjected to temperature stabilization processing.
另外,該移出時間點的控制時間T1以下面之式(1)求出。Further, the control time T1 at the time of the removal is obtained by the following formula (1).
T1=P+Q-R......(1)T1=P+Q-R......(1)
P:直到先行批次A之晶圓從模組M4被送出的時間P: the time until the wafer of the preceding batch A is sent out from the module M4
Q:調溫時間Q: Temperature adjustment time
R:直到後續批次B之晶圓被送入該模組M4的時間R: time until the wafer of the subsequent batch B is sent to the module M4
在此,該P以(模組M1中之處理剰餘時間)+(到模組M2之移動時間+模組M2中之處理時間)+(到模組M3之移動時間+模組M3中之處理時間)+(到模組M4之移動時間+模組M4中之處理時間)所求出,例如為15秒。Here, the P is (the processing time in the module M1) + (the moving time to the module M2 + the processing time in the module M2) + (to the moving time of the module M3 + the module M3) The processing time is + (to the movement time of the module M4 + the processing time in the module M4), for example, 15 seconds.
又,該R以(到模組M1之移動時間+模組M1中之處理時間)+(到模組M2之移動時間+模組M2中之處理時間)+(到模組M3之移動時間+模組M3中之處理時間)所求出,例如為20秒。Moreover, the R is (the moving time to the module M1 + the processing time in the module M1) + (the moving time to the module M2 + the processing time in the module M2) + (the moving time to the module M3 + The processing time in the module M3 is obtained, for example, 20 seconds.
當使調溫時間Q為30秒時,該控制時間T1成為P+Q-R=(15+30)-(20)=25秒,使後續批次B之晶圓的最初移出恰延遲該25秒。然而,該主臂16依據運送計劃控制成:將旋環時間配合於最慢的處理時間(晶圓對該模組M4之傳遞時間與處理所需時間的合計時間),並以該循環時間實施1個運送循環;但是由於實際上依各循環,主臂進行移載之晶圓的片數並不同,因此有時比起該循環時間以短時間或長時間實行循環,晶圓於模組M4結束處理後,並非馬上由主臂16從該模組M4送出,而有時發生於模組M4內等待主臂16進行承接的狀態。在此,由於該等待時 間不包含於上述計算式,因此即使進行如上述定時控制,仍然發生後續批次B之晶圓B提早到達該模組M4,或者延遲到達的情形。When the temperature adjustment time Q is 30 seconds, the control time T1 becomes P+Q-R=(15+30)-(20)=25 seconds, and the initial removal of the wafer of the subsequent batch B is delayed by the 25 seconds. However, the main arm 16 is controlled according to the transportation schedule to match the spin ring time to the slowest processing time (the total time of the wafer transfer time to the module M4 and the processing time required), and implement the cycle time. One transport cycle; however, since the number of wafers transferred by the main arm is different depending on the cycle, the cycle may be performed in a short time or a long time compared to the cycle time, and the wafer is in the module M4. After the completion of the processing, the main arm 16 is not immediately sent out from the module M4, but may be in a state in which the main arm 16 is waiting to be received in the module M4. Here, due to the waiting time The calculation formula is not included in the above calculation, so even if the timing control as described above is performed, the wafer B of the subsequent batch B arrives at the module M4 early, or the arrival is delayed.
如上述,當後續批次B之晶圓B到達該模組M4的時間提早時,由於該模組M4中溫度穩定處理未結束,因此無法將晶圓B傳遞至該模組,而主臂16不得不於固持該晶圓B之狀態下待機,有發生無法進行該運送循環而停止的事態之虞。另一方面,當到達該模組M4的時間延遲時,儘管本來該模組M4中溫度穩定處理已結束,係可進行處理的狀態,卻發生模組M4等待送入晶圓W送入的狀態,與先行批次A之晶圓A的運送間隔過度空出,發生後續批次B之晶圓B往曝光裝置的供給延遲而有造成生產力降低之虞。因此,當後續批次B之晶圓B提早到達該模組M4,或者延遲到達時,處理量降低。As described above, when the time of the wafer B of the subsequent batch B reaches the module M4 is earlier, since the temperature stabilization processing in the module M4 is not completed, the wafer B cannot be transferred to the module, and the main arm 16 It is necessary to stand by while holding the wafer B, and there is a possibility that the transport cycle cannot be stopped and stopped. On the other hand, when the time of reaching the module M4 is delayed, although the temperature stabilization process in the module M4 is completed, the process can be processed, but the module M4 waits for the wafer W to be fed. The transport interval of the wafer A with the preceding batch A is excessively vacated, and the supply delay of the wafer B of the subsequent batch B to the exposure device occurs, which causes a decrease in productivity. Therefore, when the wafer B of the subsequent batch B arrives at the module M4 earlier, or arrives delayed, the processing amount is lowered.
再者,專利文獻2提出如下之結構:於以第1調溫模組、第1塗佈模組、第1加熱模組、第2調溫模組、第2塗佈模組、第2加熱模組、冷卻模組之順序輸送基板,包含可令複數片基板退避之退避模組的裝置中,先行批次之最後基板於第2加熱模組結束加熱處理後,將該第2加熱模組的加熱溫度變更成因應後續批次之基板的溫度時,從該後續批次之最先基板被輸送至第2調溫模組的運送循環的下一個運送循環起,形成將接續於該最先基板之第1加熱模組所加熱處理的基板依序填滿於退避模組的方式,並於變更該第2加熱模組的加熱溫度後,將該退避模組內之基板依序輸送至下游側的模組。然而,該結構中,由於令基板於退避模組內等待,故直到對晶圓全部處理均結束的時間有時拉長,並無法解決本發明之課題。Further, Patent Document 2 proposes a configuration in which the first temperature adjustment module, the first coating module, the first heating module, the second temperature adjustment module, the second coating module, and the second heating are used. The module and the cooling module sequentially transport the substrate, and the device includes a retracting module capable of retracting the plurality of substrates. After the final substrate of the batch is finished, the second heating module ends the heating process, and the second heating module is used. When the heating temperature is changed to the temperature of the substrate of the subsequent batch, the next substrate from which the first substrate of the subsequent batch is transported to the next transport cycle of the second temperature regulating module is formed, and the formation is continued. The substrate heated by the first heating module of the substrate is sequentially filled in the evacuation module, and after the heating temperature of the second heating module is changed, the substrate in the evacuation module is sequentially transported to the downstream. Side module. However, in this configuration, since the substrate is waited in the evacuation module, the time until the entire processing of the wafer is completed may be lengthened, and the problem of the present invention cannot be solved.
【專利文獻1】日本特開2004-193597號公報[Patent Document 1] Japanese Patent Laid-Open Publication No. 2004-193597
【專利文獻2】日本特開2008-34746號公報[Patent Document 2] Japanese Patent Laid-Open Publication No. 2008-34746
本發明係於此種情形下所設計,其目的為:提供技術,在先行批次與後續批次之間於穩定對象模組進行穩定處理時,可達到處理量的提高。The present invention is designed in such a situation, and the object thereof is to provide a technique for improving the throughput when the stable object module is stably processed between the preceding batch and the subsequent batch.
因此,本發明之塗佈、顯影處理包括:載具載置部,載置著收納有複數片基板的載具,且包含傳遞機構,在該傳遞機構與載具之間傳遞基板;及處理部,用以在從該載具載置部傳遞來的基板上形成塗佈膜,並對曝光後的基板進行顯影;且於該處理部中,利用基板運送機構,對於下列各模組輸送基板:將基板調溫的調溫模組、在基板塗佈塗佈液的塗佈模組、將基板加熱的加熱模組、及對基板進行顯影處理的顯影模組;若將放置該基板的位置稱為模組,依據事先設定之運送計劃,利用基板運送機構形成前面編號之基板比起後面編號之基板位於下游側模組的狀態,藉此實行一個運送循環;於結束該運送循環後,實行下一個運送循環,以進行基板的運送;其特徵係包含:穩定對象模組,由該塗佈模組及加熱模組的至少其中之一構成,於該模組對從一個載具所移出的先行批次之基板結束處理後,在後續批次之基板被輸送至該模組之前,於該模組進行穩定處理;運送計劃製作機構,將運送計劃製作成:該運送計劃中,於將先行批次之最後基板傳遞至該處理部後,到將該後續批次之最初基板傳遞至該處理部為止,令循環閒置一延遲循環數;該延遲循環數係將該穩定處理所需時間除以實行一個運送循環時所需的最大時間即循環時間而得到;及基板運送機構控制機構,該所製作的運送計劃中,將於該穩定對象模組進行穩定處理的循環,且於該穩定對象模組具有穩定處理剩餘時間的循環,即實行循環加以結束,於下一個循環開始之前,對於各穩定對象模組逐一求出用以實行下一個循環的適當時間,並比較其中最長的適當時間與用以實行該實行循環的實行 時間,將基板運送機構控制成:當該適當時間較長時,令該實行循環之下一個循環的開始待機相當於該適當時間與該實行時間之差的一段時間。Therefore, the coating and development process of the present invention includes: a carrier placing unit that mounts a carrier that houses a plurality of substrates; and includes a transmission mechanism that transfers the substrate between the transmission mechanism and the carrier; and a processing unit a coating film is formed on the substrate transferred from the carrier mounting portion, and the exposed substrate is developed; and in the processing portion, the substrate is transported to the following modules by the substrate transfer mechanism: a temperature adjustment module for adjusting the temperature of the substrate, a coating module for coating the coating liquid on the substrate, a heating module for heating the substrate, and a development module for developing the substrate; if the position where the substrate is placed is called For the module, according to the pre-set transportation plan, the substrate of the front number is formed by the substrate transport mechanism, and the substrate of the subsequent number is located in the downstream module, thereby performing a transport cycle; after the end of the transport cycle, the implementation is performed. a transport cycle for transporting the substrate; the feature comprising: a stable object module, comprising at least one of the coating module and the heating module, wherein the module pair is from a carrier After the substrate of the removed batch is finished, the substrate is stabilized after the substrate of the subsequent batch is transported to the module; the transportation plan is prepared by the transportation plan: in the transportation plan, After the last substrate of the preceding batch is transferred to the processing unit, until the first substrate of the subsequent batch is transferred to the processing unit, the cycle is idled for a delay cycle number; the delay cycle number is the time required for the stabilization process In addition to the cycle time required to implement one transport cycle, that is, the cycle time; and the substrate transport mechanism control mechanism, the stable target module performs a cycle of stabilization processing in the transport plan prepared, and the stabilization is performed. The object module has a loop for stably processing the remaining time, that is, the loop is executed to end, and before the start of the next loop, the appropriate time for performing the next loop is determined one by one for each stable object module, and the longest appropriate time is compared. And the implementation of the implementation cycle At the time, the substrate transport mechanism is controlled such that when the appropriate time is long, the start standby of one cycle of the execution cycle is equivalent to a period of time between the appropriate time and the execution time.
此時,該適當時間以{(該穩定對象模組之穩定處理剩餘時間)+(該實行循環之該實行時間)-(後續批次之基板被送入該穩定對象模組的循環中,基板運送機構用以傳遞該基板所需時間)}÷(到後續批次之基板從該實行循環被送入該穩定對象模組的循環為止的循環數)所演算。又,該下一個循環之開始係指基板運送機構承接從載具載置部被傳遞至處理部的基板。例如穩定對象模組為加熱模組,該穩定處理為加熱溫度的變更處理。At this time, the appropriate time is {(the stable processing remaining time of the stable object module) + (the execution time of the execution cycle) - (the substrate of the subsequent batch is fed into the cycle of the stable object module, the substrate The time required for the transport mechanism to transfer the substrate is calculated as the number of cycles from the cycle in which the subsequent batch is fed to the stable target module. Further, the start of the next cycle means that the substrate transport mechanism receives the substrate that is transferred from the carrier mounting portion to the processing portion. For example, the stabilization target module is a heating module, and the stabilization process is a process of changing the heating temperature.
又,本發明之塗佈、顯影方法,藉由一塗佈、顯影裝置進行,該塗佈、顯影裝置:包括:載具載置部,載置著收納有複數片基板的載具,且包含傳遞機構,該傳遞機構與載具之間傳遞基板;及處理部,用以在從該載具載置部所傳遞的基板形成塗佈膜,並對曝光後的基板進行顯影;且於該處理部中,利用基板運送機構,對於下列各模組輸送基板:將基板調溫的調溫模組、在基板塗佈塗佈液的塗佈模組、將基板加熱的加熱模組、及對基板進行顯影處理的顯影模組;將放置該基板的位置稱為模組,依據事先設定之運送計劃,利用基板運送機構形成前面編號之基板比起後面編號之基板位於下游側模組的狀態,藉此實行一個運送循環;於結束該運送循環後,實行下一個運送循環,以進行基板的運送;該塗佈、顯影方法的特徵係包含:穩定處理步驟,以該塗佈模組及加熱模組的至少其中之一進行,於該模組對從一個載具所移出的先行批次之基板結束處理後,在後續批次之基板被輸送至該模組之前,於該模組進行穩定處理;運送計劃製作步驟,將運送計劃製作成:該運送計劃中,於將先行批次之最後基板傳遞至該處理部後,到將該後續批次之最初基板傳遞至該處理部為止,令循環閒置一延遲循環數;該延遲 循環數係將該穩定處理所需時間除以實行一個運送循環時所需的最大時間即循環時間而得到;及基板運送機構控制步驟,該所製作的運送計劃中,將於該穩定對象模組進行穩定處理的循環,且於該穩定對象模組具有穩定處理剩餘時間的循環,即實行循環加以結束,於下一個循環開始之前,對於各穩定對象模組逐一求出用以實行下一個循環的適當時間,並比較其中最長的適當時間與用以實行該實行循環的實行時間,將基板運送機構控制成:當該適當時間較長時,令該實行循環之下一個循環的開始待機相當於該適當時間與該實行時間之差的一段時間。Moreover, the coating and developing method of the present invention is carried out by a coating and developing device comprising: a carrier placing portion on which a carrier in which a plurality of substrates are housed is mounted, and includes a transfer mechanism that transfers a substrate between the transfer mechanism and the carrier; and a processing unit that forms a coating film on the substrate transferred from the carrier mounting portion and develops the exposed substrate; and the processing In the section, the substrate transport mechanism is used to transport the substrate to each of the following modules: a temperature adjustment module that adjusts the temperature of the substrate, a coating module that applies the coating liquid to the substrate, a heating module that heats the substrate, and a counter substrate. a developing module that performs development processing; a position at which the substrate is placed is referred to as a module, and a substrate on which the front number is formed by the substrate transport mechanism is located in a state of the downstream module, and the substrate is numbered on the downstream side, according to a predetermined transport schedule. This carries out a transport cycle; after the end of the transport cycle, the next transport cycle is carried out to carry out the transport of the substrate; the coating and development method is characterized by: a stabilization treatment step, the coating Performing at least one of the group and the heating module, after the module finishes processing the substrate of the preceding batch removed from a carrier, before the substrate of the subsequent batch is delivered to the module, The group performs stabilization processing; the transportation plan preparation step, and the transportation plan is: in the transportation plan, after the last substrate of the preceding batch is transferred to the processing unit, the initial substrate of the subsequent batch is transferred to the processing unit So, let the loop idle for a delay loop number; this delay The number of cycles is obtained by dividing the time required for the stabilization process by the maximum time required to execute one transport cycle, that is, the cycle time; and the substrate transport mechanism control step in which the stable target module is to be Performing a cycle of stabilization processing, and the loop of the stable object module has a stable processing remaining time, that is, the loop is executed to end, and each stable object module is determined one by one for the next loop before the start of the next loop. Appropriate time, and comparing the longest appropriate time and the execution time for implementing the execution cycle, the substrate transport mechanism is controlled to: when the appropriate time is long, the start standby of the cycle under the execution cycle is equivalent to the A period of time between the appropriate time and the time of implementation.
此時,該適當時間以{(該穩定對象模組之穩定處理剩餘時間)+(該實行循環之該實行時間)-(後續批次之基板被送入該穩定對象模組的循環中,基板運送機構用以傳遞該基板所需時間)}÷(到後續批次之基板從該實行循環被送入該穩定對象模組的循環為止的循環數)所演算。At this time, the appropriate time is {(the stable processing remaining time of the stable object module) + (the execution time of the execution cycle) - (the substrate of the subsequent batch is fed into the cycle of the stable object module, the substrate The time required for the transport mechanism to transfer the substrate is calculated as the number of cycles from the cycle in which the subsequent batch is fed to the stable target module.
而且,本發明之記憶媒體存放有塗佈、顯影裝置所使用的電腦程式,該塗佈、顯影裝置於處理部在從載置著收納複數片基板之載具的載具載置部所承接基板上形成塗佈膜,並對曝光後的基板進行顯影;其特徵為:該程式組合有步驟群俾於實行該塗佈、顯影方法。Further, the memory medium of the present invention stores a computer program used in the coating and developing device, and the coating and developing device receives the substrate from the carrier mounting portion on which the carrier for storing the plurality of substrates is placed in the processing unit. A coating film is formed thereon, and the exposed substrate is developed; and the program is combined with a step group to perform the coating and developing method.
如以上之說明,本發明中,於相同穩定對象模組處理先行批次之基板與後續批次之基板的情形,結束對該等先行批次之基板進行處理後,到對後續批次之基板進行處理為止,於該穩定對象模組進行穩定處理時,該模組之穩定處理結束後迅速地將後續批次之基板輸送至該穩定對象模組,藉此可達到處理量的提高。As described above, in the present invention, in the case where the same stable object module processes the substrate of the preceding batch and the subsequent batch of substrates, the substrate of the preceding batch is processed, and the substrate of the subsequent batch is processed. When the stabilization process is performed, the substrate of the subsequent batch is quickly transported to the stabilization target module after the stabilization process of the stabilization target module is completed, whereby the throughput can be improved.
(實施發明之最佳形態)(Best form of implementing the invention)
首先,一面參照圖式,一面說明顯影裝置上連接有曝光裝置 的抗蝕劑圖案形成裝置2。圖1顯示該裝置之一實施形態的俯視圖,圖2係同概略立體圖。圖中之B1為載具載置部,用以送入送出密閉收納有例如13片基板例如晶圓W的載具C,其設有:運送站22,可將載具C之複數個載置部21並排載置;開閉部23,從該運送站22觀之,設於前方的壁面;及傳遞機構24,用以從該載具C取出晶圓W,往後述處理部B2傳遞。First, an exposure device is connected to the developing device with reference to the drawings. The resist pattern forming device 2. Fig. 1 is a plan view showing an embodiment of the apparatus, and Fig. 2 is a schematic perspective view. In the figure, B1 is a carrier mounting portion for feeding and transporting a carrier C in which, for example, 13 substrates such as a wafer W are housed and sealed, and a transport station 22 is provided, and a plurality of carriers C can be placed. The unit 21 is placed side by side; the opening and closing unit 23 is disposed on the front wall surface as viewed from the transport station 22, and the transmission mechanism 24 is configured to take out the wafer W from the carrier C and transfer it to the processing unit B2, which will be described later.
該載具載置部B1之裏側連接著以框體25環繞周圍的處理部B2,於該處理部B2交替排列設有主臂A(A1、A2),形成基板運送機構,從前面側依序在多段化形成加熱‧冷卻系模組之棚架模組U1、U2、U3,及該等棚架模組U1~U3與後述液體處理模組U4、U5之各模組間進行晶圓W的傳遞。亦即,棚架模組U1、U2、U3及主臂A1、A2從載具載置部B1側觀之係排列成前後一列,各個連接部位形成未圖示之晶圓輸送用的開口部,晶圓W於處理部B2內從一端側之棚架模組U1到另一端側之棚架模組U3可自由移動。The processing unit B2 around the frame 25 is connected to the back side of the carrier mounting portion B1, and the main arm A (A1, A2) is alternately arranged in the processing unit B2 to form a substrate transport mechanism, which is sequentially arranged from the front side. The wafer W is formed between the scaffolding modules U1, U2, and U3 forming the heating and cooling module in a plurality of stages, and the scaffolding modules U1 to U3 and the respective modules of the liquid processing modules U4 and U5 to be described later. transfer. In other words, the scaffolding modules U1, U2, and U3 and the main arms A1 and A2 are arranged side by side from the side of the carrier mounting portion B1, and each of the connecting portions forms an opening for wafer transfer (not shown). The wafer W is freely movable in the processing unit B2 from the scaffolding module U1 on one end side to the scaffolding module U3 on the other end side.
該棚架模組U1、U2、U3構成將用以進行液體處理模組U4、U5所進行處理之前處理及後處理的各種模組堆疊成複數段例如10段,其組合包含:傳遞模組TRS;調溫模組CPL,用以將晶圓W調整至既定溫度;加熱模組CLH,用以進行晶圓W之加熱處理;加熱模組CPH,用以於塗佈抗蝕劑液後進行晶圓W之加熱處理;及加熱模組PEB等,於顯影處理前將晶圓W加熱處理;加熱模組POST,將顯影處理後之晶圓W加熱處理。The scaffolding modules U1, U2, and U3 are configured to stack various modules for processing and post-processing of the liquid processing modules U4 and U5 into a plurality of segments, for example, 10 segments, and the combination includes: a transfer module TRS The temperature regulating module CPL is used to adjust the wafer W to a predetermined temperature; the heating module CLH is used for heating the wafer W; and the heating module CPH is used for coating the resist liquid. The heat treatment of the circle W; and the heating module PEB, etc., heats the wafer W before the development process; the heating module POST, heats the wafer W after the development process.
又,液體處理模組U4、U5如圖2所示,將以下模組堆疊成複數段例如5段而構成:抗反射膜形成模組BCT,對晶圓W塗佈抗反射膜形成用的化學藥液;塗佈模組COT,在晶圓W塗佈抗蝕劑液;及顯影模組DEV等,對晶圓W供給顯影液以進行顯影處理。Further, as shown in FIG. 2, the liquid processing modules U4 and U5 are configured by stacking the following modules into a plurality of stages, for example, five stages: an anti-reflection film forming module BCT, and a chemical for forming an anti-reflection film on the wafer W. The chemical solution; the coating module COT applies a resist liquid to the wafer W; and the developing module DEV or the like, and supplies the developing solution to the wafer W to perform development processing.
於該處理部B2中之棚架模組U3的裏側經由介面部B3連接著曝光部B4。該介面部B3由在處理部B2與曝光部B4之間前後設置的第1運送室31及第2運送室32構成,各包含可任意升降 並可沿鉛直轉軸周圍任意旋轉且可任意進退的第1運送臂33及第2運送臂34。而且,第1運送室31設有例如傳遞模組等上下堆疊所設置的棚架模組U6。The exposure unit B4 is connected to the back side of the scaffolding module U3 in the processing unit B2 via the interfacial surface B3. The interfacial portion B3 is composed of a first transport chamber 31 and a second transport chamber 32 which are provided between the processing unit B2 and the exposure unit B4, and each of which can be arbitrarily raised and lowered. The first transport arm 33 and the second transport arm 34 are rotatable around the vertical axis of rotation and are arbitrarily movable forward and backward. Further, the first transport chamber 31 is provided with a scaffolding module U6 provided, for example, by a transfer module or the like.
就該加熱模組CPH而言,使用如下結構的裝置:包含用以將例如晶圓W載置於其上以加熱的加熱板,及兼作為運送臂的冷卻板,以冷卻板進行主臂A與加熱板之間的晶圓W傳遞,亦即能於1個模組進行加熱冷卻。For the heating module CPH, a device having a structure including a heating plate on which, for example, the wafer W is placed for heating, and a cooling plate serving as a transfer arm, and the main arm A is cooled by the cooling plate The wafer W is transferred to and from the heating plate, that is, it can be heated and cooled in one module.
以下說明該主臂A。此主臂A以於該處理部B2內之全部模組(放置晶圓W之位置),例如棚架模組U1~U3的各處理模組、液體處理模組U4、U5的各模組之間傳遞晶圓方式構成。因此以可任意進退、可任意升降、可沿鉛直轉軸周圍任意旋轉方式構成,並包含2支固持臂,用以支持晶圓W之背面側周緣區域,且該等固持臂以可互相獨立進退方式構成。The main arm A will be described below. The main arm A is used for all the modules in the processing unit B2 (the position where the wafer W is placed), for example, the processing modules of the scaffolding modules U1 to U3, and the modules of the liquid processing modules U4 and U5. Inter-transfer wafer configuration. Therefore, it can be arbitrarily advanced and retracted, can be arbitrarily raised and lowered, can be arbitrarily rotated around the vertical rotating shaft, and includes two holding arms for supporting the peripheral side region of the back side of the wafer W, and the holding arms can advance independently of each other. Composition.
針對此種抗蝕劑圖案形成系統之晶圓W移動過程的一例,以下參照圖3以說明之。載具載置部B1所載置之載具C內的晶圓W被傳遞至處理部B2之棚架模組U1的傳遞模組TRSA,由此以調溫模組CPL→抗反射膜形成模組BCT→加熱模組CLH→調溫模組CPL→塗佈模組COT→傳遞模組TRS→加熱模組CPH→介面部B3→曝光部B4的路徑輸送,而在此進行曝光處理。另一方面,曝光處理後的晶圓W被送回處理部B2,以加熱模組PEB→調溫模組CPL→顯影模組DEV→加熱模組POST→調溫模組CPL→棚架模組U1的傳遞模組TRSA的路徑輸送,並由此送回載具載置部B1之載具C。An example of the movement process of the wafer W for such a resist pattern forming system will be described below with reference to FIG. 3. The wafer W in the carrier C placed on the carrier mounting portion B1 is transferred to the transfer module TRSA of the scaffolding module U1 of the processing unit B2, thereby forming a mold by the temperature regulating module CPL→antireflection film. The BCT→heating module CLH→temperature regulating module CPL→coating module COT→transfer module TRS→heating module CPH→interfacial B3→exposure unit B4 path transport, and exposure processing is performed here. On the other hand, the wafer W after the exposure processing is sent back to the processing unit B2, and the heating module PEB→the temperature regulating module CPL→the developing module DEV→the heating module POST→the temperature regulating module CPL→the scaffolding module The path of the transfer module TRSA of U1 is transported and returned to the carrier C of the carrier mounting portion B1.
此時,於處理部B2內,主臂A(A1、A2)從棚架模組U1的傳遞模組TRSA承接晶圓,將該晶圓經由調溫模組CPL等而沿上述運送路徑依序輸送至加熱模組CPH後,從介面部B3承接曝光處理後的晶圓W,並將該晶圓經由加熱模組PEB等而沿上述運送路徑依序輸送至傳遞模組TRSA,如此以於處理部B2內進行運送循環之方式構成。該運送循環中如圖3所示,從傳遞模組TRSA到調溫模組CPL之運送係主臂A所為的最初運送,此時該傳遞模組 TRSA成為運送循環的起始模組。由於晶圓W係從載具載置部B1被傳遞至該傳遞模組TRSA,因此將晶圓W傳遞至該傳遞模組TRSA係將晶圓W傳遞至處理部B2,藉由主臂A從傳遞模組TRSA承接晶圓W而開始運送循環。At this time, in the processing unit B2, the main arm A (A1, A2) receives the wafer from the transfer module TRSA of the scaffolding module U1, and sequentially passes the wafer along the transport path via the temperature regulating module CPL or the like. After being transported to the heating module CPH, the exposed wafer W is received from the dielectric surface B3, and the wafer is sequentially transported to the transfer module TRSA along the transport path via the heating module PEB or the like, so as to be processed. The part B2 is configured to carry out a transport cycle. In the transport cycle, as shown in FIG. 3, the transport module TRSA is transferred from the transfer module TRSA to the transport system main arm A for the initial transport. The TRSA becomes the starting module for the transport cycle. Since the wafer W is transferred from the carrier mounting portion B1 to the transfer module TRSA, the wafer W is transferred to the transfer module TRSA to transfer the wafer W to the processing portion B2, and the main arm A is The transfer module TRSA takes the wafer W and starts the transport cycle.
另外,上述抗蝕劑圖案形成裝置包含控制部4,此控制部4由進行各處理模組之處方管理、晶圓W之運送流程(運送路徑)的處方管理、各處理模組之處理,及傳遞機構24、主臂A1、A2等之驅動控制的電腦所構成。該控制部4包含由例如電腦程式所構成的程式存放部,此程式存放部存放著由包含步驟(命令)群之例如軟體所構成的程式,俾於實施用以產生抗蝕劑圖案形成裝置整體之作用,亦即對晶圓W形成既定之抗蝕劑圖案的各處理模組的處理或晶圓W運送等。另外,該等程式由控制部4所讀取,藉此以控制部4控制抗蝕劑圖案形成裝置整體之作用。又,該程式以收納在例如軟碟、硬碟、光碟、磁光碟、記憶卡等之記憶媒體的狀態存放於程式存放部。Further, the resist pattern forming apparatus includes a control unit 4 that manages the location of each processing module, the recipe management of the wafer W transport process (transport path), and the processing of each processing module, and The transmission mechanism 24 and the main arm A1, A2 and the like are controlled by a computer. The control unit 4 includes a program storage unit including, for example, a computer program, and the program storage unit stores a program including a software including a step (command) group, and is implemented to generate a resist pattern forming device as a whole. The function of the processing module, the wafer W, and the like for forming a predetermined resist pattern on the wafer W. Further, the programs are read by the control unit 4, whereby the control unit 4 controls the overall function of the resist pattern forming apparatus. Further, the program is stored in the program storage unit in a state of being stored in a memory medium such as a floppy disk, a hard disk, a compact disk, a magneto-optical disk, or a memory card.
圖4係顯示該控制部4的構成者,實際上由CPU(中央處理模組)、程式與記憶體等所構成;但由於本發明中之特徵在於顯影處理前的晶圓W運送,故在此將與其關聯之部分構成要素方塊化而進行說明。圖4中之40為匯流排,該匯流排40連接著處方存放部41、處方選擇部42、穩定處理部43、運送計劃製作部44、待機控制部45、運送控制部46。4 is a diagram showing the configuration of the control unit 4, which is actually constituted by a CPU (Central Processing Module), a program, a memory, etc.; however, since the present invention is characterized in that the wafer W is transported before the development processing, This will be explained by boxing some of the components that are associated with it. 40 in FIG. 4 is a bus bar 40, and the prescription storage unit 41, the prescription selection unit 42, the stabilization processing unit 43, the transportation plan preparation unit 44, the standby control unit 45, and the conveyance control unit 46 are connected.
處方存放部41係相當於記憶部的部位,存放著儲存有例如晶圓W之運送路徑之運送處方,及對晶圓W所進行之處理條件等的複數處方。處方選擇部42係從處方存放部41所存放之處方選擇適當者的部位,也可輸入例如晶圓的處理片數或抗蝕劑的種類、加熱處理時的溫度等。The prescription storage unit 41 is a portion corresponding to the memory unit, and stores a plurality of prescriptions such as a shipping prescription in which a transport path of the wafer W is stored, and processing conditions for the wafer W. The prescription selection unit 42 selects a suitable portion from the place where the prescription storage unit 41 is stored, and may input, for example, the number of processed wafers, the type of the resist, the temperature during the heat treatment, and the like.
穩定處理部43係輸出指令的機構,該指令之要旨為:於從一個載具所移出的複數之同種晶圓的集合,即一個批次(以下稱「批次A」)之晶圓A在穩定對象模組結束既定處理後,對該模組進行穩定處理。所謂該穩定處理,係溫度變更處理,或塗佈模組COT之空注液處理等的調整處理等,將模組狀態調整的處理。此例中,穩定對象模組為加熱模組CPH,該模組之穩定處理係將加熱溫度變更成因應於後續其他批次(以下稱「批次B」)之晶圓B的溫度之處理。因此,於批次A之晶圓A的該加熱模組CPH之加熱處理結束後,對加熱模組CPH輸出用以進行加熱板之溫度變更的指令。The stabilization processing unit 43 is a mechanism for outputting a command for the collection of a plurality of wafers of the same type that are removed from one carrier, that is, one batch (hereinafter referred to as "batch A"). After the stable object module ends the predetermined process, the module is stabilized. The stabilization process is a process of adjusting the state of the module, such as a temperature change process or an adjustment process such as an empty liquid injection process of the coating module COT. In this example, the stabilization target module is the heating module CPH, and the stabilization process of the module changes the heating temperature to the processing of the temperature of the wafer B in response to subsequent batches (hereinafter referred to as "batch B"). Therefore, after the heating process of the heating module CPH of the wafer A of the lot A is completed, a command for changing the temperature of the heating plate is output to the heating module CPH.
運送計劃製作部44係依據該運送處方製作運送計劃的機構,該運送計劃係將內容為對於批次內之全部晶圓於何時間點輸送至何模組的計劃,例如將晶圓賦予編號,使晶圓之編號與各模組對應以指定運送循環的運送循環資料依時間順序排列所製作。此時,於該運送計劃製作部44將運送計劃製作成:在將先行批次A之最後的晶圓A傳遞至該處理部B2後,到將該後續批次B之最初的晶圓B傳遞至該處理部B2為止,令循環閒置一延遲循環數;該延遲循環數係將該穩定處理所需時間除以實行一個運送循環時所需的最大時間即循環時間而得到。The transportation plan preparation unit 44 is a mechanism for creating a transportation plan based on the transportation prescription, and the transportation plan is a plan for which module to which all the wafers in the batch are delivered to, for example, a wafer number. The number of wafers is created in accordance with the order of each module and the delivery cycle data of the specified transport cycle is arranged in chronological order. At this time, the transportation plan preparation unit 44 creates a transportation plan by transferring the wafer A at the end of the preceding batch A to the processing unit B2, and then transferring the first wafer B of the subsequent batch B. Until the processing unit B2, the cycle is idled by a delay cycle number obtained by dividing the time required for the stabilization process by the cycle time required to execute one transport cycle, that is, the cycle time.
待機控制部45係以下述方式控制主臂A的機構:該運送計劃中,於結束既定之實行循環,並開始下一個循環之前,對於各穩定對象模組逐一求出用以實行下一個循環的適當時間,並比較其中最長的適當時間與該實行循環的實行時間,於適當時間長時,等待相當於適當時間與該實行時間之差的時間,即等待該實行循環的下一個循環開始。The standby control unit 45 controls the mechanism of the main arm A in such a manner that the predetermined cycle is executed and the next cycle is started, and each of the stable object modules is determined one by one for the next cycle. Appropriate time, and compare the longest appropriate time with the execution time of the execution cycle, and wait for the time equivalent to the difference between the appropriate time and the execution time when the appropriate time is long, that is, wait for the next cycle of the execution cycle to start.
運送控制部46係運送循環實行機構,將傳遞機構24及主臂A1、A2控制成:參照該運送計劃,將運送循環資料所寫入的晶圓輸送至對應於該晶圓的模組,藉此實行運送循環。The conveyance control unit 46 is a conveyance cycle executing mechanism that controls the transfer mechanism 24 and the main arms A1 and A2 to transfer the wafer written in the transfer cycle data to the module corresponding to the wafer by referring to the transfer plan. This implements a shipping cycle.
接著,參照圖5及圖6,進行本實施形態的作用說明。首先,開始對基板,即晶圓W的處理之前,操作者進行處方的選擇;但在此如上述,以塗佈膜係形成抗反射膜,其上形成抗反射膜之情形為例進行說明。本發明中,由於特徵在於到穩定對象模組為止之晶圓W的運送路徑,因此以下以對抗蝕劑膜形成後之加熱模組CPH進行溫度穩定處理的情形為例,著眼於到該加熱模組CPH為止的運送路徑進行說明。Next, the operation of this embodiment will be described with reference to Figs. 5 and 6 . First, the operator selects the prescription before starting the processing of the substrate, that is, the wafer W. However, as described above, the case where the antireflection film is formed by the coating film and the antireflection film is formed thereon will be described as an example. In the present invention, since the transport path of the wafer W until the target module is stabilized, the case where the temperature stabilization process is performed on the heating module CPH after the formation of the resist film is taken as an example, focusing on the heating mode. The transportation route up to the group CPH will be described.
首先,如圖5所示,操作者對於批次A之5片晶圓A01~A05、及後續的批次B之5片晶圓B01~B05,選擇形成包含抗反射膜及抗蝕劑膜的塗佈膜時的處方(步驟S1)。接著,運送計劃製作部44依據所選擇之處方,製作批次A與批次B的運送計劃(步驟S2)。First, as shown in FIG. 5, the operator selects and forms an anti-reflection film and a resist film for the five wafers A01 to A05 of the batch A and the five wafers B01 to B05 of the subsequent batch B. The prescription at the time of coating the film (step S1). Next, the transportation plan preparation unit 44 creates a transportation plan for the lot A and the lot B based on the selected place (step S2).
此時,以下述方式製作運送計劃:批次A與批次B之間延遲以下式(2)所求出的延遲循環數,延遲從載具載置部B1往傳遞模組TRSA所進行的晶圓移出。At this time, the transportation plan is prepared as follows: the number of delay cycles obtained by the following formula (2) is delayed between the batch A and the batch B, and the crystal from the carrier mounting portion B1 to the transfer module TRSA is delayed. The circle is removed.
延遲循環數=穩定處理時間÷循環時間………(2)Delayed Cycles = Stable Processing Time ÷ Cycle Time... (2)
該穩定處理時間係穩定處理所需時間,此例中指加熱模組CPH之溫度穩定處理所需時間,例如為90秒。又,循環時間係指用以實行運送計劃之一個運送循環所需最大時間,此例中為22.8秒。因此為延遲循環數=90秒÷22.8秒=3.95,進位而成為4。The stabilization treatment time is the time required for the stabilization process, and in this example, the time required for the temperature stabilization process of the heating module CPH is, for example, 90 seconds. Again, the cycle time is the maximum time required to carry out a shipping cycle for the shipping schedule, in this case 22.8 seconds. Therefore, the number of delay cycles = 90 seconds ÷ 22.8 seconds = 3.95, and the carry becomes 4.
在此,處理部B2內之模組中,由於最晚的處理時間(晶圓對該模組之傳遞時間與處理所需時間的合計時間)為該運送循環的速率決定時間,因此該速率決定時間為循環時間。Here, in the module in the processing unit B2, since the latest processing time (the total time of the transfer time of the wafer to the module and the time required for the processing) is the rate of the transport cycle, the rate is determined. The time is the cycle time.
該運送計劃之一例顯示於圖6。此圖中,縱軸為循環,橫軸係按沿晶圓W之運送路徑的編號記載各模組,不同種類的模組中,圖6中之左側的模組為運送路徑的上游側模組,越往右側隔壁移動,越為運送路徑的下游側模組。又,運送計劃中之BCT1、BCT2意味著使用2個抗反射膜形成模組,CPH1~CPH5意味著使用5個加熱模組。An example of this shipping plan is shown in Figure 6. In the figure, the vertical axis is a cycle, and the horizontal axis describes each module according to the number of the transport path along the wafer W. Among the different types of modules, the module on the left side in FIG. 6 is the upstream side module of the transport path. The more moving to the right side of the partition, the more the downstream side of the transport path module. In addition, BCT1 and BCT2 in the transportation plan mean that two anti-reflection film forming modules are used, and CPH1 to CPH5 means that five heating modules are used.
該主臂A包含2支以上的固持臂,藉由將下游側之模組內的晶圓依序轉移至下一編號的模組,以形成前面編號之晶圓比起後面編號之晶圓位於下游側模組的狀態,藉此實行一個循環(運送循環);於結束該循環後,進入下一個循環,依序實行各循環,藉此以上述路徑,依序輸送晶圓而進行既定之處理。The main arm A includes two or more holding arms, and the wafers in the module on the downstream side are sequentially transferred to the module of the next number to form the wafer of the previous number than the wafer of the following number. The state of the downstream module is thereby performed by one cycle (transport cycle); after the cycle is completed, the process proceeds to the next cycle, and each cycle is sequentially executed, whereby the wafer is sequentially transported by the above path to perform predetermined processing. .
該運送計劃中,於循環3係批次A之最初的晶圓A01被送入抗反射膜形成模組BCT1,該晶圓A01亦於循環4在該抗反射膜形成模組BCT1內進行處理。循環5中,主臂A之一支固持臂將該晶圓A01從該抗反射膜形成模組BCT1送出,並將主臂A之另一支固持臂所固持的晶圓A03送入該抗反射膜形成模組BCT1,接著將該一支固持臂所固持的晶圓A01送入抗反射膜形成模組BCT2之下一個的下游側模組,即加熱模組CLH1。In the transportation plan, the first wafer A01 of the cycle 3 series lot A is sent to the anti-reflection film forming module BCT1, and the wafer A01 is also processed in the anti-reflection film forming module BCT1 in the cycle 4. In the cycle 5, one of the holding arms of the main arm A sends the wafer A01 from the anti-reflection film forming module BCT1, and the wafer A03 held by the other holding arm of the main arm A is sent to the anti-reflection. The film forming module BCT1 then sends the wafer A01 held by the one holding arm to the downstream side module of the anti-reflection film forming module BCT2, that is, the heating module CLH1.
以下回來說明延遲循環數。如上述,由於延遲循環數為4,因此製作運送計劃以使得從載具載置部B1往傳遞模組TRSA之晶圓移出延遲該延遲循環數。亦即,將運送計劃製作成:批次B之最初的晶圓B01於批次A之最後的晶圓A05被傳遞至傳遞模組TRSA後,以循環數4為空循環而空出以後再被傳遞至傳遞模組TRSA。亦即,批次A之最後的晶圓A05於循環5被傳遞至傳遞模組TRSA後,以恰循環數4為空循環而空出,其後批次B之最初的晶圓B01於循環10被傳遞至傳遞模組TRSA。The following is a description of the number of delay cycles. As described above, since the number of delay cycles is four, a transportation plan is created such that the wafer from the carrier mounting portion B1 to the transfer module TRSA is delayed by the number of delay cycles. That is, the transportation plan is prepared such that the first wafer B01 of the batch B is transferred to the transfer module TRSA at the last wafer A05 of the lot A, and is vacated after the cycle number 4 is vacated. Passed to the delivery module TRSA. That is, after the last wafer A05 of the batch A is transferred to the transfer module TRSA in the cycle 5, it is vacated with the just cycle number 4 as an empty cycle, and then the initial wafer B01 of the batch B is in the cycle 10 Passed to the delivery module TRSA.
其次,控制部4一面參照所製作的運送計劃,一面輸出指示到各部,實行對批次A之晶圓A的處理(步驟S3),並直接依據運送計劃直到實行循環22。此時,於循環22開始加熱模組CPH1的溫度穩定處理(步驟S4)。又,圖6之運送循環中的斜線部分意味著實行溫度穩定處理。Next, the control unit 4 outputs the instruction to each unit with reference to the created transportation plan, and performs the processing of the wafer A of the lot A (step S3), and directly executes the cycle 22 in accordance with the transportation plan. At this time, the temperature stabilization process of the heating module CPH1 is started in the cycle 22 (step S4). Further, the hatched portion in the transport cycle of Fig. 6 means that the temperature stabilization process is performed.
接著,待機控制部45於滿足以下條件(1)、(2)兩者的實行循環結束時,在下一個循環開始前,判斷是否進行主臂A的待機控制。在此,所謂下一個循環開始前,係主臂A回到臨向運送循環之開始模組,即傳遞模組TRSA的位置,並由此開始下一個循環之時。又,主臂A的待機控制係指對於主臂A從該傳遞模組TRSA承接晶圓,將其控制成待機既定時間。Next, when the execution cycle of both of the following conditions (1) and (2) is satisfied, the standby control unit 45 determines whether or not the standby control of the main arm A is performed before the start of the next cycle. Here, before the start of the next cycle, the main arm A returns to the start module of the forward transport cycle, that is, the position of the transfer module TRSA, and thus the next cycle is started. Further, the standby control of the main arm A means that the main arm A receives the wafer from the transfer module TRSA and controls it to stand by for a predetermined period of time.
條件(1)有在某個穩定對象模組進行穩定處理的過去經過Condition (1) has a past process of stabilization in a stable object module
條件(2)存在穩定處理之剩餘時間Condition (2) There is remaining time for stabilization processing
在此,針對條件(1)進行說明。有在某個穩定對象模組進行穩定處理的過去經過係指已在某個穩定對象模組進行穩定處理;此例中,由於加熱模組CPH1在循環22開始穩定處理,即溫度穩定處理,因此於結束循環22的時點,有在該加熱模組CPH1進行穩定處理的過去經過。因此圖中所示之運送計劃中,滿足條件(1)的循環結束時為指循環22~循環29結束時。Here, the condition (1) will be described. In the past, the stable process of a stable object module has been stabilized in a stable object module; in this example, since the heating module CPH1 starts stable processing in cycle 22, that is, temperature stabilization processing, At the time of ending the cycle 22, there is a past passage in which the heating module CPH1 performs stabilization processing. Therefore, in the transportation plan shown in the figure, the end of the cycle satisfying the condition (1) means the end of the cycle 22 to the cycle 29.
至於條件(2),此例中由於加熱模組CPH1在循環25結束穩定處理,即溫度穩定,故循環22~循環24係存在穩定處理之剩餘時間的循環。因此圖中所示之運送計劃中,滿足條件(2)的循環結束時為循環22~循環28結束時。As for the condition (2), in this example, since the heating module CPH1 is stabilized at the end of the cycle 25, that is, the temperature is stable, the cycle 22 to the cycle 24 are cycles in which the remaining time of the stabilization process exists. Therefore, in the transportation plan shown in the figure, when the cycle satisfying the condition (2) is completed, the cycle 22 to the end of the cycle 28 is completed.
依以上說明,該運送計劃中,滿足上述條件(1)(2)兩者的實行循環結束時成為實行循環22~循環28結束時,該等實行循環22~28中,於開始後續之循環23~29以前演算各個主臂A的適當時間T2,以依據該演算結果判斷是否進行主臂A的待機控制。在此,該適當時間T2係主臂A用以實行該實行循環之下一個循環的理想時間,依據下式(3)所演算。According to the above description, in the transportation plan, when the execution of both the above-mentioned conditions (1) and (2) is completed, the loop 22 is executed until the end of the loop 28, and the loops 22 to 28 are executed, and the subsequent loop 23 is started. Before the ~29, the appropriate time T2 of each of the main arms A is calculated to determine whether or not the standby control of the main arm A is performed based on the calculation result. Here, the appropriate time T2 is the ideal time for the main arm A to perform a cycle under the execution cycle, and is calculated according to the following formula (3).
適當時間T2=(I+II-III)÷IV………(3)Appropriate time T2=(I+II-III)÷IV.........(3)
I:該穩定對象模組之穩定處理剩餘時間I: The remaining processing time of the stable object module
II:實行循環之實行時間II: Implementation of the cycle implementation time
III:後續的批次B之晶圓B被送入該穩定對象模組的循環中之主臂A移載時間III: The transfer time of the main arm A in the cycle of the subsequent batch B wafer B being fed into the stable object module
IV:到後續的批次B之晶圓B從實行循環被送入該穩定對象模組為止的循環數IV: Number of cycles until the subsequent batch B wafer B is fed into the stable object module from the execution cycle
具體而言,針對循環22結束而循環23開始時之主臂A的適當時間T2的演算,進行說明。此時,實行循環為循環22,穩定對象模組為加熱模組CPH1,而I-IV如下。又,實行循環之實行時間(II)係實際實行該實行循環時所需時間,該實行時間有變化係由於未實施以一定間隔進行運送的控制。Specifically, the calculation of the appropriate time T2 of the main arm A at the start of the cycle 23 at the end of the cycle 22 will be described. At this time, the loop is executed as the loop 22, and the stable target module is the heating module CPH1, and I-IV is as follows. Further, the execution time (II) of the execution of the cycle is the time required to actually execute the execution cycle, and the change of the execution time is because the control of the transportation at a constant interval is not performed.
I:73秒I: 73 seconds
II:實行循環22之實行時間為26秒II: The implementation time of the implementation loop 22 is 26 seconds.
III:晶圓B01被送入該加熱模組CPH1的循環為循環26,該循環26中所移載之晶圓W為B05、B02、B01,其移載時間為9.5秒III: The cycle in which the wafer B01 is fed into the heating module CPH1 is the cycle 26, and the wafer W transferred in the cycle 26 is B05, B02, B01, and the transfer time is 9.5 seconds.
IV:到晶圓B01從實行循環22被送入該加熱模組CPH1的循環26為止的循環數為(26-22)=4IV: The number of cycles until the wafer B01 is fed into the cycle 26 of the heating module CPH1 from the execution cycle 22 is (26-22)=4
因此,該適當時間T2由式(3)演算為:T2=(73+26-9.5)÷4=22.375秒→22.4秒(步驟S5)。Therefore, the appropriate time T2 is calculated by the equation (3) as: T2 = (73 + 26 - 9.5) ÷ 4 = 22.375 seconds → 22.4 seconds (step S5).
然後,對於是否進行主臂A的待機控制,比較該適當時間T2與實行循環22的實行時間(26秒),判斷出:適當時間T2較長時,實行主臂A的待機控制,較短時則不實行該待機控制。此例中,由於適當時間T2<實行時間,因此判斷為不實行該待機控制,且不實行主臂A的待機控制而實行後續之循環23(步驟S6)。Then, whether or not the standby control of the main arm A is performed, the appropriate time T2 is compared with the execution time (26 seconds) of the execution cycle 22, and it is determined that the standby control of the main arm A is performed when the appropriate time T2 is long, and the standby time is short. This standby control is not implemented. In this example, since the appropriate time T2 < the execution time, it is determined that the standby control is not executed, and the standby control of the main arm A is not performed, and the subsequent loop 23 is executed (step S6).
再來,同樣針對循環23結束而循環24開始時之主臂的待機控制,進行說明。此時,實行循環為循環23,穩定對象模組為加熱模組CPH1及加熱模組CPH2,演算各個情形的適當時間T2(步驟S7),比較任一個較長的適當時間T2與實行循環23之實行時間以判斷是否進行主臂的待機控制(步驟S8)。Next, the standby control of the main boom at the start of the cycle 24 at the end of the cycle 23 will be described. At this time, the loop is executed as the loop 23, and the stabilization target module is the heating module CPH1 and the heating module CPH2, and the appropriate time T2 for each situation is calculated (step S7), and any longer appropriate time T2 and execution cycle 23 are compared. The time is implemented to determine whether or not the standby control of the main arm is performed (step S8).
首先,關於加熱模組CPH1,I~IV如下。First, regarding the heating module CPH1, I to IV are as follows.
I:53秒I: 53 seconds
II:實行循環23之實行時間為20秒II: The implementation time of the implementation of the loop 23 is 20 seconds.
III:由於晶圓B01於循環26被送入該加熱模組CPH1,因此其移載時間如上述為9.5秒III: Since the wafer B01 is fed into the heating module CPH1 in the cycle 26, the transfer time is 9.5 seconds as described above.
IV:到晶圓B01從實行循環23被送入該加熱模組CPH1的循環26為止的循環數為(26-23)=3IV: The number of cycles until the wafer B01 is fed into the cycle 26 of the heating module CPH1 from the execution cycle 23 is (26-23)=3
因此,適當時間T2由式(3)演算為:T2=(53+20-9.5)÷3=21.167秒→21.2秒。Therefore, the appropriate time T2 is calculated by the equation (3) as: T2 = (53 + 20 - 9.5) ÷ 3 = 21.167 seconds → 21.2 seconds.
同樣地,關於加熱模組CPH2,I~IV如下。Similarly, regarding the heating module CPH2, I to IV are as follows.
I:77秒I: 77 seconds
II:實行循環23之實行時間為20秒II: The implementation time of the implementation of the loop 23 is 20 seconds.
III:晶圓B02於循環27被送入該加熱模組CPH2,該循環27中所移載之晶圓W為B02、B03,其移載時間為6秒III: Wafer B02 is sent to the heating module CPH2 in the cycle 27, and the wafer W transferred in the cycle 27 is B02, B03, and the transfer time is 6 seconds.
IV:到晶圓B02從實行循環23被送入該加熱模組CPH2的循環27為止的循環數為(27-23)=4IV: The number of cycles until the wafer B02 is sent to the cycle 27 of the heating module CPH2 from the execution cycle 23 is (27-23)=4
因此,適當時間T2由式(3)演算為:T2=(77+20-6)÷4=22.75秒→22.8秒。Therefore, the appropriate time T2 is calculated by the equation (3) as: T2 = (77 + 20-6) ÷ 4 = 22.75 seconds → 22.8 seconds.
如上述,由於加熱模組CPH1的適當時間T2為21.2秒,加熱模組CPH2的適當時間T2為22.8秒,故比較較長的適當時間T2(22.8秒)與實行循環23之實行時間(20秒)。此時,由於適當時間T2>實行時間,因此以適當時間T2-實行時間求出主臂的待機時間T3。此情形中,求出待機時間T3為22.8秒-20秒=2.8秒,例如進位而進行主臂A的待機控制3秒鐘。亦即此例中,實行循環23結束以後而開始後續之循環24時,於主臂A臨向循環開始點,及傳遞模組TRSA的位置,以相當於待機時間的時間(3秒)定時進行待機調整以後,從加熱模組CLH4承接晶圓B05,如此開始循環24(步驟S8)。As described above, since the appropriate time T2 of the heating module CPH1 is 21.2 seconds, and the appropriate time T2 of the heating module CPH2 is 22.8 seconds, the longer appropriate time T2 (22.8 seconds) and the execution time of the execution cycle 23 (20 seconds) ). At this time, since the appropriate time T2>the execution time, the standby time T3 of the main arm is obtained at the appropriate time T2-execution time. In this case, the standby time T3 is determined to be 22.8 seconds to 20 seconds = 2.8 seconds, and for example, the standby control of the main arm A is performed for 3 seconds. In this example, when the subsequent cycle 24 is started after the end of the loop 23, the position of the main arm A approaching the cycle start point and the transfer module TRSA is performed at a timing equivalent to the standby time (3 seconds). After the standby adjustment, the wafer B05 is received from the heating module CLH4, and the cycle 24 is started (step S8).
進而,針對循環24結束而循環25開始時之主臂A的待機控制,進行說明。此時,穩定對象模組為加熱模組CPH1、加熱模組CPH2及加熱模組CPH3,實行循環為循環24。Further, the standby control of the main arm A at the start of the cycle 25 at the end of the cycle 24 will be described. At this time, the stabilization target module is the heating module CPH1, the heating module CPH2, and the heating module CPH3, and the circulation is performed as the cycle 24.
首先,關於加熱模組CPH1,I~IV如下。First, regarding the heating module CPH1, I to IV are as follows.
I:33秒I: 33 seconds
II:實行循環24之實行時間為20秒II: The implementation time of the implementation of the loop 24 is 20 seconds.
III:晶圓B01於循環26被送入該加熱模組CPH1,該循環26中的移載時間如上述為9.5秒III: Wafer B01 is fed into the heating module CPH1 in cycle 26, and the transfer time in the cycle 26 is 9.5 seconds as described above.
IV:到晶圓B01從實行循環24被送入該加熱模組CPH1的循環26為止的循環數為(26-24)=2IV: The number of cycles until the wafer B01 is fed into the cycle 26 of the heating module CPH1 from the execution cycle 24 is (26-24)=2
因此,適當時間T2由式(3)求出為:T2=(33+20-9.5)÷2=21.75秒→21.8秒。Therefore, the appropriate time T2 is obtained from the equation (3) as: T2 = (33 + 20 - 9.5) ÷ 2 = 21.75 sec → 21.8 sec.
其次,關於加熱模組CPH2,I~IV如下。Next, regarding the heating module CPH2, I to IV are as follows.
I:57秒I: 57 seconds
II:實行循環24之實行時間為20秒II: The implementation time of the implementation of the loop 24 is 20 seconds.
III:晶圓B02於循環27被送入該加熱模組CPH2,於該循環27移載時間如上述為6秒III: Wafer B02 is sent to the heating module CPH2 in the cycle 27, and the transfer time of the cycle 27 is 6 seconds as described above.
IV:到晶圓B02從實行循環24被送入該加熱模組CPH2的循環27為止的循環數為(27-24)=3IV: The number of cycles until the wafer B02 is fed into the cycle 27 of the heating module CPH2 from the execution cycle 24 is (27-24)=3
因此,適當時間T2由式(3)求出為:T2=(57+20-6)÷3=23.67秒→23.7秒。Therefore, the appropriate time T2 is obtained from the equation (3) as: T2 = (57 + 20-6) ÷ 3 = 23.67 seconds → 23.7 seconds.
最後,關於加熱模組CPH3,I~IV如下。Finally, regarding the heating module CPH3, I~IV are as follows.
I:76秒I: 76 seconds
II:實行循環24之實行時間為20秒II: The implementation time of the implementation of the loop 24 is 20 seconds.
III:晶圓B03於循環28被送入該加熱模組CPH3,該循環28中所移載之晶圓W為B04、B03,其移載時間為6秒III: Wafer B03 is sent to the heating module CPH3 in the cycle 28, and the wafer W transferred in the cycle 28 is B04, B03, and the transfer time is 6 seconds.
IV:到晶圓B03從實行循環24被送入該加熱模組CPH3的循環28為止的循環數為(28-24)=4IV: The number of cycles until the wafer B03 is fed into the cycle 28 of the heating module CPH3 from the execution cycle 24 is (28-24)=4
因此,適當時間T2由式(3)求出為:T2=(76+20-6)÷4=22.5秒。Therefore, the appropriate time T2 is obtained from the equation (3) as: T2 = (76 + 20-6) ÷ 4 = 22.5 seconds.
如上述,由於加熱模組CPH1的適當時間T2為21.8秒,加熱模組CPH2的適當時間T2為23.7秒,加熱模組CPH3的適當時間T2為22.5秒(步驟S9),故比較最長的適當時間T2(23.7秒)與實行循環24之實行時間(20秒)。此時,由於適當時間T2>實行時間,因此以適當時間T2-實行時間求出主臂A的待機時間T3(3.7秒→進位為4秒),主臂A待機4秒鐘以後再開始後續之循環25(步驟10)。As described above, since the appropriate time T2 of the heating module CPH1 is 21.8 seconds, the appropriate time T2 of the heating module CPH2 is 23.7 seconds, and the appropriate time T2 of the heating module CPH3 is 22.5 seconds (step S9), so the longest appropriate time is compared. T2 (23.7 seconds) and implementation time of loop 24 (20 seconds). At this time, since the appropriate time T2>the execution time, the standby time T3 of the main arm A is obtained at the appropriate time T2-execution time (3.7 seconds→the carry is 4 seconds), and the main arm A stands by for 4 seconds and then starts the subsequent operation. Loop 25 (step 10).
如以上說明,以循環22~循環28為實行循環,於結束該等實行循環而開始下一個循環前,對於各穩定對象模組逐一求出用以實行下一個循環的適當時間,並比較其中最長的適當時間與該實行循環之實行時間,以一面將主臂A控制成:適當時間較長時,待機相當於適當時間與該實行時間之差的時間,即等待該實行循環的下一個循環開始,一面依據上述運送計劃實行剩餘的循環。As described above, loops 22 to 28 are used to execute the loop, and before the end of the loop is executed and the next loop is started, the appropriate time for executing the next loop is determined one by one for each stable object module, and the longest one is compared. The appropriate time and the execution time of the execution cycle are such that the main arm A is controlled such that when the appropriate time is long, the standby is equivalent to the time between the appropriate time and the execution time, that is, the next cycle of waiting for the execution cycle is started. The remaining cycle is implemented in accordance with the above transportation plan.
此種抗蝕劑圖案形成裝置中,即使於處理部B2對先行批次A之晶圓A與後續批次B之晶圓B連續進行處理的情形,而在對批次A之晶圓A的處理與對批次B之晶圓B的處理之間,進行穩定對象模組的穩定處理時,可抑制晶圓B對該模組的運送時間點提早,或者延遲的事態發生。In such a resist pattern forming apparatus, even in the case where the processing unit B2 continuously processes the wafer A of the preceding batch A and the wafer B of the subsequent batch B, the wafer A of the batch A is processed. When the stabilization process of the stabilization target module is performed between the processing of the wafer B and the processing of the wafer B of the batch B, it is possible to suppress the advancement of the wafer B to the module, or the occurrence of a delay.
也就是說,由於先在製作運送計劃時,空出相當於穩定處理所需時間的循環,而將晶圓W從載具載置部B1移出到處理部 B2,因此可抑制晶圓B對該模組的運送時間點提早,而在該穩定處理結束前將晶圓B輸送至該模組的事態發生。In other words, since the cycle corresponding to the time required for the stabilization process is vacated at the time of the production of the transportation plan, the wafer W is removed from the carrier placement portion B1 to the processing portion. B2, therefore, it is possible to suppress the advancement of the transport time of the wafer B to the module, and the situation in which the wafer B is transported to the module before the end of the stabilization process occurs.
如上述,由於防止在該穩定處理結束前將晶圓B輸送至該模組,因此抑制如下之事態發生:晶圓B無法傳遞至該模組,而主臂A於固持該晶圓B之狀態下待機,無法進行該運送循環而停止。藉此,由於主臂A不致於停止,而能以穩定狀態依序實行運送計劃,因此能順利進行晶圓運送,可達到處理量的提高。As described above, since the wafer B is prevented from being transported to the module before the end of the stabilization process, the following situation is suppressed: the wafer B cannot be transferred to the module, and the main arm A is holding the wafer B. Stand by, it is impossible to stop the transport cycle. Thereby, since the main arm A is not stopped, the transportation plan can be sequentially executed in a stable state, so that wafer transportation can be smoothly performed, and the throughput can be improved.
又,滿足既定之條件的循環中,求出實行下一個循環時的適當時間T2,藉由將主臂A的定時控制成:該時間比實行循環之實行時間長時,待機相當於適當時間T2-實行時間的時間,即等待從運送循環之開始模組承接晶圓W,以抑制晶圓B對該模組的運送時間點變慢,可於穩定處理結束以後,馬上將晶圓B01送入該穩定對象模組。因此,抑制與先行批次A之晶圓A的運送間隔過度空出,可防止發生晶圓對曝光裝置的供給延遲。由於可如此從處理部B2通往曝光裝置B4順利地進行晶圓運送,故由此觀點而言亦可達到處理量的提高。Further, in the cycle satisfying the predetermined condition, the appropriate time T2 when the next cycle is executed is obtained, and the timing of the main arm A is controlled such that the time is longer than the execution time of the execution cycle, and the standby is equivalent to the appropriate time T2. - the time of implementation, that is, waiting for the module to receive the wafer W from the beginning of the transport cycle, to suppress the slowing of the transport time of the wafer B to the module, and the wafer B01 can be sent immediately after the stabilization process is completed. The stable object module. Therefore, it is suppressed that the transport interval of the wafer A with the preceding lot A is excessively vacated, and the supply delay of the wafer to the exposure apparatus can be prevented from occurring. Since the wafer transfer can be smoothly performed from the processing unit B2 to the exposure device B4 in this manner, the throughput can be improved from this viewpoint.
在此,該適當時間如上述式(3)所示,係用以實行該實行循環之下一個循環的理想時間,係考慮穩定對象模組之穩定處理剩餘時間及實行循環之實行時間等的過去經過所求出。另外,每次實行循環結束時,求出該適當時間,比較該適當時間與實行時間,而僅在適當時間較長時進行主臂的待機控制,藉此可於每次實行循環結束時重新評估進行下一個循環的時間,因此可控制成:必要時待機必要之最低限度的時間,即等待下一個循環開始。相對於此,習知的控制方法中,由於以運送循環之最大時間,即循環時間為基準而進行控制,因此比起如本發明中對於各實行循環逐一求出適當時間的情形,待機時間變得過長,模組之穩定處理結束以後到將晶圓B送入該穩定對象模組為止的時間變長。Here, the appropriate time is as shown in the above formula (3), and is an ideal time for performing a cycle under the execution cycle, considering the past of the stable processing time of the stable target module and the execution time of the execution cycle. After the determination. Further, each time the loop is completed, the appropriate time is obtained, the appropriate time and the execution time are compared, and the standby control of the main arm is performed only when the appropriate time is long, whereby the re-evaluation can be performed at the end of each execution cycle. The time for the next cycle is performed, so it can be controlled to: if necessary, wait for the minimum time necessary, that is, wait for the next cycle to start. On the other hand, in the conventional control method, since the control is performed based on the maximum time of the transport cycle, that is, the cycle time, the standby time is changed as compared with the case where the appropriate time is obtained for each of the execution cycles as in the present invention. If it is too long, the time until the wafer B is sent to the stable object module after the stabilization process of the module is completed becomes long.
以上之說明中,作為本發明之穩定對象模組,除加熱模組以外,也可使用塗佈模組。該塗佈模組以如下方式構成:以轉夾盤將晶圓W以可旋轉方式固持,並從塗佈噴嘴對該旋轉夾盤上的晶圓W滴入塗佈液,而令該晶圓W旋轉,藉此對晶圓W塗佈塗佈液;而此時之穩定處理係於對基板供給塗佈液前,預備性地從噴嘴噴出塗佈液的空注液處理。又,穩定處理包含用以進行抗蝕劑液之調溫處理、邊緣曝光裝置之亮度穩定處理等晶圓處理的全部預備處理。In the above description, as the stabilization target module of the present invention, a coating module may be used in addition to the heating module. The coating module is configured to rotatably hold the wafer W with a transfer chuck, and drip the coating liquid onto the wafer W on the rotary chuck from the coating nozzle, thereby making the wafer W is rotated to apply a coating liquid to the wafer W. At this time, the stabilization treatment is performed by preemptively discharging the coating liquid from the nozzle before supplying the coating liquid to the substrate. Further, the stabilization process includes all preparatory processes for performing wafer processing such as temperature adjustment processing of the resist liquid and brightness stabilization processing of the edge exposure apparatus.
而且,本發明對於塗佈、顯影裝置之晶圓W的運送控制亦可適用,該塗佈、顯影裝置包含抗蝕劑液塗佈單元及抗反射膜形成單元,且分開用以形成抗蝕劑膜的區塊,及進行顯影處理的區塊,而將晶圓從載具區塊往曝光裝置移動的運送路徑,及從曝光裝置移動至載具區塊的運送路徑各自獨立形成。又,本發明不僅半導體晶圓,也可適用於處理所謂液晶顯示器用之玻璃基板(LCD基板)的基板的塗佈、顯影裝置。Further, the present invention is also applicable to the conveyance control of the wafer W of the coating and developing apparatus, and the coating and developing apparatus includes a resist liquid coating unit and an anti-reflection film forming unit, and is separately used to form a resist. The block of the film and the block subjected to the development process are independently formed by the transport path for moving the wafer from the carrier block to the exposure device and the transport path for moving from the exposure device to the carrier block. Moreover, the present invention is applicable not only to a semiconductor wafer but also to a coating and developing apparatus for processing a substrate of a glass substrate (LCD substrate) for a liquid crystal display.
1A...載具載置部1A. . . Vehicle placement
1B...處理部1B. . . Processing department
1C...介面部1C. . . Face
1D...曝光裝置1D. . . Exposure device
2...抗蝕劑圖案形成裝置2. . . Resist pattern forming device
4...控制部4. . . Control department
10...載具10. . . vehicle
11...運送平台11. . . Shipping platform
12...傳遞臂12. . . Transfer arm
13...塗佈模組13. . . Coating module
14...顯影模組14. . . Developing module
15a~15c...棚架模組15a~15c. . . Scaffolding module
16A、16B...主臂16A, 16B. . . Main arm
21...載置部twenty one. . . Mounting department
22...運送站twenty two. . . Transport station
23...開閉部twenty three. . . Opening and closing department
24...傳遞機構twenty four. . . Transmission mechanism
25...框體25. . . framework
31、32...運送室31, 32. . . Shipping room
33、34...運送臂33, 34. . . Transport arm
40...匯流排40. . . Busbar
41...處方存放部41. . . Prescription storage department
42...處方選擇部42. . . Prescription selection department
43...穩定處理部43. . . Stable processing department
44...運送計劃製作部44. . . Transportation Planning Department
45...待機控制部45. . . Standby control unit
46...運送控制部46. . . Transportation control department
A1、A2...主臂A1, A2. . . Main arm
B1...載具載置部B1. . . Vehicle placement
B2...處理部B2. . . Processing department
B3...介面部B3. . . Face
B4...曝光部(曝光裝置)B4. . . Exposure section (exposure device)
BCT...抗反射膜形成模組BCT. . . Anti-reflection film forming module
C...載具C. . . vehicle
CLH、CPH...加熱模組CLH, CPH. . . Heating module
COT...塗佈模組COT. . . Coating module
CPL...調溫模組CPL. . . Temperature control module
DEV...顯影模組DEV. . . Developing module
PEB、POST...加熱模組PEB, POST. . . Heating module
S1~S10...步驟S1~S10. . . step
TRS、TRSA...傳遞模組TRS, TRSA. . . Transfer module
U1~U3、U6...棚架模組U1~U3, U6. . . Scaffolding module
U4、U5...液體處理模組U4, U5. . . Liquid processing module
W...半導體晶圓W. . . Semiconductor wafer
圖1係顯示依本發明之抗蝕劑圖案形成裝置之實施形態的俯視圖。Fig. 1 is a plan view showing an embodiment of a resist pattern forming apparatus according to the present invention.
圖2係顯示該抗蝕劑圖案形成裝置的立體圖。Fig. 2 is a perspective view showing the resist pattern forming device.
圖3係顯示該抗蝕劑圖案形成裝置之處理部內的晶圓W之運送路徑的俯視圖。3 is a plan view showing a conveyance path of the wafer W in the processing portion of the resist pattern forming apparatus.
圖4係顯示該抗蝕劑圖案形成裝置之控制部之一部分的構成圖。Fig. 4 is a view showing a configuration of a part of a control unit of the resist pattern forming apparatus.
圖5係用以說明該抗蝕劑圖案形成裝置之作用的程序圖。Fig. 5 is a flowchart for explaining the action of the resist pattern forming device.
圖6係顯示該抗蝕劑圖案形成裝置所使用的運送計劃之一例的運送計劃。Fig. 6 is a view showing a transportation plan of an example of a transportation plan used in the resist pattern forming apparatus.
圖7係顯示習知的塗佈、顯影裝置的俯視圖。Fig. 7 is a plan view showing a conventional coating and developing device.
圖8係顯示習知的運送計劃之一例的構成圖。Fig. 8 is a configuration diagram showing an example of a conventional transportation plan.
S1~S10...步驟S1~S10. . . step
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