TWI397962B - 半導體結構與其形成方法 - Google Patents
半導體結構與其形成方法 Download PDFInfo
- Publication number
- TWI397962B TWI397962B TW097125668A TW97125668A TWI397962B TW I397962 B TWI397962 B TW I397962B TW 097125668 A TW097125668 A TW 097125668A TW 97125668 A TW97125668 A TW 97125668A TW I397962 B TWI397962 B TW I397962B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- germanium
- rich
- refractory metal
- forming
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 44
- 238000000034 method Methods 0.000 title claims description 41
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 72
- 229910052732 germanium Inorganic materials 0.000 claims description 70
- 239000003870 refractory metal Substances 0.000 claims description 59
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 35
- 229910052707 ruthenium Inorganic materials 0.000 claims description 35
- 229910052751 metal Inorganic materials 0.000 claims description 33
- 239000002184 metal Substances 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 32
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 26
- 229920005591 polysilicon Polymers 0.000 claims description 26
- VGRFVJMYCCLWPQ-UHFFFAOYSA-N germanium Chemical compound [Ge].[Ge] VGRFVJMYCCLWPQ-UHFFFAOYSA-N 0.000 claims description 17
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 16
- 125000006850 spacer group Chemical group 0.000 claims description 11
- XSOKHXFFCGXDJZ-UHFFFAOYSA-N telluride(2-) Chemical compound [Te-2] XSOKHXFFCGXDJZ-UHFFFAOYSA-N 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 10
- 230000005496 eutectics Effects 0.000 claims description 9
- GPMBECJIPQBCKI-UHFFFAOYSA-N germanium telluride Chemical compound [Te]=[Ge]=[Te] GPMBECJIPQBCKI-UHFFFAOYSA-N 0.000 claims description 8
- 229910052697 platinum Inorganic materials 0.000 claims description 8
- 229910052684 Cerium Inorganic materials 0.000 claims description 7
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 claims description 7
- 239000011819 refractory material Substances 0.000 claims description 7
- 229910052741 iridium Inorganic materials 0.000 claims description 6
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 claims description 6
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 5
- 229910003855 HfAlO Inorganic materials 0.000 claims description 3
- 229910004129 HfSiO Inorganic materials 0.000 claims description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 3
- 229910052735 hafnium Inorganic materials 0.000 claims description 3
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 239000011733 molybdenum Substances 0.000 claims description 3
- 229910052702 rhenium Inorganic materials 0.000 claims description 3
- WUAPFZMCVAUBPE-UHFFFAOYSA-N rhenium atom Chemical compound [Re] WUAPFZMCVAUBPE-UHFFFAOYSA-N 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- SCCCLDWUZODEKG-UHFFFAOYSA-N germanide Chemical compound [GeH3-] SCCCLDWUZODEKG-UHFFFAOYSA-N 0.000 claims 3
- 230000008569 process Effects 0.000 description 13
- 230000015572 biosynthetic process Effects 0.000 description 9
- 238000000137 annealing Methods 0.000 description 7
- 238000000151 deposition Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 229910052797 bismuth Inorganic materials 0.000 description 5
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 3
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910004200 TaSiN Inorganic materials 0.000 description 2
- MRPWWVMHWSDJEH-UHFFFAOYSA-N antimony telluride Chemical compound [SbH3+3].[SbH3+3].[TeH2-2].[TeH2-2].[TeH2-2] MRPWWVMHWSDJEH-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- VLJQDHDVZJXNQL-UHFFFAOYSA-N 4-methyl-n-(oxomethylidene)benzenesulfonamide Chemical compound CC1=CC=C(S(=O)(=O)N=C=O)C=C1 VLJQDHDVZJXNQL-UHFFFAOYSA-N 0.000 description 1
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 206010062717 Increased upper airway secretion Diseases 0.000 description 1
- -1 IrSi Chemical class 0.000 description 1
- 229910016006 MoSi Inorganic materials 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- HITXEXPSQXNMAN-UHFFFAOYSA-N bis(tellanylidene)molybdenum Chemical compound [Te]=[Mo]=[Te] HITXEXPSQXNMAN-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- HPQRSQFZILKRDH-UHFFFAOYSA-M chloro(trimethyl)plumbane Chemical compound C[Pb](C)(C)Cl HPQRSQFZILKRDH-UHFFFAOYSA-M 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- AHVNUGPIPKMDBB-UHFFFAOYSA-N germanium Chemical compound [Ge].[Ge].[Ge] AHVNUGPIPKMDBB-UHFFFAOYSA-N 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910001507 metal halide Inorganic materials 0.000 description 1
- 150000005309 metal halides Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 208000026435 phlegm Diseases 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910021340 platinum monosilicide Inorganic materials 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007725 thermal activation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28097—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a metallic silicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
- H01L29/4975—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 being a silicide layer, e.g. TiSi2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Composite Materials (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
本發明與半導體元件相關,且特別關於MOS結構元件與其製造方法,且又特別關於p型MOS元件之閘極電極的形成。
MOS元件為為積體電路中之基礎建構元件。常見的MOS元件一般具有一閘極電極,其包括使用例如離子摻雜或熱擴散方法進行之以p型或n型不純物摻雜的多晶矽。閘極電極的功函數較佳調整為矽之帶緣(band-edge);對NMOS元件而言調整功函數接近導電帶(conduction band)而對PMOS元件而言,則調整功函數接近價電帶(valence band)。可藉由選擇適合的摻雜來達成調整多晶矽閘極電極的功函數。
具有多晶矽閘極電極之MOS元件存在著載子空乏的現象(carrier depletion effect),亦稱為多晶矽空乏效應(poly-depletion effect)。當應用電場從接近閘極介電層的區域清除載子,而形成空乏層時會產生多晶矽空乏效應。在n摻雜多晶矽層中,空乏層包括離子化非移動性供給位(ionized non-mobile donor site),而在p摻雜多晶矽層中,空乏層則包括離子化非移動性接受位(ionized non-mobile acceptor site)。空乏效應導致有效閘極介電層的厚度增加,造成更難在半導體表面產生一反轉層
(inversion layer)。
而薄閘極介電層使載子空乏的現象更嚴重。對薄閘極介電層而言,在多晶矽閘極中之空乏層厚度相較於薄閘極介電層之厚度而言變為更加顯著,且因此造成元件性能降低。於是,於閘極電極中之載子空乏效應限制了閘極介電層有效厚度的下限,因此限制了元件尺寸的縮小化。
使用薄閘氧化層的另一個問題是增加了閘極漏電流。因此,常以高介電常數介電層來減少閘極漏電流。然而高介電常數介電材料由於費米能級釘扎效應(Fermi level pinning)不與多晶矽閘極電極相容。
多晶矽空乏效應與高介電常數不相容之問題可藉由形成金屬閘極電極或金屬矽化閘極電極來解決,其中在NMOS與PMOS元件中所使用金屬閘極較佳也具有帶緣功函數。現今已發現形成NMOS元件閘極電極的適合材料。然而對於PMOS元件而言,雖然可獲得具有帶緣功函數的金屬材料,但這些材料的熱穩定性差。當暴露於前端製程(front-end-of-line)步驟的高溫時,這些金屬材料的功函數偏移,例如朝向中間能帶(mid gap)程度,而影響了PMOS元件的功效。此外,在暴露於高溫之後,這些功函數金屬的電容等價厚度(capacitance-equivalent-thickness, CET)變得高於具有低功函數的金屬。
銥與鉑為具有高功函數之最有希望的金屬。然而鉑
的製程處理並不容易,且其很難以常見之反應離子蝕刻(reactive ion etch, RIE)來圖案化一鉑層作為閘極。另一方面,銥的製程處理較容易。然而已發現純銥閘極存在嚴重的擴散問題,其中在1000℃快速熱活化之後,銥會穿透過高介電常數材料。
因此本技術領域需要一半導體結構與其形成方法,其利用與帶緣功函數相關之優勢,且同時克服先前技術的不足。
本發明提供一種半導體結構,包括一耐火金屬矽化層;一富矽耐火金屬矽化層於該耐火金屬矽化層上;以及一富金屬耐火金屬矽化層於該富矽耐火金屬矽化層上。該耐火金屬矽化層、該富矽耐火金屬矽化層與富金屬耐火金屬矽化層包括相同的耐火材料。
本發明提供另一種半導體結構,包括一基底;一閘極介電層於該基底上;一耐火金屬矽化層於該閘極介電層上;以及一富矽耐火金屬矽化層於該耐火金屬矽化層上。該耐火金屬矽化層與該富矽耐火金屬矽化層包括相同的耐火材料。
本發明還提供一種半導體結構,包括一基底;一閘極介電層於該基底上;以及一層疊式矽化銥層。該層疊式矽化銥層包括一矽化銥層於該閘極介電層上;一富矽矽化銥層於該矽化銥層上;以及一富銥矽化銥層於該富
矽矽化銥層上。該半導體結構更包括一多晶矽層於該富銥矽化銥層上;一閘極間隙壁於該層疊式矽化銥層與該多晶矽層的側壁上;以及一p型源/汲極區於該半導體基底中且與該閘極介電層相鄰。
本發明還提供一種形成半導體結構的方法,包括:形成一耐火金屬矽化層;形成一富矽耐火金屬矽化層於該耐火金屬矽化層上;以及形成一富金屬耐火金屬矽化層於該富矽耐火金屬矽化層上。該耐火金屬矽化層、該富矽耐火金屬矽化層與富金屬耐火金屬矽化層包括相同的耐火材料。
本發明另提供一種形成半導體結構的方法,包括:提供一基底;形成一閘極介電層於該基底上;形成一耐火金屬矽化層於該閘極介電層上;以及形成一富矽耐火金屬矽化層於該耐火金屬矽化層上。
本發明又提供一種形成半導體結構的方法,包括:提供一基底;形成一高介電常數閘極介電層於該基底上;以及形成一層疊式矽化銥層,其形成方法包括形成一矽化銥層於該高介電常數閘極介電層上;形成一富矽矽化銥層於該矽化銥層上;以及形成一富銥矽化銥層於該富矽矽化銥層上。方法更包括形成一多晶矽層於該富矽矽化銥層上;形成一閘極間隙壁於該層疊式矽化銥層與該多晶矽層的側壁上;以及形成一源/汲極區於該半導體基底中且與該高介電常數閘極介電層相鄰。
為了讓本發明之上述和其他目的、特徵、和優點能
更明顯易懂,下文特舉較佳實施例,並配合所附圖示,作詳細說明如下:
本發明提供一具有一層疊式閘極結構之MOS元件與形成方法。已繪示出本發明製造較佳實施例的中間步驟。在本發明之內容與圖式中,相同的標號代表相同的元件。
於第1圖中,提供基底20,其較佳為矽基底。基底20也可包括其他含矽半導體材料,例如矽鍺。此外,基底20可為塊狀半導體、應力半導體、化合物半導體絕緣層上半導體(semiconductor-on-insulator, SOI)等形式。較佳藉由在基底20中蝕刻溝槽且以絕緣體(例如,氧化矽)填滿溝槽以在基底20中形成淺溝槽隔離(Shallow trench isolation, STI)區。
於基底20之上形成界面層(interfacial layer)22。界面層22的較佳厚度小於約10 Å,且可包括化學氧化矽,其較佳由化學反應或UV-O3
氧化矽形成,而UV-O3
氧化矽是藉由在一含臭氧環境中將基底20暴露於紫外光下來形成。或者,界面層22可包括氮氧化矽、氮化矽等。熟悉此技藝人士將能瞭解其個別之形成製程。
第2圖顯示閘極介電層24與層疊式金屬矽化層26的形成。在一實施例中,閘極介電層包括氧化矽。在另一實施例中,閘極介電層24包括介電材料具有高介電常
數(k值),例如大於約3.9。適當的材料包括氮化矽、氮氧化矽、HfO2
、HfZrOx
、HfSiOx
、HfTiON、Al2
O3
、HfAlOx
、ZrO2
、HfZrO、HfZrON、HfTaO、HfSiON、HfAlON、HfTaTiO等、上述之組合或其之多層。較佳厚度為約10-100 Å。形成方法包括一般使用的方法,例如原子層沈積(atomic layer deposition, ALD)、化學氣相沈積、金屬有機化學氣相沈積(metal organic chemical vapor deposition, MOCVD)與物理氣相沈積等。若需要,可藉由電漿氮化(plasma nitridation)或熱氮化(thermal nitridation)將氮加入閘極介電層24中,其中氮的比例較佳小於約30%。
在沈積閘極介電層24之後,執行一後沈積退火(Post-deposition annealing)。在一實施例中,在一含N2
、O2
、H2
、D2
、NH3
、鈍氣或上述之組合的環境中執行後沈積退火。也可包括載體氣體,例如氬氣。後沈積退火的溫度較佳為400-1200℃。
之後沈積一層疊式金屬矽化層26。在較佳實施例中,一層疊式金屬矽化層包括矽化銥層261
、富矽矽化銥層262
在矽化銥層261
上,以及富銥矽化銥層263
在富矽矽化銥層262
上。沈積方法包括一般使用的方法,例如物理氣相沈積、原子層沈積、金屬有機化學氣相沈積與濺鍍等。在一實施例中,沈積方法為物理氣相沈積,其以銥靶材與矽靶材來執行,且藉由調整實施於銥靶材與實施於矽靶材的能量比率來調整矽化銥層261
、262
與263
。在另一實施例中,藉由從銥矽化靶材濺鍍來形成矽化銥
層261
、262
與263
,其中藉由使用具有不同成分之矽化銥靶材及/或藉由調整能量設定來達到矽化銥增261
、262
與263
的不同成分。
261
、262
與263
各層的較佳厚度為約10-100 Å,且矽化銥層261
、262
與263
層的結合厚度為約50-300 Å。在矽化銥層261
中銥原子數與矽原子數之比例為約0.5-1.5。富矽矽化銥層262
的矽原子百分比較佳為大於約70%,其中矽原子百分比是以矽之原子數除以矽與銥之原子數來計算。富銥矽化銥層263
的銥原子百分比較佳為大於約70%,其中銥原子百分比是以銥之原子數除以矽與銥之原子數來計算。在另一實施例中,只形成矽化銥層261
與富矽矽化銥層262
而省略富銥矽化銥層263
。
在較佳實施例中,金屬矽化層26為一層疊式矽化銥層。在另一實施例中,金屬矽化層26包括其他耐火材料之層疊式矽化層,例如鉬矽化物、鎢矽化物、錸矽化物、鉭矽化物、鉑矽化物與上述之組合。較佳為在層疊式結構中的耐火材料具有相似的原子百分比例如同矽化銥層261
、262
與263
。
在第3圖中,形成蓋層28與多晶矽層30。蓋層28可包括Mo、TaN、TiN、TaSiN、TaC或上述之組合,且其具有避免矽化銥層26氧化的功能。蓋層28的厚度較佳為約10-100Å。
多晶矽層30的厚度為約400-1500 Å。多晶矽層30的功能包括避免金屬層26被污染,且維持閘極堆疊的高
度至與目前之積體電路製程相容的程度。
在第4圖中,將堆疊層圖案化,形成閘極堆疊32,其包括閘極介電層34、層疊式金屬矽化層36、蓋層38與多晶矽層40。在一較佳實施例中,以反應離子蝕刻來執行圖案化,雖然也可使用其他常用的圖案化方法。在圖案化之後,剩下界面層22的一部分23。之後形成輕摻雜源/汲極(lightly doped source/drain, LDD)區42,其較佳藉由佈植一p型不純物(例如硼)於半導體基底20中來形成。
第5圖顯示PMOS元件剩餘組成的形成,其包括閘極間隙壁44與源/汲極區46。可藉由毯覆式沈積一介電層例如氮化矽來形成閘極間隙壁44,且之後將不需要的部分蝕刻去除。閘極間隙壁44也可具有一混合結構,例如氧化物上氮化物(nitride-on-oxide)或氧化物-氮化物-氧化物(oxide-nitride-oxide, ONO)結構。
之後形成源/汲極區46與矽化區48。在較佳實施例中,藉由佈植p型不純物,例如硼及/或銦進入基底20中來形成源/汲極區46,其中在進行佈植時,將閘極間隙壁44作為罩幕以使源/汲極區46的邊緣實質上分別與閘極間隙壁44對齊。源/汲極區46的形成也可包括使基底20產生凹陷且在凹陷處磊晶成長半導體材料,例如矽鍺。為了形成矽化區48,可先形成一薄金屬層(未顯示)於元件上,例如鈷、鎳、鉑或上述之組合。之後將元件進行退火以在沈積金屬與下層矽區之間形成矽化區48。
而之後將未反應之金屬層移除。
第6圖顯示較佳實施例的變化例。此變化例的起始步驟實質上與第1圖所顯示相同。之後如第6圖所示,形成非晶矽層60。在較佳實施例中,非晶矽層60的厚度為約50-500 Å,且更佳為約50-100 Å。之後將耐火金屬層62沈積於非晶矽層60上。在較佳實施例中,耐火金屬層62由銥形成。在另一實施例中,耐火金屬層62包括銥、鉬、鎢、錸、鉭、鉑與上述之組合。又在另一實施例中,耐火金屬層62可包括金屬矽化物,例如IrSi、MoSi2
、WSi2
、ReSi/ReSi2
、TaSi2
、PtSi等。耐火金屬層62的厚度較佳為約100-500 Å。
之後將非晶矽層60與耐火金屬層62進行退火以產生矽化反應,形成如第2圖所示之結構。為了形成層疊式矽化區,需小心調控製程條件。在一實施例中,退火為快速熱退火(rapid thermal annealing, RTA),其中退火溫度較佳為約400-1200℃,更佳為約800-1100℃。退火持續時間較佳為約5-30秒,更佳為約5-15秒。而且非晶矽層60與耐火金屬層62的厚度會影響所形成的矽化結構。在一實施例中,對上述所討論的退火溫度與時間而言,非晶矽層60與耐火金屬層62的厚度較佳分別為約50 Å與200Å。在此製程下,形成層疊式結構包括矽化銥層261
、富矽矽化銥層262
與富銥矽化銥層263
。
在接下來的製程步驟中,沈積蓋層28與多晶矽層30以形成如第3圖所示之結構。之後將製程持續以形成
PMOS元件的剩餘結構,如第4與5圖所示。
熟悉此技藝人士當可瞭解,雖然前述圖式是對於形成PMOS元件,但本發明的教示亦可實施於形成NMOS元件上。較佳為NMOS元件包括具有低功函數之帶緣金屬閘極。較佳的金屬包括TaC、TaN、TaSiN、HfN、La或上述之組合,且其可藉由物理氣相沈積、原子層沈積或金屬有機化學氣相沈積來進行沈積。金屬厚度為約1-30nm。熟悉此技藝人士當可瞭解相對應之形成步驟。
本發明之實施例具有需多優點。已發現的有,層疊式矽化銥層的平能帶電位(flat band voltage)為約0.848V,此代表功函數大於約5.0 eV。高介電常數材料與層疊式矽化層的組合使電容等價厚度減少,其甚至比得上HfO2
上之TaC。矽化銥的擴散較少,且沒有發現矽化銥與高介電常數材料間之相互擴散(inter-diffusion)。此外,在所產生的PMOS元件中,由於銥擴散減少,界面層的增加變為微不足道。
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
20‧‧‧基底
22‧‧‧界面層
23‧‧‧界面層22的一部分
24‧‧‧閘極介電層
26、36‧‧‧層疊式金屬矽化層
261
‧‧‧矽化銥層
262
‧‧‧富矽矽化銥層
263
‧‧‧富銥矽化銥層
28、38‧‧‧蓋層
30、40‧‧‧多晶矽層
32‧‧‧閘極堆疊
34‧‧‧閘極介電層
42‧‧‧輕摻雜源/汲極區
44‧‧‧閘極間隙壁與
46‧‧‧源/汲極區
48‧‧‧矽化區
60‧‧‧非晶矽層
62‧‧‧耐火金屬層
第1圖顯示本發明實施例之製程剖面圖,其顯示提供一基底與形成一界面層。
第2圖顯示本發明實施例之製程剖面圖,其顯示閘極介電層與層疊式金屬矽化層的形成。
第3圖顯示本發明實施例之製程剖面圖,其顯示蓋層28與多晶矽層30的形成。
第4圖顯示本發明實施例之製程剖面圖,其顯示將堆疊層圖案化,形成閘極堆疊。
第5圖顯示本發明實施例之製程剖面圖,其顯示PMOS元件剩餘組成的形成。
第6圖顯示本發明較佳實施例的變化例。
20‧‧‧基底
23‧‧‧界面層
22‧‧‧的一部分
34‧‧‧閘極介電層
36‧‧‧層疊式金屬矽化層
38‧‧‧蓋層
42‧‧‧輕摻雜源/汲極區
44‧‧‧閘極間隙壁
46‧‧‧源/汲極區
48‧‧‧矽化區
Claims (26)
- 一種半導體結構,包括:一基底;一閘極介電層於該基底上;一耐火金屬矽化層於該閘極介電層上;以及一富矽耐火金屬矽化層於該耐火金屬矽化層上,其中該耐火金屬矽化層與該富矽耐火金屬矽化層包括相同的耐火材料。
- 如申請專利範圍第1項所述之半導體結構,更包括一富金屬耐火金屬矽化層於該富矽耐火金屬矽化層上。
- 如申請專利範圍第1項所述之半導體結構,更包括一多晶矽層於該富矽耐火金屬矽化層上。
- 如申請專利範圍第3項所述之半導體結構,更包括一蓋層於該富矽耐火金屬矽化層與該多晶矽層之間。
- 如申請專利範圍第1項所述之半導體結構,其中該耐火金屬包括銥、鉬、鎢、錸、鉭、鉑或上述之組合。
- 如申請專利範圍第1項所述之半導體結構,其中該耐火金屬只包括銥。
- 如申請專利範圍第1項所述之半導體結構,其中該富矽耐火金屬矽化層的矽原子百分比大於約70%。
- 如申請專利範圍第1項所述之半導體結構,其中該耐火金屬矽化層與該富矽耐火金屬矽化層的厚度皆為約10-100Å。
- 如申請專利範圍第1項所述之半導體結構,其中該閘極介電層包括一高介電常數材料,其包括氮化矽、氮氧化矽、HfO2 、HfZrOx 、HfSiOx 、HfTiON、Al2 O3 、HfAlOx 、ZrO2 、HfZrO、HfZrON、HfTaO、HfTaTiO或上述之組合。
- 一種半導體結構,包括:一基底;一閘極介電層於該基底上;一層疊式矽化銥層,包括:一矽化銥層於該閘極介電層上;一富矽矽化銥層於該矽化銥層上;以及一富銥矽化銥層於該富矽矽化銥層上;一多晶矽層於該富銥矽化銥層上;一閘極間隙壁於該層疊式矽化銥層與該多晶矽層的側壁上;以及一源/汲極區於該基底中且於該閘極介電層相鄰。
- 如申請專利範圍第10項所述之半導體結構,其中該富矽矽化銥層的矽原子百分比大於約70%,且該富銥矽化銥層的銥原子百分比大於約70%。
- 如申請專利範圍第10項所述之半導體結構,其中該層疊式矽化銥層的厚度為約50-300 Å。
- 如申請專利範圍第10項所述之半導體結構,其中該矽化銥層、該富矽矽化銥層與該富銥矽化銥層的厚度皆大於約10 Å。
- 一種形成半導體結構的方法,包括:提供一基底;形成一閘極介電層於該基底上;形成一耐火金屬矽化層於該閘極介電層上;以及形成一富矽耐火金屬矽化層於該耐火金屬矽化層上,其中該耐火金屬矽化層與該富矽耐火金屬矽化層包括相同的耐火材料。
- 如申請專利範圍第14項所述之形成半導體結構的方法,更包括形成一富金屬耐火金屬矽化層於該富矽耐火金屬矽化層上。
- 如申請專利範圍第14項所述之形成半導體結構的方法,更包括形成一多晶矽層於該富矽耐火金屬矽化層上。
- 如申請專利範圍第16項所述之形成半導體結構的方法,更包括形成一蓋層於該富矽耐火金屬矽化層與該多晶矽層之間。
- 如申請專利範圍第14項所述之形成半導體結構的方法,其中該耐火金屬包括銥、鉬、鎢、錸、鉭、鉑或上述之組合。
- 如申請專利範圍第14項所述之形成半導體結構的方法,其中該耐火金屬只包括銥。
- 如申請專利範圍第14項所述之形成半導體結構的方法,其中該富矽耐火金屬矽化層的矽原子百分比大於約70%。
- 如申請專利範圍第14項所述之形成半導體結構的方法,其中該耐火金屬矽化層與該富矽耐火金屬矽化層的厚度皆為約10-100Å。
- 如申請專利範圍第14項所述之形成半導體結構的方法,其中該閘極介電層包括一高介電常數材料,其包括氮化矽、氮氧化矽、HfO2 、HfZrOx 、HfSiOx 、HfTiON、All O3 、HfAlOx 、ZrO2 、HfZrO、HfZrON、HfTaO、HfTaTiO或上述之組合。
- 一種形成半導體結構的方法,包括:提供一基底;形成一閘極介電層於該基底上;形成一層疊式矽化銥層,其形成方法包括:形成一矽化銥層於該閘極介電層上;形成一富矽矽化銥層於該矽化銥層上;以及形成一富銥矽化銥層於該富矽矽化銥層上;形成一多晶矽層於該富銥矽化銥層上;形成一閘極間隙壁於該層疊式矽化銥層與該多晶矽層的側壁上;以及形成一源/汲極區於該基底中且於該閘極介電層相鄰。
- 如申請專利範圍第23項所述之形成半導體結構的方法,其中該富矽矽化銥層的矽原子百分比大於約70%,且該富銥矽化銥層的銥原子百分比大於約70%。
- 如申請專利範圍第23項所述之形成半導體結構 的方法,其中該層疊式矽化銥層的厚度為約50-300 Å。
- 如申請專利範圍第23項所述之形成半導體結構的方法,其中該矽化銥層、該富矽矽化銥層與該富銥矽化銥層的厚度皆大於約10 Å。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US94864607P | 2007-07-09 | 2007-07-09 | |
US11/840,365 US8159035B2 (en) | 2007-07-09 | 2007-08-17 | Metal gates of PMOS devices having high work functions |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200908162A TW200908162A (en) | 2009-02-16 |
TWI397962B true TWI397962B (zh) | 2013-06-01 |
Family
ID=40247205
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW097125668A TWI397962B (zh) | 2007-07-09 | 2008-07-08 | 半導體結構與其形成方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8159035B2 (zh) |
CN (1) | CN101345260B (zh) |
TW (1) | TWI397962B (zh) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI355069B (en) * | 2007-11-06 | 2011-12-21 | Nanya Technology Corp | Dram device |
US8791001B2 (en) * | 2008-09-08 | 2014-07-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | N2 based plasma treatment and ash for HK metal gate protection |
US8268683B2 (en) * | 2009-06-12 | 2012-09-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for reducing interfacial layer thickness for high-K and metal gate stack |
JP5668277B2 (ja) | 2009-06-12 | 2015-02-12 | ソニー株式会社 | 半導体装置 |
US8298882B2 (en) * | 2009-09-18 | 2012-10-30 | International Business Machines Corporation | Metal gate and high-K dielectric devices with PFET channel SiGe |
US20110097589A1 (en) * | 2009-10-28 | 2011-04-28 | General Electric Company | Article for high temperature service |
US9646869B2 (en) * | 2010-03-02 | 2017-05-09 | Micron Technology, Inc. | Semiconductor devices including a diode structure over a conductive strap and methods of forming such semiconductor devices |
US9608119B2 (en) | 2010-03-02 | 2017-03-28 | Micron Technology, Inc. | Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures |
US8513722B2 (en) | 2010-03-02 | 2013-08-20 | Micron Technology, Inc. | Floating body cell structures, devices including same, and methods for forming same |
US8288795B2 (en) | 2010-03-02 | 2012-10-16 | Micron Technology, Inc. | Thyristor based memory cells, devices and systems including the same and methods for forming the same |
US8507966B2 (en) * | 2010-03-02 | 2013-08-13 | Micron Technology, Inc. | Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same |
US8598621B2 (en) | 2011-02-11 | 2013-12-03 | Micron Technology, Inc. | Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor |
US8952418B2 (en) | 2011-03-01 | 2015-02-10 | Micron Technology, Inc. | Gated bipolar junction transistors |
US8519431B2 (en) | 2011-03-08 | 2013-08-27 | Micron Technology, Inc. | Thyristors |
US8772848B2 (en) | 2011-07-26 | 2014-07-08 | Micron Technology, Inc. | Circuit structures, memory circuitry, and methods |
US20130241007A1 (en) | 2012-03-15 | 2013-09-19 | International Business Machines Corporation | Use of band edge gate metals as source drain contacts |
CN106558482B (zh) * | 2015-09-25 | 2019-12-24 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法 |
US11133226B2 (en) * | 2018-10-22 | 2021-09-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | FUSI gated device formation |
CN113394107A (zh) * | 2021-05-31 | 2021-09-14 | 上海华力集成电路制造有限公司 | 一种提高FinFET器件性能的方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5355020A (en) * | 1991-07-08 | 1994-10-11 | Samsung Electronics Co., Ltd. | Semiconductor device having a multi-layer metal contact |
US7030014B2 (en) * | 2003-06-26 | 2006-04-18 | Micron Technology, Inc. | Semiconductor constructions and electronic systems comprising metal silicide |
US7101753B2 (en) * | 2003-12-26 | 2006-09-05 | Nec Electronics Corporation | Method for manufacturing a semiconductor device and method for forming high-dielectric-constant film |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6028002A (en) * | 1996-05-15 | 2000-02-22 | Micron Technology, Inc. | Refractory metal roughness reduction using high temperature anneal in hydrides or organo-silane ambients |
TW316326B (en) * | 1996-09-21 | 1997-09-21 | United Microelectronics Corp | Manufacturing method of word line |
KR100261150B1 (ko) | 1998-04-01 | 2000-09-01 | 김영환 | 반도체소자의 전극 형성방법 |
TW477004B (en) * | 1998-10-12 | 2002-02-21 | United Microelectronics Corp | Method to prevent dopant diffusion in dual-gate |
JP3264264B2 (ja) * | 1999-03-01 | 2002-03-11 | 日本電気株式会社 | 相補型集積回路とその製造方法 |
US6376868B1 (en) * | 1999-06-15 | 2002-04-23 | Micron Technology, Inc. | Multi-layered gate for a CMOS imager |
TWI252539B (en) * | 2004-03-12 | 2006-04-01 | Toshiba Corp | Semiconductor device and manufacturing method therefor |
JP4163169B2 (ja) * | 2004-10-29 | 2008-10-08 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
-
2007
- 2007-08-17 US US11/840,365 patent/US8159035B2/en active Active
-
2008
- 2008-07-08 TW TW097125668A patent/TWI397962B/zh active
- 2008-07-08 CN CN2008101378337A patent/CN101345260B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5355020A (en) * | 1991-07-08 | 1994-10-11 | Samsung Electronics Co., Ltd. | Semiconductor device having a multi-layer metal contact |
US7030014B2 (en) * | 2003-06-26 | 2006-04-18 | Micron Technology, Inc. | Semiconductor constructions and electronic systems comprising metal silicide |
US7101753B2 (en) * | 2003-12-26 | 2006-09-05 | Nec Electronics Corporation | Method for manufacturing a semiconductor device and method for forming high-dielectric-constant film |
Also Published As
Publication number | Publication date |
---|---|
US20090014813A1 (en) | 2009-01-15 |
TW200908162A (en) | 2009-02-16 |
US8159035B2 (en) | 2012-04-17 |
CN101345260A (zh) | 2009-01-14 |
CN101345260B (zh) | 2011-05-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI397962B (zh) | 半導體結構與其形成方法 | |
US8373219B2 (en) | Method of fabricating a gate stack integration of complementary MOS device | |
US8836038B2 (en) | CMOS dual metal gate semiconductor device | |
TWI443777B (zh) | 形成mos元件的金屬閘的混合方法 | |
JP5297869B2 (ja) | 二重仕事関数半導体デバイスの製造方法及びそのデバイス | |
US7510943B2 (en) | Semiconductor devices and methods of manufacture thereof | |
US7642607B2 (en) | MOS devices with reduced recess on substrate surface | |
US9384986B2 (en) | Dual-metal gate CMOS devices and method for manufacturing the same | |
US9899270B2 (en) | Methods for manufacturing semiconductor devices | |
US7629212B2 (en) | Doped WGe to form dual metal gates | |
TW200843110A (en) | Semiconductor device manufacturing method and semiconductor device | |
US20050098833A1 (en) | Dual metal-alloy nitride gate electrodes | |
US9142414B2 (en) | CMOS devices with metal gates and methods for forming the same | |
US7892961B2 (en) | Methods for forming MOS devices with metal-inserted polysilicon gate stack | |
US20070284677A1 (en) | Metal oxynitride gate | |
JP2006108355A (ja) | 半導体装置およびその製造方法 | |
JPWO2006129637A1 (ja) | 半導体装置 | |
TWI509702B (zh) | 具有金屬閘極之電晶體及其製作方法 | |
TWI478244B (zh) | 具有經摻雜之含矽蓋層的金氧半導體裝置及其製造方法 | |
JP2008226862A (ja) | シリサイド化されたゲート電極の仕事関数を調節する方法 | |
WO2009157114A1 (ja) | 半導体装置及びその製造方法 |