TWI378754B - Method for manufacturing printed circuit board - Google Patents
Method for manufacturing printed circuit board Download PDFInfo
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- TWI378754B TWI378754B TW98134289A TW98134289A TWI378754B TW I378754 B TWI378754 B TW I378754B TW 98134289 A TW98134289 A TW 98134289A TW 98134289 A TW98134289 A TW 98134289A TW I378754 B TWI378754 B TW I378754B
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1378754 • 六、發明說明: r 【發明所屬之技術領域】 本發明涉及電路板製作技術,尤其涉及一種電路板之製作方 法。 【先前技術】 ,. 隨著電子產品往小型化、高速化方向之發展,電路板亦從單 面電路板、雙面電路板往多層電路板方向發展。多層電路板係指 具^複數層導電線路之電路板,其具有較多之佈線面積、較高互 φ 連雄度’因而得到廣泛應用,參見文獻Takahashi,A. Ooki,N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab., High density multilayer printed circuit board for HITAC M-880 > IEEE Trans, on1378754 • VI. Description of the invention: r [Technical Field of the Invention] The present invention relates to a circuit board manufacturing technique, and more particularly to a method of fabricating a circuit board. [Prior Art], With the development of electronic products in the direction of miniaturization and high speed, the circuit boards have also evolved from single-sided circuit boards and double-sided circuit boards to multilayer circuit boards. A multi-layer circuit board refers to a circuit board having a plurality of layers of conductive lines, which has a large wiring area and a high mutual φ continuation degree, and thus is widely used, see the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab., High density multilayer printed circuit board for HITAC M-880 > IEEE Trans, on
Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425 〇 電路板製作工藝通常包括曝光、顯影、钱刻、鑽孔、電鑛等 步驟。以多層電路板為例,其採用迭層法進行製作,具體地,包 :第—步’以曝光、顯影、侧工藝於覆銅基板表面 滅導電線路;第二步,將兩個或複數具有此線路之雙面板壓合 於-起形成多層板之内層;第三步,於⑽線路之兩邊分別壓合 ^層^^;細步,於純銅騎預定位置鑽貫通覆銅基板之通 五步’以電鍍工藝於通孔孔壁形成銅層;第六步,採用曝 、侧工藝於所述純銅箱層形成導電線路,從而使得多層 導電線路之間藉由該鍍孔而電連通。 $ ί述3通孔之方式實現外層導電線路與内層導電線路 製製Ϊ過程複雜、製作效率較低’而且隨著導通孔 ===孔形成導通孔之操作愈來愈困難,最終 【發明内容】 4 1378754 製作二=方法’以於簡化電路板 二口電=所 述導電基材形成了句括且亡4 x去除^刀導電基材’以使所Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425 〇 The board fabrication process typically includes exposure, development, engraving, drilling, and electrominening. Taking a multilayer circuit board as an example, it is fabricated by a lamination method. Specifically, the package: the first step is to expose the conductive line on the surface of the copper-clad substrate by exposure, development, and side processes; the second step is to have two or more The double panel of the line is pressed to form the inner layer of the multi-layer board; the third step is to press the layer on both sides of the (10) line; the fine step is to pass through the copper-clad substrate at the predetermined position of the pure copper ride. 'The copper layer is formed by the electroplating process on the via hole wall; in the sixth step, the conductive line is formed on the pure copper box layer by an exposure and side process, so that the plurality of conductive lines are electrically connected by the plated hole. $ ί The method of 3 through holes is to realize the process of manufacturing the outer conductive line and the inner conductive line, and the manufacturing process is complicated, and the operation of forming the through hole with the through hole === hole becomes more and more difficult. 】 4 1378754 production two = method 'in order to simplify the circuit board two mouth = the conductive substrate formed a sentence and died 4 x remove the ^ knife conductive substrate 'to make
除電θ ’糟由域轉移工藝錢侧王藝钱刻去 層尸複數第—導電柱從第三表面露出之部J 電柱之結構;於所述第一導電以;導 :;第:f緣層具有:遠離第-導電層:第三 1:;使tL复 由複數第-導電柱電連接。 w線路與所衫-導電層藉 優點與ί前技==ΐ方案之電路板之製作方法具有以下 通孔帶^以 :電柱β留之絕緣材料,避免絕緣^影響導電層=$ 【實施方式】 步驟 之製=ϊ:=數實施例’對本技術方案提供之電路板 本技術方案第-實施例提供之電路板之製作方法可包括以下 第一步,提供一導電基材100 閱圖1’導電基材⑽可為電解轉,亦可為壓延銅笛。 - 首先首導電基材勘之一表面形成第—光阻層⑽, 藉tjci之方式職導電騎1()°上塗敷賴光阻,再 光阻展ϋ:固從而得到第一光阻層120。本實施例中,第- 曰膜光阻,從而形成第一光阻層120。 且』後像轉移工藝以及侧工藝去除部分導電基材。 二體地’對第—光阻層㈣依次進行曝光、顯 = 3,進行_。可採縣領域常用手段‘之& ==二?行選擇性曝光,無鏤空部』 射而保持原狀。遮”光阻未受到光線照 靖。同時,所;π二刻液 蓋於導電A1 未被先線照射之部分仍然覆 腦被其覆蓋之部分將不會被 虚複數第」述導電基材100形成包括第一導電層110 ^面t之結構。*一導電層110具有相對之第- 面表面112,所述複數第一導電柱113自所述第一表 120 第二步,除去所述複數第一導電柱113上之剩餘第一光阻層 恳^/7丄採用強驗性溶液例如氫氧化納溶液除去剩餘第-夹阳 i 4所示剩餘第一光阻層120後,所述導電基材_之結構如 1378754 声13Γ所步述m電層u〇之第一表面111形成一第一絕緣 i m,並使^數巴第導T柱具遠f第一導電層110之第三表 m露出。 弟¥電柱從第一絕緣層130之第三表面 所、成ίίί::,採用本領域常規塗佈法將液態絕緣材料填充於 矣二 炎二U〇上,鄰之兩個第一導電柱113之間。於液體 向擴‘,iii:第Uf ?料將朝靠近第一導 113之方 埴右夕η二王第導電柱113。為避免液態絕緣材料溢出,所 、充液匕、、、巴緣材料之厚度以不超過第一導電柱113古 ;;lilt 二二、聚§旨樹脂、聚酿亞胺、鐵氟龍、聚硫胺、聚曱基 2Ϊ 對本一甲g曰共聚物令之一種或幾種。 =統緣材概,需制本領域常規油化玉藝如輯或 第五步,於所述第一絕緣層130上形成第二導電層14〇。 行預=成ϋ電|i4G之前,可對第—絕緣層i3G之表面進 之Ϊ Ϊ二處理,以提高第二導電層140與第-絕緣層130 平表 之間之介面結合力及確保第二導電層140之表面 +整性,從而提高第二導電層140之製作精度。 〈衣面 鋼落第32二〇人直接採用壓合工藝將已成型之導電金屬箱如 如圖二ΐ合至第一絕緣層130之第三表面131而成。 斤不,第二導電層14〇形成後,與所述第一 第1緣層130之間存於空隙141。 导电狂U3及 7 1378754 第六步,於所述第二導電層14〇 影像轉移工藝以及银刻工藝敍刻 阻層⑼,藉由 數第-導電柱U3從第三表面^^二、導電層140以及複 -導電柱113與第三表自131齊平。路出之。p分,以使所述複數第In addition to the electricity θ 'bad by the domain transfer process money side Wang Yiqian engraved layer of the corpse - the structure of the conductive column from the third surface exposed J electric column; in the first conductive to; lead:; f: edge layer Having: away from the first conductive layer: the third 1:; the tL complex is electrically connected by the plurality of first conductive pillars. w circuit and shirt-conducting layer borrowing advantages and ί pre-technical ==ΐ scheme of the circuit board manufacturing method has the following through hole strip ^ to: the electric column β left insulation material, to avoid insulation ^ affect the conductive layer = $ [embodiment Step of the system = ϊ: = number of embodiments of the circuit board provided by the present technical solution The method of manufacturing the circuit board provided by the first embodiment of the present invention may include the following first step to provide a conductive substrate 100 The conductive substrate (10) may be electrolyzed or may be a rolled copper flute. - First, the first conductive substrate is formed on the surface to form a first photoresist layer (10), and the photoresist is coated on the surface by a tjci method, and then the photoresist is exposed to form a first photoresist layer 120. In this embodiment, the first-film is photoresist, thereby forming the first photoresist layer 120. And the post-image transfer process and the side process remove a portion of the conductive substrate. The two-body's exposure to the first photoresist layer (four) is sequentially performed, and = 3 is performed, and _ is performed. The commonly used means in the field of can be counted in the ‘&&;== two-line selective exposure, no hollowing out” shot and remain intact. The photoresist is not exposed to light. At the same time, the portion of the conductive layer A1 is not covered by the conductive A1, and the portion covered by the brain is not covered by the dummy substrate 100. A structure including the first conductive layer 110 surface t is formed. * a conductive layer 110 having an opposite first surface 112, the plurality of first conductive pillars 113 from the second step of the first table 120, removing the remaining first photoresist layer on the plurality of first conductive pillars 113 After the remaining first photoresist layer 120 is removed by using a strong solution such as a sodium hydroxide solution, the structure of the conductive substrate _ is as follows: 1378754 sound 13Γ step m The first surface 111 of the electrical layer u is formed with a first insulation im, and the third surface m of the first conductive layer 110 is exposed. From the third surface of the first insulating layer 130, the electric column is filled with the liquid insulating material on the bismuth dioxide U ,U, which is adjacent to the third surface of the first insulating layer 130. between. In the liquid expansion ‘, iii: the Uf material will be approaching the first guide 113 埴 right η 王 王 王 conductive pillar 113. In order to avoid the overflow of the liquid insulating material, the thickness of the liquid-filled material, the liquid-filled material, and the material of the edge of the material are not more than the first conductive pillar 113;; lilt 22, poly-resin resin, poly-imine, Teflon, poly Thiamine, polyfluorenyl 2 Ϊ One or more of the present copolymers. In the conventional oil-based jade art or the fifth step, a second conductive layer 14 is formed on the first insulating layer 130. Before pre-i4G, the surface of the first insulating layer i3G may be subjected to a second process to improve the interface bonding between the second conductive layer 140 and the first insulating layer 130 and ensure the first The surface of the two conductive layers 140 is + uniform, thereby improving the fabrication precision of the second conductive layer 140. The 32nd floor of the clothing surface is formed by directly bonding the formed conductive metal case to the third surface 131 of the first insulating layer 130 by a pressing process. The second conductive layer 14 is formed in the gap 141 between the second conductive layer 14 and the first first edge layer 130. Conductive mad U3 and 7 1378754 The sixth step, in the second conductive layer 14 〇 image transfer process and silver engraving process etch resist layer (9), by the number of first conductive pillar U3 from the third surface ^ 2, conductive layer 140 and the complex-conductive column 113 are flush with the third table from 131. Out of the road. p points to make the plural number
所述第二光阻層15〇之形成方式可 „。對第二光阻層150依曝H 柱113上方之f it ;:—併參閱圖7與圖8 ’複數第一導電 川星=弟—導電層 絕緣殘留層说以及第-導電柱The second photoresist layer 15 is formed in a manner that the second photoresist layer 150 is exposed to the upper portion of the H pillar 113; and - see FIG. 7 and FIG. 8 'the plural first conductive Chuanxing = brother — Conductive layer insulation residual layer and the first conductive column
-矣t路第卞一絕緣層130之部分均被除去,第一導電柱ιίί第 保護。由於娜-f1314=第二光阻請 Ϊϋ暴路第—絕緣層130之部分被侧掉,第二導電声140 乂第一、、,邑緣層130之間已經存於空隙141,所述連通孔 f笫-導電柱113之橫截面,從而暴露 留声及 1 數電柱113上方之第二導電層140、絕緣殘 =曰m以及第-導電柱m暴露於第一絕緣層咖之部 ί第二柱13全部暴露出。優選地,朗絲後,所述複 ϊί 一導電柱113與所述第一絕緣層130平齊,如此,便於第-導電層11G藉由第—導電柱113實現與後續導電層之間之電導通。 一第七步,將第一導電層14〇形成第二導電線路,並使得 =導電線路160與第一導電層11〇之間藉由複數第一導電柱ιΐ3 電連接。 、首先,於所述第二導電層140之連通孔142中填充導電材料, =將填充了導電材料之第二導電層140形成第二導電基材143。具 ,,,先藉由化學鍍於第二導電層140之連通孔142十形成具 —定厚度之化學銅層144,如圖9所示。然後,再於化學銅層^44 1378754 上電鍍形成電鍍銅層145,直至電鍍鋼層145 之連通孔142,且與第二導電層14G平齊 ^^弟-導電層140 之第二導電基材143。 從而仵到如圖1〇所示 其次,除去第二導電基材143上之第二来 第4ί層:與導第! 連接。 U稽田複數第—導電柱113電 導ίίί _之形成均可採用濕法_工藝。具體地, =用戈=先阻進行選擇性之曝光,使ϊ=ΐί= 溶解於顯影液中,從而纖出部分銅:- The portion of the first insulating layer 130 is removed, and the first conductive column is protected. Since Na-f1314=the second photoresist, the portion of the insulating layer 130 is laterally removed, and the second conductive sound 140 乂 first, and the edge layer 130 is already present in the gap 141, the communication a cross-section of the hole 笫-conductive pillar 113, thereby exposing the second conductive layer 140 above the number of posts 113, the insulation residue = 曰m, and the first conductive pillar m exposed to the first insulating layer The two columns 13 are all exposed. Preferably, after the singularity, the conductive pillar 113 is flush with the first insulating layer 130, so that the conductance between the first conductive layer 11G and the subsequent conductive layer is facilitated by the first conductive pillar 113. through. In a seventh step, the first conductive layer 14 is formed into a second conductive line, and the conductive line 160 and the first conductive layer 11 are electrically connected by a plurality of first conductive pillars ι 3 . First, the conductive hole 142 is filled in the communication hole 142 of the second conductive layer 140, and the second conductive layer 140 filled with the conductive material is formed into the second conductive substrate 143. A chemical copper layer 144 having a predetermined thickness is formed by electroless plating on the via hole 142 of the second conductive layer 140, as shown in FIG. Then, an electroplated copper layer 145 is electroplated on the chemical copper layer ^44 1378754 until the communication hole 142 of the galvanized steel layer 145, and is flush with the second conductive layer 14G, and the second conductive substrate of the conductive layer 140 143. Thus, as shown in FIG. 1A, second, the second layer on the second conductive substrate 143 is removed: connected to the conductive! U-Qi Tian plural number - conductive column 113 conduction ίίί _ can be formed using the wet method _ process. Specifically, = selective exposure is performed with Ge = first resistance, so that ϊ = ΐ ί = dissolves in the developer, thereby puncturing part of the copper:
Ctit除即露出藉由複數第一導電柱113與第-導 電層110電連接之第二導電線路⑽。 /、弟導 導電t 成第,線路17G ’從而使第一 電連通,如圖之間藉由複數第一導113 及複=二第一導電層110形成包括第一導電線路170以 柱113分^接^、數第二導電柱與複數第一導電 絕緣導電枉之—側形成第二絕緣層,所述第二 導電導電線路之第四表面,並使所述複數第二 緣層上形成第層^四表面露出°紐’於所述第二絕 除邱八笛二^一導電層’稭由影像轉移工藝以及蝕刻工藝蝕刻去 77 ~~電層以及複數第二導電柱從第四表面露出之部分, 1378754 斤述複?1第二導電柱與第四表面齊平;最後,將所述第三導 J層J成第三導電線路,並使得所述第三導電線路藉⑽述複數 電柱與所述第-導電線路17G電連接,所述第二導電線路 160错由所述複數第一導電柱113與第-導電線路17〇電連接。 本技術方案第二實施例提供之電路板之製作方法可包括以下 步驟: 基材 ί厚ί供如=f^2()G,其厚度A於第—實施例之導電 211 ⑽高: 絕 J: 複數第一導雷牡m ♦山具有絕緣殘留層232。所述 232均嵌入第二導電層24。,且^二$以: 241,如圖15所示。 〒电增之間存於空脉 導電ί 2心以象,分第二 以使所述複數第一導電柱213盥第二矣;表面231露出之部分, 由於複數第-導電柱213上之第、第231齊平,如圖I6所示。 暴露於第一絕緣層一分=層=-二柱二 丄:>/δ〇4 連通孔242。 得所^a將所述第二導電層24G制第二導電線路260,並使 電柱線路260與所述第一導電層210藉由複數第一導 以將導電層240之複數連通孔242中填充導電材料, 材料之第二導電層24G形成第二導電基材(圖未 不—^於第·11導電層24G之連通孔242中藉由化學鍍形成且有 撕直Λ=Λ243,再於化學銅層243上電鑛形成電上: 第m t 44填滿第二導電層240之連通孔242,且盘 第-導電層24G平齊,從而剌第三導電基材。 …、:後藉由衫像轉移工藝以及触刻工藝對 __ ㈡= 將所述第二導電基材製成第二導電線 —術213料-權加電 第一=^1第四步之侧過程除去複數第一導電柱213從 第一表面231路出之部分同時將第二導電層形成 ^利用導電材料填充連通孔得到與複數第 連^ :?導電線路’如此,還可省去一次影像轉=工 第六步,將第-導電層加形成第一導電線路27(),使 電線路270藉由複數第一導電柱213與第二 所述第-導電線路27〇之形成優選採驗126G電連接。 二導雷_ 29_ ;;導圖未不)’並將第三導電層形成第 nl:!w 270"w 如圖19所示。 導電桂214相互導通, 11 屉古第二絕緣層280可採用壓合方式形成。第二絕緣 所述第—導電層210之第四表面281,複數第二導 覆蓋於第表面,且有第二絕緣殘留層(圖未示) 導雷述第二絕緣層上形成第三導電層’複數第二 社1出於所述第四表面281之部分以及覆蓋於第二導電 間存於空留層均嵌入第三導電層,且與第三導電層之 電層ίί複S影以i触刻工藝侧去除部分第三導 所诚潘㈣-^導電柱從第四表面281露出之部分,以使 所述複數第一導電柱2U與第四表面281齊平。 第:二導電層製成第三導電線路290,並使得所述 述第—導電線路270及第二導電線路260 第導電柱213及複數第二導電柱214電連接。且,牛 驟與第二導電線路260之形成基本相^電柱14電連接具體步 優點與制ΐ技術方案之電路板之製作方法具有以下 ^ 不而要製作導通孔,能有效克服先前技術中製作導 5 ,並大大簡化電 第-絕緣@|® , 案使導電柱暴露於 X,丹陈舌暴路於第一絕緣層表面之導電柱,可除 g電柱上殘留之絕緣材料,避免絕緣材料影響導電層之間之電 另外本7貞域技術人貞還可於本發明精神内做其他變化,♦ 發賴神所做之變化,都應包含於本發明所要: 12 丄 J/δ/Μ 内。' 等 >文彳> 飾或變化 ,白應涵蓋於以下申請專利範圍 【圖式簡單說明】 意圖 供之提叙€絲讀作方法所提 圖2係於圖i所示之導電基材之一表面形成第一光阻層之示The Ctit is exposed to expose a second conductive line (10) electrically connected to the first conductive layer 110 by the plurality of first conductive pillars 113. /, the younger conductor conducts the first, the line 17G' to make the first electrical connection, as shown by the plurality of first conductive electrodes 113 and the complex second conductive layer 110 including the first conductive line 170 to the column 113 Forming a second insulating layer on the side of the second conductive pillar and the plurality of first conductive insulated conductive pads, forming a fourth insulating layer, and forming a fourth surface on the plurality of second conductive layers The surface of the layer is exposed to the surface of the second surface. The second layer of the second layer of the second layer of the second conductive pillar is exposed by the image transfer process and the etching process. Part of it, 1378754 kg? 1 wherein the second conductive pillar is flush with the fourth surface; finally, the third conductive J layer J is formed into a third conductive line, and the third conductive line is made up of (10) the plurality of electric poles and the first conductive line 17G Electrically connected, the second conductive line 160 is electrically connected to the first conductive pillar 113 by the plurality of first conductive pillars 113. The method for fabricating the circuit board provided by the second embodiment of the present invention may include the following steps: The substrate ί is provided as =f^2()G, and the thickness A is in the conductive 211 (10) of the first embodiment: : Plural first guide Thunder m ♦ Mountain has an insulating residual layer 232. The 232 is embedded in the second conductive layer 24. And ^ two $ to: 241, as shown in Figure 15. 〒 增 增 空 空 空 空 空 空 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 The 231th is flush, as shown in Figure I6. Exposure to the first insulating layer one point = layer = - two column two 丄: > / δ 〇 4 communication hole 242. The second conductive layer 24G is formed into the second conductive line 260, and the electric column line 260 and the first conductive layer 210 are filled with the plurality of first holes to connect the plurality of communication holes 242 of the conductive layer 240. The conductive material, the second conductive layer 24G of the material forms a second conductive substrate (not shown in FIG. 11 by electroless plating in the via hole 242 of the 11th conductive layer 24G and has a tear-off Λ=Λ243, and then chemical The copper layer 243 is electrically formed on the electricity: the mt 44 fills the communication hole 242 of the second conductive layer 240, and the disk-conductive layer 24G is flush, thereby licking the third conductive substrate. ...,: by the shirt Image transfer process and etch process __ (2) = the second conductive substrate is made into the second conductive line - 213 material - weighted first = ^ 1 side of the fourth step to remove the complex first conductive The portion of the column 213 that exits from the first surface 231 simultaneously forms the second conductive layer and fills the communication hole with the conductive material to obtain a plurality of connected conductive lines. Thus, one image rotation can be omitted. Adding a first conductive layer to the first conductive line 27 (), and causing the electric line 270 to pass through the plurality of first conductive columns 213 and the second The formation of the first conductive line 27 is preferably 126G electrically connected. The second conductive ray _ 29 _ ;; the map is not the same ' and the third conductive layer is formed into the nl:! w 270" w as shown in FIG. . The conductive guinea 214 is electrically connected to each other, and the 11th ancient insulating layer 280 can be formed by pressing. Second insulating the fourth surface 281 of the first conductive layer 210, the plurality of second conductive covers the first surface, and the second insulating residual layer (not shown) leads to form a third conductive layer on the second insulating layer The plurality of second bodies 1 are embedded in the third conductive layer for the portion of the fourth surface 281 and the second conductive layer and the vacant layer, and the electrical layer of the third conductive layer is S The etched process side removes a portion of the third conductive guide, which is exposed from the fourth surface 281, so that the plurality of first conductive pillars 2U are flush with the fourth surface 281. The second conductive layer is formed into a third conductive line 290, and the first conductive line 270 and the second conductive line 260 are electrically connected to the first conductive pillar 213 and the plurality of second conductive pillars 214. Moreover, the formation of the second conductive circuit 260 is substantially the same as that of the second conductive circuit 260. The advantages of the step and the manufacturing method of the circuit board have the following advantages: Guide 5, and greatly simplify the electric-insulation@|®, the case exposes the conductive column to X, and the Dan-Chen tongue violently passes on the conductive column on the surface of the first insulating layer, which can remove the insulating material remaining on the g-electrode to avoid the insulating material. Affecting the electrical connection between the conductive layers, other variations can be made within the spirit of the present invention. ♦ Any changes made by God should be included in the present invention: 12 丄J/δ/Μ Inside. '等>文彳> Decoration or change, white should be covered in the following patent application scope [Simple description of the drawing] Intended to provide a reference to the silk reading method Figure 2 is based on the conductive substrate shown in Figure i One surface forming a first photoresist layer
,3係經曝光、顯影、侧後,圖之 導電層以及複鄉-導電柱之^賴。 W成第 意圖圖4係除去圖3中之複數第—導電柱上之第—光阻層後之示 圖5係於圖4所示之第一導電層上形成第一絕緣層之示意圖。 圖6係於圖5所示之第一絕緣層上形成第二導電層之示意圖。 。圖7係於圖6所示之第二導電層上形成第二光阻層後之示意 電柱鱗光、顯影、侧後,暴露出圖7中之複數第-導 =係於圖8所示之第二導電層之連通孔中形成化學銅 <不思圖。 圖10係於圖9所示之化學銅層上形成電鍍銅層後之示意圖。 意圖圖11係除去圖10所示之第二導電層上之第二光阻層後之示 圖12係將圖U巾之第二導電層形成第二導電線路後之 圖0 圖13係本技術方絲二實關提供之電路板之製作方法所提 13 丄J/07 供之導電基材之结構示意圖。 圖14係將圖a 電柱以及複料彡絲—導電層、複數第一導 二導圖意1 圖4所示之第-導電層上形成第-絕緣層以及第 導電示曝光、顯影、侧後’暴露出圖15中之複數第— 。圖17係將圖16中之第二導電層形成第二導電線路後之示意 。圖18係將圖17中之第-導電層形成第-導電線路後之示意 圖 導===,第一導電線路上形成第二絕緣層以及第3, after exposure, development, side, the conductive layer of the figure and the Fuxiang-conductive column. Figure 4 is a schematic view showing the formation of a first insulating layer on the first conductive layer shown in Figure 4 after removing the first photoresist layer on the plurality of first conductive pillars of Figure 3. FIG. 6 is a schematic view showing the formation of a second conductive layer on the first insulating layer shown in FIG. . 7 is a schematic view of the second column of the second conductive layer shown in FIG. 6 after the formation of the second photoresist layer, after the development, side, exposed the plurality of the first guide in FIG. 7 is shown in FIG. A chemical copper is formed in the communication hole of the second conductive layer. Figure 10 is a schematic view showing the formation of an electroplated copper layer on the chemical copper layer shown in Figure 9. FIG. 12 is a diagram showing the second photoresist layer on the second conductive layer shown in FIG. 10 after the second conductive layer is formed into a second conductive line. FIG. The structure of the conductive substrate provided by the method of manufacturing the circuit board provided by Fangsi Ershiguan. Figure 14 is a diagram showing the electric column of the drawing a and the multifilament-filament-conducting layer, the first plurality of second guiding patterns, the first conductive layer shown in Fig. 4, the first insulating layer, and the first conductive layer, and the first conductive layer is exposed, developed, and laterally exposed. 'Exposing the plural number in Figure 15 -. Figure 17 is a schematic view showing the second conductive layer of Figure 16 after forming a second conductive line. Figure 18 is a schematic diagram of the first conductive layer of Figure 17 after forming a first conductive line ===, a second insulating layer is formed on the first conductive line, and
100'200 111 112 【主要元件符號說明】 導電基材 第一表面 第二表面 將第一導電層 第一導電柱 第一光阻層 第一絕緣層 第三表面 110 113、213 120 130 、 230 131 絕緣殘留層 第二導電層 132 140、240 14 1378754 空隙 141 第二光阻層 150 連通孔 第二導電緣路 第二導電基材 化學銅層 電鍍銅層 第一導電線路 第一導電層 第二導電枉 第一表面 第二表面 第三表面 絕緣殘留層 空隙 導電線路 第二絕緣層 第三導電線路 第四表面 142 160 143 144 145 170 210 214 211 212 231 232 241 270 280 290 281 242 260 243 244 15100'200 111 112 [Description of main component symbols] First surface of the conductive substrate Second surface of the first conductive layer First conductive pillar First photoresist layer First insulating layer Third surface 110 113, 213 120 130 , 230 131 Insulating residual layer second conductive layer 132 140, 240 14 1378754 gap 141 second photoresist layer 150 communication hole second conductive edge second conductive substrate chemical copper layer electroplated copper layer first conductive line first conductive layer second conductive枉 first surface second surface third surface insulating residual layer void conductive line second insulating layer third conductive line fourth surface 142 160 143 144 145 170 214 211 211 231 232 241 270 280 290 281 242 260 243 244 15
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