TWI378574B - Light emitting diode chip - Google Patents

Light emitting diode chip Download PDF

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Publication number
TWI378574B
TWI378574B TW97136770A TW97136770A TWI378574B TW I378574 B TWI378574 B TW I378574B TW 97136770 A TW97136770 A TW 97136770A TW 97136770 A TW97136770 A TW 97136770A TW I378574 B TWI378574 B TW I378574B
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Taiwan
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layer
light
emitting diode
electrode
diode chip
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TW97136770A
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Chinese (zh)
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TW201013976A (en
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Sean Chang
Gwo Jiun Sheu
Sheng Han Tu
Chii How Chang
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Delta Electronics Inc
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1378574 101年.05月09日楱正替換頁 六、發明說明: 【發明所屬之技術領域】 [0001] 本發明係關於一種發光二極體晶片,特別是一種發光二 極體晶片藉由一導電層以及至少一電流分佈層依序形成 在蟲晶疊層上,使電流均勻分佈在主動層。 【先前技術】1378574 101.05月09日楱正替换页6, invention description: [Technical Field] [0001] The present invention relates to a light-emitting diode wafer, in particular to a light-emitting diode wafer by a conductive The layer and the at least one current distribution layer are sequentially formed on the insect crystal layer to uniformly distribute the current in the active layer. [Prior Art]

[0002] 目前市面上的高功率發光二極體晶片(power LED[0002] High-power light-emitting diode chips (power LED) currently on the market

chip)就面積效率而言高功率LED晶片邊長多大於1000" m,面積大於1 mm2,發光效率比起較小的晶片,如610// m、381 era要小很多,所以增大LED晶片面積雖可提高額 定電流與瓦數及亮度,但相對衍生出散熱不易問.題與發 光效率低等問題。Chip) In terms of area efficiency, the high-power LED chip has a side length of more than 1000 " m, an area greater than 1 mm2, and the luminous efficiency is much smaller than that of a smaller wafer, such as 610//m, 381 era, so the LED chip is enlarged. Although the area can increase the rated current and wattage and brightness, but the relative heat dissipation is not easy to ask. The problem and low luminous efficiency.

[0003] 圖1為一種習知發光二極體晶片之剖面圖。該發光二極體 晶片1包括藍寶石(sapphire)基板11 '緩衝層12、遙晶 疊層13、透明導電層14、η型電極16以及p型電極17,其 中磊晶疊層13包括η型GaN層131、主動層132、ρ型GaN 層133。發光二極體晶片1面積越大發光效率越低。瓦數 提高,發光效率反而下降,增大LED晶片面積造成溫度集 中與上升,進而造成LED亮度與壽命下降。 [0004] 如圖1所示,因為ρ型GaN層材料阻抗值很高,傳統式愈大 的晶片面積會造成電流18分佈愈不均勻,靠近ρ型電極17 的區域電流密度尚*退離ρ型17的區域電流18密度低'當 施加的電流18越來越高時在近ρ型電極17的高電流密度區 域會產生飽和現象而造成發光效率低的現象,額外的電 流將轉換為熱,溫度也將升高,所以LED晶片面積越大, 09713677(^單編號 A_ 第3頁/共29頁 1013174535-0 1378574 ' ____ 101年05月09日核正替换頁 電流分佈越不均勻,單位面積效率越低,溫度分佈不均 勻且也越集中,故使電流平均流過LED的主動層132將 有助於提昇其效率。1 is a cross-sectional view of a conventional light emitting diode chip. The light emitting diode wafer 1 includes a sapphire substrate 11 'buffer layer 12, a remote crystal layer 13, a transparent conductive layer 14, an n-type electrode 16, and a p-type electrode 17, wherein the epitaxial layer 13 includes n-type GaN Layer 131, active layer 132, and p-type GaN layer 133. The larger the area of the light-emitting diode wafer 1, the lower the luminous efficiency. As the wattage increases, the luminous efficiency decreases, and the increase in the area of the LED chip causes the temperature to concentrate and rise, which in turn causes the brightness and life of the LED to decrease. [0004] As shown in FIG. 1, because the material resistance value of the p-type GaN layer material is high, the larger the wafer area of the conventional type, the more uneven the distribution of the current 18 is, and the current density near the region of the p-type electrode 17 is still *retracted from ρ. The region current 18 of the type 17 has a low density. When the applied current 18 is higher and higher, a saturation phenomenon occurs in the high current density region of the near-n-type electrode 17 to cause a low luminous efficiency, and the extra current is converted into heat. The temperature will also rise, so the larger the area of the LED chip, 09713677 (^ single number A_ page 3 / 29 pages 1013174535-0 1378574 ' ____ 101 May 09 nuclear replacement page current distribution is more uneven, unit area The lower the efficiency, the unevener the temperature distribution and the more concentrated, so that flowing the current across the active layer 132 of the LED will help to increase its efficiency.

[0005] 圖2為另一種習知發光二極體晶片之上視圖。該發光二極 體晶片2與發光二極體晶片1不同之處在於η型電極26以及 ρ型電極27為指插狀電極,分別具有複數個焊接部261、 271以及複數個延伸部262、272,η型電極26之延伸部 262與ρ型電極27之延伸部272互相平行、交錯設置。發 光二極體晶片2為使電流更均勻通過主動層132,不論是η 型電極26或ρ型電極27皆作成複雜的指插狀電極。圖3為 圖2之發光二極體晶片沿ΑΑ’直線之模擬無因次化 (normalized)電流密度值。由模擬分析可知,在700mA 的電流輸入下,此電極圖案所造成主動層132平面之最大 電流密度值為1. 951xl06A/m2,最小電流密度值為3. 152 xl05A/m2,最大電流密度值約為最小電流密度值的6倍, 而此平面上之電流密度標準差為2. 34x1 05A/m2。 [0006] ρ型電極圖案越多擋住的光線也越多,透明導電層(IT0) 雖然可使電流分佈較均勻,但是靠近ρ型電極附近依然是 電流密度最高之處,仍會造成電流密度過高,在主動層 產生電光轉換飽和現象,此時電光轉換效率下降,部份 電流將無法轉換成光線輸出,最後將轉換成熱,造成溫 度上升。再者,發光二極體晶片複雜的表面電極圖案, 設計不易,良率差,生產不易。表面電極(例如ρ型電極) 越多、面積越大,越容易擋住光線造成發光效率降低。 多個電極,每個電極需打上一條以上的金線或鋁線,成 09713677产單编號 A〇101 第4頁/共29頁 1013174535-0 1378574 101年05月09日核正@^頁 本較高。複雜的表面電極圖案和多個打線用電極易造成 電路複雜,並採用較多的線路,使用的電路板也增大, 成本也加向。 【發明内容】 [0007] 有鑑於上述課題,本發明之一目的在於提供一種發光二 極體晶片,藉由第一導電層以及至少一電流分佈層依序 形成在磊晶疊層上,使電流均勻分佈在主動層,使發光 均勻,且提高效率,也減少熱的集中,延長壽命。2 is a top view of another conventional light emitting diode wafer. The light-emitting diode chip 2 is different from the light-emitting diode wafer 1 in that the n-type electrode 26 and the p-type electrode 27 are finger-inserted electrodes each having a plurality of soldering portions 261 and 271 and a plurality of extending portions 262 and 272. The extension portion 262 of the n-type electrode 26 and the extension portion 272 of the p-type electrode 27 are parallel to each other and alternately arranged. The light-emitting diode chip 2 is formed to make the current more uniform through the active layer 132, and the n-type electrode 26 or the p-type electrode 27 are formed as complex finger-inserted electrodes. Fig. 3 is a graph showing the normalized current density value of the light-emitting diode wafer of Fig. 2 along the ΑΑ' line. According to the simulation analysis, at the current input of 700 mA, the maximum current density of the plane of the active layer 132 caused by the electrode pattern is 1.951×10 6 A/m 2 , and the minimum current density is 3.152 x 105 A/m 2 , and the maximum current density is about The standard deviation of the current density on this plane is 2.34x1 05A/m2. [0006] The more the p-type electrode pattern blocks the more light, the transparent conductive layer (IT0) can make the current distribution more uniform, but the current density is the highest near the p-type electrode, which still causes the current density to pass. High, the electro-optical conversion saturation phenomenon occurs in the active layer. At this time, the electro-optical conversion efficiency is lowered, and some currents cannot be converted into light output, and finally converted into heat, causing the temperature to rise. Furthermore, the complicated surface electrode pattern of the light-emitting diode chip is not easy to design, the yield is poor, and the production is not easy. The more surface electrodes (for example, p-type electrodes) and the larger the area, the more easily the light is blocked and the luminous efficiency is lowered. Multiple electrodes, each electrode needs to be marked with more than one gold wire or aluminum wire, into a 09713677 production order number A〇101 Page 4 / 29 pages 1013174535-0 1378574 101 May 09 nuclear positive @^页本Higher. The complicated surface electrode pattern and the plurality of wire-bonding electrodes are liable to cause complicated circuits, and more lines are used, the used circuit boards are also increased, and the cost is also increased. SUMMARY OF THE INVENTION [0007] In view of the above problems, an object of the present invention is to provide a light-emitting diode wafer, which is sequentially formed on an epitaxial layer by a first conductive layer and at least one current distribution layer. It is evenly distributed in the active layer to make the light uniform, improve the efficiency, reduce the concentration of heat and prolong the life.

[0008] 本發明之另一目的在於提供一種發光二極體晶片,藉由 第一導電層以及至少一電流分佈層依序形成在磊晶疊層 上,使電流均勻分佈在主動層,可減少P型電極的面積, 增加發光的區域。 [0009] 本發明之又一目的在於提供一種發光二極體晶片,藉由 增高圖案化阻抗層在第二電極的單位面積圖案覆蓋率, 可提升發光二極體晶片電流密度方布的均勻度。Another object of the present invention is to provide a light-emitting diode wafer, which is sequentially formed on an epitaxial layer by a first conductive layer and at least one current distribution layer, so that current is evenly distributed in the active layer, which can be reduced. The area of the P-type electrode increases the area of illumination. [0009] Another object of the present invention is to provide a light-emitting diode wafer, which can improve the uniformity of the current density of the light-emitting diode wafer by increasing the pattern coverage of the patterned resistive layer per unit area of the second electrode. .

[00103 本發明之再一目的在於提供一種發光二極體晶片,當發 光二極體晶片包括複數層電流分佈層時,各該圖案化阻 抗層之無圖案部分為相鄰之該圖案化阻抗層之圖案所覆 蓋,可提升發光二極體晶片電流密度方布的均勻度。 [0011] 為達上述目的,一種發光二極體晶片,包括:一磊晶疊 層;一第一導電層,形成在磊晶疊層上;以及至少一電 流分佈層形成在第一導電層上,其中電流分佈層包括一 圖案化阻抗層及第二導電層依序形成在該第一導電層上 ,使圖案化阻抗層介於兩導電層之間。 09713677产單編號 A〇101 第5頁/共29頁 1013174535-0 1378574 ___, 101年05月09日核正替换頁 [0012] 該發光二極體晶片包括複數層電流分佈層時,圖案化阻 抗層之無圖案部分為相鄰之圖案化阻抗層之圖案所覆蓋[00103] A further object of the present invention is to provide a light emitting diode chip. When the light emitting diode chip includes a plurality of current distribution layers, the unpatterned portions of the patterned resistive layers are adjacent to the patterned resistive layer. Covered by the pattern, the uniformity of the current density of the light-emitting diode wafer can be improved. [0011] To achieve the above object, a light emitting diode wafer includes: an epitaxial layer; a first conductive layer formed on the epitaxial layer; and at least one current distribution layer formed on the first conductive layer The current distribution layer includes a patterned resistance layer and a second conductive layer sequentially formed on the first conductive layer such that the patterned resistance layer is interposed between the two conductive layers. 09713677Product No. A〇101 Page 5 of 29 Page 1013174535-0 1378574 ___, May 09, 2010 Nuclear Replacement Page [0012] When the LED array includes a plurality of current distribution layers, the patterned impedance The unpatterned portion of the layer is covered by the pattern of adjacent patterned resistive layers

[0013] 發光二極體晶片其更包括至少一第一電極形成在部分之 曝露第一半導體層上,至少一第二電極形成在電流分佈 層上。其中第一電極包括至少一第一焊接部以及至少一 延伸部延伸自第一焊接部,第二電極包括至少一第二焊 接部。圖案化阻抗層靠近第二電極的單位面積圖案覆蓋 率高於遠離第二電極的單位面積圖案覆蓋率。 [0014] 承上所述,本發明提供之發光二極體晶片,藉由將第一 導電層以及至少一電流分佈層依序形成在磊晶疊層上, 使電流均勻分佈在主動層,使發光二極體晶片發光均勻 ,且提高發光效率,同時降低熱的集中程度,延長發光 二極體晶片的壽命,且可減少第二電極的面積,增加發 光的區域。藉由增高圖案化阻抗層在第二電極的單位面 積圖案覆蓋率,可更提升發光二極體晶片電流密度的均 勻度。 【實施方式】 [0015] 以下將參照相關圖式,說明依據本發明較佳實施例之發 光二極體晶片,其中相同的晶片將以相同的參照符號加 以說明。 [0016] 圖4A及圖4B為本發明之發光二極體晶片兩種態樣的剖面 圖。該發光二極體晶片3包括基板31、緩衝層32、磊晶疊 層33、第一導電層34以及至少一電流分佈層35,其中圖 4A之發光二極體晶片3包括一電流分佈層35,圖4B之發光 〇9713677(^單编號A0101 第6頁/共29頁 1013174535-0 1378574 . _ 101年05月09日修正替換頁 二極體晶片3’包括二電流分佈層35、35, ^ [00Π]發光二極體晶片3之基板31可以是藍寶石(sapphire)、 矽(silicon)、碳化矽(SiC)、MgA1〇 4合金之材質。 2 4[0013] The light emitting diode wafer further includes at least one first electrode formed on a portion of the exposed first semiconductor layer, and at least one second electrode formed on the current distribution layer. The first electrode includes at least one first soldering portion and the at least one extending portion extends from the first soldering portion, and the second electrode includes at least one second soldering portion. The pattern coverage of the patterned resistive layer near the second electrode is higher than the coverage per unit area away from the second electrode. [0014] According to the above description, the LED array of the present invention is formed by sequentially forming a first conductive layer and at least one current distribution layer on the epitaxial layer, so that the current is evenly distributed in the active layer. The light-emitting diode wafer emits light uniformly, and improves the light-emitting efficiency, reduces the concentration of heat, prolongs the life of the light-emitting diode wafer, and reduces the area of the second electrode and increases the area of light emission. By increasing the pattern coverage of the patterned resistive layer in the unit area of the second electrode, the uniformity of the current density of the light-emitting diode wafer can be further improved. [Embodiment] Hereinafter, a light-emitting diode wafer according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings, in which the same reference numerals will be given. 4A and 4B are cross-sectional views showing two aspects of a light-emitting diode wafer of the present invention. The LED chip 3 includes a substrate 31, a buffer layer 32, an epitaxial layer 33, a first conductive layer 34, and at least one current distribution layer 35. The LED array 3 of FIG. 4A includes a current distribution layer 35. Fig. 4B illuminating 〇 9713677 (^单单 A0101 page 6 / 29 pages 1013174535-0 1378574 . _ May 09, 101 revised replacement page diode wafer 3' includes two current distribution layers 35, 35, ^ [00Π] The substrate 31 of the light-emitting diode chip 3 may be made of sapphire, silicon, tantalum carbide (SiC), or MgA1〇4 alloy.

緩衝層32形成在基板31上,其可為單層物質或多層物質 。蠢晶疊層33形成在緩衝層32上,磊晶疊層33依序包括 一第一半導體層331、一主動層332以及一第二半導體層 333。第一半導體層331為η型半導體層,第二半導體層 333為ρ型半導體層’第一半導體層331可為n_GaN、 n-AlGaN ' n-GaAs或n-GaP,第二半導體層333可為 p-GaN、p-AlGaN、p-GaAs 或 p-GaP,主動層 332 為一或 多層能隙層、多量子井結構(Multiple Quantum Well, MQW)結構或單一量子井結構(Single Quantum Well, SQW) ’其材質可為氮化姻錄(indium gallium nitride, InGaN)、氮化鎵(Gallium nitride, GaN) 、氣化嫁姻(G a 11 i u m i n d i u m n i t r i d e, G a I η N)、氮 化鋁鎵(Aluminum gallium nitride,AlGaN)、氮化 銦(InN)、氮化氮化鋁(AIN)、硒化辞(Zinc selenide,ZnSe)、摻鋅之氮化銦鎵(Zinc doped Indium gallium nitride, InGaN:Zn)、鱗化鋁銦鎵 (Aluminum gallium indium phosphide, AlInGaP) 或鱗化鎵(Gallium phosphide, GaP)。發光二極體晶 片3之第一導電層34形成在磊晶疊層33上,電流分佈層35 形成在第一導電層34上。其中電流分佈層35包括一圖案 化阻抗層351及一第二導電層352依序形成在第一導電層 34上,用以均勻分佈電流,使主動層332均勻發光。第一 09713677(f·單編號 A0101 第7頁/共29頁 1013174535-0 1378574 及第二導電層34、352為透明導電層,其材質可為姻錫氧 化物(ΙΤ0)、氧化鋅(ZnO)、鋁鋅氧化物(azo)、 摻銻二氧化錫(Antimony Doped Tin Oxide,ΑΤ0) 、二氧化錫(Sn〇2)。第一及第二導電層可為相同或不 同材貝,圖案化阻抗層3 51為電性絕緣材料或低導電係數 材料,例如為透明介電層,其材料可為氧化矽(Si〇2)或 五氧化二銳(Nb2〇5),圖案化阻抗層351之圖案可為多個 四邊形(如圖5A)、三角形(如圖5B)、六邊形(如圖5C) 、八邊形(如圖5D)、圓形(如圖5E)、橢圓形(如圖51〇或 其組合,但不以此為限。再者,圖案化阻抗層351也可是 具有多個孔洞的介電層,該等孔洞可為多個三角形、四 邊形(如圖5G)、六邊形、八邊形、圓形、橢圓形或其組 合。此外’此圖案化阻抗層351之導電係數小於第一或第 二導電層34、352之導電係數即可,而其折射率接近或等 於第一或第二導電層34、352之折射率。 [0018] 101 年 05月 09 日" 此外’當至少一電流分佈層35為複數層電流分饰層時, 如圖4B所示,自發光二極體晶片3,之俯視方向,圖案化 阻抗層351之無圖案部份為相鄰之圖案化阻抗層351,之 圖案所覆蓋,換言之,圖案化阻抗層351、351,成錯開 排列,且圖案化阻抗層351’之長度大於圖案化阻抗層 351之長度。舉例來說,若一圖案化阻抗層351之圖案包 括複數個四邊形(如圖5B)時,其相鄰之圖案化阻抗層351 之圖案可為如圖5G所示之具有多個四邊形孔洞的介電 層’此時,電流密度經由圖案化阻抗層351,無圖案區域 經圖案化阻抗層351之圖案使電流密度再重新分佈一次, 〇_77(P编號 A〇101 第8頁/共29頁 1013174535-0 1378574 . . ___ 101年〇ij~^9日修正#^頁 使電流密度分佈更加均勻。 [0019]如圖4A' 4B及6A所示,發光二極體晶片3更包括至少一第 一電極3 6及至少一第二電極37,其中第—電極36形成在 曝露的部份第一半導體層331上,第二電極37形成在電流 分佈層35上。在本實施例中,第一電極36&η型電極,形 成在曝露的部份η型半導體層331上,第二電極”為卩型電 極,形成在電流分佈層35上,其中第一電極36包括至少 一焊接部361以及至少一延伸部362延伸自焊接部361, φ 第二電極37包括至少一焊接部,可以無延伸部,焊接部 361及第二電極37係用以與外界電性連接,第一電極“的 延伸部362可以使電流更均勻分佈。 _]此外’第二電極37形成在電流分散層35上,電流分佈層 35及第-導電層34具有分散電流的功能,所以第二電極 37可以無延伸部。第_及第二電極36、37可對慮地設置 在發光二極體晶片3的周邊區域,如圖6Α所示。或者,第 —電極36設置在發光二極體晶片3的中心區域,第二電極 37設置在發光二極體晶片3的周邊區域,如隨所示。或 者’第-電極36設置在發光二極體晶片3的周邊區域,第 . 二電極37設置在發光二極體晶片3的中心區域,如圖6c所 . 示。 剛再者,如圖7所示,圖案化阻抗層351靠近第二電極⑽ 單位面積圖案覆蓋率高於遠離第二電極37的單位面積圖 案覆蓋率,可使靠近第二電極37的圖案化阻抗層351每單 位面積具有較高的阻抗,遠離第二電極37的圖案化阻抗 13 51每單位面積具有較低的阻抗,使電流分佈更均勻。 09713677(Γ^^ A〇l〇l 第 9 頁 / 共 29 頁 1013174535-0 1378574 ._, 101年05月09日按正替换百 [0022] 因此,電流自第二電極(例如p型電極)流經電流分佈層時 ,被至少一圖案化阻抗層阻擋而均勻分佈至第一導電層 ,再經第二半導體層(例如P型半導體層)到達主動層,最 後經第一半導體層(例如η型半導體層)傳到第一電極(例 如η型電極),使主動層的電流較均勻。The buffer layer 32 is formed on the substrate 31, which may be a single layer material or a multilayer material. The dummy layer stack 33 is formed on the buffer layer 32. The epitaxial layer stack 33 sequentially includes a first semiconductor layer 331, an active layer 332, and a second semiconductor layer 333. The first semiconductor layer 331 is an n-type semiconductor layer, and the second semiconductor layer 333 is a p-type semiconductor layer. The first semiconductor layer 331 may be n_GaN, n-AlGaN 'n-GaAs or n-GaP, and the second semiconductor layer 333 may be p-GaN, p-AlGaN, p-GaAs or p-GaP, active layer 332 is one or more energy gap layers, multiple quantum well structure (MQ) structures or single quantum well structures (Single Quantum Well, SQW) ) 'The material can be indium gallium nitride (InGaN), gallium nitride (GaN), gas ablation (G a 11 iumindiumnitride, G a I η N), aluminum gallium nitride ( Aluminum gallium nitride, AlGaN), indium nitride (InN), aluminum nitride nitride (AIN), Zinc selenide (ZnSe), Zinc doped Indium gallium nitride (InGaN: Zn) ), aluminium gallium indium phosphide (AlInGaP) or gallium phosphide (GaP). The first conductive layer 34 of the light-emitting diode wafer 3 is formed on the epitaxial layer 33, and the current distribution layer 35 is formed on the first conductive layer 34. The current distribution layer 35 includes a patterned resistive layer 351 and a second conductive layer 352 sequentially formed on the first conductive layer 34 for uniformly distributing current to uniformly illuminate the active layer 332. The first 09713677 (f. single number A0101 page 7 / 29 pages 1013174535-0 1378574 and the second conductive layer 34, 352 is a transparent conductive layer, the material of which can be a tin oxide (ΙΤ0), zinc oxide (ZnO) , aluminum zinc oxide (azo), antimony doped tin oxide (Antimony Doped Tin Oxide, ΑΤ 0), tin dioxide (Sn 〇 2). The first and second conductive layers can be the same or different materials, patterned impedance The layer 3 51 is an electrically insulating material or a low conductivity material, such as a transparent dielectric layer, and the material thereof may be yttrium oxide (Si〇2) or bismuth pentoxide (Nb2〇5), and the pattern of the patterned resistive layer 351 Can be a plurality of quadrangles (as shown in Figure 5A), triangles (Figure 5B), hexagons (Figure 5C), octagons (Figure 5D), circles (Figure 5E), oval (Figure 51 〇 or a combination thereof, but not limited thereto. Further, the patterned resistance layer 351 may also be a dielectric layer having a plurality of holes, which may be a plurality of triangles, quadrangles (as shown in FIG. 5G), and hexagons. , octagonal, circular, elliptical or a combination thereof. Further, the conductive coefficient of the patterned resistive layer 351 is smaller than the first or second conductive The conductivity of the layers 34, 352 is sufficient, and its refractive index is close to or equal to the refractive index of the first or second conductive layers 34, 352. [0018] May 09, 101 " In addition, when at least one current distribution layer When 35 is a plurality of layers of current-dividing layers, as shown in FIG. 4B, in the plan view direction of the self-luminous diode chip 3, the unpatterned portion of the patterned resistive layer 351 is an adjacent patterned resistive layer 351. Covered, in other words, the patterned resistive layers 351, 351 are arranged in a staggered arrangement, and the length of the patterned resistive layer 351' is greater than the length of the patterned resistive layer 351. For example, if the pattern of the patterned resistive layer 351 includes a plurality a quadrangular shape (as shown in FIG. 5B), the pattern of the adjacent patterned resistive layer 351 may be a dielectric layer having a plurality of quadrangular holes as shown in FIG. 5G. At this time, the current density is via the patterned resistive layer 351. The pattern-free region is patterned by the patterned impedance layer 351 to redistribute the current density again, 〇_77 (P No. A 〇 101 Page 8 / Total 29 pages 1013174535-0 1378574 . . ___ 101 years 〇 ij~^9 The daily correction #^ page makes the current density distribution more uniform. [001 9A' 4B and 6A, the LED chip 3 further includes at least a first electrode 36 and at least a second electrode 37, wherein the first electrode 36 is formed on the exposed portion of the first semiconductor layer The second electrode 37 is formed on the current distribution layer 35. In the present embodiment, the first electrode 36&n-type electrode is formed on the exposed portion of the n-type semiconductor layer 331, and the second electrode is of the 卩 type. An electrode is formed on the current distribution layer 35, wherein the first electrode 36 includes at least one soldering portion 361 and at least one extending portion 362 extends from the soldering portion 361, and the second electrode 37 includes at least one soldering portion, which can be soldered without an extension. The portion 361 and the second electrode 37 are electrically connected to the outside, and the extension portion 362 of the first electrode can make the current more evenly distributed. Further, the second electrode 37 is formed on the current dispersion layer 35, and the current distribution layer 35 and the first conductive layer 34 have a function of dispersing current, so that the second electrode 37 may have no extension. The first and second electrodes 36, 37 are disposed in a peripheral region of the light-emitting diode wafer 3, as shown in Fig. 6A. Alternatively, the first electrode 36 is disposed in a central region of the light-emitting diode wafer 3, and the second electrode 37 is disposed in a peripheral region of the light-emitting diode wafer 3 as shown. Or the 'electrode 36' is disposed in the peripheral region of the light-emitting diode wafer 3, and the second electrode 37 is disposed in the central region of the light-emitting diode wafer 3 as shown in Fig. 6c. As shown in FIG. 7, the patterned impedance layer 351 is closer to the second electrode (10), and the unit area pattern coverage is higher than the unit area pattern coverage away from the second electrode 37, so that the patterned impedance close to the second electrode 37 can be obtained. The layer 351 has a higher impedance per unit area, and the patterned impedance 13 51 away from the second electrode 37 has a lower impedance per unit area, making the current distribution more uniform. 09713677(Γ^^ A〇l〇l Page 9 of 29 1013174535-0 1378574 ._, May 09, 2011 Pressing positively [0022] Therefore, current from the second electrode (eg p-type electrode) When flowing through the current distribution layer, it is uniformly blocked by the at least one patterned resistance layer and distributed to the first conductive layer, and then reaches the active layer via the second semiconductor layer (for example, a P-type semiconductor layer), and finally passes through the first semiconductor layer (for example, η The semiconductor layer is transferred to the first electrode (for example, an n-type electrode) to make the current of the active layer relatively uniform.

[0023] 圖8為圖6Β之發光二極體晶片沿ΒΒ’直線之模擬無因次化 電流密度值。由模擬分析可知,在70OmA的電流輸入下, 此電極圖案所造成主動層332平面之最大電流密度值為 1.185xl06 A/m2,最小電流密度值為6. 9xl05 A/m2, 最大電流密度值約為最小電流密度值的1. 7倍,而此平面 上之電流密度標準差為1. lxl 05 A/m2。因此,相較於圖 2,不論是最大電流密度值對最小電流密度值的比值及標 準差,本發明皆有明顯改善。 [0024] 圖9為本發明另一種發光二極體晶片的剖面圖。該發光二 極體晶片4依序包括一基板41、缓衝層32、磊晶疊層33、 第一導電層34、至少一電流分佈層35、第一電極36以及 第二電極37,該發光二極體晶片4與上述實施例不同之處 在於發光二極體晶片4為覆晶式發光二極體晶片,發光二 極體晶片4的基板41為透明基板,第一及第二導電層34、 352可為金屬層或透明導電層,發光二極體晶片4上的第 一電極36以及第二電極37以覆晶方式藉由凸塊(bump)42 與黏著基板(Sub-mount) 44上的接觸塾(contact pad)43電極電性連接。其餘元件皆相同,不另為贅述。 [0025] 圖10A及圖10B為本發明之發光二極體晶片其他態樣的剖 面圖。該發光二極體晶片5依序包括一基板51、磊晶疊層 0971367^單编號删1 第10頁/共29頁 1013174535-0 1378574 101年05月09日梭正替換頁8 is a simulated dimensionless current density value of the light-emitting diode wafer of FIG. 6 along the ΒΒ' line. According to the simulation analysis, at the current input of 70OmA, the maximum current density of the plane of the active layer 332 caused by the electrode pattern is 1.185xl06 A/m2, and the minimum current density is 6. 9xl05 A/m2, and the maximum current density is about Lxl 05 A/米2。 The minimum current density value of 1.7 times, and the standard deviation of the current density on this plane is 1. lxl 05 A / m2. Therefore, compared to Fig. 2, the present invention is significantly improved regardless of the ratio of the maximum current density value to the minimum current density value and the standard deviation. 9 is a cross-sectional view showing another light emitting diode wafer of the present invention. The LED wafer 4 includes a substrate 41, a buffer layer 32, an epitaxial layer 33, a first conductive layer 34, at least one current distribution layer 35, a first electrode 36, and a second electrode 37. The diode chip 4 is different from the above embodiment in that the LED chip 4 is a flip-chip diode chip, and the substrate 41 of the LED chip 4 is a transparent substrate, and the first and second conductive layers 34 are provided. The 352 may be a metal layer or a transparent conductive layer. The first electrode 36 and the second electrode 37 on the LED substrate 4 are flip-chip-coated by a bump 42 and a sub-mount 44. The contact pad 43 electrode is electrically connected. The rest of the components are the same and will not be described again. 10A and 10B are cross-sectional views showing other aspects of the light emitting diode chip of the present invention. The light-emitting diode wafer 5 includes a substrate 51 and an epitaxial stack in sequence. 0971367^Single number deletion 1 Page 10/29 pages 1013174535-0 1378574 May 09, 2007 Shuttle replacement page

33、第一導電層34、至少一電流分佈層35以及第二電極 37,該發光二極體晶片5與上述實施例不同之處在於發光 二極體晶片5為垂直式發光二極體晶片,基板51為一導電 基板,可為金屬基板,同時具備反射層以及第一電極之 功能。磊晶疊層33包括第二半導體層333、主動層332以 及第一半導體層331依序形成在基板51上,第二半導體層 333為p型半導體層,第一半導體層331為η型半導體層, 第一及第二導電層34、352可為透明導電層。發光二極體 晶片51更包括至少一第二電極37形成在電流分佈層35上 ,第二電極37包括至少一焊接部,可不包括延伸部。其 餘元件皆相同,不另為贅述。 [0026] 如圖10Β所示,該發光二極體晶片5’包括一基板51、電 流分佈層35、第一導電層34、磊晶疊層33以及第二電極 37,發光二極體晶片5’與圖10Α之發光二極體晶片5不同 之處在於蠢晶豐層33以及依序形成其上的第一導電層34 及至少一電流分佈層3 5形成在一蠢晶基板後,再倒立轉 〇33. The first conductive layer 34, the at least one current distribution layer 35, and the second electrode 37. The light emitting diode chip 5 is different from the above embodiment in that the light emitting diode chip 5 is a vertical light emitting diode chip. The substrate 51 is a conductive substrate, which may be a metal substrate, and has a function of a reflective layer and a first electrode. The epitaxial layer stack 33 includes a second semiconductor layer 333, an active layer 332, and a first semiconductor layer 331 sequentially formed on the substrate 51, the second semiconductor layer 333 is a p-type semiconductor layer, and the first semiconductor layer 331 is an n-type semiconductor layer. The first and second conductive layers 34, 352 can be transparent conductive layers. The light emitting diode chip 51 further includes at least one second electrode 37 formed on the current distribution layer 35, and the second electrode 37 includes at least one soldering portion, which may not include the extending portion. The remaining components are the same and will not be described again. As shown in FIG. 10A, the LED chip 5' includes a substrate 51, a current distribution layer 35, a first conductive layer 34, an epitaxial layer 33, and a second electrode 37. The LED array 5 is printed. The difference from the light-emitting diode wafer 5 of FIG. 10 is that the stray crystal layer 33 and the first conductive layer 34 and the at least one current distribution layer 35 formed thereon are formed on a stray substrate, and then inverted. Transfer

置形成在基板51上,然後第二電極37形成在磊晶疊層33 上。第一及第二導電層34、352可為金屬層或透明導電層 。其餘元件皆相同,不另為贅述。 [0027] 綜上所述,本發明提供之發光二極體晶片,藉由將第一 導電層以及至少一電流分佈層依序形成在磊晶疊層上, 使電流均勻分佈在主動層,使發光二極體晶片發光均勻 ,且提高發光效率,同時降低熱的集中程度,延長發光 二極體晶片的壽命,且可減少第二電極的面積,增加發 光的區域。藉由增高圖案化阻抗層在第二電極的圖案密 097腿7(Ρ編號Α_ 第11頁/共29頁 1013174535-0 1378574 101年05月09日梭正替换頁 度,可更提升發光二極體晶片電流密度的均勻度。 [0028] 以上所述僅為舉例性,而非為限制性者。任何未脫離本 發明之精神與範疇,而對其進行之等效修改或變更,均 應包含於後附之申請專利範圍中。 【圖式簡單說明】 [0029] 圖1為一種習知之發光二極體晶片裝置之剖面圖。 [0030] 圖2為另一種習知之發光二極體晶片裝置之上視圖。 [0031] 圖3為圖2之發光二極體晶片沿AA’線段之模擬無因次化 電流密度值。 [0032] 圖4A及圖4B為本發明之發光二極體晶片兩種態樣之剖面 圖。 [0033] 圖5A至圖5G為本發明之圖案化阻抗層之上視圖。 [0034] 圖6A至圖6C為本發明之發光二極體晶片之上視圖,顯示 發光二極體晶片第一及第二電極之相對位置。 〇 [0035] 圖7為圖4A之發光二極體晶片之圖案化阻抗層之較佳圖案 分佈情形。 [0036] 圖8為圖6B之發光二極體晶片沿BB’線段之模擬無因次化 電流密度值。 [0037] 圖9為本發明另一種之發光二極體晶片之剖面圖。 [0038] 圖1 0 A及圖1 0B為本發明之發光二極體晶片其他態樣的剖 面圖。 【主要元件符號說明】 1013174535-0The substrate is formed on the substrate 51, and then the second electrode 37 is formed on the epitaxial laminate 33. The first and second conductive layers 34, 352 can be a metal layer or a transparent conductive layer. The rest of the components are the same and will not be described again. [0027] In summary, the present invention provides a light-emitting diode wafer in which a first conductive layer and at least one current distribution layer are sequentially formed on an epitaxial layer to uniformly distribute current in the active layer. The light-emitting diode wafer emits light uniformly, and improves the light-emitting efficiency, reduces the concentration of heat, prolongs the life of the light-emitting diode wafer, and reduces the area of the second electrode and increases the area of light emission. By increasing the patterning resistance layer in the pattern of the second electrode 097 leg 7 (Ρ Α _ _ 11 / 29 pages 1013174535-0 1378574 101 May 01 shuttle is replacing the page degree, can further enhance the light dipole The uniformity of the current density of the bulk wafer. [0028] The above description is intended to be illustrative only and not limiting, and any equivalent modifications or alterations of the invention should be included without departing from the spirit and scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS [0029] Figure 1 is a cross-sectional view of a conventional light-emitting diode wafer device. [0030] Figure 2 is another conventional light-emitting diode device [0031] FIG. 3 is a simulated dimensionless current density value of the LED chip of FIG. 2 along the AA' line segment. [0032] FIGS. 4A and 4B are two LED chips of the present invention. 5A to 5G are top views of the patterned resistive layer of the present invention. [0034] FIGS. 6A to 6C are top views of the light emitting diode wafer of the present invention, showing light emission The relative positions of the first and second electrodes of the diode wafer. [0035] FIG. 7 is FIG. 4A FIG. 8 is a simulated dimensionless current density value of the light-emitting diode wafer of FIG. 6B along the BB' line segment. [0037] FIG. 9 is a cross-sectional view of another embodiment of the light-emitting diode wafer of the present invention. [0038] FIG. 10A and FIG. 10B are cross-sectional views showing other aspects of the light-emitting diode wafer of the present invention. [Description of Main Components] 1013174535 -0

第12頁/共29頁 1378574 101年05月09日修正替換頁 [0039] 1、2、3、3’ 、4、5:發光二極體晶片 11、 31、41、51 :基板 12、 32 :緩衝層 13、 33 .蟲晶豐層 131 : η型GaN層 132、332 :主動層 133 : p型GaN層 14 :透明導電層 16、 26 : η型電極Page 12/29 Page 1387857 Modified on May 09, 2011 Correction Replacement Page [0039] 1, 2, 3, 3', 4, 5: LED Diode Wafers 11, 31, 41, 51: Substrates 12, 32 : Buffer layer 13, 33. Insect crystal layer 131: n-type GaN layer 132, 332: active layer 133: p-type GaN layer 14: transparent conductive layer 16, 26: n-type electrode

17、 27 : ρ型電極 18 :電流 261、 271 ' 361 :焊接部 262、 272、362 :延伸部 331 :第-一半導體層 333 :第二半導體層 34 :第一導電層17, 27: p-type electrode 18: current 261, 271 '361: soldering portion 262, 272, 362: extension portion 331: first semiconductor layer 333: second semiconductor layer 34: first conductive layer

35、35’ :電流分佈層 351、 35Γ :圖案化阻抗層 352、 352’ :第二導電層 36 :第一電極 37 :第二電極 42 :凸塊 43 :接觸墊35, 35': current distribution layer 351, 35: patterned resistance layer 352, 352': second conductive layer 36: first electrode 37: second electrode 42: bump 43: contact pad

Q 44 :黏著基板 讀顯产單編號應01 第13頁/共29頁 1013174535-0Q 44 : Adhesive substrate Read production number No. 01 Page 13 of 29 1013174535-0

Claims (1)

/〇〇/4/〇〇/4 七、申請專利範圍·· 種發光二極體晶片,包括: 蟲晶豐層; 一第一導電層,形成在該磊晶疊層之一侧上;以及 至乂一私流分佈層,形成在該第一導電層之一側,其中該 電流分佈層包括一圖案化阻抗層及第二導電層。 .如申請專利範圍第1項所述之發光二極體晶片,其中該蠢 BB疊層包括一第一半導體層、一主動層以及一第二半導體 層。VII. Patent application scope · A light-emitting diode wafer, comprising: a worm crystal layer; a first conductive layer formed on one side of the epitaxial layer; and a secluded flow distribution layer formed on One side of the first conductive layer, wherein the current distribution layer comprises a patterned impedance layer and a second conductive layer. The illuminating diode chip of claim 1, wherein the stupid BB stack comprises a first semiconductor layer, an active layer, and a second semiconductor layer. •如申請專利範圍第2項所述之發光二極體晶片,其中該第 一半導體層為η型半導體層,該第二半導體層為p型半導體 層。 .如申請專利範圍第2項所述之發光二極體晶片,其中該第 一半導體層為n-GaN、n-AlGaN、n-GaAs或n-GaP,該第 二半導體層為p-GaN、p-AlGaN、p-GaAs或p-GaP。 .如申請專利範圍第2項所述之發光二極體晶片,其中該主The light-emitting diode wafer according to claim 2, wherein the first semiconductor layer is an n-type semiconductor layer, and the second semiconductor layer is a p-type semiconductor layer. The illuminating diode chip according to claim 2, wherein the first semiconductor layer is n-GaN, n-AlGaN, n-GaAs or n-GaP, and the second semiconductor layer is p-GaN. p-AlGaN, p-GaAs or p-GaP. The illuminating diode chip according to claim 2, wherein the main 動層係分別為一或多層能隙層、多量子井結構或單一量子 井結構。 •如申請專利範圍第2項所述之發光二極體晶片,其中該主 動層為氮化銦鎵(Indium gallium nitride, InGaN) '氣化鎵(Gal 1 ium nitride, GaN)、氮化鎵銦 (Gallium indium nitride,GalnN)、氮化紹鎵 (Aluminum gallium nitride, AlGaN)、氮化銦 (InN)、氮化氮化鋁(AIN)、硒化鋅(Zinc selenide, ZnSe)、摻鋅之氮化銦鎵(Zinc doped Indium 09713677(^^^^ A0101 第14頁/共29頁 1013174535-0 1378574 101年05月09日修正替换頁 gallium nitride, InGaN:Zn)、磷化鋁銦鎵 (Aluminum gallium indium phosphide, AlInGaP) 或碟化鎵(Gallium phosphide, GaP)。 •如申請專利範圍第1項所述之發光二極體晶片,其中該第 一或該第二導電層為銦錫氧化物(IT〇)、氧化鋅(Zn〇 )、铭鋅氧化物(ΑΖ0 )、擦錄二氧化錫(Ant i mony Doped Tin Oxide,ΑΤΟ)、二氧化錫(SnO )。 2 yThe dynamic layer is one or more energy gap layers, multiple quantum well structures or a single quantum well structure. The illuminating diode chip according to claim 2, wherein the active layer is Indium gallium nitride (InGaN) galvanium nitride (GaN), gallium nitride indium nitride (Gallium indium nitride, GalnN), aluminum gallium nitride (AlGaN), indium nitride (InN), aluminum nitride nitride (AIN), zinc selenide (ZnSe), zinc-doped nitrogen Indium gallium (Zinc doped Indium 09713677 (^^^^ A0101 Page 14 of 29 1013174535-0 1378574 Modified on May 09, 101, replaces gallium nitride, InGaN: Zn), aluminum gallium phosphide (Aluminum gallium) Indium phosphide, AlInGaP) or gallium phosphide (GaP). The luminescent diode according to claim 1, wherein the first or second conductive layer is indium tin oxide (IT) 〇), zinc oxide (Zn〇), zinc oxide (ΑΖ0), tin dioxide (Ant i mony Doped Tin Oxide, ΑΤΟ), tin dioxide (SnO). 2 y -如申請拳利範圍第1項所述之發光二極體晶片,其中該第 或6玄第一導電層之材質為相同或不相同。 .如申請拳利範圍第1項所述之發光二極體晶片,其中該圖 案化阻抗層為電性絕緣材料、低導電係數材料或透明介電 層。 10 .如申請專利範圍第9項所述之發光二極體晶片其中該圖 案化阻抗層之材料為氧化石夕(si02)或五氧化二銳(Nb 0) 2 5 如申請專利範圍第丨或9項所述之發光二極體晶片,其中該 • 目案化阻抗層呈複數個三角形、四邊形、六邊形、八邊形 、圓形、橢圓形或其組合之排列。 12 如申請拳利範圍第i項所述之發光二極體晶片,其中該圖 案化阻抗層具有複數個孔洞。 13 14 如申請專利範圍第12項所述之發光二極體晶片,其中該圖 案化阻抗層之該等孔洞呈複數個三角形、四邊形六邊形 、八邊形 '圓形、橢圓形或其組合。 如申請專利範圍第!項所述之發光二極體晶片,其中該圖 案化阻抗層之導電係數小於該第一或該第二導電層之導電 係、數’而該圖案化阻抗層之折射率接近 _367一單編號A_ 第15頁/共29頁 Ή第-或该 1013174535-0 1101年05力09日修正替換頁I 第二導電層之折射率。 .如申4專利範固第1項所述之發光二極體晶片,其中該發 光二極體晶月更包括複數層之該電流分佈層,該圖案化阻 抗層與相鄰之該圖案化阻抗層成錯開排列,且後形成的該 圖案化阻抗層之長度大於先形成之該圖案化阻抗層之長度 〇 .如申請專利範圍第2項所述之發光二極體晶片,其更包括 至少一第一電極以及至少一第二電極’該第一電極形成在 曝露之該第-半導體層上’該第二電極形成在該電流分佈 層上。 0 .如申凊專利範圍第16項所述之發光二極體晶片,其中該第 —電極包括至少一第一焊接部以及至少一延伸部延伸自該 第烊接部:該第二電極包括至少一第二焊接部。 .如申清專利範圍第17項所述之發光二極體晶片,其中該第 一焊接部以及該第二焊接部係用以與外界電性連接。 19 .如申請專利範圍第16項所述之發光二極體晶片,其中該第 一及該第二電極設置在該發光二極體晶片的周邊區域。 20 .如申請專利範圍第16項所述之發光二極體晶片,其中該第 Φ 一電極設置在該發光二極體晶片的中心區域,該第二電極 設置在該發光二極體晶片的周邊區域。 21 .如申請專利範圍第16項所述之發光二極體晶片,其中該第 —電極設置在該發光二極體晶片的周邊區域,該第二電極 置在ό玄發光一極體晶片的中心區域。 22 .如申請專利範圍第16至21項任一項所述之發光二極體晶 片’其中該圖案化阻抗層靠近該第二電極的單位面積圖案 覆蓋率高於遠離該第二電極的單位面積圖案覆蓋率。 097U67#單編號Α0101 第16頁/共29頁 1013174535-0 1378574 101年.05月09日梭正替換頁 23 .如申請專利範圍第1項所述之發光二極體晶片,其更包括 一基板以及一形成在該基板上的缓衝層,該磊晶疊層係形 成在該緩衝層上。 24 .如申請專利範圍第23項所述之發光二極體晶片,其中諒基 板之材質係為藍寶石、碳化矽、矽、MgAl2〇4或合金。 25 .如申請專利範圍第23項所述之發光二極體晶片,其中該緩 衝層為一單層物質或一多層物質。 26 .如申請專利範圍第23項所述之發光二極體晶片,其中於發 光二極體晶片為覆晶式發光二極體晶片。The light-emitting diode wafer according to the first aspect of the invention, wherein the material of the first or sixth first conductive layer is the same or different. The illuminating diode chip of claim 1, wherein the patterned impedance layer is an electrically insulating material, a low conductivity material or a transparent dielectric layer. 10. The light-emitting diode chip according to claim 9, wherein the material of the patterned resistance layer is oxidized stone (si02) or bismuth pentoxide (Nb 0) 2 5 as claimed in the patent scope or The light-emitting diode chip of claim 9, wherein the meshed impedance layer is in the form of a plurality of triangles, quadrangles, hexagons, octagons, circles, ellipses or a combination thereof. 12 The light-emitting diode chip of claim i, wherein the patterned impedance layer has a plurality of holes. The light-emitting diode chip of claim 12, wherein the holes of the patterned impedance layer are in a plurality of triangles, quadrilateral hexagons, octagons, circles, ellipses or combinations thereof. . Such as the scope of patent application! The light-emitting diode chip, wherein the patterned resistive layer has a conductivity smaller than that of the first or second conductive layer, and the patterned resistive layer has a refractive index close to _367. A_ Page 15 / Total 29 pages - or the 1013174535-0 1101 05 force 09 correction replacement page I The refractive index of the second conductive layer. The illuminating diode chip of claim 1, wherein the illuminating diode further comprises a plurality of layers of the current distribution layer, the patterned resistive layer and the adjacent patterned impedance The layer is arranged in a staggered manner, and the length of the patterned resistive layer formed later is greater than the length of the patterned resistive layer formed first. The light emitting diode chip according to claim 2, further comprising at least one The first electrode and the at least one second electrode 'the first electrode are formed on the exposed first semiconductor layer'. The second electrode is formed on the current distribution layer. The illuminating diode chip of claim 16, wherein the first electrode comprises at least one first soldering portion and at least one extending portion extends from the first splicing portion: the second electrode includes at least a second welded portion. The illuminating diode chip according to claim 17, wherein the first soldering portion and the second soldering portion are electrically connected to the outside. The light-emitting diode chip of claim 16, wherein the first and second electrodes are disposed in a peripheral region of the light-emitting diode wafer. The illuminating diode chip according to claim 16, wherein the Φ-electrode is disposed in a central region of the illuminating diode chip, and the second electrode is disposed at a periphery of the illuminating diode chip. region. The light-emitting diode chip according to claim 16, wherein the first electrode is disposed in a peripheral region of the light-emitting diode wafer, and the second electrode is disposed at a center of the light-emitting diode wafer region. The light-emitting diode wafer according to any one of claims 16 to 21, wherein a pattern coverage of the patterned resistive layer near the second electrode is higher than a unit area away from the second electrode. Pattern coverage. 097U67#单单Α0101 Page 16/29 pages 1013174535-0 1378574. The light-emitting diode wafer according to claim 1, which further comprises a substrate. And a buffer layer formed on the substrate, the epitaxial layer being formed on the buffer layer. The light-emitting diode wafer according to claim 23, wherein the material of the substrate is sapphire, tantalum carbide, niobium, MgAl2〇4 or an alloy. The light-emitting diode wafer according to claim 23, wherein the buffer layer is a single layer material or a multilayer material. The light-emitting diode chip according to claim 23, wherein the light-emitting diode chip is a flip-chip light-emitting diode chip. 27 .如申請專利範圍第23項所述之發光二極體晶片,其中該基 板為透明基板,該發光二極體晶片上的該第一電極以及該 第二電極以覆晶方式藉由凸塊與一黏著基板 (sub-mount)上的接觸塾(contact pad)電性連接。 28 .如申請專利範圍第1項所述之發光二極體晶片,其中該發 光二極體晶片為垂直式發光二極體晶片。 29 .如申請專利範圍第1項所述之發光二極體晶片,其更包括The illuminating diode chip according to claim 23, wherein the substrate is a transparent substrate, and the first electrode and the second electrode on the illuminating diode wafer are flip-chip bonded by bumps It is electrically connected to a contact pad on a sub-mount. The light-emitting diode chip of claim 1, wherein the light-emitting diode chip is a vertical light-emitting diode chip. 29. The light-emitting diode chip of claim 1, further comprising 一基板以及至少一電極,該蟲晶疊層形成在該基板上,該 電極形成在該電流分佈層上。 30 .如申請專利範圍第28項所述之發光二極體晶片,其中該電 極包括至少一焊接部。 31 .如申請專利範圍第1項所述之發光二極體晶片,其更包括 一基板,其中該屋晶疊層、該第一導電層及該至少一電流 分佈層形成於一遙晶基板上,再倒立轉置形成在該基板上 32 .如申請專利範圍第31項所述之發光二極體晶片,其更包括 至少一電極,形成在該磊晶疊層上。 1額(P編號應01 1013174535-0 第17頁/共29頁 1378574 ,_; 101年05月09日核正替换頁 33 .如申請專利範圍第29或31項所述之發光二極體晶片,其 中該基板為導電基板或金屬基板,同時具備反射層以及電 極之功能。 34 .如申請專利範圍第1至6 '26至32項中任一項所述之發光 二極體晶片,其中該第一及該第二導電層為金屬層或透明 導電層。 _3677(P编號廳01 第18頁/共29頁 1013174535-0A substrate and at least one electrode are formed on the substrate, and the electrode is formed on the current distribution layer. The light-emitting diode wafer of claim 28, wherein the electrode comprises at least one solder joint. The light emitting diode chip of claim 1, further comprising a substrate, wherein the roofing layer, the first conductive layer and the at least one current distribution layer are formed on a remote crystal substrate And the inverted polarizer is formed on the substrate. The light-emitting diode wafer according to claim 31, further comprising at least one electrode formed on the epitaxial layer. 1 (P number should be 01 1013174535-0 page 17 / 29 pages 1377574, _; May 09, 101 nuclear replacement page 33. The light-emitting diode chip according to claim 29 or 31 The substrate is a conductive substrate or a metal substrate, and has a function of a reflective layer and an electrode. The light-emitting diode chip according to any one of claims 1 to 6 to 26 to 32, wherein The first and the second conductive layer are a metal layer or a transparent conductive layer. _3677 (P number hall 01 page 18 / 29 pages 1013174535-0
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