TW201417339A - Flip-chip light emitting diode and application thereof - Google Patents

Flip-chip light emitting diode and application thereof Download PDF

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TW201417339A
TW201417339A TW101138866A TW101138866A TW201417339A TW 201417339 A TW201417339 A TW 201417339A TW 101138866 A TW101138866 A TW 101138866A TW 101138866 A TW101138866 A TW 101138866A TW 201417339 A TW201417339 A TW 201417339A
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layer
carbon
semiconductor epitaxial
multilayer composite
emitting diode
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TW101138866A
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TWI520378B (en
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Ming-Chi Kan
Chien-Min Sung
Pai-Yang Tsai
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Ritedia Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Abstract

A flip-chip light emitting diode is disclosed, which includes: a substrate, a semiconductor multilayer structure, first and second electrode, first and second diamond-like-carbon/conductive-material composite structures, and a passivation layer, wherein, the passivation layer with a stacked structure of a material of different refractive index, and first and second diamond-like-carbon/conductive-material can buffer thermal stress in the flip-chip light emitting diode. Therefore, the flip-chip light emitting diode can improve the whole photoelectric efficiency and avoid its characteristic decreased, so that improving its reliability and service life. A method of manufacturing the abovementioned flip-chip light emitting diode and application thereof is also disclosed.

Description

覆晶式發光二極體及其應用 Flip-chip luminescent diode and its application

本發明係關於一種覆晶式發光二極體及其製造方法與使用其之晶片板上封裝結構,尤指一種結構中可以達到緩和熱膨脹係數差異(coefficient thermal expansion mismatch)及提升輸出光率之覆晶式發光二極體及其製造方法與使用其之晶片板上封裝結構。 The present invention relates to a flip-chip light-emitting diode, a method of manufacturing the same, and a package structure on a wafer board using the same, in particular, a structure capable of achieving a coefficient of thermal expansion mismatch and an increase in output light rate. A crystalline light-emitting diode and a method of manufacturing the same, and a package structure on a wafer board using the same.

西元1962年,通用電氣公司的尼克.何倫亞克(Nick Holonyak Jr.)開發出第一種實際應用的可見光發光二極體(Light Emitting Diode,LED),而隨著科技日益更新,各種色彩發光二極體開發也應蘊而生。而對於現今人類所追求永續發展為前提的情形下,發光二極體的低耗電量以及長效性的發光等優勢下,已逐漸取代日常生活中用來照明或各種電器設備的指示燈或光源等用途。更有甚者,發光二極體朝向多色彩及高亮度的發展,已應用在大型戶外顯示看板或交通號誌。 In 1962, Nick of General Electric Company. Nick Holonyak Jr. developed the first practical application of Light Emitting Diode (LED), and with the ever-increasing technology, various color LEDs should also be developed. . Under the premise of the pursuit of sustainable development by human beings today, the low power consumption of LEDs and the long-lasting illumination have gradually replaced the indicators used in daily life for lighting or various electrical equipment. Or use of light sources. What's more, the development of light-emitting diodes towards multi-color and high brightness has been applied to large outdoor display billboards or traffic signs.

21世紀起,電子產業的蓬勃發展,電子產品在生活上已經成為不可或缺的一部分,因此企業對於電子產品開發方向以多功能及高效能發展等為主,也開始將發光二極體晶片應用於各種電子產品。其中尤其是可攜式電子產品種類日漸眾多,電子產品的體積與重量越來越小,所需的電 路載板體積亦隨之變小,因此,電路載板的散熱效果成為值得重視的問題之一。 Since the beginning of the 21st century, the electronic industry has flourished, and electronic products have become an indispensable part of life. Therefore, enterprises are mainly engaged in the development of electronic products with versatility and high-efficiency development. For a variety of electronic products. In particular, there are an increasing number of portable electronic products, and the volume and weight of electronic products are getting smaller and smaller. The volume of the road carrier board also becomes smaller. Therefore, the heat dissipation effect of the circuit carrier board becomes one of the problems worthy of attention.

以現今經常使用之發光二極體晶片而言,由於發光亮度夠高,因此可廣泛應用於顯示器背光源、小型投影機以及照明等各種電子裝置中。然而,目前LED的輸入功率中,將近80%的能量會轉換成熱能,倘若承載LED元件之載板無法有效地散熱時,便會使得發光二極體晶片界面溫度升高,除了影響發光強度之外,亦可能因熱度在發光二極體晶片中累積而造成各層材料受熱膨脹,促使結構中受到損傷而對產品壽命產生不良影響此外,由於發光二極體內所激發的光線係以一放射方式擴散,並非所有光線都會經由發光二極體表面而散射出,故造成出光率不佳,且無法達到最有效之出光率。 In the case of a light-emitting diode wafer which is frequently used today, since the light-emitting luminance is high enough, it can be widely used in various electronic devices such as a display backlight, a small projector, and illumination. However, at present, nearly 80% of the input power of the LED is converted into thermal energy. If the carrier carrying the LED component cannot effectively dissipate heat, the temperature of the interface of the LED array is increased, in addition to affecting the luminous intensity. In addition, the heat may be accumulated in the LED chip to cause thermal expansion of the layers, which may cause damage to the structure and adversely affect the life of the product. In addition, the light excited by the LED is diffused by radiation. Not all light is scattered through the surface of the light-emitting diode, resulting in poor light output and the most effective light output rate.

據此,申請人於所提出之中華民國專利申請號第100146548、100146551以及101120872號中均已揭露以類鑽碳與導電材料所組成之堆疊結構或多層結構可有效地改善發光二極體之散熱效率以及緩和或去除發光二極體受熱膨脹的不良影響,惟相關前案並未揭露其最佳化之堆疊結構散熱效率。是以,為最佳化散熱效率,申請人經詳加研究後,更具體提出特定導電材料及類鑽碳經適當堆疊後,即可最佳化發光二極體之散熱效率。 According to the above, the applicant has disclosed that the stacked structure or the multi-layer structure composed of the diamond-like carbon and the conductive material can effectively improve the heat dissipation of the light-emitting diode in the patent applications of the Republic of China Patent Nos. 100146548, 100146551 and 101120872. Efficiency and mitigation or removal of the adverse effects of thermal expansion of the LED, but the relevant previous case does not disclose the optimized stack cooling efficiency. Therefore, in order to optimize the heat dissipation efficiency, the applicant has specifically studied the specific conductive materials and the diamond-like carbon after proper stacking to optimize the heat dissipation efficiency of the light-emitting diode.

本發明之主要目的係在提供一種覆晶式發光二極體,其具有緩和熱膨脹係數差異及提升輸出光率的結構設計,可在發光二極體運作產生熱量的過程中持續使熱量散失。即使有部分熱量並未自發光二極體中散失而促使整體結構產生熱膨脹或變形,其中設置的類鑽碳/導電材料多層複合結構亦可緩和對應的熱應力,而保護不受損傷,並且能藉由絕緣保護層匯聚光束而提升輸出光率。 The main object of the present invention is to provide a flip-chip type light-emitting diode which has a structural design for alleviating the difference in thermal expansion coefficient and increasing the output light rate, and can continuously dissipate heat during the operation of the light-emitting diode to generate heat. Even if some of the heat is not dissipated from the light-emitting diode to cause thermal expansion or deformation of the overall structure, the multi-layer composite structure of the diamond-like carbon/conductive material provided therein can alleviate the corresponding thermal stress, and the protection is not damaged, and can The output light rate is increased by concentrating the light beam by the insulating protective layer.

為達成上述目的,本發明之一態樣提供一種覆晶式發光二極體,包括:一基板,具有一第一表面以及一相對於該第一表面之第二表面;一半導體磊晶多層複合結構,其位於該基板之該第二表面上方且包含一第一半導體磊晶層、一第二半導體磊晶層以及一盲孔,其中,該第一半導體磊晶層與該第二半導體磊晶層係層疊設置,且該盲孔貫穿該第二半導體磊晶層;一第一電極,位於該半導體磊晶多層複合結構之該第一半導體磊晶層上方;一第一類鑽碳/導電材料多層複合結構,係填充於該半導體磊晶多層複合結構之該盲孔中,並覆蓋於該第一電極上方,且電性連接該半導體磊晶多層複合結構之該第一半導體磊晶層;一第二電極,位於該半導體磊晶多層複合結構之該第二半導體磊晶層上方;以及一第二類鑽碳/導電材料多層複合結構,位於該半導體磊晶多層複合結構之該第二電極上方,並電性連接該半導體磊晶多層複合結構之該第二半導體磊晶層。此外,於本發明之另一態樣中,該覆晶式發光二極體更包括一絕緣保護層,其係覆蓋該半導體磊晶多層複合結 構之該第一半導體磊晶層之側壁以及該第二半導體磊晶層之側壁,以及該盲孔之內壁表面,以隔絕該第一類鑽碳/導電材料多層複合結構與該第二半導體磊晶層之間的接觸。 To achieve the above object, an aspect of the present invention provides a flip-chip light emitting diode comprising: a substrate having a first surface and a second surface opposite to the first surface; a semiconductor epitaxial multilayer composite The structure is disposed above the second surface of the substrate and includes a first semiconductor epitaxial layer, a second semiconductor epitaxial layer, and a blind via, wherein the first semiconductor epitaxial layer and the second semiconductor epitaxial layer Layers are stacked, and the blind holes penetrate through the second semiconductor epitaxial layer; a first electrode is disposed above the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; a first type of drilled carbon/conductive material a multilayer composite structure is filled in the blind via of the semiconductor epitaxial multilayer composite structure and overlying the first electrode, and electrically connected to the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; a second electrode over the second semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; and a second type of carbon/conductive material multilayer composite structure located on the semiconductor epitaxial multilayer The second engagement structure of the upper electrode, and the second semiconductor epitaxial layer epitaxial semiconductor multilayer composite structure of the electrical connection. In another aspect of the invention, the flip-chip light emitting diode further includes an insulating protective layer covering the semiconductor epitaxial multilayer composite junction Forming a sidewall of the first semiconductor epitaxial layer and a sidewall of the second semiconductor epitaxial layer, and an inner wall surface of the blind via to isolate the first diamond-like carbon/conductive material multilayer composite structure from the second semiconductor Contact between the epitaxial layers.

本發明上述覆晶式發光二極體中,將電性連接至半導體磊晶多層複合結構中N型半導體磊晶層與P型半導體磊晶層之對應電極,並且在其對應電極上皆設計成濺鍍成類鑽碳/導電材料多層複合結構。換言之,設置於N型半導體磊晶層表面之對應N型電極,可先行沉積一般作為N型電極之金屬,再沉積類鑽碳,並且可以選擇性重複沉積適用的導電材料層與類鑽碳層,據此形成類鑽碳/導電材料多層複合結構,以做為對應N型電極的N型之複合結構。同樣,對於P型半導體磊晶層,亦可先行沉積一般作為P型電極之金屬,再沉積類鑽碳,並且可以選擇性重複沉積適用的導電材料層與類鑽碳層,據此形成類鑽碳/導電材料多層複合結構,以做為對應P型電極的P型之複合結構。 The above-mentioned flip-chip light-emitting diode of the present invention is electrically connected to the corresponding electrode of the N-type semiconductor epitaxial layer and the P-type semiconductor epitaxial layer in the semiconductor epitaxial multilayer composite structure, and is designed on the corresponding electrode thereof. Sputtered into a multi-layer composite structure of diamond-like carbon/conductive material. In other words, the corresponding N-type electrode disposed on the surface of the epitaxial layer of the N-type semiconductor can deposit a metal generally as an N-type electrode, deposit a diamond-like carbon, and selectively deposit a suitable conductive material layer and a diamond-like carbon layer. According to this, a multi-layer composite structure of a diamond-like carbon/conductive material is formed to serve as an N-type composite structure corresponding to the N-type electrode. Similarly, for the P-type semiconductor epitaxial layer, the metal generally used as the P-type electrode can be deposited first, and then the diamond-like carbon can be deposited, and the applicable conductive material layer and the diamond-like carbon layer can be selectively deposited repeatedly, thereby forming a diamond-like drill. A carbon/conductive material multilayer composite structure is used as a P-type composite structure corresponding to a P-type electrode.

上述絕緣保護層係為一具有不同折射率材料之堆疊結構,當發光二極體通入電流後,可使電子激發形成光線,並使光線向發光二極體之表面及側面進行擴散,此時,即可藉由絕緣保護層將擴散至側面光線反射至覆晶式發光二極體之出光面,進而提升出光率。 The insulating protective layer is a stacked structure having different refractive index materials. When the light emitting diode is supplied with current, the electrons can be excited to form light, and the light is diffused toward the surface and the side surface of the light emitting diode. The light diffusing can be enhanced by reflecting the diffused side light to the light-emitting surface of the flip-chip light-emitting diode by an insulating protective layer.

上述類鑽碳/導電材料多層複合結構可以讓本發明之覆晶式發光二極體,對於熱膨脹係數差異所造成應力,具有緩衝能力。換言之,上述類鑽碳/導電材料多層複合結構,可在發光二極體運作產生熱量的過程中加速熱量散 失,即使部分熱量沒有自發光二極體中散失而累積造成整體結構發生熱膨脹,類鑽碳/導電材料多層複合結構亦可緩衝對應的熱應力,而可保護覆晶式發光二極體中其餘構件不受損傷。 The above-mentioned diamond-like carbon/conductive material multilayer composite structure can make the flip-chip light-emitting diode of the present invention have a buffering capacity for stress caused by a difference in thermal expansion coefficient. In other words, the above-mentioned diamond-like carbon/conductive material multilayer composite structure can accelerate heat dissipation during the operation of the light-emitting diode to generate heat. Loss, even if part of the heat is not lost in the self-luminous diode and accumulates to cause thermal expansion of the overall structure, the diamond-like carbon/conductive material multilayer composite structure can also buffer the corresponding thermal stress, and can protect the rest of the flip-chip light-emitting diode The components are not damaged.

綜上所述,本發明覆晶式發光二極體可提升其整體輸出光率,並避免元件光電特性變差,進而提高其可靠度與壽命。 In summary, the flip-chip light-emitting diode of the present invention can improve the overall output light rate and avoid the deterioration of the photoelectric characteristics of the component, thereby improving the reliability and the lifetime.

本發明上述覆晶式發光二極體中,該絕緣保護層係由兩種或以上之不同折射率材料堆疊設置;其中,上述該不同折射率材料可至少一選自由類鑽碳(DLC)、氧化鈦(TixOy)、二氧化矽(SiO2)、氮化矽(SiN)、砷化鎵(GaAs)、砷化鋁(AlAs)所組成之群組,其中,氧化鈦(TixOy)可使用如氧化鈦(TiO)、二氧化鈦(TiO2)或三氧化二鈦(Ti2O3)等;在本發明中,絕緣保護層內的不同折射率材料可以依序週期性堆疊設置而具有布拉格反射鏡(Distribute Bragg Reflector,DBR)之特性,且使得發光二極體中發射至側面之光線可藉由絕緣保護層反射至覆晶式發光二極體之出光面,進而提升輸出光率;此外,在本發明中,更可以在絕緣保護層之外側設置一金屬保護層,該金屬保護層可至少一選自由鋁(Al)、鈦(Ti)、鉬(Mo)、鎳(Ni)、銀(Ag)、金(Au)、鉑(Pt)、或其合金所組成之群組,因此,藉由該金屬保護層,更能增加發光二極體發射至側面之光線反射至覆晶式發光二極體之出光面之反射率,進而更加提升輸出光率。 In the above flip-chip light-emitting diode of the present invention, the insulating protective layer is provided by stacking two or more different refractive index materials; wherein the different refractive index materials may be at least one selected from the group consisting of diamond-like carbon (DLC), a group consisting of titanium oxide (Ti x O y ), cerium oxide (SiO 2 ), cerium nitride (SiN), gallium arsenide (GaAs), and aluminum arsenide (AlAs), wherein titanium oxide (Ti x ) O y ) may be used, for example, titanium oxide (TiO), titanium dioxide (TiO 2 ) or titanous oxide (Ti 2 O 3 ), etc.; in the present invention, different refractive index materials in the insulating protective layer may be periodically stacked in sequence It is provided with the characteristics of a Bragg Reflector (DBR), and the light emitted to the side of the light-emitting diode can be reflected by the insulating protective layer to the light-emitting surface of the flip-chip light-emitting diode, thereby improving the output. In addition, in the present invention, a metal protective layer may be further disposed on the outer side of the insulating protective layer, and the metal protective layer may be at least one selected from the group consisting of aluminum (Al), titanium (Ti), molybdenum (Mo), and nickel ( a group of Ni), silver (Ag), gold (Au), platinum (Pt), or an alloy thereof, and thus, by the metal The protective layer can further increase the reflectance of the light emitted from the light emitting diode to the side surface to the light emitting surface of the flip chip type light emitting diode, thereby further improving the output light rate.

較佳而言,在第二表面可藉由蝕刻或顯影處理,使第二表面形成一圖形化表面,並可有效提升發光二極體的出光率,且可以控制其偏極以及光場分佈。 Preferably, the second surface can be formed into a patterned surface by etching or development treatment, and the light-emitting diode can be effectively improved in light-emitting rate, and the polarization and the light field distribution can be controlled.

此外,在第一表面可藉由蝕刻或顯影處理,使第一表面形成一圖形化表面或一粗糙化表面,並可有效提升發光二極體的出光率。 In addition, the first surface may be formed into a patterned surface or a roughened surface by etching or development treatment, and the light extraction rate of the light emitting diode may be effectively improved.

本發明上述覆晶式發光二極體中,該半導體磊晶多層複合結構更可以包括一無摻雜半導體磊晶層,該無摻雜半導體磊晶層係夾置於該第一半導體磊晶層與該基板之該第二表面之間;因此,該無摻雜半導體磊晶層當作該第一半導體磊晶層與該基板之間的一緩衝層,避免該第一半導體磊晶層與該基板之間晶格不匹配程度過大,並防止成長該第一半導體磊晶層時,其磊晶缺陷密度過高之情形出現,並且可避免上述覆晶式發光二極體有靜電放電及電流漏電之情形。 In the above flip-chip light-emitting diode of the present invention, the semiconductor epitaxial multilayer composite structure may further comprise an undoped semiconductor epitaxial layer, the undoped semiconductor epitaxial layer being sandwiched between the first semiconductor epitaxial layer Between the second surface of the substrate; therefore, the undoped semiconductor epitaxial layer acts as a buffer layer between the first semiconductor epitaxial layer and the substrate, avoiding the first semiconductor epitaxial layer and the The degree of lattice mismatch between the substrates is too large, and the epitaxial defect density is prevented from being excessively high when the first semiconductor epitaxial layer is grown, and the above-mentioned flip-chip light-emitting diode can be prevented from having electrostatic discharge and current leakage. The situation.

本發明上述覆晶式發光二極體中,該半導體磊晶多層複合結構可以選擇性更包括一活性中間層,該活性中間層係夾置於該第一半導體磊晶層與該第二半導體磊晶層之間。除此之外,本發明上述覆晶式發光二極體結構中設有該盲孔,而該盲孔貫穿該活性中間層。於本發明中,該活性中間層可為多量子井層(multiple quantum well layer),用以提升發光二極體中電能轉換成光能的效率。 In the above flip-chip light-emitting diode of the present invention, the semiconductor epitaxial multilayer composite structure may selectively further comprise an active intermediate layer sandwiched between the first semiconductor epitaxial layer and the second semiconductor Lei Between the layers. In addition, the blind via hole is disposed in the flip-chip light emitting diode structure of the present invention, and the blind via penetrates through the active intermediate layer. In the present invention, the active intermediate layer may be a multiple quantum well layer for improving the efficiency of converting electrical energy into light energy in the light-emitting diode.

較佳而言,該第一半導體磊晶層、該第一電極以及該第一類鑽碳/導電材料多層複合結構係N型,該第二半導體 磊晶層、該第二電極以及該第二類鑽碳/導電材料多層複合結構係P型。 Preferably, the first semiconductor epitaxial layer, the first electrode, and the first diamond-like carbon/conductive material multilayer composite structure are N-type, the second semiconductor The epitaxial layer, the second electrode, and the second diamond-like carbon/conductive material multilayer composite structure are P-type.

上述該導電材料層或該導電材料之材質可以選自由銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、氧化鋅(ZnO)、石墨烯(graphene)、鈦(Ti)、鋁(Al)、鉻(Cr)、鎳(Ni)、鉑(Pt)、鉬(Mo)、鎢(W)、銀(Ag)、鉑(Pt)、以及金(Au)所組群組之至少一者。換言之,該導電材料層或該金屬可使用上述材質之合金或金屬混合物構成。由於類鑽碳具有較佳的熱膨脹係數(coefficient of thermal expansion,CTE),因此做為電極之類鑽碳/導電材料多層複合結構便可以在整體發光二極體受熱膨脹時,緩衝熱膨脹所產生的應力,因此發光二極體整體結構則不易受影響,同時亦可以加速發光二極體運作時熱量散失,降低發光二極體整體結構因熱受損的可能性。舉例而言,可以使用鋁(Al)、鈦(Ti)、鉬(Mo)、鎳(Ni)、鉑(Pt)、以及金(Au)做為導電材料層,並與導電性類鑽碳層相互層疊,即可構成本發明所述之類鑽碳/導電材料多層複合結構。 The conductive material layer or the conductive material may be selected from the group consisting of indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO), graphene, titanium. (Ti), aluminum (Al), chromium (Cr), nickel (Ni), platinum (Pt), molybdenum (Mo), tungsten (W), silver (Ag), platinum (Pt), and gold (Au) At least one of the group groups. In other words, the conductive material layer or the metal may be composed of an alloy or a metal mixture of the above materials. Since the diamond-like carbon has a better coefficient of thermal expansion (CTE), the multi-layer composite structure of the drilled carbon/conductive material as an electrode can be used to buffer thermal expansion when the overall light-emitting diode is thermally expanded. The stress, so the overall structure of the light-emitting diode is not easily affected, and at the same time, the heat loss of the light-emitting diode during operation can be accelerated, and the possibility that the overall structure of the light-emitting diode is damaged by heat is reduced. For example, aluminum (Al), titanium (Ti), molybdenum (Mo), nickel (Ni), platinum (Pt), and gold (Au) may be used as the conductive material layer, and the conductive diamond-like carbon layer By laminating one another, a multi-layer composite structure of a drilled carbon/conductive material as described in the present invention can be constructed.

於本發明之一具體態樣中,上述第一類鑽碳/導電材料多層複合結構可包括一第一類鑽碳/金屬堆疊層與一第一金屬合金層,且該第一金屬合金層係設置於該第一類鑽碳/金屬堆疊層上;以及上述第二類鑽碳/導電材料多層複合結構可包括一第二類鑽碳/金屬堆疊層與一第二金屬合金層,且該第二金屬合金層係設置於該第二類鑽碳/金屬堆疊 層上。舉例而言,該第一類鑽碳/金屬堆疊層、以及該第二類鑽碳/金屬堆疊層可為1至10層類鑽碳與1至10層鈦交互堆疊設置之多層結構,並且以類鑽碳各自獨立電性連接該第一金屬合金層及該第二金屬合金層;在本發明之另一態樣中,該第一類鑽碳/金屬堆疊層、以及該第二類鑽碳/金屬堆疊層可為2至4層類鑽碳與2至4層鈦交互堆疊設置之多層結構,並且以類鑽碳各自獨立電性連接該第一金屬合金層及該第二金屬合金層;而該第一金屬合金層、以及該第二金屬合金層則可為鈦/鉬/鈦依序堆疊設置之三層結構,並且以鈦各自獨立電性連接該第一類鑽碳/金屬堆疊層,以及該第二類鑽碳/金屬堆疊層。據此,該類鑽碳/導電材料多層複合結構即可形成5至23層由類鑽碳、鈦及鉬所堆疊而成之多層複合結構,從而最佳化本發明覆晶式發光二極體之散熱效率。 In a specific aspect of the present invention, the first type of carbon/conductive material multilayer composite structure may include a first type of carbon/metal stack and a first metal alloy layer, and the first metal alloy layer And disposed on the first type of drilled carbon/metal stack layer; and the second type of drilled carbon/conductive material multilayer composite structure may include a second diamond-like carbon/metal stack layer and a second metal alloy layer, and the first a two metal alloy layer is disposed on the second type of drill carbon/metal stack On the floor. For example, the first type of drilled carbon/metal stack layer and the second type of drilled carbon/metal stack layer may be a multi-layer structure in which 1 to 10 layers of diamond-like carbon and 1 to 10 layers of titanium are alternately stacked, and The diamond-like carbon is electrically connected to the first metal alloy layer and the second metal alloy layer independently; in another aspect of the invention, the first diamond-like carbon/metal stack layer and the second diamond-like carbon layer The metal-stacking layer may be a multi-layer structure in which 2 to 4 layers of diamond-like carbon and 2 to 4 layers of titanium are alternately stacked, and the first metal alloy layer and the second metal alloy layer are electrically connected to each other independently by diamond-like carbon; The first metal alloy layer and the second metal alloy layer may be a three-layer structure in which titanium/molybdenum/titanium are sequentially stacked, and each of the first diamond-like carbon/metal stack layers is electrically connected to each other by titanium. And the second type of drilled carbon/metal stack layer. Accordingly, the multi-layer composite structure of the carbon/conductive material can form 5 to 23 layers of a multi-layer composite structure formed by stacking carbon-like carbon, titanium and molybdenum, thereby optimizing the flip-chip light-emitting diode of the present invention. Heat dissipation efficiency.

在本發明之一較佳態樣中,該第一類鑽碳/金屬堆疊層、以及該第二類鑽碳/金屬堆疊層可為2層類鑽碳與2層鈦交互堆疊設置之多層結構,而該第一金屬合金層、以及該第二金屬合金層則可為鈦/鉬/鈦依序堆疊設置之三層結構,因此,該類鑽碳/導電材料多層複合結構即可形成7層由類鑽碳、鈦及鉬所堆疊而成之多層複合結構;在本發明另一較佳態樣中,該第一類鑽碳/金屬堆疊層、以及該第二類鑽碳/金屬堆疊層可為4層類鑽碳與4層鈦交互堆疊設置之多層結構,而該第一金屬合金層、以及該第二金屬合金層則可為鈦/鉬/鈦依序堆疊設置之三層結構,因此,該類鑽 碳/導電材料多層複合結構即可形成11層由類鑽碳、鈦及鉬所堆疊而成之多層複合結構;在本發明中該第一類鑽碳/金屬堆疊層以及該第二類鑽碳/金屬堆疊層,或該第一金屬合金層及該第二金屬合金層,均可視使用的需求而隨時任意調整,且前述結構均可以具有相同或不同之多疊層數或成份,本發明並未侷限於此。 In a preferred aspect of the present invention, the first type of drilled carbon/metal stack layer and the second type of drilled carbon/metal stack layer may be a multi-layer structure in which two layers of diamond-like carbon and two layers of titanium are alternately stacked. The first metal alloy layer and the second metal alloy layer may be a three-layer structure in which titanium/molybdenum/titanium is sequentially stacked, so that the carbon/conductive material multilayer composite structure can form 7 layers. a multilayer composite structure formed by stacking carbon, titanium and molybdenum; in another preferred aspect of the invention, the first type of carbon/metal stack layer and the second carbon/metal stack The multi-layer structure in which four layers of diamond-like carbon and four layers of titanium are alternately stacked, and the first metal alloy layer and the second metal alloy layer may be a three-layer structure in which titanium/molybdenum/titanium is sequentially stacked. Therefore, this type of drill The carbon/conductive material multi-layer composite structure can form 11 layers of a multi-layer composite structure formed by stacking carbon-like carbon, titanium and molybdenum; in the present invention, the first type of carbon/metal stacking layer and the second type of carbon-drilling layer The metal-stacking layer, or the first metal alloy layer and the second metal alloy layer, can be arbitrarily adjusted at any time according to the needs of use, and the foregoing structures can all have the same or different number of laminations or components, and the present invention Not limited to this.

本發明覆晶式發光二極體,該第一類鑽碳/導電材料多層複合結構之表面與該第二類鑽碳/導電材料多層複合結構之表面可形成一共平面;或者,該第一類鑽碳/導電材料多層複合結構之導電類鑽碳層表面與該第二類鑽碳/導電材料多層複合結構之導電類鑽碳層表面可形成一共平面;亦或,該第一類鑽碳/導電材料多層複合結構之表面與該第二類鑽碳/導電材料多層複合結構之表面可形成一共平面。 In the flip-chip light emitting diode of the present invention, the surface of the first type of carbon/conductive material multilayer composite structure and the surface of the second type of carbon/conductive material multilayer composite structure may form a coplanar plane; or, the first type The surface of the conductive diamond-like carbon layer of the carbon/conductive material multi-layer composite structure and the surface of the conductive diamond-like carbon layer of the second type of carbon/conductive material multilayer composite structure may form a common plane; or, the first type of drill carbon/ The surface of the multi-layer composite structure of the conductive material and the surface of the second type of carbon/conductive material multilayer composite structure may form a coplanar surface.

本發明覆晶式發光二極體,更可選擇性包括:一第一金屬焊接層,位於該第一類鑽碳/導電材料多層複合結構上;以及一第二金屬焊接層,位於該第二類鑽碳/導電材料多層複合結構上,其中,該第二金屬焊接層之表面與該第一金屬焊接層之表面係形成一共平面。上述本發明覆晶式發光二極體,顧名思義即以覆晶方式與另一電路載板接合(bonding),因此最後發光二極體之P型電極與N型電極表面上用於接合金屬焊接層通常會相互形成共平面。 The flip-chip light-emitting diode of the present invention may further optionally include: a first metal solder layer on the first type of carbon/conductive material multilayer composite structure; and a second metal solder layer in the second The diamond-like carbon/conductive material multilayer composite structure, wherein a surface of the second metal solder layer forms a coplanar with a surface of the first metal solder layer. The above-mentioned flip-chip light-emitting diode of the present invention, as the name implies, is flip-chip bonded to another circuit carrier, so that the surface of the P-type electrode and the N-type electrode of the final LED is used for bonding the metal solder layer. They usually form a coplanar plane with each other.

上述第一金屬焊接層或第二金屬焊接層之材質可以選自由矽(Si)、鎳(Ni)、鈦(Ti)、鋁(Al)、鉑(Pt)、金(Au)、錫(Sn)、銦(In)、鉻(Cr)、或其合金所組群組之至少一者。換 言之,第一金屬焊接層或第二金屬焊接層可使用上述材質之合金或金屬混合物構成,其選擇為熱擴散係數高之材質,使得覆晶式發光二極體使用時,散熱效率提高。 The material of the first metal solder layer or the second metal solder layer may be selected from the group consisting of bismuth (Si), nickel (Ni), titanium (Ti), aluminum (Al), platinum (Pt), gold (Au), and tin (Sn). At least one of the group of indium (In), chromium (Cr), or an alloy thereof. change In other words, the first metal solder layer or the second metal solder layer may be formed using an alloy or a metal mixture of the above materials, and is selected to be a material having a high thermal diffusivity, so that the heat dissipation efficiency is improved when the flip chip type LED is used.

本發明上述覆晶式發光二極體可以選擇性更包含一反射層,夾置於該半導體磊晶多層複合結構與該第二電極之間,該反射層之材質可為銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、氧化鋅(ZnO)、石墨烯(graphene)、鋁、銀、鎳(Ni)、鈷(Co)、鈀(Pd)、鉑(Pt)、金(Au)、鋅(Zn)、錫(Sn)、銻(Sb)、鉛(Pb)、銅(Cu)、銅銀(CuAg)、鎳銀(NiAg)、其合金、或其金屬混合物。上述銅銀(CuAg)與鎳銀(NiAg)等係指共晶金屬(eutectic metal)。換言之其亦可為多層金屬結構,除了用於達到反射效果之外,也可以達到形成歐姆接觸(ohmic contact)的效用。 The flip-chip light-emitting diode of the present invention may optionally further comprise a reflective layer sandwiched between the semiconductor epitaxial multilayer composite structure and the second electrode, and the reflective layer may be made of indium tin oxide (indium). Tin oxide, ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO), graphene, aluminum, silver, nickel (Ni), cobalt (Co), palladium (Pd), platinum ( Pt), gold (Au), zinc (Zn), tin (Sn), antimony (Sb), lead (Pb), copper (Cu), copper silver (CuAg), nickel silver (NiAg), alloys thereof, or Metal mixture. The above copper silver (CuAg) and nickel silver (NiAg) refer to a eutectic metal. In other words, it can also be a multi-layer metal structure, in addition to achieving the reflection effect, the effect of forming an ohmic contact can also be achieved.

為達上述目的,本發明之再另一態樣提供一種晶片板上封裝結構(chip on board,COB),包括:一電路載板;以及本發明上述覆晶式發光二極體,其係經由該第一金屬焊接層以及該第二金屬焊接層封裝於該電路載板。 In order to achieve the above object, another aspect of the present invention provides a chip on board (COB) including: a circuit carrier board; and the above-mentioned flip chip type light emitting diode of the present invention The first metal solder layer and the second metal solder layer are packaged on the circuit carrier.

本發明上述晶片板上封裝結構中,該電路載板可以包含一絕緣層、以及一電路基板,其中,該絕緣層之材質可為絕緣性類鑽碳、氧化鋁、陶瓷、含鑽石之環氧樹脂、或其組成物,或者為表面覆有上述絕緣層之金屬材料,而該電路基板可為一金屬板、一陶瓷板或一矽基板。此外,該 電路載板表面也可以選擇性更包含一類鑽碳層,以增加散熱效果。 In the above-mentioned wafer-on-board package structure, the circuit carrier board may comprise an insulating layer and a circuit substrate, wherein the insulating layer is made of insulating diamond-like carbon, aluminum oxide, ceramic, diamond-containing epoxy. The resin, or a composition thereof, or a metal material having a surface covered with the insulating layer, and the circuit substrate may be a metal plate, a ceramic plate or a substrate. In addition, the The surface of the circuit carrier can also optionally include a type of drilled carbon layer to increase heat dissipation.

以下係藉由特定的具體實施例說明本發明之實施方式,熟習此技藝之人士可由本說明書所揭示之內容輕易地了解本發明之其他優點與功效。本發明亦可藉由其他不同的具體實施例加以施行或應用,本說明書中的各項細節亦可基於不同觀點與應用,在不悖離本發明之精神下進行各種修飾與變更。 The embodiments of the present invention are described by way of specific examples, and those skilled in the art can readily appreciate the other advantages and advantages of the present invention. The present invention may be embodied or applied in various other specific embodiments, and various modifications and changes can be made without departing from the spirit and scope of the invention.

本發明之實施例中該等圖式均為簡化之示意圖。惟該等圖示僅顯示與本發明有關之元件,其所顯示之元件非為實際實施時之態樣,其實際實施時之元件數目、形狀等比例為一選擇性之設計,且其元件佈局型態可能更複雜。 The drawings in the embodiments of the present invention are simplified schematic diagrams. However, the drawings show only the components related to the present invention, and the components shown therein are not in actual implementation, and the number of components, the shape, and the like in actual implementation are a selective design, and the component layout thereof. The pattern may be more complicated.

實施例一Embodiment 1

參考圖1A至圖1H係本發明實施例一之覆晶式發光二極體之製備方法的流程結構示意圖。首先,如圖1A所示,提供一基板20,具有一第一表面201以及一相對於該第一表面201之第二表面202。接著,如圖1B所示,於該基板20之該第二表面202上方形成一半導體磊晶多層複合結構21,其中,該半導體磊晶多層複合結構21包含一無摻雜半導體磊晶層211、一第一半導體磊晶層212、一活性中間層213、以及一第二半導體磊晶層214,其中,該無摻雜半導體磊晶層 211、該第一半導體磊晶層212、該活性中間層213與該第二半導體磊晶層214係層疊設置,該無摻雜半導體磊晶層211係夾置於該第一半導體磊晶層212與該基板20之間,而該活性中間層213係夾置於該第一半導體磊晶層212與該第二半導體磊晶層214之間。於本實施例中,該半導體磊晶多層複合結構21之材質為氮化鎵(GaN),且該第一半導體磊晶層212係N型,該第二半導體磊晶層214係P型,而該無摻雜半導體磊晶層211則當作該第一半導體磊晶層212與該基板20之間的一緩衝層,避免該第一半導體磊晶層212與該基板20之間晶格不匹配程度過大,並防止成長該第一半導體磊晶層212時,其磊晶缺陷密度過高之情形出現,並且可避免本實施例之覆晶式發光二極體有靜電放電及電流漏電之情形。不過,本發明半導體磊晶多層複合結構適用的材質不限於此,亦可以使用選用其他本領域中常用材質。此外,可以依需求選擇是否設置該活性中間層,而於本實施例中,該活性中間層213為多量子井層,用以提升發光二極體中電能轉換成光能的效率。 1A to FIG. 1H are schematic diagrams showing the flow structure of a method for preparing a flip-chip light-emitting diode according to Embodiment 1 of the present invention. First, as shown in FIG. 1A, a substrate 20 is provided having a first surface 201 and a second surface 202 opposite to the first surface 201. Next, as shown in FIG. 1B, a semiconductor epitaxial multilayer composite structure 21 is formed over the second surface 202 of the substrate 20, wherein the semiconductor epitaxial multilayer composite structure 21 comprises an undoped semiconductor epitaxial layer 211, a first semiconductor epitaxial layer 212, an active intermediate layer 213, and a second semiconductor epitaxial layer 214, wherein the undoped semiconductor epitaxial layer 211, the first semiconductor epitaxial layer 212, the active intermediate layer 213 and the second semiconductor epitaxial layer 214 are stacked, and the undoped semiconductor epitaxial layer 211 is sandwiched between the first semiconductor epitaxial layer 212. The active intermediate layer 213 is interposed between the first semiconductor epitaxial layer 212 and the second semiconductor epitaxial layer 214. In this embodiment, the material of the semiconductor epitaxial multilayer composite structure 21 is gallium nitride (GaN), and the first semiconductor epitaxial layer 212 is N-type, and the second semiconductor epitaxial layer 214 is P-type. The undoped semiconductor epitaxial layer 211 serves as a buffer layer between the first semiconductor epitaxial layer 212 and the substrate 20 to avoid lattice mismatch between the first semiconductor epitaxial layer 212 and the substrate 20. The degree is too large, and when the first semiconductor epitaxial layer 212 is grown, the epitaxial defect density is excessively high, and the situation that the flip-chip emitting diode of the embodiment has electrostatic discharge and current leakage can be avoided. However, the material suitable for the semiconductor epitaxial multilayer composite structure of the present invention is not limited thereto, and other materials commonly used in the art may also be used. In addition, the active intermediate layer can be selected according to requirements. In the embodiment, the active intermediate layer 213 is a multi-quantum well layer for improving the efficiency of converting electrical energy into light energy in the light-emitting diode.

請繼續參閱圖1B,於該半導體磊晶多層複合結構21之該第二半導體磊晶層214表面上,形成一反射層22。於本實施例中,該反射層22可以選用銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、氧化鋅(ZnO)、石墨烯(graphene)、鋁、銀、鎳(Ni)、鈷(Co)、鈀(Pd)、鉑(Pt)、金(Au)、鋅(Zn)、錫(Sn)、銻(Sb)、鉛(Pb)、銅(Cu)、銅銀(CuAg)、 及鎳銀(NiAg)所組群組之至少一者,換言之其亦可為多層金屬結構,除了用於達到反射效果之外,也可以達到形成歐姆接觸(ohmic contact)的效用。此形成反射層的步驟,本發明所屬技術領域之通常知識者可依需要選擇性執行,換言之若不打算設置反射層,則可跳過形成反射層22之步驟而無需進行。 Referring to FIG. 1B, a reflective layer 22 is formed on the surface of the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21. In this embodiment, the reflective layer 22 may be selected from indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO), graphene, aluminum, and silver. , nickel (Ni), cobalt (Co), palladium (Pd), platinum (Pt), gold (Au), zinc (Zn), tin (Sn), antimony (Sb), lead (Pb), copper (Cu) , copper and silver (CuAg), And at least one of the groups of nickel silver (NiAg), in other words, it can also be a multi-layer metal structure, in addition to achieving a reflection effect, the effect of forming an ohmic contact can also be achieved. This step of forming a reflective layer can be selectively performed as desired by those skilled in the art to which the present invention pertains. In other words, if a reflective layer is not intended to be provided, the step of forming the reflective layer 22 can be skipped without being performed.

然後,請參閱圖1C,於該半導體磊晶多層複合結構21開設一盲孔23,其中,該盲孔23貫穿該第二半導體磊晶層214,且該盲孔23抵止於該第一半導體磊晶層212上。接著,請參閱1D,於該第二半導體磊晶層214上方形成一第二電極241。再來,請參閱圖1E,該盲孔23中形成一第一電極251,且該一第一電極251位於該半導體磊晶多層複合結構21之該第一半導體磊晶層212上。於本實施例中,該第二電極241及該第一電極251之材料係為鉻/金/鉑合金,而該第二電極241係為P型,以及該第一電極251係為N型。 Then, referring to FIG. 1C, a blind via 23 is formed in the semiconductor epitaxial multilayer composite structure 21, wherein the blind via 23 penetrates the second semiconductor epitaxial layer 214, and the blind via 23 abuts the first semiconductor On the epitaxial layer 212. Next, referring to FIG. 1 , a second electrode 241 is formed over the second semiconductor epitaxial layer 214 . Referring to FIG. 1E , a first electrode 251 is formed in the blind via 23 , and the first electrode 251 is located on the first semiconductor epitaxial layer 212 of the semiconductor epitaxial multilayer composite structure 21 . In this embodiment, the material of the second electrode 241 and the first electrode 251 is a chromium/gold/platinum alloy, and the second electrode 241 is a P-type, and the first electrode 251 is an N-type.

接著,請參閱圖1F,形成一絕緣保護層26,其覆蓋該反射層22之側壁,該第二電極241之側壁並暴露部分該第二電極241表面,以及覆蓋該半導體磊晶多層複合結構21之該第一半導體磊晶層212之側壁、該活性中間層213之側壁、該第二半導體磊晶層214之側壁,以及該盲孔23之內壁表面並顯露由該盲孔23暴露的該第一電極251表面。該絕緣保護層26係為具有不同反射性材料之堆疊結構(於圖2A說明),係用於保護其所覆蓋的該第一半導體磊晶層212、該第二半導體磊晶層214、以及該活性中間層213之側壁,並隔絕該 第一電極251、該第二半導體磊晶層214、以及該活性中間層213直接與另一後續形成的構件接觸。 Next, referring to FIG. 1F, an insulating protective layer 26 is formed covering the sidewall of the reflective layer 22, the sidewall of the second electrode 241 is exposed to a portion of the surface of the second electrode 241, and the semiconductor epitaxial multilayer composite structure 21 is covered. a sidewall of the first semiconductor epitaxial layer 212, a sidewall of the active intermediate layer 213, a sidewall of the second semiconductor epitaxial layer 214, and an inner wall surface of the blind via 23 and exposed by the blind via 23 The surface of the first electrode 251. The insulating protective layer 26 is a stacked structure having different reflective materials (described in FIG. 2A) for protecting the first semiconductor epitaxial layer 212, the second semiconductor epitaxial layer 214, and the The side wall of the active intermediate layer 213, and isolates the The first electrode 251, the second semiconductor epitaxial layer 214, and the active intermediate layer 213 are in direct contact with another subsequently formed member.

再者,如圖1G所示,於該第一電極251以及該第二電極241上,分別形成一第一類鑽碳/導電材料多層複合結構252以及一第二類鑽碳/導電材料多層複合結構242,且該第一類鑽碳/導電材料多層複合結構252填充於內壁表面覆蓋有該絕緣保護層26之該盲孔23中,並接觸該第一電極251,使得該第一類鑽碳/導電材料多層複合結構252與該第二類鑽碳/導電材料多層複合結構242形成一共平面。 Furthermore, as shown in FIG. 1G, a first type of carbon/conductive material multilayer composite structure 252 and a second type of carbon/conductive material multilayer composite are formed on the first electrode 251 and the second electrode 241, respectively. a structure 242, and the first type of drilled carbon/conductive material multilayer composite structure 252 is filled in the blind hole 23 of the inner wall surface covered with the insulating protective layer 26, and contacts the first electrode 251, so that the first type of drill The carbon/conductive material multilayer composite structure 252 forms a coplanar with the second type of carbon/conductive material multilayer composite structure 242.

最後,如圖1H所示,於該第一類鑽碳/導電材料多層複合結構252表面與該第二類鑽碳/導電材料多層複合結構242表面上,分別形成一第一金屬焊接層29以及第二金屬焊接層28,其中,該第一金屬焊接層29之表面與該第二金屬焊接層28之表面係形成一共平面。於本實施例中,該第一金屬焊接層29與該第二金屬焊接層28係由金層與金錫層構成,且該金錫層係一共晶導電材料層。 Finally, as shown in FIG. 1H, a first metal solder layer 29 is formed on the surface of the first type of carbon/conductive material multilayer composite structure 252 and the second type of carbon/conductive material multilayer composite structure 242, respectively. The second metal solder layer 28, wherein the surface of the first metal solder layer 29 and the surface of the second metal solder layer 28 form a coplanar plane. In this embodiment, the first metal solder layer 29 and the second metal solder layer 28 are composed of a gold layer and a gold tin layer, and the gold tin layer is a eutectic conductive material layer.

據此,如圖1A至圖1H所示,上述製得覆晶式發光二極體,其包括:一基板20,具有一第一表面201以及一相對於該第一表面201之第二表面202;一半導體磊晶多層複合結構21,其位於該基板20之第二表面202上且該半導體磊晶多層複合結構21包含一無摻雜半導體磊晶層211、一第一半導體磊晶層212、一活性中間層213、以及一第二半導體磊晶層214,其中,該無摻雜半導體磊晶層211、該第一半導體磊晶層212、該活性中間層213、以及該第二半導體磊晶層 214係為層疊設置,而該無摻雜半導體磊晶層211係夾置於該第一半導體磊晶層212與該基板20之間,且該活性中間層213係夾置於該第一半導體磊晶層212與該第二半導體磊晶層214之間;一反射層22,位於該半導體磊晶多層複合結構21之該第二半導體磊晶層214表面;一盲孔23,設於該半導體磊晶多層複合結構21中,並貫穿該反射層22、該第二半導體磊晶層214以及該活性中間層213,而該盲孔23抵止於該第一半導體磊晶層212上;一第一電極251,該第一電極251係設置於該半導體磊晶多層複合結構21之該盲孔23上,且其位於該半導體磊晶多層複合結構21之該第一半導體磊晶層212上方;一第一類鑽碳/導電材料多層複合結構252,係填充於該半導體磊晶多層複合結構21之該盲孔23中,並覆蓋於該第一電極251上方,且電性連接該半導體磊晶多層複合結構21之該第一半導體磊晶層212;一第一金屬焊接層29,位於該第一類鑽碳/導電材料多層複合結構252上;一第二電極241,位於該半導體磊晶多層複合結構21之該第二半導體磊晶層214上方,並經由該反射層22電性連接該半導體磊晶多層複合結構21之該第二半導體磊晶層214;一第二類鑽碳/導電材料多層複合結構242,係位於該半導體磊晶多層複合結構21之該第二電極241上方,並電性連接該半導體磊晶多層複合結構21之該第二半導體磊晶層214;一第二金屬焊接層28,位於該第二類鑽碳/導電材料多層複合結構242上;其中,該第二類鑽碳/導電材料多層複合結構242之表面與第一類鑽碳/導電材料多層複合結構 252之表面係形成一共平面,且該第二金屬焊接層28之表面與該第一金屬焊接層29之表面亦形成一共平面;以及一絕緣保護層26,其隔絕所覆蓋之該第一電極251、該第二電極241、該反射層22、該第一半導體磊晶層212以及該第二半導體磊晶層214之側壁,以及該盲孔23之內壁表面,並隔絕該第一類鑽碳/導電材料多層複合結構252與該第二半導體磊晶層214之間的直接接觸。 Accordingly, as shown in FIG. 1A to FIG. 1H, the above-mentioned flip-chip light-emitting diode comprises a substrate 20 having a first surface 201 and a second surface 202 opposite to the first surface 201. a semiconductor epitaxial multilayer composite structure 21 is disposed on the second surface 202 of the substrate 20, and the semiconductor epitaxial multilayer composite structure 21 includes an undoped semiconductor epitaxial layer 211, a first semiconductor epitaxial layer 212, An active intermediate layer 213 and a second semiconductor epitaxial layer 214, wherein the undoped semiconductor epitaxial layer 211, the first semiconductor epitaxial layer 212, the active intermediate layer 213, and the second semiconductor epitaxial layer Floor 214 is a stacked arrangement, and the undoped semiconductor epitaxial layer 211 is interposed between the first semiconductor epitaxial layer 212 and the substrate 20, and the active intermediate layer 213 is sandwiched between the first semiconductor Between the crystal layer 212 and the second semiconductor epitaxial layer 214; a reflective layer 22 on the surface of the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer structure 21; a blind via 23 disposed on the semiconductor strip In the crystalline multilayer composite structure 21, and through the reflective layer 22, the second semiconductor epitaxial layer 214 and the active intermediate layer 213, the blind via 23 is resisted on the first semiconductor epitaxial layer 212; The first electrode 251 is disposed on the blind hole 23 of the semiconductor epitaxial multilayer composite structure 21, and is disposed above the first semiconductor epitaxial layer 212 of the semiconductor epitaxial multilayer composite structure 21; A type of carbon/conductive material multilayer composite structure 252 is filled in the blind via 23 of the semiconductor epitaxial multilayer composite structure 21 and overlying the first electrode 251, and electrically connected to the semiconductor epitaxial multilayer composite The first semiconductor epitaxial layer 212 of the structure 21; a first metal solder layer 29 is disposed on the first diamond-like carbon/conductive material multilayer composite structure 252; a second electrode 241 is disposed above the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21, and The second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21 is electrically connected via the reflective layer 22; a second type of carbon/conductive material multilayer composite structure 242 is located in the semiconductor epitaxial multilayer composite structure 21 Above the second electrode 241, and electrically connected to the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21; a second metal solder layer 28 located in the second diamond-like carbon/conductive material multilayer composite a structure 242; wherein, the surface of the second type of carbon/conductive material multilayer composite structure 242 and the first type of carbon/conductive material multilayer composite structure The surface of 252 forms a coplanar plane, and the surface of the second metal solder layer 28 and the surface of the first metal solder layer 29 also form a coplanar surface; and an insulating protective layer 26 that is insulated from the first electrode 251. The second electrode 241, the reflective layer 22, the sidewalls of the first semiconductor epitaxial layer 212 and the second semiconductor epitaxial layer 214, and the inner wall surface of the blind via 23, and isolate the first diamond-like carbon Direct contact between the conductive material multilayer composite structure 252 and the second semiconductor epitaxial layer 214.

圖2A及圖2B係本發明實施例一之側面結構示意圖。請參閱圖2A係本實施例之側面結構示意圖,其擷取於圖1H虛線所圈取之A部分,該絕緣保護層26係設置於該半導體磊晶多層複合結構21之外側,其包含一第一絕緣層261及一第二絕緣層262,該第一絕緣層261與該第二絕緣層262係堆疊設置;其中,上述該第一絕緣層261及該第二絕緣層262之材質分別為具有不同之折射率之材料所製成,而不同折射率材料可至少一選自由類鑽碳(DLC)、氧化鈦(TixOy)、二氧化矽(SiO2)、氮化矽(SiN)、砷化鎵(GaAs)、砷化鋁(AlAs)所組成之群組;該第一絕緣層261與該第二絕緣層262依序週期性堆疊設置而具有布拉格反射鏡(Distribute Bragg reflector)之特性,且使得本實施例之覆晶發光二極體中發射至側面之光線可藉由絕緣保護層26反射至覆晶式發光二極體之出光面,進而提升輸出光率。在本實施例中,該第一絕緣層261之材料為二氧化矽(SiO2,折射率:1.55)、該第二絕緣層262之材料為二氧化鈦(TiO2,折射率:2.51), 且該第一絕緣層261及該第二絕緣層262為交替形成14層堆疊結構。 2A and 2B are schematic views showing the side structure of the first embodiment of the present invention. 2A is a side view of the embodiment of the present invention, which is taken from the portion A taken by the dotted line in FIG. 1H, and the insulating protective layer 26 is disposed on the outer side of the semiconductor epitaxial multilayer composite structure 21, which includes a first An insulating layer 261 and a second insulating layer 262, the first insulating layer 261 and the second insulating layer 262 are stacked; wherein the materials of the first insulating layer 261 and the second insulating layer 262 are respectively Different refractive index materials may be made, and at least one of different refractive index materials may be selected from the group consisting of diamond-like carbon (DLC), titanium oxide (Ti x O y ), cerium oxide (SiO 2 ), and tantalum nitride (SiN). a group of gallium arsenide (GaAs) and aluminum arsenide (AlAs); the first insulating layer 261 and the second insulating layer 262 are periodically stacked periodically to have a Bragg reflector The light emitted from the surface of the flip-chip light-emitting diode of the present embodiment can be reflected by the insulating protective layer 26 to the light-emitting surface of the flip-chip light-emitting diode, thereby improving the output light rate. In this embodiment, the material of the first insulating layer 261 is cerium oxide (SiO2, refractive index: 1.55), and the material of the second insulating layer 262 is titanium dioxide (TiO 2 , refractive index: 2.51), and the first An insulating layer 261 and the second insulating layer 262 are alternately formed into a 14-layer stacked structure.

再來,請參閱圖2B係本實施例另一側面結構示意圖,除了該絕緣保護層26係設置於該半導體磊晶多層複合結構21之外側,且包含一第一絕緣層261及一第二絕緣層262之外,於該絕緣保護層26之最外側設置一金屬保護層27,該金屬保護層27可至少一選自由鋁(Al)、鈦(Ti)、鉬(Mo)、鎳(Ni)、銀(Ag)、金(Au)、鉑(Pt)、或其合金所組成之群組,因此,藉由該金屬保護層27,更能增加本實施例之覆晶式發光二極體發射至側面之光線反射至覆晶式發光二極體之出光面之反射率,進而更加提升輸出光率。在本實施例中,該金屬保護層27由銀(Ag,折射率:0.329)所構成。 2B is a schematic view showing another side structure of the present embodiment, except that the insulating protective layer 26 is disposed on the outer side of the semiconductor epitaxial multilayer composite structure 21, and includes a first insulating layer 261 and a second insulating layer. A metal protective layer 27 is disposed on the outermost side of the insulating protective layer 26, and the metal protective layer 27 can be at least one selected from the group consisting of aluminum (Al), titanium (Ti), molybdenum (Mo), and nickel (Ni). a group of silver (Ag), gold (Au), platinum (Pt), or an alloy thereof, and therefore, the flip-chip light emitting diode emission of the present embodiment can be further increased by the metal protective layer 27. The light from the side is reflected to the reflectivity of the light-emitting surface of the flip-chip light-emitting diode, thereby further increasing the output light rate. In the present embodiment, the metal protective layer 27 is composed of silver (Ag, refractive index: 0.329).

圖3A係為本發明實施例一之第一類鑽碳/導電材料多層複合結構252之堆疊結構示意圖。請參閱圖3A,其擷取於圖1G虛線所圈取之B部分,其中,該第一類鑽碳/導電材料多層複合結構252係包括一由2層類鑽碳25211與2層鈦25213交互堆疊設置而成之第一類鑽碳/金屬堆疊層2521,與一由鈦25223/鉬25222/鈦25223依序堆疊設置而成之第一金屬合金層2522,且該第一金屬合金層2522係設置於該第一類鑽碳/金屬堆疊層2521上;上述實施例一之第二類鑽碳/導電材料多層複合結構242與其第一類鑽碳/導電材料多層複合結構252具有大致相同之堆疊結構,係包括一第二類鑽碳/金屬堆疊層與一第二金屬合金層(圖未顯示),且該第二金屬合金層係設置於該第二類鑽碳/金屬堆疊層上,其中, 該第二類鑽碳/金屬堆疊層係為2層類鑽碳與2鈦交互堆疊設置之多層結構,而該第二金屬合金層亦為鈦/鉬/鈦依序堆疊設置之三層結構。然而,第一類鑽碳/導電材料多層複合結構252中之各堆疊層厚度係大於第二類鑽碳/金屬堆疊層中之各堆疊層厚度,據此,上述實施例一之第一類鑽碳/導電材料多層複合結構252與第二類鑽碳/導電材料多層複合結構242係可形成一共平面。然而,應了解的是,上述本實施例一雖採用調整堆疊層厚度之方式,使第一類鑽碳/導電材料多層複合結構252及第二類鑽碳/導電材料多層複合結構242形成共平面,但本領域熟悉該項技術者亦可以根據其所需,調整類鑽碳或導電材料(鈦、鉬)之堆疊層數,以使該第一類鑽碳/導電材料多層複合結構252與該第二類鑽碳/導電材料多層複合結構242形成一共平面,本發明並不以此為限。 3A is a schematic view showing a stacking structure of a first type of carbon/conductive material multilayer composite structure 252 according to a first embodiment of the present invention. Referring to FIG. 3A, which is taken from the portion B of the dotted line of FIG. 1G, the first type of carbon/conductive material multilayer composite structure 252 includes a layer 2 diamond-like carbon 25211 and 2 layers of titanium 25213. a first type of drilled carbon/metal stack layer 2521 formed by stacking, and a first metal alloy layer 2522 formed by sequentially stacking titanium 25223/molybdenum 25222/titanium 25223, and the first metal alloy layer 2522 is And disposed on the first type of drilled carbon/metal stack layer 2521; the second type of drilled carbon/conductive material multilayer composite structure 242 of the first embodiment has substantially the same stack as the first type of drilled carbon/conductive material multilayer composite structure 252 The structure comprises a second type of carbon/metal stack layer and a second metal alloy layer (not shown), and the second metal alloy layer is disposed on the second diamond-like carbon/metal stack layer, wherein , The second type of carbon/metal stacking layer is a multi-layer structure in which two layers of diamond-like carbon and two-titanium are alternately stacked, and the second metal alloy layer is also a three-layer structure in which titanium/molybdenum/titanium is sequentially stacked. However, the thickness of each stacked layer in the first type of carbon/conductive material multilayer composite structure 252 is greater than the thickness of each stacked layer in the second diamond-like carbon/metal stacked layer, according to which the first type of drilling of the first embodiment is The carbon/conductive material multilayer composite structure 252 and the second diamond-like carbon/conductive material multilayer composite structure 242 can form a coplanar plane. However, it should be understood that, in the first embodiment, although the thickness of the stacked layer is adjusted, the first type of carbon/conductive material multilayer composite structure 252 and the second type of carbon/conductive material multilayer composite structure 242 form a coplanar. However, those skilled in the art can also adjust the number of stacked layers of diamond-like carbon or conductive materials (titanium, molybdenum) according to their needs, so that the first type of carbon/conductive material multilayer composite structure 252 and the same The second type of carbon/conductive material multilayer composite structure 242 forms a coplanar plane, and the invention is not limited thereto.

實施例二Embodiment 2

請參考圖1A至1H,並一併參考圖3B,本實施例所製得之覆晶式發光二極體係與實施例一之結構大致相同,所不同處在於第一類鑽碳/金屬堆疊層2521係為4層類鑽碳25211與4層鈦25213交互堆疊設置而成,且第二類鑽碳/金屬堆疊層亦為4層類鑽碳與4層鈦交互堆疊設置而成(圖未顯示)。同樣地,第一類鑽碳/導電材料多層複合結構252中之堆疊層厚度係大於第二類鑽碳/金屬堆疊層,以使該第一類鑽碳/導電材料多層複合結構252與該第二類鑽碳/導電材料多層複合結構242係可形成一共平面。是以,於本實施例 二中,所形成之第一類鑽碳/導電材料多層複合結構252係包括由4層類鑽碳25211與4層鈦25213交互堆疊設置而成之第一類鑽碳/金屬堆疊層2521,以及由鈦25223/鉬25222/鈦25223依序堆疊設置而成之第一金屬合金層2522;第二類鑽碳/導電材料多層複合結構係包括由4層類鑽碳與4層鈦交互堆疊設置而成之第一類鑽碳/金屬堆疊層,以及由鈦/鉬/鈦依序堆疊設置而成之第二金屬合金層(圖未顯示)。 Referring to FIG. 1A to FIG. 1H, and referring to FIG. 3B together, the flip-chip light-emitting diode system obtained in this embodiment is substantially the same as the structure of the first embodiment, and the difference lies in the first type of carbon/metal stacking layer. The 2521 series is formed by stacking 4 layers of diamond-like carbon 25211 and 4 layers of titanium 25213, and the second type of carbon/metal stacking layer is also formed by stacking 4 layers of diamond-like carbon and 4 layers of titanium (not shown). ). Similarly, the thickness of the stacked layer in the first type of carbon/conductive material multilayer composite structure 252 is greater than the second type of carbon/metal stacked layer, so that the first type of carbon/conductive material multilayer composite structure 252 and the first The second type of carbon/conductive material multilayer composite structure 242 can form a coplanar plane. Therefore, in this embodiment In the second, the first type of carbon/conductive material multilayer composite structure 252 formed includes a first type of drilled carbon/metal stack layer 2521 which is formed by stacking 4 layers of diamond-like carbon 25211 and 4 layers of titanium 25213, and The first metal alloy layer 2522 is formed by sequentially stacking titanium 25223/molybdenum 25222/titanium 25223; the second type of carbon/conductive material multilayer composite structure comprises four layers of diamond-like carbon and four layers of titanium alternately stacked. The first type of carbon/metal stacking layer is formed, and a second metal alloy layer (not shown) is formed by sequentially stacking titanium/molybdenum/titanium.

據此,實施例二所製得覆晶式發光二極體,包括:一基板20,具有一第一表面201以及一相對於該第一表面201之第二表面202;一半導體磊晶多層複合結構21,其位於該基板20之第二表面202上且該半導體磊晶多層複合結構21包含一無摻雜半導體磊晶層211、一第一半導體磊晶層212、一活性中間層213、以及一第二半導體磊晶層214,其中,該無摻雜半導體磊晶層211、該第一半導體磊晶層212、該活性中間層213、以及該第二半導體磊晶層214係為層疊設置,而該無摻雜半導體磊晶層211係夾置於該第一半導體磊晶層212與該基板20之間,且該活性中間層213係夾置於該第一半導體磊晶層212與該第二半導體磊晶層214之間;一反射層22,位於該半導體磊晶多層複合結構21之該第二半導體磊晶層214表面;一盲孔23,設於該半導體磊晶多層複合結構21中,並貫穿該反射層22、該第二半導體磊晶層214以及該活性中間層213,而該盲孔23抵止於該第一半導體磊晶層212上;一第一電極251,該第一電極251係設置於該半導體磊晶多層複合結構21之該盲孔23上,且其位於該 半導體磊晶多層複合結構21之該第一半導體磊晶層212上方;一第一類鑽碳/導電材料多層複合結構252,係填充於該半導體磊晶多層複合結構21之該盲孔23中,並覆蓋於該第一電極251上方,且電性連接該半導體磊晶多層複合結構21之該第一半導體磊晶層212;一第一金屬焊接層29,位於該第一類鑽碳/導電材料多層複合結構252上;一第二電極241,位於該半導體磊晶多層複合結構21之該第二半導體磊晶層214上方,並經由該反射層22電性連接該半導體磊晶多層複合結構21之該第二半導體磊晶層214;一第二類鑽碳/導電材料多層複合結構242,係位於該半導體磊晶多層複合結構21之該第二電極241上方,並電性連接該半導體磊晶多層複合結構21之該第二半導體磊晶層214;一第二金屬焊接層28,位於該第二類鑽碳/導電材料多層複合結構242上;其中,該第二類鑽碳/導電材料多層複合結構242之表面與第一類鑽碳/導電材料多層複合結構252之表面係形成一共平面,且該第二金屬焊接層28之表面與該第一金屬焊接層29之表面亦形成一共平面;以及一絕緣保護層26,其隔絕所覆蓋之該第一電極251、該第二電極241、該反射層22、該第一半導體磊晶層212以及該第二半導體磊晶層214之側壁,以及該盲孔23之內壁表面,並隔絕該第一類鑽碳/導電材料多層複合結構252與該第二半導體磊晶層214之間的直接接觸。 Accordingly, the flip-chip light-emitting diode of the second embodiment comprises: a substrate 20 having a first surface 201 and a second surface 202 opposite to the first surface 201; a semiconductor epitaxial multilayer composite The structure 21 is located on the second surface 202 of the substrate 20 and the semiconductor epitaxial multilayer composite structure 21 comprises an undoped semiconductor epitaxial layer 211, a first semiconductor epitaxial layer 212, an active intermediate layer 213, and a second semiconductor epitaxial layer 214, wherein the undoped semiconductor epitaxial layer 211, the first semiconductor epitaxial layer 212, the active intermediate layer 213, and the second semiconductor epitaxial layer 214 are stacked. The undoped semiconductor epitaxial layer 211 is interposed between the first semiconductor epitaxial layer 212 and the substrate 20, and the active intermediate layer 213 is interposed between the first semiconductor epitaxial layer 212 and the first Between the two semiconductor epitaxial layers 214; a reflective layer 22 on the surface of the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21; a blind via 23 disposed in the semiconductor epitaxial multilayer composite structure 21 And extending through the reflective layer 22, the second semiconductor The epitaxial layer 214 and the active intermediate layer 213, and the blind via 23 is resisted on the first semiconductor epitaxial layer 212; a first electrode 251, the first electrode 251 is disposed on the semiconductor epitaxial multilayer composite structure 21 of the blind hole 23, and it is located at Above the first semiconductor epitaxial layer 212 of the semiconductor epitaxial multilayer composite structure 21; a first type of carbon/conductive material multilayer composite structure 252 is filled in the blind via 23 of the semiconductor epitaxial multilayer composite structure 21, And covering the first electrode 251 above the second electrode 251, and electrically connecting the first semiconductor epitaxial layer 212 of the semiconductor epitaxial multilayer structure 21; a first metal solder layer 29, located in the first diamond-like carbon/conductive material a second electrode 241 is disposed over the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer structure 21, and is electrically connected to the semiconductor epitaxial multilayer structure 21 via the reflective layer 22. The second semiconductor epitaxial layer 214; a second type of carbon/conductive material multilayer composite structure 242 is disposed above the second electrode 241 of the semiconductor epitaxial multilayer composite structure 21, and electrically connected to the semiconductor epitaxial multilayer The second semiconductor epitaxial layer 214 of the composite structure 21; a second metal solder layer 28 on the second diamond-like carbon/conductive material multilayer composite structure 242; wherein the second type of carbon/conductive material multilayer The surface of the structure 242 is coplanar with the surface of the first type of carbon/conductive material multilayer composite structure 252, and the surface of the second metal solder layer 28 and the surface of the first metal solder layer 29 also form a coplanar surface; And an insulating protective layer 26 that isolates the sidewalls of the first electrode 251, the second electrode 241, the reflective layer 22, the first semiconductor epitaxial layer 212, and the second semiconductor epitaxial layer 214, and The inner wall surface of the blind hole 23 is insulated from direct contact between the first diamond-like carbon/conductive material multilayer composite structure 252 and the second semiconductor epitaxial layer 214.

比較例Comparative example

為了比較本發明之類鑽碳/導電材料多層複合結構之散熱效果,比較例一所製得之覆晶式發光二極體,與實施例一之結構大致相同,所不同處在於第一金屬合金層與第二金屬合金層係為鈦/類鑽碳/鈦之堆疊結構;同樣地,比較例二所製得之覆晶式發光二極體,與實施例二之結構大致相同,所不同處在於第一金屬合金層與第二金屬合金層亦為鈦/類鑽碳/鈦之堆疊結構。應了解的是,一般而言,在通電的情況下,一物體之電阻越大時,流經該物體之電能越可能轉換為熱能散失。據此,實施例一、二及比較例一、二即可經由一電阻測試結果而比較其散熱效果之差異。 In order to compare the heat dissipation effect of the carbon-coated/conductive material multilayer composite structure of the present invention, the flip-chip light-emitting diode obtained in the first embodiment is substantially the same as the structure of the first embodiment, except that the first metal alloy is different. The layer and the second metal alloy layer are a titanium/dye-like carbon/titanium stack structure; similarly, the flip-chip light-emitting diode obtained in the second embodiment is substantially the same as the structure of the second embodiment, and the difference is The first metal alloy layer and the second metal alloy layer are also a titanium/dye-like carbon/titanium stack structure. It should be understood that, in general, in the case of energization, the greater the resistance of an object, the more likely it is that the electrical energy flowing through the object is converted to heat loss. Accordingly, in the first and second embodiments and the first and second comparative examples, the difference in heat dissipation effect can be compared via a resistance test result.

請參考圖4A,係為本發明實施例一、二及比較例一、二之類鑽碳/導電材料多層複合結構水平電阻測試圖,其中,橫軸為電壓(V),縱軸為電流(A)。如圖4A中所示,當第一金屬合金層與第二金屬合金層為鈦/鉬/鈦之堆疊結構時,相較於第一金屬合金層與第二金屬合金層為鈦/類鑽碳/鈦之堆疊結構,實施例一、二之類鑽碳/導電材料多層複合結構在相同電壓(V)條件下,其具有較大之電流(A),即水平電阻較小。此外,比較實施例一、二之類鑽碳/導電材料多層複合結構之水平電組測試結果,更可發現,當類鑽碳/金屬堆疊層之堆疊層數增加時,亦有助於降低其水平電阻。請參考圖4B,係為本發明實施例一、二及比較例一、二之類鑽碳/導電材料多層複合結構垂直電阻測試圖,其中,橫軸為電壓(V),縱軸為電流(A)。如圖4B所示,當第一金屬合金層與第二金屬合金層為鈦/鉬/鈦之堆疊結構時,相較於 第一金屬合金層與第二金屬合金層為鈦/類鑽碳/鈦之堆疊結構,實施例一、二之類鑽碳/導電材料多層複合結構在相同電壓(V)條件下,其具有較小之電流(A),即垂直電阻較大。同樣地,比較實施例一、二之類鑽碳/導電材料多層複合結構之垂直電組測試結果,亦可發現,當類鑽碳/金屬堆疊層之堆疊層數增加時,亦有助於提高其垂直電阻。據此,由上述兩種電阻測試結果可知,當第一金屬合金層與第二金屬合金層為鈦/鉬/鈦之堆疊結構時,類鑽碳/導電材料多層複合結構之散熱效果較佳;且當類鑽碳/金屬堆疊層之堆疊層數增加時,亦有助於改善其散熱效果。 Please refer to FIG. 4A , which is a horizontal resistance test chart of a multilayer carbon/conductive material multilayer composite structure according to the first and second embodiments of the present invention, wherein the horizontal axis is voltage (V) and the vertical axis is current ( A). As shown in FIG. 4A, when the first metal alloy layer and the second metal alloy layer are a titanium/molybdenum/titanium stacked structure, the titanium/diamond-like carbon is compared to the first metal alloy layer and the second metal alloy layer. / Titanium stacked structure, the carbon/conductive material multilayer composite structure of the first embodiment and the second embodiment has a large current (A) under the same voltage (V) condition, that is, the horizontal resistance is small. In addition, comparing the results of the horizontal electric group test of the multi-layer composite structure of the drilled carbon/conductive material such as the first and second embodiments, it is found that when the number of stacked layers of the diamond-like carbon/metal stack layer is increased, it is also helpful to reduce the Horizontal resistance. Please refer to FIG. 4B , which is a vertical resistance test diagram of a multilayer carbon/conductive material multilayer composite structure according to the first and second embodiments of the present invention, wherein the horizontal axis is voltage (V) and the vertical axis is current ( A). As shown in FIG. 4B, when the first metal alloy layer and the second metal alloy layer are a titanium/molybdenum/titanium stacked structure, The first metal alloy layer and the second metal alloy layer are titanium/dye-like carbon/titanium stacked structures, and the multilayer carbon/conductive material multilayer composite structures of Embodiments 1 and 2 are under the same voltage (V) condition. Small current (A), that is, the vertical resistance is large. Similarly, comparing the vertical electric group test results of the carbon/conductive multilayer composite structure of Examples 1 and 2, it can also be found that when the number of stacked layers of the diamond-like carbon/metal stack layer is increased, it also contributes to improvement. Its vertical resistance. Accordingly, it can be seen from the above two resistance test results that when the first metal alloy layer and the second metal alloy layer are a titanium/molybdenum/titanium stacked structure, the heat dissipation effect of the diamond-like carbon/conductive material multilayer composite structure is better; And when the number of stacked layers of the diamond-like carbon/metal stack layer is increased, it also helps to improve the heat dissipation effect.

實施例三Embodiment 3

請參考圖5,係本發明實施例三之覆晶式發光二極體之結構示意圖。如圖5所示,本實施例與前述實施例一之覆晶式發光二極體之結構大致相同,其包括:一基板40,具有一第一表面401以及一相對於該第一表面401之第二表面402;一半導體磊晶多層複合結構41,其位於該基板40之第二表面402上且該半導體磊晶多層複合結構41包含一無摻雜半導體磊晶層411、一第一半導體磊晶層412、一活性中間層413、以及一第二半導體磊晶層414,其中,該無摻雜半導體磊晶層411、該第一半導體磊晶層412、該活性中間層413、以及該第二半導體磊晶層414係為層疊設置,而該無摻雜半導體磊晶層411係夾置於該第一半導體磊晶層412與該基板40之間,且該活性中間層413係夾置於該第一半導體磊晶層412與該第二半導體磊晶層414之間;一反射層 42,位於該半導體磊晶多層複合結構41之該第二半導體磊晶層414表面;一盲孔43,設於該半導體磊晶多層複合結構41中,並貫穿該反射層42、該第二半導體磊晶層414以及該活性中間層413,而該盲孔43抵止於該第一半導體磊晶層412上;一第一電極451,該第一電極451係設置於該半導體磊晶多層複合結構41之該盲孔43上,且其位於該半導體磊晶多層複合結構41之該第一半導體磊晶層412上方;一第一類鑽碳/導電材料多層複合結構452,係填充於該半導體磊晶多層複合結構41之該盲孔43中,並覆蓋於該第一電極451上方,且電性連接該半導體磊晶多層複合結構41之該第一半導體磊晶層412;一第一金屬焊接層49,位於該第一類鑽碳/導電材料多層複合結構452上;一第二電極441,位於該半導體磊晶多層複合結構41之該第二半導體磊晶層414上方,並經由該反射層42電性連接該半導體磊晶多層複合結構41之該第二半導體磊晶層414;一第二類鑽碳/導電材料多層複合結構442,係位於該半導體磊晶多層複合結構41之該第二電極441上方,並電性連接該半導體磊晶多層複合結構41之該第二半導體磊晶層414;一第二金屬焊接層48,位於該第二類鑽碳/導電材料多層複合結構442上;其中,該第二類鑽碳/導電材料多層複合結構442之表面與第一類鑽碳/導電材料多層複合結構452之表面係形成一共平面,且該第二金屬焊接層48之表面與該第一金屬焊接層49之表面亦形成一共平面;以及一絕緣保護層46,其隔絕所覆蓋之該第一電極451、該第二電極441、該反射層42、該第一半 導體磊晶層412以及該第二半導體磊晶層414之側壁,以及該盲孔43之內壁表面,並隔絕該第一類鑽碳/導電材料多層複合結構452與該第二半導體磊晶層414之間的直接接觸;然而,不同於前述實施例一之結構,在本實施例中,該基板40之第一表面401可藉由一蝕刻處理而形成一粗糙化表面,另一方面,該基板40之第二表面402可藉由一微影處裡而形成一圖形化表面,進而有效提升本發明覆晶式發光二極體之出光率,並且可以控制本實施例之覆晶式發光二極體偏極以及光場分佈。 Please refer to FIG. 5 , which is a schematic structural diagram of a flip-chip light-emitting diode according to Embodiment 3 of the present invention. As shown in FIG. 5, the present embodiment is substantially the same as the flip-chip LED of the first embodiment, and includes a substrate 40 having a first surface 401 and a first surface 401 opposite to the first surface 401. a second surface 402; a semiconductor epitaxial multilayer composite structure 41 on the second surface 402 of the substrate 40 and the semiconductor epitaxial multilayer composite structure 41 includes an undoped semiconductor epitaxial layer 411, a first semiconductor a seed layer 412, an active intermediate layer 413, and a second semiconductor epitaxial layer 414, wherein the undoped semiconductor epitaxial layer 411, the first semiconductor epitaxial layer 412, the active intermediate layer 413, and the first The two semiconductor epitaxial layers 414 are stacked, and the undoped semiconductor epitaxial layer 411 is interposed between the first semiconductor epitaxial layer 412 and the substrate 40, and the active intermediate layer 413 is interposed. Between the first semiconductor epitaxial layer 412 and the second semiconductor epitaxial layer 414; a reflective layer 42. The surface of the second semiconductor epitaxial layer 414 of the semiconductor epitaxial multilayer composite structure 41; a blind via 43 disposed in the semiconductor epitaxial multilayer composite structure 41, and extending through the reflective layer 42 and the second semiconductor The epitaxial layer 414 and the active intermediate layer 413, and the blind via 43 is resisted on the first semiconductor epitaxial layer 412; a first electrode 451 disposed on the semiconductor epitaxial multilayer composite structure The blind hole 43 of the 41 is located above the first semiconductor epitaxial layer 412 of the semiconductor epitaxial multilayer composite structure 41; a first type of carbon/conductive material multilayer composite structure 452 is filled in the semiconductor The blind via hole 43 of the crystalline multilayer composite structure 41 is over the first electrode 451 and electrically connected to the first semiconductor epitaxial layer 412 of the semiconductor epitaxial multilayer composite structure 41; a first metal solder layer 49, on the first type of carbon/conductive material multilayer composite structure 452; a second electrode 441 is located above the second semiconductor epitaxial layer 414 of the semiconductor epitaxial multilayer composite 41, and through the reflective layer 42 Electrically connecting the semiconductor The second semiconductor epitaxial layer 414 of the epitaxial multilayer composite structure 41; a second type of carbon/conductive material multilayer composite structure 442 is disposed above the second electrode 441 of the semiconductor epitaxial multilayer composite structure 41, and is electrically The second semiconductor epitaxial layer 414 of the semiconductor epitaxial multilayer composite structure 41 is connected to the second metal-like solder layer 48 on the second diamond-like carbon/conductive material multilayer composite structure 442; wherein the second type The surface of the drilled carbon/conductive material multilayer composite structure 442 forms a coplanar surface with the surface of the first type of drilled carbon/conductive material multilayer composite structure 452, and the surface of the second metal solder layer 48 and the first metal solder layer 49 The surface also forms a common plane; and an insulating protective layer 46 is provided to isolate the first electrode 451, the second electrode 441, the reflective layer 42, the first half a conductor epitaxial layer 412 and sidewalls of the second semiconductor epitaxial layer 414, and an inner wall surface of the blind via 43 and isolating the first diamond-like carbon/conductive material multilayer composite structure 452 and the second semiconductor epitaxial layer In the present embodiment, the first surface 401 of the substrate 40 can be formed into a roughened surface by an etching process. On the other hand, the first surface 401 of the substrate 40 can be formed by an etching process. The second surface 402 of the substrate 40 can form a patterned surface by a lithography, thereby effectively improving the light-emitting rate of the flip-chip light-emitting diode of the present invention, and can control the flip-chip light-emitting light of the embodiment. Polar body polarization and light field distribution.

實施例四Embodiment 4

參考圖6,其係本實施例之晶片板上封裝結構之結構示意圖。如圖6所示,晶片板上封裝結構包括:一電路載板6;以及上述實施例一所製得之覆晶式發光二極體2,其係經由該第一金屬焊接層29以及該第二金屬焊接層28電性連接該電路載板6,其中,電路載板6包含一絕緣層61、一電路基板60、以及電性連接墊63,該絕緣層61之材質可選自由類鑽碳、氧化鋁、陶瓷、含鑽石之環氧樹脂、或者上述材質的混合物,該電路基板60係一金屬板、一陶瓷板或一矽基板。 Referring to FIG. 6, it is a schematic structural view of a package structure on a wafer board of the present embodiment. As shown in FIG. 6, the package structure on the wafer board includes: a circuit carrier board 6; and the flip chip type light emitting diode 2 obtained in the first embodiment, through the first metal solder layer 29 and the first The two-metal soldering layer 28 is electrically connected to the circuit carrier board 6. The circuit carrier board 6 includes an insulating layer 61, a circuit board 60, and an electrical connection pad 63. The material of the insulating layer 61 can be selected from diamond-like carbon. The aluminum oxide, the ceramic, the diamond-containing epoxy resin, or a mixture of the above materials, the circuit substrate 60 is a metal plate, a ceramic plate or a substrate.

於該晶片板上封裝結構中,可利用形成於電性連接墊63表面之焊料62,透過覆晶方式,使該第一金屬焊接層29以及該第二金屬焊接層28與該電路載板6之電性連接墊63達到電性連接。 In the package structure of the wafer board, the first metal solder layer 29 and the second metal solder layer 28 and the circuit carrier 6 can be formed by soldering through the solder 62 formed on the surface of the electrical connection pad 63. The electrical connection pads 63 are electrically connected.

實施例五Embodiment 5

參考圖7,其係本實施例之晶片板上封裝結構之結構示意圖。如圖7所示,晶片板上封裝結構包括:一電路載板6;以及上述實施例二所製得之覆晶式發光二極體4,其係經由該第一金屬焊接層49以及該第二金屬焊接層48電性連接該電路載板6,其中,電路載板6包含一絕緣層61、一電路基板60、以及電性連接墊63,該絕緣層61之材質可選自由類鑽碳、氧化鋁、陶瓷、含鑽石之環氧樹脂、或者上述材質的混合物,該電路基板60係一金屬板、一陶瓷板或一矽基板。 Referring to FIG. 7, it is a schematic structural view of a package structure on a wafer board of the present embodiment. As shown in FIG. 7, the package structure on the wafer board includes: a circuit carrier 6; and the flip chip type light emitting diode 4 obtained in the second embodiment, through the first metal solder layer 49 and the first The second metal soldering layer 48 is electrically connected to the circuit carrier board 6. The circuit carrier board 6 includes an insulating layer 61, a circuit board 60, and an electrical connection pad 63. The insulating layer 61 is made of a diamond-like carbon. The aluminum oxide, the ceramic, the diamond-containing epoxy resin, or a mixture of the above materials, the circuit substrate 60 is a metal plate, a ceramic plate or a substrate.

於該晶片板上封裝結構中,可利用形成於電性連接墊63表面之焊料62,透過覆晶方式,使該第一金屬焊接層49以及該第二金屬焊接層48與該電路載板6之電性連接墊63達到電性連接。 In the package structure of the wafer board, the first metal solder layer 49 and the second metal solder layer 48 and the circuit carrier 6 can be formed by soldering through the solder 62 formed on the surface of the electrical connection pad 63. The electrical connection pads 63 are electrically connected.

綜上所述,本發明之覆晶式發光二極體,其具有緩衝熱膨脹係數差異(coefficient thermal expansion mismatch)及集中出光的結構設計,可在發光二極體運作產生熱量的過程中持續使熱量散失。即使有部分熱量沒有自發光二極體中散失而促使整體結構產生熱膨脹,其中設置的類鑽碳/導電材料多層複合結構亦可緩衝對應的熱應力,而保護不受損傷,並且能匯聚光束於出光面而提升出光率。 In summary, the flip-chip light-emitting diode of the present invention has a structural thermal expansion mismatch and a concentrated light-emitting structure design, and can continuously heat the heat generated by the light-emitting diode. Lost. Even if some of the heat is not dissipated in the self-luminous diode to promote thermal expansion of the overall structure, the multi-layer composite structure of the diamond-like carbon/conductive material disposed therein can buffer the corresponding thermal stress, and the protection is not damaged, and the beam can be concentrated. Glow out the light and increase the light rate.

上述實施例僅係為了方便說明而舉例而已,本發明所主張之權利範圍自應以申請專利範圍所述為準,而非僅限於上述實施例。 The above-mentioned embodiments are merely examples for convenience of description, and the scope of the claims is intended to be limited to the above embodiments.

2、4‧‧‧覆晶式發光二極體 2, 4‧‧‧ flip-chip light-emitting diode

20、40‧‧‧基板 20, 40‧‧‧ substrate

201、401‧‧‧第一表面 201, 401‧‧‧ first surface

202、402‧‧‧第二表面 202, 402‧‧‧ second surface

21、41‧‧‧半導體磊晶多層複合結構 21, 41‧‧‧Semiconductor epitaxial multilayer composite structure

211、411‧‧‧無摻雜半導體磊晶層 211, 411‧‧‧ undoped semiconductor epitaxial layer

212、412‧‧‧第一半導體磊晶層 212, 412‧‧‧ first semiconductor epitaxial layer

213、413‧‧‧活性中間層 213, 413‧‧‧ active intermediate layer

214、414‧‧‧第二半導體磊晶層 214, 414‧‧‧Second semiconductor epitaxial layer

22、42‧‧‧反射層 22, 42‧‧‧reflective layer

23、43‧‧‧盲孔 23, 43‧‧ ‧ blind holes

241、441‧‧‧第二電極 2411, 441‧‧‧ second electrode

242、442‧‧‧第二類鑽碳/導電材料多層複合結構 242, 442‧‧‧Second type of carbon/conductive material multilayer composite structure

251、451‧‧‧第一電極 251, ‧‧‧‧first electrode

252、452‧‧‧第一類鑽碳/導電材料多層複合結構 252, 452‧‧‧First class of carbon/conductive material multilayer composite structures

2521‧‧‧第一類鑽碳/金屬堆疊層 2521‧‧‧First class carbon/metal stacking layer

25211‧‧‧類鑽碳 25211‧‧‧Drilling carbon

25213,25223‧‧‧鈦 25213,25223‧‧‧Titanium

2522‧‧‧第一金屬合金層 2522‧‧‧First metal alloy layer

25222‧‧‧鉬 25222‧‧‧Mo

26、46‧‧‧絕緣保護層 26, 46‧‧‧Insulating protective layer

261‧‧‧第一絕緣層 261‧‧‧First insulation

262‧‧‧第二絕緣層 262‧‧‧Second insulation

27‧‧‧金屬保護層 27‧‧‧Metal protective layer

28、48‧‧‧第二金屬焊接層 28, 48‧‧‧Second metal welding layer

29、49‧‧‧第一金屬焊接層 29, 49‧‧‧First metal welding layer

6‧‧‧電路載板 6‧‧‧Circuit carrier board

60‧‧‧電路基板 60‧‧‧ circuit board

61‧‧‧絕緣層 61‧‧‧Insulation

62‧‧‧焊料 62‧‧‧ solder

63‧‧‧電性連接墊 63‧‧‧Electrical connection pads

圖1A至圖1H係本發明實施例一之覆晶式發光二極體之製備方法的流程結構示意圖。 1A to FIG. 1H are schematic structural diagrams showing a method for preparing a flip-chip light-emitting diode according to Embodiment 1 of the present invention.

圖2A及圖2B係本發明實施例一之側面結構示意圖。 2A and 2B are schematic views showing the side structure of the first embodiment of the present invention.

圖3A及圖3B係本發明覆晶式發光二極體之類鑽碳/導電材料多層複合結構示意圖。 3A and 3B are schematic views showing a multi-layer composite structure of a drilled carbon/conductive material such as a flip-chip type light-emitting diode of the present invention.

圖4A及圖4B係本發明覆晶式發光二極體之類鑽碳/導電材料多層複合結構電阻測試圖。 4A and FIG. 4B are resistance test diagrams of a multi-layer composite structure of a drilled carbon/conductive material such as a flip-chip type light-emitting diode of the present invention.

圖5係本發明實施例二之覆晶式發光二極體之結構示意圖。 FIG. 5 is a schematic structural view of a flip-chip type light emitting diode according to Embodiment 2 of the present invention.

圖6顯示本發明實施例一中晶片板上封裝結構之結構示意圖。 FIG. 6 is a schematic view showing the structure of a package structure on a wafer board in the first embodiment of the present invention.

圖7顯示本發明實施例二中晶片板上封裝結構之結構示意圖。 FIG. 7 is a schematic structural view showing a package structure on a wafer board in Embodiment 2 of the present invention.

2‧‧‧覆晶式發光二極體 2‧‧‧Flip-chip light-emitting diode

20‧‧‧基板 20‧‧‧Substrate

201‧‧‧第一表面 201‧‧‧ first surface

202‧‧‧第二表面 202‧‧‧ second surface

21‧‧‧半導體磊晶多層複合結構 21‧‧‧Semiconductor epitaxial multilayer composite structure

211‧‧‧無摻雜半導體磊晶層 211‧‧‧ Undoped semiconductor epitaxial layer

212‧‧‧第一半導體磊晶層 212‧‧‧First semiconductor epitaxial layer

213‧‧‧活性中間層 213‧‧‧Active intermediate layer

214‧‧‧第二半導體磊晶層 214‧‧‧Second semiconductor epitaxial layer

22‧‧‧反射層 22‧‧‧reflective layer

23‧‧‧盲孔 23‧‧‧Blind holes

241‧‧‧第二電極 241‧‧‧second electrode

242‧‧‧第二類鑽碳/導電材料多層複合結構 242‧‧‧Second type of carbon/conductive material multilayer composite structure

251‧‧‧第一電極 251‧‧‧First electrode

252‧‧‧第一類鑽碳/導電材料多層複合結構 252‧‧‧First class of carbon/conductive material multilayer composite structure

26‧‧‧絕緣保護層 26‧‧‧Insulation protection layer

28‧‧‧第二金屬焊接層 28‧‧‧Second metal soldering layer

29‧‧‧第一金屬焊接層 29‧‧‧First metal soldering layer

Claims (22)

一種覆晶式發光二極體,包括:一基板,具有一第一表面以及一相對於該第一表面之第二表面;一半導體磊晶多層複合結構,其位於該基板之該第二表面上方且包含一第一半導體磊晶層、一第二半導體磊晶層以及一盲孔,其中,該第一半導體磊晶層與該第二半導體磊晶層係層疊設置,且該盲孔貫穿該第二半導體磊晶層;一第一電極,位於該半導體磊晶多層複合結構之該第一半導體磊晶層上方;一第一類鑽碳/導電材料多層複合結構,係填充於該半導體磊晶多層複合結構之該盲孔中,並覆蓋於該第一電極上方,且電性連接該半導體磊晶多層複合結構之該第一半導體磊晶層;一第二電極,位於該半導體磊晶多層複合結構之該第二半導體磊晶層上方;以及一第二類鑽碳/導電材料多層複合結構,位於該半導體磊晶多層複合結構之該第二電極上方,並電性連接該半導體磊晶多層複合結構之該第二半導體磊晶層。 A flip-chip light emitting diode comprising: a substrate having a first surface and a second surface opposite to the first surface; a semiconductor epitaxial multilayer composite structure over the second surface of the substrate And including a first semiconductor epitaxial layer, a second semiconductor epitaxial layer, and a blind via, wherein the first semiconductor epitaxial layer and the second semiconductor epitaxial layer are stacked, and the blind via extends through the a semiconductor epitaxial layer; a first electrode located above the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; a first type of carbon/conductive material multilayer composite structure filled with the semiconductor epitaxial multilayer The blind hole of the composite structure covers the first electrode and is electrically connected to the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; and a second electrode is disposed on the semiconductor epitaxial multilayer composite structure Above the second semiconductor epitaxial layer; and a second type of carbon/conductive material multilayer composite structure, located above the second electrode of the semiconductor epitaxial multilayer composite structure, and electrically connected The semiconductor epitaxial semiconductor epitaxial layer of the second multilayer composite structures. 如申請專利範圍第1項所述之覆晶式發光二極體,更包括一絕緣保護層,係覆蓋該半導體磊晶多層複合結構之該第一半導體磊晶層之側壁以及該第二半導體磊晶層之側壁,以及該盲孔之內壁表面,以隔絕及該第一類鑽碳/導電材料多層複合結構與該第二半導體磊晶層之間的接觸。 The flip-chip light-emitting diode according to claim 1, further comprising an insulating protective layer covering the sidewall of the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure and the second semiconductor beam a sidewall of the crystal layer and an inner wall surface of the blind via to isolate contact between the first type of carbon/conductive material multilayer composite structure and the second semiconductor epitaxial layer. 如申請專利範圍第2項所述之覆晶式發光二極體,其中,該絕緣保護層係由兩種或以上之不同折射率材料堆疊設置。 The flip-chip light-emitting diode according to claim 2, wherein the insulating protective layer is provided by stacking two or more different refractive index materials. 如申請專利範圍第3項所述之覆晶式發光二極體,其中,該不同折射率材料係至少一選自由絕緣類鑽碳(Isolated DLC)、氧化鈦(TixOy)、二氧化矽(SiO2)、砷化鎵(GaAs)、以及砷化鋁(AlAs)所組成之群組。 The flip-chip light-emitting diode according to claim 3, wherein the different refractive index material is at least one selected from the group consisting of insulated carbon (Isolated DLC), titanium oxide (Ti x O y ), and dioxide. A group consisting of yttrium (SiO2), gallium arsenide (GaAs), and aluminum arsenide (AlAs). 如申請專利範圍第2項所述之覆晶式發光二極體,更包括在該絕緣保護層之外側設置一金屬保護層。 The flip-chip light-emitting diode according to claim 2, further comprising a metal protective layer disposed on an outer side of the insulating protective layer. 如申請專利範圍第5項所述之覆晶式發光二極體,其中,該金屬保護層係至少一選自由鋁(Al)、鈦(Ti)、鉬(Mo)、鎳(Ni)、銀(Ag)、金(Au)、鉑(Pt)、或其合金所組成之群組。 The flip-chip light-emitting diode according to claim 5, wherein the metal protective layer is at least one selected from the group consisting of aluminum (Al), titanium (Ti), molybdenum (Mo), nickel (Ni), and silver. A group consisting of (Ag), gold (Au), platinum (Pt), or an alloy thereof. 如申請專利範圍第1項所述之覆晶式發光二極體,其中,該第二表面係為一圖形化表面。 The flip-chip light-emitting diode according to claim 1, wherein the second surface is a patterned surface. 如申請專利範圍第1項所述之覆晶式發光二極體,其中,該第一表面係為一圖形化表面或一粗糙化表面。 The flip-chip light-emitting diode according to claim 1, wherein the first surface is a patterned surface or a roughened surface. 如申請專利範圍第1項所述之覆晶式發光二極體,該半導體磊晶多層複合結構更包括一無摻雜半導體磊晶層,該無摻雜半導體磊晶層係夾置於該第一半導體磊晶層與該基板之該第二表面之間。 The flip-chip light-emitting diode according to claim 1, wherein the semiconductor epitaxial multilayer composite further comprises an undoped semiconductor epitaxial layer, the undoped semiconductor epitaxial layer being interposed A semiconductor epitaxial layer is between the second surface of the substrate. 如申請專利範圍第1項所述之覆晶式發光二極體,該半導體磊晶多層複合結構更包括一活性中間層,該活性中間層係夾置於該第一半導體磊晶層與該第二半導體磊晶層之間。 The flip-chip light-emitting diode according to claim 1, wherein the semiconductor epitaxial multilayer composite further comprises an active intermediate layer interposed between the first semiconductor epitaxial layer and the first Between two semiconductor epitaxial layers. 如申請專利範圍第1項所述之覆晶式發光二極體,其中,該第一類鑽碳/導電材料多層複合結構係包括一第一類鑽碳/金屬堆疊層與一第一金屬合金層,且該第一金屬合金層係設置於該第一類鑽碳/金屬堆疊層上;以及該第二類鑽碳/導電材料多層複合結構係包括一第二類鑽碳/金屬堆疊層與一第二金屬合金層,且該第二金屬合金層係設置於該第二類鑽碳/金屬堆疊層上。 The flip-chip light-emitting diode according to claim 1, wherein the first type of carbon/conductive material multilayer composite structure comprises a first type of carbon/metal stack and a first metal alloy. a layer, and the first metal alloy layer is disposed on the first diamond-like carbon/metal stack layer; and the second diamond-like carbon/conductive material multilayer composite structure includes a second diamond-like carbon/metal stack layer and a second metal alloy layer, and the second metal alloy layer is disposed on the second diamond-like carbon/metal stack layer. 如申請專利範圍第11項所述之覆晶式發光二極體,其中,該第一類鑽碳/金屬堆疊層、以及該第二類鑽碳/金屬堆疊層係為1至10層類鑽碳與1至10層鈦交互堆疊設置之多層結構,並且以類鑽碳各自獨立電性連接該第一金屬合金層及該第二金屬合金層。 The flip-chip light-emitting diode according to claim 11, wherein the first type of carbon/metal stacking layer and the second type of carbon/metal stacking layer are 1 to 10 layers of diamonds The carbon and the 1 to 10 layers of titanium are alternately stacked to form a multi-layer structure, and the first metal alloy layer and the second metal alloy layer are electrically connected to each other independently by the diamond-like carbon. 如申請專利範圍第11項所述之覆晶式發光二極體,其中,該第一類鑽碳/金屬堆疊層、以及該第二類鑽碳/金屬堆疊層係為2至4層類鑽碳與2至4層鈦交互堆疊設置之多層結構。 The flip-chip light emitting diode according to claim 11, wherein the first type of carbon/metal stacking layer and the second type of carbon/metal stacking layer are 2 to 4 layers of diamonds A multi-layer structure in which carbon is alternately stacked with 2 to 4 layers of titanium. 如申請專利範圍第11項所述之覆晶式發光二極體,其中,該第一金屬合金層、以及該第二金屬合金層係為鈦/鉬/鈦依序堆疊設置之三層結構,並且以鈦各自獨立電性連接該第一類鑽碳/金屬堆疊層、以及該第二類鑽碳/金屬堆疊層。 The flip-chip light-emitting diode according to claim 11, wherein the first metal alloy layer and the second metal alloy layer are three-layer structure in which titanium/molybdenum/titanium are sequentially stacked. And electrically interconnecting the first diamond-like carbon/metal stack layer and the second diamond-like carbon/metal stack layer with titanium. 如申請專利範圍第1項所述之覆晶式發光二極體,其中,該第一類鑽碳/導電材料多層複合結構之表面與 該第二類鑽碳/導電材料多層複合結構之表面係形成一共平面。 The flip-chip light-emitting diode according to claim 1, wherein the surface of the first type of carbon/conductive material multilayer composite structure is The surface of the second type of carbon/conductive material multilayer composite structure forms a coplanar plane. 如申請專利範圍第1項所述之覆晶式發光二極體,更包括:一第一金屬焊接層,位於該第一類鑽碳/導電材料多層複合結構上;以及一第二金屬焊接層,位於該第二類鑽碳/導電材料多層複合結構上,其中,該第二金屬焊接層之表面與該第一金屬焊接層之表面係形成一共平面。 The flip-chip light-emitting diode according to claim 1, further comprising: a first metal solder layer on the first type of carbon/conductive material multilayer composite structure; and a second metal solder layer The second metal-welded layer has a surface that is coplanar with the surface of the first metal solder layer. 如申請專利範圍第16項所述之覆晶式發光二極體,該第一金屬焊接層或該第二金屬焊接層之材質係選自由鎳(Ni)、鈦(Ti)、鋁(Al)、鉑(Pt)、金(Au)、錫(Sn)、銦(In)、鉻(Cr)、或其合金所組群組之至少一者。 The flip-chip light-emitting diode according to claim 16, wherein the material of the first metal solder layer or the second metal solder layer is selected from the group consisting of nickel (Ni), titanium (Ti), and aluminum (Al). At least one of the group consisting of platinum (Pt), gold (Au), tin (Sn), indium (In), chromium (Cr), or alloys thereof. 如申請專利範圍第1項所述之覆晶式發光二極體,更包含一反射層,夾置於該半導體磊晶多層複合結構與該第二電極之間。 The flip-chip light-emitting diode according to claim 1, further comprising a reflective layer sandwiched between the semiconductor epitaxial multilayer composite structure and the second electrode. 如申請專利範圍第1項所述之覆晶式發光二極體,其中,該第一半導體磊晶層、該第一電極以及該第一類鑽碳/導電材料多層複合結構係N型,該第二半導體磊晶層、該第二電極以及該第二類鑽碳/導電材料多層複合結構係P型。 The flip-chip light-emitting diode according to claim 1, wherein the first semiconductor epitaxial layer, the first electrode, and the first diamond-like carbon/conductive material multilayer composite structure are N-type, The second semiconductor epitaxial layer, the second electrode, and the second diamond-like carbon/conductive material multilayer composite structure are P-type. 一種晶片板上封裝結構(chip on board,COB),包括:一電路載板;以及 一如申請專利範圍第1項至第19項中任一項所述之覆晶式發光二極體,其係經由該第一金屬焊接層以及該第二金屬焊接層封裝於該電路載板。 A chip on board (COB) comprising: a circuit carrier; The flip-chip light-emitting diode according to any one of the preceding claims, wherein the first metal solder layer and the second metal solder layer are encapsulated on the circuit carrier. 如申請專利範圍第20項所述之覆晶片板上封裝結構,其中,該電路載板包含一絕緣層、以及一電路基板,該絕緣層之材質係選自由類鑽碳、氧化鋁、陶瓷、以及含鑽石之環氧樹脂所組群組之至少一者。 The package structure on a wafer-on-board according to claim 20, wherein the circuit carrier comprises an insulating layer and a circuit substrate, the material of the insulating layer is selected from the group consisting of diamond-like carbon, alumina, ceramic, And at least one of the groups of diamond-containing epoxy resins. 如申請專利範圍第21項所述之覆晶片板上封裝結構,其中,該電路基板係一金屬板、一陶瓷板或一矽基板。 The package structure on a wafer-on-board according to claim 21, wherein the circuit substrate is a metal plate, a ceramic plate or a substrate.
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